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mfd: db8500-prcmu: Supply the pdata_size attribute for db8500-thermal
[mirror_ubuntu-bionic-kernel.git] / drivers / mfd / ab8500-core.c
CommitLineData
62579266
RV		 1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License v2
5 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
6 * Author: Rabin Vincent <rabin.vincent@stericsson.com>
adceed62 7 * Author: Mattias Wallin <mattias.wallin@stericsson.com>
62579266
RV		 8 */
9
10#include <linux/kernel.h>
11#include <linux/slab.h>
12#include <linux/init.h>
13#include <linux/irq.h>
06e589ef 14#include <linux/irqdomain.h>
62579266
RV		 15#include <linux/delay.h>
16#include <linux/interrupt.h>
17#include <linux/module.h>
18#include <linux/platform_device.h>
19#include <linux/mfd/core.h>
47c16975 20#include <linux/mfd/abx500.h>
ee66e653 21#include <linux/mfd/abx500/ab8500.h>
00441b5e 22#include <linux/mfd/abx500/ab8500-bm.h>
d28f1db8 23#include <linux/mfd/dbx500-prcmu.h>
549931f9 24#include <linux/regulator/ab8500.h>
6bc4a568
LJ		 25#include <linux/of.h>
26#include <linux/of_device.h>
62579266
RV		 27
28/*
29 * Interrupt register offsets
30 * Bank : 0x0E
31 */
47c16975
MW		 32#define AB8500_IT_SOURCE1_REG 0x00
33#define AB8500_IT_SOURCE2_REG 0x01
34#define AB8500_IT_SOURCE3_REG 0x02
35#define AB8500_IT_SOURCE4_REG 0x03
36#define AB8500_IT_SOURCE5_REG 0x04
37#define AB8500_IT_SOURCE6_REG 0x05
38#define AB8500_IT_SOURCE7_REG 0x06
39#define AB8500_IT_SOURCE8_REG 0x07
d6255529 40#define AB9540_IT_SOURCE13_REG 0x0C
47c16975
MW		 41#define AB8500_IT_SOURCE19_REG 0x12
42#define AB8500_IT_SOURCE20_REG 0x13
43#define AB8500_IT_SOURCE21_REG 0x14
44#define AB8500_IT_SOURCE22_REG 0x15
45#define AB8500_IT_SOURCE23_REG 0x16
46#define AB8500_IT_SOURCE24_REG 0x17
62579266
RV		 47
48/*
49 * latch registers
50 */
47c16975
MW		 51#define AB8500_IT_LATCH1_REG 0x20
52#define AB8500_IT_LATCH2_REG 0x21
53#define AB8500_IT_LATCH3_REG 0x22
54#define AB8500_IT_LATCH4_REG 0x23
55#define AB8500_IT_LATCH5_REG 0x24
56#define AB8500_IT_LATCH6_REG 0x25
57#define AB8500_IT_LATCH7_REG 0x26
58#define AB8500_IT_LATCH8_REG 0x27
59#define AB8500_IT_LATCH9_REG 0x28
60#define AB8500_IT_LATCH10_REG 0x29
92d50a41 61#define AB8500_IT_LATCH12_REG 0x2B
d6255529 62#define AB9540_IT_LATCH13_REG 0x2C
47c16975
MW		 63#define AB8500_IT_LATCH19_REG 0x32
64#define AB8500_IT_LATCH20_REG 0x33
65#define AB8500_IT_LATCH21_REG 0x34
66#define AB8500_IT_LATCH22_REG 0x35
67#define AB8500_IT_LATCH23_REG 0x36
68#define AB8500_IT_LATCH24_REG 0x37
62579266
RV		 69
70/*
71 * mask registers
72 */
73
47c16975
MW		 74#define AB8500_IT_MASK1_REG 0x40
75#define AB8500_IT_MASK2_REG 0x41
76#define AB8500_IT_MASK3_REG 0x42
77#define AB8500_IT_MASK4_REG 0x43
78#define AB8500_IT_MASK5_REG 0x44
79#define AB8500_IT_MASK6_REG 0x45
80#define AB8500_IT_MASK7_REG 0x46
81#define AB8500_IT_MASK8_REG 0x47
82#define AB8500_IT_MASK9_REG 0x48
83#define AB8500_IT_MASK10_REG 0x49
84#define AB8500_IT_MASK11_REG 0x4A
85#define AB8500_IT_MASK12_REG 0x4B
86#define AB8500_IT_MASK13_REG 0x4C
87#define AB8500_IT_MASK14_REG 0x4D
88#define AB8500_IT_MASK15_REG 0x4E
89#define AB8500_IT_MASK16_REG 0x4F
90#define AB8500_IT_MASK17_REG 0x50
91#define AB8500_IT_MASK18_REG 0x51
92#define AB8500_IT_MASK19_REG 0x52
93#define AB8500_IT_MASK20_REG 0x53
94#define AB8500_IT_MASK21_REG 0x54
95#define AB8500_IT_MASK22_REG 0x55
96#define AB8500_IT_MASK23_REG 0x56
97#define AB8500_IT_MASK24_REG 0x57
a29264b6 98#define AB8500_IT_MASK25_REG 0x58
47c16975 99
7ccfe9b1
MJ		 100/*
101 * latch hierarchy registers
102 */
103#define AB8500_IT_LATCHHIER1_REG 0x60
104#define AB8500_IT_LATCHHIER2_REG 0x61
105#define AB8500_IT_LATCHHIER3_REG 0x62
3e1a498f 106#define AB8540_IT_LATCHHIER4_REG 0x63
7ccfe9b1
MJ		 107
108#define AB8500_IT_LATCHHIER_NUM 3
3e1a498f 109#define AB8540_IT_LATCHHIER_NUM 4
7ccfe9b1 110
47c16975 111#define AB8500_REV_REG 0x80
0f620837 112#define AB8500_IC_NAME_REG 0x82
e5c238c3 113#define AB8500_SWITCH_OFF_STATUS 0x00
62579266 114
b4a31037 115#define AB8500_TURN_ON_STATUS 0x00
93ff722e 116#define AB8505_TURN_ON_STATUS_2 0x04
b4a31037 117
f04a9d8a
RK		 118#define AB8500_CH_USBCH_STAT1_REG 0x02
119#define VBUS_DET_DBNC100 0x02
120#define VBUS_DET_DBNC1 0x01
121
122static DEFINE_SPINLOCK(on_stat_lock);
123static u8 turn_on_stat_mask = 0xFF;
124static u8 turn_on_stat_set;
6ef9418c
RA		 125static bool no_bm; /* No battery management */
126module_param(no_bm, bool, S_IRUGO);
127
d6255529
LW		 128#define AB9540_MODEM_CTRL2_REG 0x23
129#define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT BIT(2)
130
62579266
RV		 131/*
132 * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt
2ced445e
LW		 133 * numbers are indexed into this array with (num / 8). The interupts are
134 * defined in linux/mfd/ab8500.h
62579266
RV		 135 *
136 * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at
137 * offset 0.
138 */
2ced445e 139/* AB8500 support */
62579266 140static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = {
92d50a41 141 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21,
62579266
RV		 142};
143
a29264b6 144/* AB9540 / AB8505 support */
d6255529 145static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = {
a29264b6 146 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22, 23
d6255529
LW		 147};
148
3e1a498f
LJ		 149/* AB8540 support */
150static const int ab8540_irq_regoffset[AB8540_NUM_IRQ_REGS] = {
151 0, 1, 2, 3, 4, -1, -1, -1, -1, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22, 23,
152 25, 26, 27, 28, 29, 30, 31,
153};
154
0f620837
LW		 155static const char ab8500_version_str[][7] = {
156 [AB8500_VERSION_AB8500] = "AB8500",
157 [AB8500_VERSION_AB8505] = "AB8505",
158 [AB8500_VERSION_AB9540] = "AB9540",
159 [AB8500_VERSION_AB8540] = "AB8540",
160};
161
822672a7 162static int ab8500_prcmu_write(struct ab8500 *ab8500, u16 addr, u8 data)
d28f1db8
LJ		 163{
164 int ret;
165
166 ret = prcmu_abb_write((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
167 if (ret < 0)
168 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
169 return ret;
170}
171
822672a7 172static int ab8500_prcmu_write_masked(struct ab8500 *ab8500, u16 addr, u8 mask,
d28f1db8
LJ		 173 u8 data)
174{
175 int ret;
176
177 ret = prcmu_abb_write_masked((u8)(addr >> 8), (u8)(addr & 0xFF), &data,
178 &mask, 1);
179 if (ret < 0)
180 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
181 return ret;
182}
183
822672a7 184static int ab8500_prcmu_read(struct ab8500 *ab8500, u16 addr)
d28f1db8
LJ		 185{
186 int ret;
187 u8 data;
188
189 ret = prcmu_abb_read((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
190 if (ret < 0) {
191 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
192 return ret;
193 }
194 return (int)data;
195}
196
47c16975
MW		 197static int ab8500_get_chip_id(struct device *dev)
198{
6bce7bf1
MW		 199 struct ab8500 *ab8500;
200
201 if (!dev)
202 return -EINVAL;
203 ab8500 = dev_get_drvdata(dev->parent);
204 return ab8500 ? (int)ab8500->chip_id : -EINVAL;
47c16975
MW		 205}
206
207static int set_register_interruptible(struct ab8500 *ab8500, u8 bank,
208 u8 reg, u8 data)
62579266
RV		 209{
210 int ret;
47c16975
MW		 211 /*
212 * Put the u8 bank and u8 register together into a an u16.
213 * The bank on higher 8 bits and register in lower 8 bits.
214 * */
215 u16 addr = ((u16)bank) << 8 | reg;
62579266
RV		 216
217 dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data);
218
392cbd1e 219 mutex_lock(&ab8500->lock);
47c16975 220
62579266
RV		 221 ret = ab8500->write(ab8500, addr, data);
222 if (ret < 0)
223 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
224 addr, ret);
47c16975 225 mutex_unlock(&ab8500->lock);
62579266
RV		 226
227 return ret;
228}
229
47c16975
MW		 230static int ab8500_set_register(struct device *dev, u8 bank,
231 u8 reg, u8 value)
62579266 232{
112a80d2 233 int ret;
47c16975 234 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
62579266 235
112a80d2
JA		 236 atomic_inc(&ab8500->transfer_ongoing);
237 ret = set_register_interruptible(ab8500, bank, reg, value);
238 atomic_dec(&ab8500->transfer_ongoing);
239 return ret;
62579266 240}
62579266 241
47c16975
MW		 242static int get_register_interruptible(struct ab8500 *ab8500, u8 bank,
243 u8 reg, u8 *value)
62579266
RV		 244{
245 int ret;
47c16975
MW		 246 /* put the u8 bank and u8 reg together into a an u16.
247 * bank on higher 8 bits and reg in lower */
248 u16 addr = ((u16)bank) << 8 | reg;
249
392cbd1e 250 mutex_lock(&ab8500->lock);
62579266
RV		 251
252 ret = ab8500->read(ab8500, addr);
253 if (ret < 0)
254 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
255 addr, ret);
47c16975
MW		 256 else
257 *value = ret;
62579266 258
47c16975 259 mutex_unlock(&ab8500->lock);
62579266
RV		 260 dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret);
261
262 return ret;
263}
264
47c16975
MW		 265static int ab8500_get_register(struct device *dev, u8 bank,
266 u8 reg, u8 *value)
62579266 267{
112a80d2 268 int ret;
47c16975 269 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
62579266 270
112a80d2
JA		 271 atomic_inc(&ab8500->transfer_ongoing);
272 ret = get_register_interruptible(ab8500, bank, reg, value);
273 atomic_dec(&ab8500->transfer_ongoing);
274 return ret;
62579266 275}
47c16975
MW		 276
277static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank,
278 u8 reg, u8 bitmask, u8 bitvalues)
62579266
RV		 279{
280 int ret;
47c16975
MW		 281 /* put the u8 bank and u8 reg together into a an u16.
282 * bank on higher 8 bits and reg in lower */
283 u16 addr = ((u16)bank) << 8 | reg;
62579266 284
392cbd1e 285 mutex_lock(&ab8500->lock);
62579266 286
bc628fd1
MN		 287 if (ab8500->write_masked == NULL) {
288 u8 data;
62579266 289
bc628fd1
MN		 290 ret = ab8500->read(ab8500, addr);
291 if (ret < 0) {
292 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
293 addr, ret);
294 goto out;
295 }
62579266 296
bc628fd1
MN		 297 data = (u8)ret;
298 data = (~bitmask & data) | (bitmask & bitvalues);
299
300 ret = ab8500->write(ab8500, addr, data);
301 if (ret < 0)
302 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
303 addr, ret);
62579266 304
bc628fd1
MN		 305 dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr,
306 data);
307 goto out;
308 }
309 ret = ab8500->write_masked(ab8500, addr, bitmask, bitvalues);
310 if (ret < 0)
311 dev_err(ab8500->dev, "failed to modify reg %#x: %d\n", addr,
312 ret);
62579266
RV		 313out:
314 mutex_unlock(&ab8500->lock);
315 return ret;
316}
47c16975
MW		 317
318static int ab8500_mask_and_set_register(struct device *dev,
319 u8 bank, u8 reg, u8 bitmask, u8 bitvalues)
320{
112a80d2 321 int ret;
47c16975
MW		 322 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
323
112a80d2
JA		 324 atomic_inc(&ab8500->transfer_ongoing);
325 ret= mask_and_set_register_interruptible(ab8500, bank, reg,
326 bitmask, bitvalues);
327 atomic_dec(&ab8500->transfer_ongoing);
328 return ret;
47c16975
MW		 329}
330
331static struct abx500_ops ab8500_ops = {
332 .get_chip_id = ab8500_get_chip_id,
333 .get_register = ab8500_get_register,
334 .set_register = ab8500_set_register,
335 .get_register_page = NULL,
336 .set_register_page = NULL,
337 .mask_and_set_register = ab8500_mask_and_set_register,
338 .event_registers_startup_state_get = NULL,
339 .startup_irq_enabled = NULL,
1d843a6c 340 .dump_all_banks = ab8500_dump_all_banks,
47c16975 341};
62579266 342
9505a0a0 343static void ab8500_irq_lock(struct irq_data *data)
62579266 344{
9505a0a0 345 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
62579266
RV		 346
347 mutex_lock(&ab8500->irq_lock);
112a80d2 348 atomic_inc(&ab8500->transfer_ongoing);
62579266
RV		 349}
350
9505a0a0 351static void ab8500_irq_sync_unlock(struct irq_data *data)
62579266 352{
9505a0a0 353 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
62579266
RV		 354 int i;
355
2ced445e 356 for (i = 0; i < ab8500->mask_size; i++) {
62579266
RV		 357 u8 old = ab8500->oldmask[i];
358 u8 new = ab8500->mask[i];
359 int reg;
360
361 if (new == old)
362 continue;
363
0f620837
LW		 364 /*
365 * Interrupt register 12 doesn't exist prior to AB8500 version
366 * 2.0
367 */
368 if (ab8500->irq_reg_offset[i] == 11 &&
369 is_ab8500_1p1_or_earlier(ab8500))
92d50a41
MW		 370 continue;
371
3e1a498f
LJ		 372 if (ab8500->irq_reg_offset[i] < 0)
373 continue;
374
62579266
RV		 375 ab8500->oldmask[i] = new;
376
2ced445e 377 reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i];
47c16975 378 set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new);
62579266 379 }
112a80d2 380 atomic_dec(&ab8500->transfer_ongoing);
62579266
RV		 381 mutex_unlock(&ab8500->irq_lock);
382}
383
9505a0a0 384static void ab8500_irq_mask(struct irq_data *data)
62579266 385{
9505a0a0 386 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
06e589ef 387 int offset = data->hwirq;
62579266
RV		 388 int index = offset / 8;
389 int mask = 1 << (offset % 8);
390
391 ab8500->mask[index] |= mask;
9c677b9b
LJ		 392
393 /* The AB8500 GPIOs have two interrupts each (rising & falling). */
394 if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R)
395 ab8500->mask[index + 2] |= mask;
396 if (offset >= AB9540_INT_GPIO50R && offset <= AB9540_INT_GPIO54R)
397 ab8500->mask[index + 1] |= mask;
398 if (offset == AB8540_INT_GPIO43R || offset == AB8540_INT_GPIO44R)
e2ddf46a
LW		 399 /* Here the falling IRQ is one bit lower */
400 ab8500->mask[index] |= (mask << 1);
62579266
RV		 401}
402
9505a0a0 403static void ab8500_irq_unmask(struct irq_data *data)
62579266 404{
9505a0a0 405 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
9c677b9b 406 unsigned int type = irqd_get_trigger_type(data);
06e589ef 407 int offset = data->hwirq;
62579266
RV		 408 int index = offset / 8;
409 int mask = 1 << (offset % 8);
410
9c677b9b
LJ		 411 if (type & IRQ_TYPE_EDGE_RISING)
412 ab8500->mask[index] &= ~mask;
413
414 /* The AB8500 GPIOs have two interrupts each (rising & falling). */
415 if (type & IRQ_TYPE_EDGE_FALLING) {
416 if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R)
417 ab8500->mask[index + 2] &= ~mask;
418 else if (offset >= AB9540_INT_GPIO50R && offset <= AB9540_INT_GPIO54R)
419 ab8500->mask[index + 1] &= ~mask;
420 else if (offset == AB8540_INT_GPIO43R || offset == AB8540_INT_GPIO44R)
e2ddf46a
LW		 421 /* Here the falling IRQ is one bit lower */
422 ab8500->mask[index] &= ~(mask << 1);
9c677b9b
LJ		 423 else
424 ab8500->mask[index] &= ~mask;
e2ddf46a 425 } else {
9c677b9b
LJ		 426 /* Satisfies the case where type is not set. */
427 ab8500->mask[index] &= ~mask;
e2ddf46a 428 }
62579266
RV		 429}
430
40f6e5a2
LJ		 431static int ab8500_irq_set_type(struct irq_data *data, unsigned int type)
432{
433 return 0;
62579266
RV		 434}
435
436static struct irq_chip ab8500_irq_chip = {
437 .name = "ab8500",
9505a0a0
MB		 438 .irq_bus_lock = ab8500_irq_lock,
439 .irq_bus_sync_unlock = ab8500_irq_sync_unlock,
440 .irq_mask = ab8500_irq_mask,
e6f9306e 441 .irq_disable = ab8500_irq_mask,
9505a0a0 442 .irq_unmask = ab8500_irq_unmask,
40f6e5a2 443 .irq_set_type = ab8500_irq_set_type,
62579266
RV		 444};
445
3e1a498f
LJ		 446static void update_latch_offset(u8 *offset, int i)
447{
448 /* Fix inconsistent ITFromLatch25 bit mapping... */
449 if (unlikely(*offset == 17))
450 *offset = 24;
451 /* Fix inconsistent ab8540 bit mapping... */
452 if (unlikely(*offset == 16))
453 *offset = 25;
454 if ((i==3) && (*offset >= 24))
455 *offset += 2;
456}
457
7ccfe9b1
MJ		 458static int ab8500_handle_hierarchical_line(struct ab8500 *ab8500,
459 int latch_offset, u8 latch_val)
460{
7a93fb37 461 int int_bit, line, i;
7ccfe9b1 462
7a93fb37
FB		 463 for (i = 0; i < ab8500->mask_size; i++)
464 if (ab8500->irq_reg_offset[i] == latch_offset)
465 break;
7ccfe9b1 466
7a93fb37
FB		 467 if (i >= ab8500->mask_size) {
468 dev_err(ab8500->dev, "Register offset 0x%2x not declared\n",
469 latch_offset);
470 return -ENXIO;
471 }
7ccfe9b1 472
7a93fb37
FB		 473 /* ignore masked out interrupts */
474 latch_val &= ~ab8500->mask[i];
7ccfe9b1 475
7a93fb37
FB		 476 while (latch_val) {
477 int_bit = __ffs(latch_val);
7ccfe9b1
MJ		 478 line = (i << 3) + int_bit;
479 latch_val &= ~(1 << int_bit);
480
e2ddf46a
LW		 481 /*
482 * This handles the falling edge hwirqs from the GPIO
483 * lines. Route them back to the line registered for the
484 * rising IRQ, as this is merely a flag for the same IRQ
485 * in linux terms.
486 */
487 if (line >= AB8500_INT_GPIO6F && line <= AB8500_INT_GPIO41F)
488 line -= 16;
489 if (line >= AB9540_INT_GPIO50F && line <= AB9540_INT_GPIO54F)
490 line -= 8;
491 if (line == AB8540_INT_GPIO43F || line == AB8540_INT_GPIO44F)
492 line += 1;
493
7ccfe9b1 494 handle_nested_irq(ab8500->irq_base + line);
7a93fb37 495 }
7ccfe9b1
MJ		 496
497 return 0;
498}
499
500static int ab8500_handle_hierarchical_latch(struct ab8500 *ab8500,
501 int hier_offset, u8 hier_val)
502{
503 int latch_bit, status;
504 u8 latch_offset, latch_val;
505
506 do {
507 latch_bit = __ffs(hier_val);
508 latch_offset = (hier_offset << 3) + latch_bit;
509
3e1a498f 510 update_latch_offset(&latch_offset, hier_offset);
7ccfe9b1
MJ		 511
512 status = get_register_interruptible(ab8500,
513 AB8500_INTERRUPT,
514 AB8500_IT_LATCH1_REG + latch_offset,
515 &latch_val);
516 if (status < 0 || latch_val == 0)
517 goto discard;
518
519 status = ab8500_handle_hierarchical_line(ab8500,
520 latch_offset, latch_val);
521 if (status < 0)
522 return status;
523discard:
524 hier_val &= ~(1 << latch_bit);
525 } while (hier_val);
526
527 return 0;
528}
529
530static irqreturn_t ab8500_hierarchical_irq(int irq, void *dev)
531{
532 struct ab8500 *ab8500 = dev;
533 u8 i;
534
535 dev_vdbg(ab8500->dev, "interrupt\n");
536
537 /* Hierarchical interrupt version */
3e1a498f 538 for (i = 0; i < (ab8500->it_latchhier_num); i++) {
7ccfe9b1
MJ		 539 int status;
540 u8 hier_val;
541
542 status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
543 AB8500_IT_LATCHHIER1_REG + i, &hier_val);
544 if (status < 0 || hier_val == 0)
545 continue;
546
547 status = ab8500_handle_hierarchical_latch(ab8500, i, hier_val);
548 if (status < 0)
549 break;
550 }
551 return IRQ_HANDLED;
552}
553
06e589ef
LJ		 554static int ab8500_irq_map(struct irq_domain *d, unsigned int virq,
555 irq_hw_number_t hwirq)
556{
557 struct ab8500 *ab8500 = d->host_data;
558
559 if (!ab8500)
560 return -EINVAL;
561
562 irq_set_chip_data(virq, ab8500);
563 irq_set_chip_and_handler(virq, &ab8500_irq_chip,
564 handle_simple_irq);
565 irq_set_nested_thread(virq, 1);
62579266 566#ifdef CONFIG_ARM
06e589ef 567 set_irq_flags(virq, IRQF_VALID);
62579266 568#else
06e589ef 569 irq_set_noprobe(virq);
62579266 570#endif
62579266
RV		 571
572 return 0;
573}
574
06e589ef
LJ		 575static struct irq_domain_ops ab8500_irq_ops = {
576 .map = ab8500_irq_map,
577 .xlate = irq_domain_xlate_twocell,
578};
579
580static int ab8500_irq_init(struct ab8500 *ab8500, struct device_node *np)
62579266 581{
2ced445e
LW		 582 int num_irqs;
583
3e1a498f
LJ		 584 if (is_ab8540(ab8500))
585 num_irqs = AB8540_NR_IRQS;
586 else if (is_ab9540(ab8500))
d6255529 587 num_irqs = AB9540_NR_IRQS;
a982362c
BJ		 588 else if (is_ab8505(ab8500))
589 num_irqs = AB8505_NR_IRQS;
d6255529
LW		 590 else
591 num_irqs = AB8500_NR_IRQS;
62579266 592
f1d11f39
LW		 593 /* If ->irq_base is zero this will give a linear mapping */
594 ab8500->domain = irq_domain_add_simple(NULL,
595 num_irqs, ab8500->irq_base,
596 &ab8500_irq_ops, ab8500);
06e589ef
LJ		 597
598 if (!ab8500->domain) {
599 dev_err(ab8500->dev, "Failed to create irqdomain\n");
600 return -ENOSYS;
601 }
602
603 return 0;
62579266
RV		 604}
605
112a80d2
JA		 606int ab8500_suspend(struct ab8500 *ab8500)
607{
608 if (atomic_read(&ab8500->transfer_ongoing))
609 return -EINVAL;
610 else
611 return 0;
612}
613
a9e9ce4c 614static struct resource ab8500_gpadc_resources[] = {
62579266
RV		 615 {
616 .name = "HW_CONV_END",
617 .start = AB8500_INT_GP_HW_ADC_CONV_END,
618 .end = AB8500_INT_GP_HW_ADC_CONV_END,
619 .flags = IORESOURCE_IRQ,
620 },
621 {
622 .name = "SW_CONV_END",
623 .start = AB8500_INT_GP_SW_ADC_CONV_END,
624 .end = AB8500_INT_GP_SW_ADC_CONV_END,
625 .flags = IORESOURCE_IRQ,
626 },
627};
628
4b106fb9 629static struct resource ab8505_gpadc_resources[] = {
c0eda9ae
LJ		 630 {
631 .name = "SW_CONV_END",
632 .start = AB8500_INT_GP_SW_ADC_CONV_END,
633 .end = AB8500_INT_GP_SW_ADC_CONV_END,
634 .flags = IORESOURCE_IRQ,
635 },
636};
637
a9e9ce4c 638static struct resource ab8500_rtc_resources[] = {
62579266
RV		 639 {
640 .name = "60S",
641 .start = AB8500_INT_RTC_60S,
642 .end = AB8500_INT_RTC_60S,
643 .flags = IORESOURCE_IRQ,
644 },
645 {
646 .name = "ALARM",
647 .start = AB8500_INT_RTC_ALARM,
648 .end = AB8500_INT_RTC_ALARM,
649 .flags = IORESOURCE_IRQ,
650 },
651};
652
a9e9ce4c 653static struct resource ab8500_poweronkey_db_resources[] = {
77686517
SI		 654 {
655 .name = "ONKEY_DBF",
656 .start = AB8500_INT_PON_KEY1DB_F,
657 .end = AB8500_INT_PON_KEY1DB_F,
658 .flags = IORESOURCE_IRQ,
659 },
660 {
661 .name = "ONKEY_DBR",
662 .start = AB8500_INT_PON_KEY1DB_R,
663 .end = AB8500_INT_PON_KEY1DB_R,
664 .flags = IORESOURCE_IRQ,
665 },
666};
667
a9e9ce4c 668static struct resource ab8500_av_acc_detect_resources[] = {
e098aded 669 {
6af75ecd
LW		 670 .name = "ACC_DETECT_1DB_F",
671 .start = AB8500_INT_ACC_DETECT_1DB_F,
672 .end = AB8500_INT_ACC_DETECT_1DB_F,
673 .flags = IORESOURCE_IRQ,
e098aded
MW		 674 },
675 {
6af75ecd
LW		 676 .name = "ACC_DETECT_1DB_R",
677 .start = AB8500_INT_ACC_DETECT_1DB_R,
678 .end = AB8500_INT_ACC_DETECT_1DB_R,
679 .flags = IORESOURCE_IRQ,
680 },
681 {
682 .name = "ACC_DETECT_21DB_F",
683 .start = AB8500_INT_ACC_DETECT_21DB_F,
684 .end = AB8500_INT_ACC_DETECT_21DB_F,
685 .flags = IORESOURCE_IRQ,
686 },
687 {
688 .name = "ACC_DETECT_21DB_R",
689 .start = AB8500_INT_ACC_DETECT_21DB_R,
690 .end = AB8500_INT_ACC_DETECT_21DB_R,
691 .flags = IORESOURCE_IRQ,
692 },
693 {
694 .name = "ACC_DETECT_22DB_F",
695 .start = AB8500_INT_ACC_DETECT_22DB_F,
696 .end = AB8500_INT_ACC_DETECT_22DB_F,
697 .flags = IORESOURCE_IRQ,
e098aded 698 },
6af75ecd
LW		 699 {
700 .name = "ACC_DETECT_22DB_R",
701 .start = AB8500_INT_ACC_DETECT_22DB_R,
702 .end = AB8500_INT_ACC_DETECT_22DB_R,
703 .flags = IORESOURCE_IRQ,
704 },
705};
706
a9e9ce4c 707static struct resource ab8500_charger_resources[] = {
e098aded
MW		 708 {
709 .name = "MAIN_CH_UNPLUG_DET",
710 .start = AB8500_INT_MAIN_CH_UNPLUG_DET,
711 .end = AB8500_INT_MAIN_CH_UNPLUG_DET,
712 .flags = IORESOURCE_IRQ,
713 },
714 {
715 .name = "MAIN_CHARGE_PLUG_DET",
716 .start = AB8500_INT_MAIN_CH_PLUG_DET,
717 .end = AB8500_INT_MAIN_CH_PLUG_DET,
718 .flags = IORESOURCE_IRQ,
719 },
e098aded
MW		 720 {
721 .name = "VBUS_DET_R",
722 .start = AB8500_INT_VBUS_DET_R,
723 .end = AB8500_INT_VBUS_DET_R,
724 .flags = IORESOURCE_IRQ,
725 },
726 {
6af75ecd
LW		 727 .name = "VBUS_DET_F",
728 .start = AB8500_INT_VBUS_DET_F,
729 .end = AB8500_INT_VBUS_DET_F,
e098aded
MW		 730 .flags = IORESOURCE_IRQ,
731 },
732 {
6af75ecd
LW		 733 .name = "USB_LINK_STATUS",
734 .start = AB8500_INT_USB_LINK_STATUS,
735 .end = AB8500_INT_USB_LINK_STATUS,
736 .flags = IORESOURCE_IRQ,
737 },
e098aded
MW		 738 {
739 .name = "VBUS_OVV",
740 .start = AB8500_INT_VBUS_OVV,
741 .end = AB8500_INT_VBUS_OVV,
742 .flags = IORESOURCE_IRQ,
743 },
744 {
6af75ecd
LW		 745 .name = "USB_CH_TH_PROT_R",
746 .start = AB8500_INT_USB_CH_TH_PROT_R,
747 .end = AB8500_INT_USB_CH_TH_PROT_R,
e098aded
MW		 748 .flags = IORESOURCE_IRQ,
749 },
750 {
6af75ecd
LW		 751 .name = "USB_CH_TH_PROT_F",
752 .start = AB8500_INT_USB_CH_TH_PROT_F,
753 .end = AB8500_INT_USB_CH_TH_PROT_F,
e098aded
MW		 754 .flags = IORESOURCE_IRQ,
755 },
756 {
6af75ecd
LW		 757 .name = "MAIN_EXT_CH_NOT_OK",
758 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
759 .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
760 .flags = IORESOURCE_IRQ,
761 },
762 {
763 .name = "MAIN_CH_TH_PROT_R",
764 .start = AB8500_INT_MAIN_CH_TH_PROT_R,
765 .end = AB8500_INT_MAIN_CH_TH_PROT_R,
766 .flags = IORESOURCE_IRQ,
767 },
768 {
769 .name = "MAIN_CH_TH_PROT_F",
770 .start = AB8500_INT_MAIN_CH_TH_PROT_F,
771 .end = AB8500_INT_MAIN_CH_TH_PROT_F,
772 .flags = IORESOURCE_IRQ,
773 },
774 {
775 .name = "USB_CHARGER_NOT_OKR",
a982362c
BJ		 776 .start = AB8500_INT_USB_CHARGER_NOT_OKR,
777 .end = AB8500_INT_USB_CHARGER_NOT_OKR,
6af75ecd
LW		 778 .flags = IORESOURCE_IRQ,
779 },
780 {
781 .name = "CH_WD_EXP",
782 .start = AB8500_INT_CH_WD_EXP,
783 .end = AB8500_INT_CH_WD_EXP,
784 .flags = IORESOURCE_IRQ,
785 },
34c11a70
POH		 786 {
787 .name = "VBUS_CH_DROP_END",
788 .start = AB8500_INT_VBUS_CH_DROP_END,
789 .end = AB8500_INT_VBUS_CH_DROP_END,
790 .flags = IORESOURCE_IRQ,
791 },
6af75ecd
LW		 792};
793
a9e9ce4c 794static struct resource ab8500_btemp_resources[] = {
6af75ecd
LW		 795 {
796 .name = "BAT_CTRL_INDB",
797 .start = AB8500_INT_BAT_CTRL_INDB,
798 .end = AB8500_INT_BAT_CTRL_INDB,
e098aded
MW		 799 .flags = IORESOURCE_IRQ,
800 },
801 {
802 .name = "BTEMP_LOW",
803 .start = AB8500_INT_BTEMP_LOW,
804 .end = AB8500_INT_BTEMP_LOW,
805 .flags = IORESOURCE_IRQ,
806 },
807 {
808 .name = "BTEMP_HIGH",
809 .start = AB8500_INT_BTEMP_HIGH,
810 .end = AB8500_INT_BTEMP_HIGH,
811 .flags = IORESOURCE_IRQ,
812 },
813 {
6af75ecd
LW		 814 .name = "BTEMP_LOW_MEDIUM",
815 .start = AB8500_INT_BTEMP_LOW_MEDIUM,
816 .end = AB8500_INT_BTEMP_LOW_MEDIUM,
e098aded
MW		 817 .flags = IORESOURCE_IRQ,
818 },
819 {
6af75ecd
LW		 820 .name = "BTEMP_MEDIUM_HIGH",
821 .start = AB8500_INT_BTEMP_MEDIUM_HIGH,
822 .end = AB8500_INT_BTEMP_MEDIUM_HIGH,
e098aded
MW		 823 .flags = IORESOURCE_IRQ,
824 },
6af75ecd
LW		 825};
826
a9e9ce4c 827static struct resource ab8500_fg_resources[] = {
e098aded 828 {
6af75ecd
LW		 829 .name = "NCONV_ACCU",
830 .start = AB8500_INT_CCN_CONV_ACC,
831 .end = AB8500_INT_CCN_CONV_ACC,
e098aded
MW		 832 .flags = IORESOURCE_IRQ,
833 },
834 {
6af75ecd
LW		 835 .name = "BATT_OVV",
836 .start = AB8500_INT_BATT_OVV,
837 .end = AB8500_INT_BATT_OVV,
e098aded
MW		 838 .flags = IORESOURCE_IRQ,
839 },
840 {
6af75ecd
LW		 841 .name = "LOW_BAT_F",
842 .start = AB8500_INT_LOW_BAT_F,
843 .end = AB8500_INT_LOW_BAT_F,
844 .flags = IORESOURCE_IRQ,
845 },
846 {
847 .name = "LOW_BAT_R",
848 .start = AB8500_INT_LOW_BAT_R,
849 .end = AB8500_INT_LOW_BAT_R,
850 .flags = IORESOURCE_IRQ,
851 },
852 {
853 .name = "CC_INT_CALIB",
854 .start = AB8500_INT_CC_INT_CALIB,
855 .end = AB8500_INT_CC_INT_CALIB,
e098aded
MW		 856 .flags = IORESOURCE_IRQ,
857 },
a982362c
BJ		 858 {
859 .name = "CCEOC",
860 .start = AB8500_INT_CCEOC,
861 .end = AB8500_INT_CCEOC,
862 .flags = IORESOURCE_IRQ,
863 },
e098aded
MW		 864};
865
a9e9ce4c 866static struct resource ab8500_chargalg_resources[] = {};
6af75ecd 867
df720647 868#ifdef CONFIG_DEBUG_FS
a9e9ce4c 869static struct resource ab8500_debug_resources[] = {
6999181e
LW		 870 {
871 .name = "IRQ_AB8500",
872 /*
873 * Number will be filled in. NOTE: this is deliberately
874 * not flagged as an IRQ in ordet to avoid remapping using
875 * the irqdomain in the MFD core, so that this IRQ passes
876 * unremapped to the debug code.
877 */
878 },
e098aded
MW		 879 {
880 .name = "IRQ_FIRST",
881 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
882 .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
883 .flags = IORESOURCE_IRQ,
884 },
885 {
886 .name = "IRQ_LAST",
a982362c
BJ		 887 .start = AB8500_INT_XTAL32K_KO,
888 .end = AB8500_INT_XTAL32K_KO,
e098aded
MW		 889 .flags = IORESOURCE_IRQ,
890 },
891};
df720647 892#endif
e098aded 893
a9e9ce4c 894static struct resource ab8500_usb_resources[] = {
e098aded
MW		 895 {
896 .name = "ID_WAKEUP_R",
897 .start = AB8500_INT_ID_WAKEUP_R,
898 .end = AB8500_INT_ID_WAKEUP_R,
899 .flags = IORESOURCE_IRQ,
900 },
901 {
902 .name = "ID_WAKEUP_F",
903 .start = AB8500_INT_ID_WAKEUP_F,
904 .end = AB8500_INT_ID_WAKEUP_F,
905 .flags = IORESOURCE_IRQ,
906 },
907 {
908 .name = "VBUS_DET_F",
909 .start = AB8500_INT_VBUS_DET_F,
910 .end = AB8500_INT_VBUS_DET_F,
911 .flags = IORESOURCE_IRQ,
912 },
913 {
914 .name = "VBUS_DET_R",
915 .start = AB8500_INT_VBUS_DET_R,
916 .end = AB8500_INT_VBUS_DET_R,
917 .flags = IORESOURCE_IRQ,
918 },
92d50a41
MW		 919 {
920 .name = "USB_LINK_STATUS",
921 .start = AB8500_INT_USB_LINK_STATUS,
922 .end = AB8500_INT_USB_LINK_STATUS,
923 .flags = IORESOURCE_IRQ,
924 },
6af75ecd
LW		 925 {
926 .name = "USB_ADP_PROBE_PLUG",
927 .start = AB8500_INT_ADP_PROBE_PLUG,
928 .end = AB8500_INT_ADP_PROBE_PLUG,
929 .flags = IORESOURCE_IRQ,
930 },
931 {
932 .name = "USB_ADP_PROBE_UNPLUG",
933 .start = AB8500_INT_ADP_PROBE_UNPLUG,
934 .end = AB8500_INT_ADP_PROBE_UNPLUG,
935 .flags = IORESOURCE_IRQ,
936 },
e098aded
MW		 937};
938
a9e9ce4c 939static struct resource ab8505_iddet_resources[] = {
44f72e53
VS		 940 {
941 .name = "KeyDeglitch",
942 .start = AB8505_INT_KEYDEGLITCH,
943 .end = AB8505_INT_KEYDEGLITCH,
944 .flags = IORESOURCE_IRQ,
945 },
946 {
947 .name = "KP",
948 .start = AB8505_INT_KP,
949 .end = AB8505_INT_KP,
950 .flags = IORESOURCE_IRQ,
951 },
952 {
953 .name = "IKP",
954 .start = AB8505_INT_IKP,
955 .end = AB8505_INT_IKP,
956 .flags = IORESOURCE_IRQ,
957 },
958 {
959 .name = "IKR",
960 .start = AB8505_INT_IKR,
961 .end = AB8505_INT_IKR,
962 .flags = IORESOURCE_IRQ,
963 },
964 {
965 .name = "KeyStuck",
966 .start = AB8505_INT_KEYSTUCK,
967 .end = AB8505_INT_KEYSTUCK,
968 .flags = IORESOURCE_IRQ,
969 },
492390c8
LJ		 970 {
971 .name = "VBUS_DET_R",
972 .start = AB8500_INT_VBUS_DET_R,
973 .end = AB8500_INT_VBUS_DET_R,
974 .flags = IORESOURCE_IRQ,
975 },
976 {
977 .name = "VBUS_DET_F",
978 .start = AB8500_INT_VBUS_DET_F,
979 .end = AB8500_INT_VBUS_DET_F,
980 .flags = IORESOURCE_IRQ,
981 },
982 {
983 .name = "ID_DET_PLUGR",
984 .start = AB8500_INT_ID_DET_PLUGR,
985 .end = AB8500_INT_ID_DET_PLUGR,
986 .flags = IORESOURCE_IRQ,
987 },
988 {
989 .name = "ID_DET_PLUGF",
990 .start = AB8500_INT_ID_DET_PLUGF,
991 .end = AB8500_INT_ID_DET_PLUGF,
992 .flags = IORESOURCE_IRQ,
993 },
44f72e53
VS		 994};
995
a9e9ce4c 996static struct resource ab8500_temp_resources[] = {
e098aded 997 {
151621a7 998 .name = "ABX500_TEMP_WARM",
e098aded
MW		 999 .start = AB8500_INT_TEMP_WARM,
1000 .end = AB8500_INT_TEMP_WARM,
1001 .flags = IORESOURCE_IRQ,
1002 },
1003};
1004
4b106fb9
LJ		 1005static struct mfd_cell ab8500_bm_devs[] = {
1006 {
1007 .name = "ab8500-charger",
1008 .of_compatible = "stericsson,ab8500-charger",
1009 .num_resources = ARRAY_SIZE(ab8500_charger_resources),
1010 .resources = ab8500_charger_resources,
1011 .platform_data = &ab8500_bm_data,
1012 .pdata_size = sizeof(ab8500_bm_data),
1013 },
1014 {
1015 .name = "ab8500-btemp",
1016 .of_compatible = "stericsson,ab8500-btemp",
1017 .num_resources = ARRAY_SIZE(ab8500_btemp_resources),
1018 .resources = ab8500_btemp_resources,
1019 .platform_data = &ab8500_bm_data,
1020 .pdata_size = sizeof(ab8500_bm_data),
1021 },
1022 {
1023 .name = "ab8500-fg",
1024 .of_compatible = "stericsson,ab8500-fg",
1025 .num_resources = ARRAY_SIZE(ab8500_fg_resources),
1026 .resources = ab8500_fg_resources,
1027 .platform_data = &ab8500_bm_data,
1028 .pdata_size = sizeof(ab8500_bm_data),
1029 },
1030 {
1031 .name = "ab8500-chargalg",
1032 .of_compatible = "stericsson,ab8500-chargalg",
1033 .num_resources = ARRAY_SIZE(ab8500_chargalg_resources),
1034 .resources = ab8500_chargalg_resources,
1035 .platform_data = &ab8500_bm_data,
1036 .pdata_size = sizeof(ab8500_bm_data),
1037 },
1038};
1039
1040static struct mfd_cell ab8500_devs[] = {
5814fc35
MW		 1041#ifdef CONFIG_DEBUG_FS
1042 {
1043 .name = "ab8500-debug",
bad76991 1044 .of_compatible = "stericsson,ab8500-debug",
e098aded
MW		 1045 .num_resources = ARRAY_SIZE(ab8500_debug_resources),
1046 .resources = ab8500_debug_resources,
5814fc35
MW		 1047 },
1048#endif
e098aded
MW		 1049 {
1050 .name = "ab8500-sysctrl",
bad76991 1051 .of_compatible = "stericsson,ab8500-sysctrl",
e098aded
MW		 1052 },
1053 {
1054 .name = "ab8500-regulator",
bad76991 1055 .of_compatible = "stericsson,ab8500-regulator",
e098aded 1056 },
916a871c
UH		 1057 {
1058 .name = "abx500-clk",
1059 .of_compatible = "stericsson,abx500-clk",
1060 },
4b106fb9
LJ		 1061 {
1062 .name = "ab8500-gpadc",
1063 .num_resources = ARRAY_SIZE(ab8500_gpadc_resources),
1064 .resources = ab8500_gpadc_resources,
1065 },
62579266
RV		 1066 {
1067 .name = "ab8500-rtc",
bad76991 1068 .of_compatible = "stericsson,ab8500-rtc",
62579266
RV		 1069 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
1070 .resources = ab8500_rtc_resources,
1071 },
6af75ecd
LW		 1072 {
1073 .name = "ab8500-acc-det",
bad76991 1074 .of_compatible = "stericsson,ab8500-acc-det",
6af75ecd
LW		 1075 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
1076 .resources = ab8500_av_acc_detect_resources,
1077 },
e098aded 1078 {
4b106fb9 1079
e098aded 1080 .name = "ab8500-poweron-key",
bad76991 1081 .of_compatible = "stericsson,ab8500-poweron-key",
e098aded
MW		 1082 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
1083 .resources = ab8500_poweronkey_db_resources,
1084 },
f0f05b1c
AM		 1085 {
1086 .name = "ab8500-pwm",
bad76991 1087 .of_compatible = "stericsson,ab8500-pwm",
f0f05b1c
AM		 1088 .id = 1,
1089 },
1090 {
1091 .name = "ab8500-pwm",
bad76991 1092 .of_compatible = "stericsson,ab8500-pwm",
f0f05b1c
AM		 1093 .id = 2,
1094 },
1095 {
1096 .name = "ab8500-pwm",
bad76991 1097 .of_compatible = "stericsson,ab8500-pwm",
f0f05b1c
AM		 1098 .id = 3,
1099 },
bad76991
LJ		 1100 {
1101 .name = "ab8500-leds",
1102 .of_compatible = "stericsson,ab8500-leds",
1103 },
77686517 1104 {
e098aded 1105 .name = "ab8500-denc",
bad76991 1106 .of_compatible = "stericsson,ab8500-denc",
e098aded 1107 },
4b106fb9 1108 {
eb696c31 1109 .name = "pinctrl-ab8500",
4b106fb9
LJ		 1110 .of_compatible = "stericsson,ab8500-gpio",
1111 },
e098aded 1112 {
151621a7
HZ		 1113 .name = "abx500-temp",
1114 .of_compatible = "stericsson,abx500-temp",
e098aded
MW		 1115 .num_resources = ARRAY_SIZE(ab8500_temp_resources),
1116 .resources = ab8500_temp_resources,
77686517 1117 },
6ef9418c 1118 {
4b106fb9 1119 .name = "ab8500-usb",
f201f730 1120 .of_compatible = "stericsson,ab8500-usb",
4b106fb9
LJ		 1121 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
1122 .resources = ab8500_usb_resources,
6ef9418c
RA		 1123 },
1124 {
4b106fb9 1125 .name = "ab8500-codec",
6ef9418c
RA		 1126 },
1127};
1128
4b106fb9
LJ		 1129static struct mfd_cell ab9540_devs[] = {
1130#ifdef CONFIG_DEBUG_FS
d6255529 1131 {
4b106fb9
LJ		 1132 .name = "ab8500-debug",
1133 .num_resources = ARRAY_SIZE(ab8500_debug_resources),
1134 .resources = ab8500_debug_resources,
d6255529 1135 },
4b106fb9 1136#endif
d6255529 1137 {
4b106fb9 1138 .name = "ab8500-sysctrl",
d6255529 1139 },
44f72e53 1140 {
4b106fb9 1141 .name = "ab8500-regulator",
44f72e53 1142 },
9ee17676
UH		 1143 {
1144 .name = "abx500-clk",
1145 .of_compatible = "stericsson,abx500-clk",
1146 },
c0eda9ae
LJ		 1147 {
1148 .name = "ab8500-gpadc",
1149 .of_compatible = "stericsson,ab8500-gpadc",
1150 .num_resources = ARRAY_SIZE(ab8500_gpadc_resources),
1151 .resources = ab8500_gpadc_resources,
1152 },
4b106fb9
LJ		 1153 {
1154 .name = "ab8500-rtc",
1155 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
1156 .resources = ab8500_rtc_resources,
1157 },
1158 {
1159 .name = "ab8500-acc-det",
1160 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
1161 .resources = ab8500_av_acc_detect_resources,
1162 },
1163 {
1164 .name = "ab8500-poweron-key",
1165 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
1166 .resources = ab8500_poweronkey_db_resources,
1167 },
1168 {
1169 .name = "ab8500-pwm",
1170 .id = 1,
1171 },
1172 {
1173 .name = "ab8500-leds",
1174 },
1175 {
1176 .name = "abx500-temp",
1177 .num_resources = ARRAY_SIZE(ab8500_temp_resources),
1178 .resources = ab8500_temp_resources,
1179 },
d6255529 1180 {
e64d905e
LJ		 1181 .name = "pinctrl-ab9540",
1182 .of_compatible = "stericsson,ab9540-gpio",
d6255529
LW		 1183 },
1184 {
1185 .name = "ab9540-usb",
1186 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
1187 .resources = ab8500_usb_resources,
1188 },
44f72e53
VS		 1189 {
1190 .name = "ab9540-codec",
1191 },
c0eda9ae
LJ		 1192 {
1193 .name = "ab-iddet",
1194 .num_resources = ARRAY_SIZE(ab8505_iddet_resources),
1195 .resources = ab8505_iddet_resources,
1196 },
44f72e53
VS		 1197};
1198
c0eda9ae
LJ		 1199/* Device list for ab8505 */
1200static struct mfd_cell ab8505_devs[] = {
4b106fb9
LJ		 1201#ifdef CONFIG_DEBUG_FS
1202 {
1203 .name = "ab8500-debug",
1204 .num_resources = ARRAY_SIZE(ab8500_debug_resources),
1205 .resources = ab8500_debug_resources,
1206 },
1207#endif
1208 {
1209 .name = "ab8500-sysctrl",
1210 },
1211 {
1212 .name = "ab8500-regulator",
1213 },
9ee17676
UH		 1214 {
1215 .name = "abx500-clk",
1216 .of_compatible = "stericsson,abx500-clk",
1217 },
4b106fb9
LJ		 1218 {
1219 .name = "ab8500-gpadc",
1220 .num_resources = ARRAY_SIZE(ab8505_gpadc_resources),
1221 .resources = ab8505_gpadc_resources,
1222 },
1223 {
1224 .name = "ab8500-rtc",
1225 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
1226 .resources = ab8500_rtc_resources,
1227 },
1228 {
1229 .name = "ab8500-acc-det",
1230 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
1231 .resources = ab8500_av_acc_detect_resources,
1232 },
1233 {
1234 .name = "ab8500-poweron-key",
1235 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
1236 .resources = ab8500_poweronkey_db_resources,
1237 },
1238 {
1239 .name = "ab8500-pwm",
1240 .id = 1,
1241 },
1242 {
1243 .name = "ab8500-leds",
1244 },
1245 {
eb696c31 1246 .name = "pinctrl-ab8505",
4b106fb9
LJ		 1247 },
1248 {
1249 .name = "ab8500-usb",
1250 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
1251 .resources = ab8500_usb_resources,
1252 },
1253 {
1254 .name = "ab8500-codec",
1255 },
c0eda9ae
LJ		 1256 {
1257 .name = "ab-iddet",
1258 .num_resources = ARRAY_SIZE(ab8505_iddet_resources),
1259 .resources = ab8505_iddet_resources,
1260 },
1261};
1262
1263static struct mfd_cell ab8540_devs[] = {
4b106fb9
LJ		 1264#ifdef CONFIG_DEBUG_FS
1265 {
1266 .name = "ab8500-debug",
1267 .num_resources = ARRAY_SIZE(ab8500_debug_resources),
1268 .resources = ab8500_debug_resources,
1269 },
1270#endif
1271 {
1272 .name = "ab8500-sysctrl",
1273 },
1274 {
1275 .name = "ab8500-regulator",
1276 },
9ee17676
UH		 1277 {
1278 .name = "abx500-clk",
1279 .of_compatible = "stericsson,abx500-clk",
1280 },
4b106fb9
LJ		 1281 {
1282 .name = "ab8500-gpadc",
1283 .num_resources = ARRAY_SIZE(ab8505_gpadc_resources),
1284 .resources = ab8505_gpadc_resources,
1285 },
1286 {
1287 .name = "ab8500-rtc",
1288 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
1289 .resources = ab8500_rtc_resources,
1290 },
1291 {
1292 .name = "ab8500-acc-det",
1293 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
1294 .resources = ab8500_av_acc_detect_resources,
1295 },
1296 {
1297 .name = "ab8500-poweron-key",
1298 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
1299 .resources = ab8500_poweronkey_db_resources,
1300 },
1301 {
1302 .name = "ab8500-pwm",
1303 .id = 1,
1304 },
1305 {
1306 .name = "ab8500-leds",
1307 },
1308 {
1309 .name = "abx500-temp",
1310 .num_resources = ARRAY_SIZE(ab8500_temp_resources),
1311 .resources = ab8500_temp_resources,
1312 },
c0eda9ae 1313 {
eb696c31 1314 .name = "pinctrl-ab8540",
c0eda9ae
LJ		 1315 },
1316 {
1317 .name = "ab8540-usb",
1318 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
1319 .resources = ab8500_usb_resources,
1320 },
1321 {
1322 .name = "ab8540-codec",
1323 },
44f72e53
VS		 1324 {
1325 .name = "ab-iddet",
1326 .num_resources = ARRAY_SIZE(ab8505_iddet_resources),
1327 .resources = ab8505_iddet_resources,
1328 },
d6255529
LW		 1329};
1330
cca69b67
MW		 1331static ssize_t show_chip_id(struct device *dev,
1332 struct device_attribute *attr, char *buf)
1333{
1334 struct ab8500 *ab8500;
1335
1336 ab8500 = dev_get_drvdata(dev);
e436ddff 1337
cca69b67
MW		 1338 return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL);
1339}
1340
e5c238c3
MW		 1341/*
1342 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
1343 * 0x01 Swoff bit programming
1344 * 0x02 Thermal protection activation
1345 * 0x04 Vbat lower then BattOk falling threshold
1346 * 0x08 Watchdog expired
1347 * 0x10 Non presence of 32kHz clock
1348 * 0x20 Battery level lower than power on reset threshold
1349 * 0x40 Power on key 1 pressed longer than 10 seconds
1350 * 0x80 DB8500 thermal shutdown
1351 */
1352static ssize_t show_switch_off_status(struct device *dev,
1353 struct device_attribute *attr, char *buf)
1354{
1355 int ret;
1356 u8 value;
1357 struct ab8500 *ab8500;
1358
1359 ab8500 = dev_get_drvdata(dev);
1360 ret = get_register_interruptible(ab8500, AB8500_RTC,
1361 AB8500_SWITCH_OFF_STATUS, &value);
1362 if (ret < 0)
1363 return ret;
1364 return sprintf(buf, "%#x\n", value);
1365}
1366
f04a9d8a
RK		 1367/* use mask and set to override the register turn_on_stat value */
1368void ab8500_override_turn_on_stat(u8 mask, u8 set)
1369{
1370 spin_lock(&on_stat_lock);
1371 turn_on_stat_mask = mask;
1372 turn_on_stat_set = set;
1373 spin_unlock(&on_stat_lock);
1374}
1375
b4a31037
AL		 1376/*
1377 * ab8500 has turned on due to (TURN_ON_STATUS):
1378 * 0x01 PORnVbat
1379 * 0x02 PonKey1dbF
1380 * 0x04 PonKey2dbF
1381 * 0x08 RTCAlarm
1382 * 0x10 MainChDet
1383 * 0x20 VbusDet
1384 * 0x40 UsbIDDetect
1385 * 0x80 Reserved
1386 */
1387static ssize_t show_turn_on_status(struct device *dev,
1388 struct device_attribute *attr, char *buf)
1389{
1390 int ret;
1391 u8 value;
1392 struct ab8500 *ab8500;
1393
1394 ab8500 = dev_get_drvdata(dev);
1395 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
1396 AB8500_TURN_ON_STATUS, &value);
1397 if (ret < 0)
1398 return ret;
f04a9d8a
RK		 1399
1400 /*
1401 * In L9540, turn_on_status register is not updated correctly if
1402 * the device is rebooted with AC/USB charger connected. Due to
1403 * this, the device boots android instead of entering into charge
1404 * only mode. Read the AC/USB status register to detect the charger
1405 * presence and update the turn on status manually.
1406 */
1407 if (is_ab9540(ab8500)) {
1408 spin_lock(&on_stat_lock);
1409 value = (value & turn_on_stat_mask) | turn_on_stat_set;
1410 spin_unlock(&on_stat_lock);
1411 }
1412
b4a31037
AL		 1413 return sprintf(buf, "%#x\n", value);
1414}
1415
93ff722e
LJ		 1416static ssize_t show_turn_on_status_2(struct device *dev,
1417 struct device_attribute *attr, char *buf)
1418{
1419 int ret;
1420 u8 value;
1421 struct ab8500 *ab8500;
1422
1423 ab8500 = dev_get_drvdata(dev);
1424 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
1425 AB8505_TURN_ON_STATUS_2, &value);
1426 if (ret < 0)
1427 return ret;
1428 return sprintf(buf, "%#x\n", (value & 0x1));
1429}
1430
d6255529
LW		 1431static ssize_t show_ab9540_dbbrstn(struct device *dev,
1432 struct device_attribute *attr, char *buf)
1433{
1434 struct ab8500 *ab8500;
1435 int ret;
1436 u8 value;
1437
1438 ab8500 = dev_get_drvdata(dev);
1439
1440 ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2,
1441 AB9540_MODEM_CTRL2_REG, &value);
1442 if (ret < 0)
1443 return ret;
1444
1445 return sprintf(buf, "%d\n",
1446 (value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0);
1447}
1448
1449static ssize_t store_ab9540_dbbrstn(struct device *dev,
1450 struct device_attribute *attr, const char *buf, size_t count)
1451{
1452 struct ab8500 *ab8500;
1453 int ret = count;
1454 int err;
1455 u8 bitvalues;
1456
1457 ab8500 = dev_get_drvdata(dev);
1458
1459 if (count > 0) {
1460 switch (buf[0]) {
1461 case '0':
1462 bitvalues = 0;
1463 break;
1464 case '1':
1465 bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT;
1466 break;
1467 default:
1468 goto exit;
1469 }
1470
1471 err = mask_and_set_register_interruptible(ab8500,
1472 AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG,
1473 AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues);
1474 if (err)
1475 dev_info(ab8500->dev,
1476 "Failed to set DBBRSTN %c, err %#x\n",
1477 buf[0], err);
1478 }
1479
1480exit:
1481 return ret;
1482}
1483
cca69b67 1484static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL);
e5c238c3 1485static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL);
b4a31037 1486static DEVICE_ATTR(turn_on_status, S_IRUGO, show_turn_on_status, NULL);
93ff722e 1487static DEVICE_ATTR(turn_on_status_2, S_IRUGO, show_turn_on_status_2, NULL);
d6255529
LW		 1488static DEVICE_ATTR(dbbrstn, S_IRUGO | S_IWUSR,
1489 show_ab9540_dbbrstn, store_ab9540_dbbrstn);
cca69b67
MW		 1490
1491static struct attribute *ab8500_sysfs_entries[] = {
1492 &dev_attr_chip_id.attr,
e5c238c3 1493 &dev_attr_switch_off_status.attr,
b4a31037 1494 &dev_attr_turn_on_status.attr,
cca69b67
MW		 1495 NULL,
1496};
1497
93ff722e
LJ		 1498static struct attribute *ab8505_sysfs_entries[] = {
1499 &dev_attr_turn_on_status_2.attr,
1500 NULL,
1501};
1502
d6255529
LW		 1503static struct attribute *ab9540_sysfs_entries[] = {
1504 &dev_attr_chip_id.attr,
1505 &dev_attr_switch_off_status.attr,
1506 &dev_attr_turn_on_status.attr,
1507 &dev_attr_dbbrstn.attr,
1508 NULL,
1509};
1510
cca69b67
MW		 1511static struct attribute_group ab8500_attr_group = {
1512 .attrs = ab8500_sysfs_entries,
1513};
1514
93ff722e
LJ		 1515static struct attribute_group ab8505_attr_group = {
1516 .attrs = ab8505_sysfs_entries,
1517};
1518
d6255529
LW		 1519static struct attribute_group ab9540_attr_group = {
1520 .attrs = ab9540_sysfs_entries,
1521};
1522
f791be49 1523static int ab8500_probe(struct platform_device *pdev)
62579266 1524{
b04c530c
JA		 1525 static char *switch_off_status[] = {
1526 "Swoff bit programming",
1527 "Thermal protection activation",
1528 "Vbat lower then BattOk falling threshold",
1529 "Watchdog expired",
1530 "Non presence of 32kHz clock",
1531 "Battery level lower than power on reset threshold",
1532 "Power on key 1 pressed longer than 10 seconds",
1533 "DB8500 thermal shutdown"};
abee26cd
MW		 1534 static char *turn_on_status[] = {
1535 "Battery rising (Vbat)",
1536 "Power On Key 1 dbF",
1537 "Power On Key 2 dbF",
1538 "RTC Alarm",
1539 "Main Charger Detect",
1540 "Vbus Detect (USB)",
1541 "USB ID Detect",
1542 "UART Factory Mode Detect"};
d28f1db8
LJ		 1543 struct ab8500_platform_data *plat = dev_get_platdata(&pdev->dev);
1544 const struct platform_device_id *platid = platform_get_device_id(pdev);
6bc4a568
LJ		 1545 enum ab8500_version version = AB8500_VERSION_UNDEFINED;
1546 struct device_node *np = pdev->dev.of_node;
d28f1db8
LJ		 1547 struct ab8500 *ab8500;
1548 struct resource *resource;
62579266
RV		 1549 int ret;
1550 int i;
47c16975 1551 u8 value;
62579266 1552
8c4203cb 1553 ab8500 = devm_kzalloc(&pdev->dev, sizeof *ab8500, GFP_KERNEL);
d28f1db8
LJ		 1554 if (!ab8500)
1555 return -ENOMEM;
1556
62579266
RV		 1557 if (plat)
1558 ab8500->irq_base = plat->irq_base;
1559
d28f1db8
LJ		 1560 ab8500->dev = &pdev->dev;
1561
1562 resource = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
8c4203cb
LJ		 1563 if (!resource)
1564 return -ENODEV;
d28f1db8
LJ		 1565
1566 ab8500->irq = resource->start;
1567
822672a7
LJ		 1568 ab8500->read = ab8500_prcmu_read;
1569 ab8500->write = ab8500_prcmu_write;
1570 ab8500->write_masked = ab8500_prcmu_write_masked;
d28f1db8 1571
62579266
RV		 1572 mutex_init(&ab8500->lock);
1573 mutex_init(&ab8500->irq_lock);
112a80d2 1574 atomic_set(&ab8500->transfer_ongoing, 0);
62579266 1575
d28f1db8
LJ		 1576 platform_set_drvdata(pdev, ab8500);
1577
6bc4a568
LJ		 1578 if (platid)
1579 version = platid->driver_data;
6bc4a568 1580
0f620837
LW		 1581 if (version != AB8500_VERSION_UNDEFINED)
1582 ab8500->version = version;
1583 else {
1584 ret = get_register_interruptible(ab8500, AB8500_MISC,
1585 AB8500_IC_NAME_REG, &value);
1586 if (ret < 0)
8c4203cb 1587 return ret;
0f620837
LW		 1588
1589 ab8500->version = value;
1590 }
1591
47c16975
MW		 1592 ret = get_register_interruptible(ab8500, AB8500_MISC,
1593 AB8500_REV_REG, &value);
62579266 1594 if (ret < 0)
8c4203cb 1595 return ret;
62579266 1596
47c16975 1597 ab8500->chip_id = value;
62579266 1598
0f620837
LW		 1599 dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n",
1600 ab8500_version_str[ab8500->version],
1601 ab8500->chip_id >> 4,
1602 ab8500->chip_id & 0x0F);
1603
3e1a498f
LJ		 1604 /* Configure AB8540 */
1605 if (is_ab8540(ab8500)) {
1606 ab8500->mask_size = AB8540_NUM_IRQ_REGS;
1607 ab8500->irq_reg_offset = ab8540_irq_regoffset;
1608 ab8500->it_latchhier_num = AB8540_IT_LATCHHIER_NUM;
1609 }/* Configure AB8500 or AB9540 IRQ */
1610 else if (is_ab9540(ab8500) || is_ab8505(ab8500)) {
d6255529
LW		 1611 ab8500->mask_size = AB9540_NUM_IRQ_REGS;
1612 ab8500->irq_reg_offset = ab9540_irq_regoffset;
3e1a498f 1613 ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM;
d6255529
LW		 1614 } else {
1615 ab8500->mask_size = AB8500_NUM_IRQ_REGS;
1616 ab8500->irq_reg_offset = ab8500_irq_regoffset;
3e1a498f 1617 ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM;
d6255529 1618 }
8c4203cb 1619 ab8500->mask = devm_kzalloc(&pdev->dev, ab8500->mask_size, GFP_KERNEL);
2ced445e
LW		 1620 if (!ab8500->mask)
1621 return -ENOMEM;
8c4203cb
LJ		 1622 ab8500->oldmask = devm_kzalloc(&pdev->dev, ab8500->mask_size, GFP_KERNEL);
1623 if (!ab8500->oldmask)
1624 return -ENOMEM;
1625
e5c238c3
MW		 1626 /*
1627 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
1628 * 0x01 Swoff bit programming
1629 * 0x02 Thermal protection activation
1630 * 0x04 Vbat lower then BattOk falling threshold
1631 * 0x08 Watchdog expired
1632 * 0x10 Non presence of 32kHz clock
1633 * 0x20 Battery level lower than power on reset threshold
1634 * 0x40 Power on key 1 pressed longer than 10 seconds
1635 * 0x80 DB8500 thermal shutdown
1636 */
1637
1638 ret = get_register_interruptible(ab8500, AB8500_RTC,
1639 AB8500_SWITCH_OFF_STATUS, &value);
1640 if (ret < 0)
1641 return ret;
b04c530c
JA		 1642 dev_info(ab8500->dev, "switch off cause(s) (%#x): ", value);
1643
1644 if (value) {
1645 for (i = 0; i < ARRAY_SIZE(switch_off_status); i++) {
1646 if (value & 1)
1647 printk(KERN_CONT " \"%s\"",
1648 switch_off_status[i]);
1649 value = value >> 1;
1650
1651 }
1652 printk(KERN_CONT "\n");
1653 } else {
1654 printk(KERN_CONT " None\n");
1655 }
abee26cd
MW		 1656 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
1657 AB8500_TURN_ON_STATUS, &value);
1658 if (ret < 0)
1659 return ret;
1660 dev_info(ab8500->dev, "turn on reason(s) (%#x): ", value);
1661
1662 if (value) {
1663 for (i = 0; i < ARRAY_SIZE(turn_on_status); i++) {
1664 if (value & 1)
1665 printk("\"%s\" ", turn_on_status[i]);
1666 value = value >> 1;
1667 }
1668 printk("\n");
1669 } else {
1670 printk("None\n");
1671 }
e5c238c3 1672
62579266
RV		 1673 if (plat && plat->init)
1674 plat->init(ab8500);
abee26cd 1675
f04a9d8a
RK		 1676 if (is_ab9540(ab8500)) {
1677 ret = get_register_interruptible(ab8500, AB8500_CHARGER,
1678 AB8500_CH_USBCH_STAT1_REG, &value);
1679 if (ret < 0)
1680 return ret;
1681 if ((value & VBUS_DET_DBNC1) && (value & VBUS_DET_DBNC100))
1682 ab8500_override_turn_on_stat(~AB8500_POW_KEY_1_ON,
1683 AB8500_VBUS_DET);
1684 }
62579266
RV		 1685
1686 /* Clear and mask all interrupts */
2ced445e 1687 for (i = 0; i < ab8500->mask_size; i++) {
0f620837
LW		 1688 /*
1689 * Interrupt register 12 doesn't exist prior to AB8500 version
1690 * 2.0
1691 */
1692 if (ab8500->irq_reg_offset[i] == 11 &&
1693 is_ab8500_1p1_or_earlier(ab8500))
92d50a41 1694 continue;
62579266 1695
3e1a498f
LJ		 1696 if (ab8500->irq_reg_offset[i] < 0)
1697 continue;
1698
47c16975 1699 get_register_interruptible(ab8500, AB8500_INTERRUPT,
2ced445e 1700 AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i],
92d50a41 1701 &value);
47c16975 1702 set_register_interruptible(ab8500, AB8500_INTERRUPT,
2ced445e 1703 AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff);
62579266
RV		 1704 }
1705
47c16975
MW		 1706 ret = abx500_register_ops(ab8500->dev, &ab8500_ops);
1707 if (ret)
8c4203cb 1708 return ret;
47c16975 1709
2ced445e 1710 for (i = 0; i < ab8500->mask_size; i++)
62579266
RV		 1711 ab8500->mask[i] = ab8500->oldmask[i] = 0xff;
1712
06e589ef
LJ		 1713 ret = ab8500_irq_init(ab8500, np);
1714 if (ret)
8c4203cb 1715 return ret;
62579266 1716
f348fefd
DS		 1717 ret = devm_request_threaded_irq(&pdev->dev, ab8500->irq, NULL,
1718 ab8500_hierarchical_irq,
1719 IRQF_ONESHOT | IRQF_NO_SUSPEND,
1720 "ab8500", ab8500);
1721 if (ret)
1722 return ret;
62579266 1723
6999181e
LW		 1724#if CONFIG_DEBUG_FS
1725 /* Pass to debugfs */
1726 ab8500_debug_resources[0].start = ab8500->irq;
1727 ab8500_debug_resources[0].end = ab8500->irq;
1728#endif
1729
bad76991
LJ		 1730 if (is_ab9540(ab8500))
1731 ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs,
1732 ARRAY_SIZE(ab9540_devs), NULL,
55692af5 1733 ab8500->irq_base, ab8500->domain);
c0eda9ae
LJ		 1734 else if (is_ab8540(ab8500))
1735 ret = mfd_add_devices(ab8500->dev, 0, ab8540_devs,
1736 ARRAY_SIZE(ab8540_devs), NULL,
1737 ab8500->irq_base, ab8500->domain);
1738 else if (is_ab8505(ab8500))
1739 ret = mfd_add_devices(ab8500->dev, 0, ab8505_devs,
1740 ARRAY_SIZE(ab8505_devs), NULL,
1741 ab8500->irq_base, ab8500->domain);
bad76991
LJ		 1742 else
1743 ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs,
1744 ARRAY_SIZE(ab8500_devs), NULL,
55692af5 1745 ab8500->irq_base, ab8500->domain);
bad76991 1746 if (ret)
8c4203cb 1747 return ret;
44f72e53 1748
6ef9418c
RA		 1749 if (!no_bm) {
1750 /* Add battery management devices */
1751 ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs,
1752 ARRAY_SIZE(ab8500_bm_devs), NULL,
55692af5 1753 ab8500->irq_base, ab8500->domain);
6ef9418c
RA		 1754 if (ret)
1755 dev_err(ab8500->dev, "error adding bm devices\n");
1756 }
1757
e436ddff
LJ		 1758 if (((is_ab8505(ab8500) || is_ab9540(ab8500)) &&
1759 ab8500->chip_id >= AB8500_CUT2P0) || is_ab8540(ab8500))
d6255529
LW		 1760 ret = sysfs_create_group(&ab8500->dev->kobj,
1761 &ab9540_attr_group);
1762 else
1763 ret = sysfs_create_group(&ab8500->dev->kobj,
1764 &ab8500_attr_group);
93ff722e
LJ		 1765
1766 if ((is_ab8505(ab8500) || is_ab9540(ab8500)) &&
1767 ab8500->chip_id >= AB8500_CUT2P0)
1768 ret = sysfs_create_group(&ab8500->dev->kobj,
1769 &ab8505_attr_group);
1770
cca69b67
MW		 1771 if (ret)
1772 dev_err(ab8500->dev, "error creating sysfs entries\n");
06e589ef
LJ		 1773
1774 return ret;
62579266
RV		 1775}
1776
4740f73f 1777static int ab8500_remove(struct platform_device *pdev)
62579266 1778{
d28f1db8
LJ		 1779 struct ab8500 *ab8500 = platform_get_drvdata(pdev);
1780
e436ddff
LJ		 1781 if (((is_ab8505(ab8500) || is_ab9540(ab8500)) &&
1782 ab8500->chip_id >= AB8500_CUT2P0) || is_ab8540(ab8500))
d6255529
LW		 1783 sysfs_remove_group(&ab8500->dev->kobj, &ab9540_attr_group);
1784 else
1785 sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group);
06e589ef 1786
93ff722e
LJ		 1787 if ((is_ab8505(ab8500) || is_ab9540(ab8500)) &&
1788 ab8500->chip_id >= AB8500_CUT2P0)
1789 sysfs_remove_group(&ab8500->dev->kobj, &ab8505_attr_group);
1790
62579266 1791 mfd_remove_devices(ab8500->dev);
62579266
RV		 1792
1793 return 0;
1794}
1795
d28f1db8
LJ		 1796static const struct platform_device_id ab8500_id[] = {
1797 { "ab8500-core", AB8500_VERSION_AB8500 },
1798 { "ab8505-i2c", AB8500_VERSION_AB8505 },
1799 { "ab9540-i2c", AB8500_VERSION_AB9540 },
1800 { "ab8540-i2c", AB8500_VERSION_AB8540 },
1801 { }
1802};
1803
1804static struct platform_driver ab8500_core_driver = {
1805 .driver = {
1806 .name = "ab8500-core",
1807 .owner = THIS_MODULE,
1808 },
1809 .probe = ab8500_probe,
84449216 1810 .remove = ab8500_remove,
d28f1db8
LJ		 1811 .id_table = ab8500_id,
1812};
1813
1814static int __init ab8500_core_init(void)
1815{
1816 return platform_driver_register(&ab8500_core_driver);
1817}
1818
1819static void __exit ab8500_core_exit(void)
1820{
1821 platform_driver_unregister(&ab8500_core_driver);
1822}
ba7cbc3e 1823core_initcall(ab8500_core_init);
d28f1db8
LJ		 1824module_exit(ab8500_core_exit);
1825
adceed62 1826MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent");
62579266
RV		 1827MODULE_DESCRIPTION("AB8500 MFD core");
1828MODULE_LICENSE("GPL v2");
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