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mfd: Remove confusing ab8500-i2c file and merge into ab8500-core
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CommitLineData
62579266
RV
1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License v2
5 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
6 * Author: Rabin Vincent <rabin.vincent@stericsson.com>
adceed62 7 * Author: Mattias Wallin <mattias.wallin@stericsson.com>
62579266
RV
8 */
9
10#include <linux/kernel.h>
11#include <linux/slab.h>
12#include <linux/init.h>
13#include <linux/irq.h>
14#include <linux/delay.h>
15#include <linux/interrupt.h>
16#include <linux/module.h>
17#include <linux/platform_device.h>
18#include <linux/mfd/core.h>
47c16975 19#include <linux/mfd/abx500.h>
ee66e653 20#include <linux/mfd/abx500/ab8500.h>
d28f1db8 21#include <linux/mfd/dbx500-prcmu.h>
549931f9 22#include <linux/regulator/ab8500.h>
62579266
RV
23
24/*
25 * Interrupt register offsets
26 * Bank : 0x0E
27 */
47c16975
MW
28#define AB8500_IT_SOURCE1_REG 0x00
29#define AB8500_IT_SOURCE2_REG 0x01
30#define AB8500_IT_SOURCE3_REG 0x02
31#define AB8500_IT_SOURCE4_REG 0x03
32#define AB8500_IT_SOURCE5_REG 0x04
33#define AB8500_IT_SOURCE6_REG 0x05
34#define AB8500_IT_SOURCE7_REG 0x06
35#define AB8500_IT_SOURCE8_REG 0x07
d6255529 36#define AB9540_IT_SOURCE13_REG 0x0C
47c16975
MW
37#define AB8500_IT_SOURCE19_REG 0x12
38#define AB8500_IT_SOURCE20_REG 0x13
39#define AB8500_IT_SOURCE21_REG 0x14
40#define AB8500_IT_SOURCE22_REG 0x15
41#define AB8500_IT_SOURCE23_REG 0x16
42#define AB8500_IT_SOURCE24_REG 0x17
62579266
RV
43
44/*
45 * latch registers
46 */
47c16975
MW
47#define AB8500_IT_LATCH1_REG 0x20
48#define AB8500_IT_LATCH2_REG 0x21
49#define AB8500_IT_LATCH3_REG 0x22
50#define AB8500_IT_LATCH4_REG 0x23
51#define AB8500_IT_LATCH5_REG 0x24
52#define AB8500_IT_LATCH6_REG 0x25
53#define AB8500_IT_LATCH7_REG 0x26
54#define AB8500_IT_LATCH8_REG 0x27
55#define AB8500_IT_LATCH9_REG 0x28
56#define AB8500_IT_LATCH10_REG 0x29
92d50a41 57#define AB8500_IT_LATCH12_REG 0x2B
d6255529 58#define AB9540_IT_LATCH13_REG 0x2C
47c16975
MW
59#define AB8500_IT_LATCH19_REG 0x32
60#define AB8500_IT_LATCH20_REG 0x33
61#define AB8500_IT_LATCH21_REG 0x34
62#define AB8500_IT_LATCH22_REG 0x35
63#define AB8500_IT_LATCH23_REG 0x36
64#define AB8500_IT_LATCH24_REG 0x37
62579266
RV
65
66/*
67 * mask registers
68 */
69
47c16975
MW
70#define AB8500_IT_MASK1_REG 0x40
71#define AB8500_IT_MASK2_REG 0x41
72#define AB8500_IT_MASK3_REG 0x42
73#define AB8500_IT_MASK4_REG 0x43
74#define AB8500_IT_MASK5_REG 0x44
75#define AB8500_IT_MASK6_REG 0x45
76#define AB8500_IT_MASK7_REG 0x46
77#define AB8500_IT_MASK8_REG 0x47
78#define AB8500_IT_MASK9_REG 0x48
79#define AB8500_IT_MASK10_REG 0x49
80#define AB8500_IT_MASK11_REG 0x4A
81#define AB8500_IT_MASK12_REG 0x4B
82#define AB8500_IT_MASK13_REG 0x4C
83#define AB8500_IT_MASK14_REG 0x4D
84#define AB8500_IT_MASK15_REG 0x4E
85#define AB8500_IT_MASK16_REG 0x4F
86#define AB8500_IT_MASK17_REG 0x50
87#define AB8500_IT_MASK18_REG 0x51
88#define AB8500_IT_MASK19_REG 0x52
89#define AB8500_IT_MASK20_REG 0x53
90#define AB8500_IT_MASK21_REG 0x54
91#define AB8500_IT_MASK22_REG 0x55
92#define AB8500_IT_MASK23_REG 0x56
93#define AB8500_IT_MASK24_REG 0x57
94
7ccfe9b1
MJ
95/*
96 * latch hierarchy registers
97 */
98#define AB8500_IT_LATCHHIER1_REG 0x60
99#define AB8500_IT_LATCHHIER2_REG 0x61
100#define AB8500_IT_LATCHHIER3_REG 0x62
101
102#define AB8500_IT_LATCHHIER_NUM 3
103
47c16975 104#define AB8500_REV_REG 0x80
0f620837 105#define AB8500_IC_NAME_REG 0x82
e5c238c3 106#define AB8500_SWITCH_OFF_STATUS 0x00
62579266 107
b4a31037
AL
108#define AB8500_TURN_ON_STATUS 0x00
109
6ef9418c
RA
110static bool no_bm; /* No battery management */
111module_param(no_bm, bool, S_IRUGO);
112
d6255529
LW
113#define AB9540_MODEM_CTRL2_REG 0x23
114#define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT BIT(2)
115
62579266
RV
116/*
117 * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt
2ced445e
LW
118 * numbers are indexed into this array with (num / 8). The interupts are
119 * defined in linux/mfd/ab8500.h
62579266
RV
120 *
121 * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at
122 * offset 0.
123 */
2ced445e 124/* AB8500 support */
62579266 125static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = {
92d50a41 126 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21,
62579266
RV
127};
128
d6255529
LW
129/* AB9540 support */
130static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = {
131 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24,
132};
133
0f620837
LW
134static const char ab8500_version_str[][7] = {
135 [AB8500_VERSION_AB8500] = "AB8500",
136 [AB8500_VERSION_AB8505] = "AB8505",
137 [AB8500_VERSION_AB9540] = "AB9540",
138 [AB8500_VERSION_AB8540] = "AB8540",
139};
140
d28f1db8
LJ
141static int ab8500_i2c_write(struct ab8500 *ab8500, u16 addr, u8 data)
142{
143 int ret;
144
145 ret = prcmu_abb_write((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
146 if (ret < 0)
147 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
148 return ret;
149}
150
151static int ab8500_i2c_write_masked(struct ab8500 *ab8500, u16 addr, u8 mask,
152 u8 data)
153{
154 int ret;
155
156 ret = prcmu_abb_write_masked((u8)(addr >> 8), (u8)(addr & 0xFF), &data,
157 &mask, 1);
158 if (ret < 0)
159 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
160 return ret;
161}
162
163static int ab8500_i2c_read(struct ab8500 *ab8500, u16 addr)
164{
165 int ret;
166 u8 data;
167
168 ret = prcmu_abb_read((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
169 if (ret < 0) {
170 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
171 return ret;
172 }
173 return (int)data;
174}
175
47c16975
MW
176static int ab8500_get_chip_id(struct device *dev)
177{
6bce7bf1
MW
178 struct ab8500 *ab8500;
179
180 if (!dev)
181 return -EINVAL;
182 ab8500 = dev_get_drvdata(dev->parent);
183 return ab8500 ? (int)ab8500->chip_id : -EINVAL;
47c16975
MW
184}
185
186static int set_register_interruptible(struct ab8500 *ab8500, u8 bank,
187 u8 reg, u8 data)
62579266
RV
188{
189 int ret;
47c16975
MW
190 /*
191 * Put the u8 bank and u8 register together into a an u16.
192 * The bank on higher 8 bits and register in lower 8 bits.
193 * */
194 u16 addr = ((u16)bank) << 8 | reg;
62579266
RV
195
196 dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data);
197
392cbd1e 198 mutex_lock(&ab8500->lock);
47c16975 199
62579266
RV
200 ret = ab8500->write(ab8500, addr, data);
201 if (ret < 0)
202 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
203 addr, ret);
47c16975 204 mutex_unlock(&ab8500->lock);
62579266
RV
205
206 return ret;
207}
208
47c16975
MW
209static int ab8500_set_register(struct device *dev, u8 bank,
210 u8 reg, u8 value)
62579266 211{
112a80d2 212 int ret;
47c16975 213 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
62579266 214
112a80d2
JA
215 atomic_inc(&ab8500->transfer_ongoing);
216 ret = set_register_interruptible(ab8500, bank, reg, value);
217 atomic_dec(&ab8500->transfer_ongoing);
218 return ret;
62579266 219}
62579266 220
47c16975
MW
221static int get_register_interruptible(struct ab8500 *ab8500, u8 bank,
222 u8 reg, u8 *value)
62579266
RV
223{
224 int ret;
47c16975
MW
225 /* put the u8 bank and u8 reg together into a an u16.
226 * bank on higher 8 bits and reg in lower */
227 u16 addr = ((u16)bank) << 8 | reg;
228
392cbd1e 229 mutex_lock(&ab8500->lock);
62579266
RV
230
231 ret = ab8500->read(ab8500, addr);
232 if (ret < 0)
233 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
234 addr, ret);
47c16975
MW
235 else
236 *value = ret;
62579266 237
47c16975 238 mutex_unlock(&ab8500->lock);
62579266
RV
239 dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret);
240
241 return ret;
242}
243
47c16975
MW
244static int ab8500_get_register(struct device *dev, u8 bank,
245 u8 reg, u8 *value)
62579266 246{
112a80d2 247 int ret;
47c16975 248 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
62579266 249
112a80d2
JA
250 atomic_inc(&ab8500->transfer_ongoing);
251 ret = get_register_interruptible(ab8500, bank, reg, value);
252 atomic_dec(&ab8500->transfer_ongoing);
253 return ret;
62579266 254}
47c16975
MW
255
256static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank,
257 u8 reg, u8 bitmask, u8 bitvalues)
62579266
RV
258{
259 int ret;
47c16975
MW
260 /* put the u8 bank and u8 reg together into a an u16.
261 * bank on higher 8 bits and reg in lower */
262 u16 addr = ((u16)bank) << 8 | reg;
62579266 263
392cbd1e 264 mutex_lock(&ab8500->lock);
62579266 265
bc628fd1
MN
266 if (ab8500->write_masked == NULL) {
267 u8 data;
62579266 268
bc628fd1
MN
269 ret = ab8500->read(ab8500, addr);
270 if (ret < 0) {
271 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
272 addr, ret);
273 goto out;
274 }
62579266 275
bc628fd1
MN
276 data = (u8)ret;
277 data = (~bitmask & data) | (bitmask & bitvalues);
278
279 ret = ab8500->write(ab8500, addr, data);
280 if (ret < 0)
281 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
282 addr, ret);
62579266 283
bc628fd1
MN
284 dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr,
285 data);
286 goto out;
287 }
288 ret = ab8500->write_masked(ab8500, addr, bitmask, bitvalues);
289 if (ret < 0)
290 dev_err(ab8500->dev, "failed to modify reg %#x: %d\n", addr,
291 ret);
62579266
RV
292out:
293 mutex_unlock(&ab8500->lock);
294 return ret;
295}
47c16975
MW
296
297static int ab8500_mask_and_set_register(struct device *dev,
298 u8 bank, u8 reg, u8 bitmask, u8 bitvalues)
299{
112a80d2 300 int ret;
47c16975
MW
301 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
302
112a80d2
JA
303 atomic_inc(&ab8500->transfer_ongoing);
304 ret= mask_and_set_register_interruptible(ab8500, bank, reg,
305 bitmask, bitvalues);
306 atomic_dec(&ab8500->transfer_ongoing);
307 return ret;
47c16975
MW
308}
309
310static struct abx500_ops ab8500_ops = {
311 .get_chip_id = ab8500_get_chip_id,
312 .get_register = ab8500_get_register,
313 .set_register = ab8500_set_register,
314 .get_register_page = NULL,
315 .set_register_page = NULL,
316 .mask_and_set_register = ab8500_mask_and_set_register,
317 .event_registers_startup_state_get = NULL,
318 .startup_irq_enabled = NULL,
319};
62579266 320
9505a0a0 321static void ab8500_irq_lock(struct irq_data *data)
62579266 322{
9505a0a0 323 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
62579266
RV
324
325 mutex_lock(&ab8500->irq_lock);
112a80d2 326 atomic_inc(&ab8500->transfer_ongoing);
62579266
RV
327}
328
9505a0a0 329static void ab8500_irq_sync_unlock(struct irq_data *data)
62579266 330{
9505a0a0 331 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
62579266
RV
332 int i;
333
2ced445e 334 for (i = 0; i < ab8500->mask_size; i++) {
62579266
RV
335 u8 old = ab8500->oldmask[i];
336 u8 new = ab8500->mask[i];
337 int reg;
338
339 if (new == old)
340 continue;
341
0f620837
LW
342 /*
343 * Interrupt register 12 doesn't exist prior to AB8500 version
344 * 2.0
345 */
346 if (ab8500->irq_reg_offset[i] == 11 &&
347 is_ab8500_1p1_or_earlier(ab8500))
92d50a41
MW
348 continue;
349
62579266
RV
350 ab8500->oldmask[i] = new;
351
2ced445e 352 reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i];
47c16975 353 set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new);
62579266 354 }
112a80d2 355 atomic_dec(&ab8500->transfer_ongoing);
62579266
RV
356 mutex_unlock(&ab8500->irq_lock);
357}
358
9505a0a0 359static void ab8500_irq_mask(struct irq_data *data)
62579266 360{
9505a0a0
MB
361 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
362 int offset = data->irq - ab8500->irq_base;
62579266
RV
363 int index = offset / 8;
364 int mask = 1 << (offset % 8);
365
366 ab8500->mask[index] |= mask;
367}
368
9505a0a0 369static void ab8500_irq_unmask(struct irq_data *data)
62579266 370{
9505a0a0
MB
371 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
372 int offset = data->irq - ab8500->irq_base;
62579266
RV
373 int index = offset / 8;
374 int mask = 1 << (offset % 8);
375
376 ab8500->mask[index] &= ~mask;
377}
378
379static struct irq_chip ab8500_irq_chip = {
380 .name = "ab8500",
9505a0a0
MB
381 .irq_bus_lock = ab8500_irq_lock,
382 .irq_bus_sync_unlock = ab8500_irq_sync_unlock,
383 .irq_mask = ab8500_irq_mask,
e6f9306e 384 .irq_disable = ab8500_irq_mask,
9505a0a0 385 .irq_unmask = ab8500_irq_unmask,
62579266
RV
386};
387
7ccfe9b1
MJ
388static int ab8500_handle_hierarchical_line(struct ab8500 *ab8500,
389 int latch_offset, u8 latch_val)
390{
391 int int_bit = __ffs(latch_val);
392 int line, i;
393
394 do {
395 int_bit = __ffs(latch_val);
396
397 for (i = 0; i < ab8500->mask_size; i++)
398 if (ab8500->irq_reg_offset[i] == latch_offset)
399 break;
400
401 if (i >= ab8500->mask_size) {
402 dev_err(ab8500->dev, "Register offset 0x%2x not declared\n",
403 latch_offset);
404 return -ENXIO;
405 }
406
407 line = (i << 3) + int_bit;
408 latch_val &= ~(1 << int_bit);
409
410 handle_nested_irq(ab8500->irq_base + line);
411 } while (latch_val);
412
413 return 0;
414}
415
416static int ab8500_handle_hierarchical_latch(struct ab8500 *ab8500,
417 int hier_offset, u8 hier_val)
418{
419 int latch_bit, status;
420 u8 latch_offset, latch_val;
421
422 do {
423 latch_bit = __ffs(hier_val);
424 latch_offset = (hier_offset << 3) + latch_bit;
425
426 /* Fix inconsistent ITFromLatch25 bit mapping... */
427 if (unlikely(latch_offset == 17))
428 latch_offset = 24;
429
430 status = get_register_interruptible(ab8500,
431 AB8500_INTERRUPT,
432 AB8500_IT_LATCH1_REG + latch_offset,
433 &latch_val);
434 if (status < 0 || latch_val == 0)
435 goto discard;
436
437 status = ab8500_handle_hierarchical_line(ab8500,
438 latch_offset, latch_val);
439 if (status < 0)
440 return status;
441discard:
442 hier_val &= ~(1 << latch_bit);
443 } while (hier_val);
444
445 return 0;
446}
447
448static irqreturn_t ab8500_hierarchical_irq(int irq, void *dev)
449{
450 struct ab8500 *ab8500 = dev;
451 u8 i;
452
453 dev_vdbg(ab8500->dev, "interrupt\n");
454
455 /* Hierarchical interrupt version */
456 for (i = 0; i < AB8500_IT_LATCHHIER_NUM; i++) {
457 int status;
458 u8 hier_val;
459
460 status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
461 AB8500_IT_LATCHHIER1_REG + i, &hier_val);
462 if (status < 0 || hier_val == 0)
463 continue;
464
465 status = ab8500_handle_hierarchical_latch(ab8500, i, hier_val);
466 if (status < 0)
467 break;
468 }
469 return IRQ_HANDLED;
470}
471
62579266
RV
472static irqreturn_t ab8500_irq(int irq, void *dev)
473{
474 struct ab8500 *ab8500 = dev;
475 int i;
476
477 dev_vdbg(ab8500->dev, "interrupt\n");
478
112a80d2
JA
479 atomic_inc(&ab8500->transfer_ongoing);
480
2ced445e
LW
481 for (i = 0; i < ab8500->mask_size; i++) {
482 int regoffset = ab8500->irq_reg_offset[i];
62579266 483 int status;
47c16975 484 u8 value;
62579266 485
0f620837
LW
486 /*
487 * Interrupt register 12 doesn't exist prior to AB8500 version
488 * 2.0
489 */
490 if (regoffset == 11 && is_ab8500_1p1_or_earlier(ab8500))
92d50a41
MW
491 continue;
492
47c16975
MW
493 status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
494 AB8500_IT_LATCH1_REG + regoffset, &value);
495 if (status < 0 || value == 0)
62579266
RV
496 continue;
497
498 do {
88aec4f7 499 int bit = __ffs(value);
62579266
RV
500 int line = i * 8 + bit;
501
502 handle_nested_irq(ab8500->irq_base + line);
47c16975 503 value &= ~(1 << bit);
112a80d2 504
47c16975 505 } while (value);
62579266 506 }
112a80d2 507 atomic_dec(&ab8500->transfer_ongoing);
62579266
RV
508 return IRQ_HANDLED;
509}
510
511static int ab8500_irq_init(struct ab8500 *ab8500)
512{
513 int base = ab8500->irq_base;
514 int irq;
2ced445e 515 int num_irqs;
62579266 516
d6255529
LW
517 if (is_ab9540(ab8500))
518 num_irqs = AB9540_NR_IRQS;
a982362c
BJ
519 else if (is_ab8505(ab8500))
520 num_irqs = AB8505_NR_IRQS;
d6255529
LW
521 else
522 num_irqs = AB8500_NR_IRQS;
2ced445e
LW
523
524 for (irq = base; irq < base + num_irqs; irq++) {
d5bb1221
TG
525 irq_set_chip_data(irq, ab8500);
526 irq_set_chip_and_handler(irq, &ab8500_irq_chip,
62579266 527 handle_simple_irq);
d5bb1221 528 irq_set_nested_thread(irq, 1);
62579266
RV
529#ifdef CONFIG_ARM
530 set_irq_flags(irq, IRQF_VALID);
531#else
d5bb1221 532 irq_set_noprobe(irq);
62579266
RV
533#endif
534 }
535
536 return 0;
537}
538
539static void ab8500_irq_remove(struct ab8500 *ab8500)
540{
541 int base = ab8500->irq_base;
542 int irq;
2ced445e
LW
543 int num_irqs;
544
d6255529
LW
545 if (is_ab9540(ab8500))
546 num_irqs = AB9540_NR_IRQS;
a982362c
BJ
547 else if (is_ab8505(ab8500))
548 num_irqs = AB8505_NR_IRQS;
d6255529
LW
549 else
550 num_irqs = AB8500_NR_IRQS;
62579266 551
2ced445e 552 for (irq = base; irq < base + num_irqs; irq++) {
62579266
RV
553#ifdef CONFIG_ARM
554 set_irq_flags(irq, 0);
555#endif
d5bb1221
TG
556 irq_set_chip_and_handler(irq, NULL, NULL);
557 irq_set_chip_data(irq, NULL);
62579266
RV
558 }
559}
560
112a80d2
JA
561int ab8500_suspend(struct ab8500 *ab8500)
562{
563 if (atomic_read(&ab8500->transfer_ongoing))
564 return -EINVAL;
565 else
566 return 0;
567}
568
d6255529 569/* AB8500 GPIO Resources */
5cef8df5 570static struct resource __devinitdata ab8500_gpio_resources[] = {
0cb3fcd7
BB
571 {
572 .name = "GPIO_INT6",
573 .start = AB8500_INT_GPIO6R,
574 .end = AB8500_INT_GPIO41F,
575 .flags = IORESOURCE_IRQ,
576 }
577};
578
d6255529
LW
579/* AB9540 GPIO Resources */
580static struct resource __devinitdata ab9540_gpio_resources[] = {
581 {
582 .name = "GPIO_INT6",
583 .start = AB8500_INT_GPIO6R,
584 .end = AB8500_INT_GPIO41F,
585 .flags = IORESOURCE_IRQ,
586 },
587 {
588 .name = "GPIO_INT14",
589 .start = AB9540_INT_GPIO50R,
590 .end = AB9540_INT_GPIO54R,
591 .flags = IORESOURCE_IRQ,
592 },
593 {
594 .name = "GPIO_INT15",
595 .start = AB9540_INT_GPIO50F,
596 .end = AB9540_INT_GPIO54F,
597 .flags = IORESOURCE_IRQ,
598 }
599};
600
5cef8df5 601static struct resource __devinitdata ab8500_gpadc_resources[] = {
62579266
RV
602 {
603 .name = "HW_CONV_END",
604 .start = AB8500_INT_GP_HW_ADC_CONV_END,
605 .end = AB8500_INT_GP_HW_ADC_CONV_END,
606 .flags = IORESOURCE_IRQ,
607 },
608 {
609 .name = "SW_CONV_END",
610 .start = AB8500_INT_GP_SW_ADC_CONV_END,
611 .end = AB8500_INT_GP_SW_ADC_CONV_END,
612 .flags = IORESOURCE_IRQ,
613 },
614};
615
5cef8df5 616static struct resource __devinitdata ab8500_rtc_resources[] = {
62579266
RV
617 {
618 .name = "60S",
619 .start = AB8500_INT_RTC_60S,
620 .end = AB8500_INT_RTC_60S,
621 .flags = IORESOURCE_IRQ,
622 },
623 {
624 .name = "ALARM",
625 .start = AB8500_INT_RTC_ALARM,
626 .end = AB8500_INT_RTC_ALARM,
627 .flags = IORESOURCE_IRQ,
628 },
629};
630
5cef8df5 631static struct resource __devinitdata ab8500_poweronkey_db_resources[] = {
77686517
SI
632 {
633 .name = "ONKEY_DBF",
634 .start = AB8500_INT_PON_KEY1DB_F,
635 .end = AB8500_INT_PON_KEY1DB_F,
636 .flags = IORESOURCE_IRQ,
637 },
638 {
639 .name = "ONKEY_DBR",
640 .start = AB8500_INT_PON_KEY1DB_R,
641 .end = AB8500_INT_PON_KEY1DB_R,
642 .flags = IORESOURCE_IRQ,
643 },
644};
645
6af75ecd 646static struct resource __devinitdata ab8500_av_acc_detect_resources[] = {
e098aded 647 {
6af75ecd
LW
648 .name = "ACC_DETECT_1DB_F",
649 .start = AB8500_INT_ACC_DETECT_1DB_F,
650 .end = AB8500_INT_ACC_DETECT_1DB_F,
651 .flags = IORESOURCE_IRQ,
e098aded
MW
652 },
653 {
6af75ecd
LW
654 .name = "ACC_DETECT_1DB_R",
655 .start = AB8500_INT_ACC_DETECT_1DB_R,
656 .end = AB8500_INT_ACC_DETECT_1DB_R,
657 .flags = IORESOURCE_IRQ,
658 },
659 {
660 .name = "ACC_DETECT_21DB_F",
661 .start = AB8500_INT_ACC_DETECT_21DB_F,
662 .end = AB8500_INT_ACC_DETECT_21DB_F,
663 .flags = IORESOURCE_IRQ,
664 },
665 {
666 .name = "ACC_DETECT_21DB_R",
667 .start = AB8500_INT_ACC_DETECT_21DB_R,
668 .end = AB8500_INT_ACC_DETECT_21DB_R,
669 .flags = IORESOURCE_IRQ,
670 },
671 {
672 .name = "ACC_DETECT_22DB_F",
673 .start = AB8500_INT_ACC_DETECT_22DB_F,
674 .end = AB8500_INT_ACC_DETECT_22DB_F,
675 .flags = IORESOURCE_IRQ,
e098aded 676 },
6af75ecd
LW
677 {
678 .name = "ACC_DETECT_22DB_R",
679 .start = AB8500_INT_ACC_DETECT_22DB_R,
680 .end = AB8500_INT_ACC_DETECT_22DB_R,
681 .flags = IORESOURCE_IRQ,
682 },
683};
684
685static struct resource __devinitdata ab8500_charger_resources[] = {
e098aded
MW
686 {
687 .name = "MAIN_CH_UNPLUG_DET",
688 .start = AB8500_INT_MAIN_CH_UNPLUG_DET,
689 .end = AB8500_INT_MAIN_CH_UNPLUG_DET,
690 .flags = IORESOURCE_IRQ,
691 },
692 {
693 .name = "MAIN_CHARGE_PLUG_DET",
694 .start = AB8500_INT_MAIN_CH_PLUG_DET,
695 .end = AB8500_INT_MAIN_CH_PLUG_DET,
696 .flags = IORESOURCE_IRQ,
697 },
e098aded
MW
698 {
699 .name = "VBUS_DET_R",
700 .start = AB8500_INT_VBUS_DET_R,
701 .end = AB8500_INT_VBUS_DET_R,
702 .flags = IORESOURCE_IRQ,
703 },
704 {
6af75ecd
LW
705 .name = "VBUS_DET_F",
706 .start = AB8500_INT_VBUS_DET_F,
707 .end = AB8500_INT_VBUS_DET_F,
e098aded
MW
708 .flags = IORESOURCE_IRQ,
709 },
710 {
6af75ecd
LW
711 .name = "USB_LINK_STATUS",
712 .start = AB8500_INT_USB_LINK_STATUS,
713 .end = AB8500_INT_USB_LINK_STATUS,
714 .flags = IORESOURCE_IRQ,
715 },
e098aded
MW
716 {
717 .name = "VBUS_OVV",
718 .start = AB8500_INT_VBUS_OVV,
719 .end = AB8500_INT_VBUS_OVV,
720 .flags = IORESOURCE_IRQ,
721 },
722 {
6af75ecd
LW
723 .name = "USB_CH_TH_PROT_R",
724 .start = AB8500_INT_USB_CH_TH_PROT_R,
725 .end = AB8500_INT_USB_CH_TH_PROT_R,
e098aded
MW
726 .flags = IORESOURCE_IRQ,
727 },
728 {
6af75ecd
LW
729 .name = "USB_CH_TH_PROT_F",
730 .start = AB8500_INT_USB_CH_TH_PROT_F,
731 .end = AB8500_INT_USB_CH_TH_PROT_F,
e098aded
MW
732 .flags = IORESOURCE_IRQ,
733 },
734 {
6af75ecd
LW
735 .name = "MAIN_EXT_CH_NOT_OK",
736 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
737 .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
738 .flags = IORESOURCE_IRQ,
739 },
740 {
741 .name = "MAIN_CH_TH_PROT_R",
742 .start = AB8500_INT_MAIN_CH_TH_PROT_R,
743 .end = AB8500_INT_MAIN_CH_TH_PROT_R,
744 .flags = IORESOURCE_IRQ,
745 },
746 {
747 .name = "MAIN_CH_TH_PROT_F",
748 .start = AB8500_INT_MAIN_CH_TH_PROT_F,
749 .end = AB8500_INT_MAIN_CH_TH_PROT_F,
750 .flags = IORESOURCE_IRQ,
751 },
752 {
753 .name = "USB_CHARGER_NOT_OKR",
a982362c
BJ
754 .start = AB8500_INT_USB_CHARGER_NOT_OKR,
755 .end = AB8500_INT_USB_CHARGER_NOT_OKR,
6af75ecd
LW
756 .flags = IORESOURCE_IRQ,
757 },
758 {
759 .name = "CH_WD_EXP",
760 .start = AB8500_INT_CH_WD_EXP,
761 .end = AB8500_INT_CH_WD_EXP,
762 .flags = IORESOURCE_IRQ,
763 },
764};
765
766static struct resource __devinitdata ab8500_btemp_resources[] = {
767 {
768 .name = "BAT_CTRL_INDB",
769 .start = AB8500_INT_BAT_CTRL_INDB,
770 .end = AB8500_INT_BAT_CTRL_INDB,
e098aded
MW
771 .flags = IORESOURCE_IRQ,
772 },
773 {
774 .name = "BTEMP_LOW",
775 .start = AB8500_INT_BTEMP_LOW,
776 .end = AB8500_INT_BTEMP_LOW,
777 .flags = IORESOURCE_IRQ,
778 },
779 {
780 .name = "BTEMP_HIGH",
781 .start = AB8500_INT_BTEMP_HIGH,
782 .end = AB8500_INT_BTEMP_HIGH,
783 .flags = IORESOURCE_IRQ,
784 },
785 {
6af75ecd
LW
786 .name = "BTEMP_LOW_MEDIUM",
787 .start = AB8500_INT_BTEMP_LOW_MEDIUM,
788 .end = AB8500_INT_BTEMP_LOW_MEDIUM,
e098aded
MW
789 .flags = IORESOURCE_IRQ,
790 },
791 {
6af75ecd
LW
792 .name = "BTEMP_MEDIUM_HIGH",
793 .start = AB8500_INT_BTEMP_MEDIUM_HIGH,
794 .end = AB8500_INT_BTEMP_MEDIUM_HIGH,
e098aded
MW
795 .flags = IORESOURCE_IRQ,
796 },
6af75ecd
LW
797};
798
799static struct resource __devinitdata ab8500_fg_resources[] = {
e098aded 800 {
6af75ecd
LW
801 .name = "NCONV_ACCU",
802 .start = AB8500_INT_CCN_CONV_ACC,
803 .end = AB8500_INT_CCN_CONV_ACC,
e098aded
MW
804 .flags = IORESOURCE_IRQ,
805 },
806 {
6af75ecd
LW
807 .name = "BATT_OVV",
808 .start = AB8500_INT_BATT_OVV,
809 .end = AB8500_INT_BATT_OVV,
e098aded
MW
810 .flags = IORESOURCE_IRQ,
811 },
812 {
6af75ecd
LW
813 .name = "LOW_BAT_F",
814 .start = AB8500_INT_LOW_BAT_F,
815 .end = AB8500_INT_LOW_BAT_F,
816 .flags = IORESOURCE_IRQ,
817 },
818 {
819 .name = "LOW_BAT_R",
820 .start = AB8500_INT_LOW_BAT_R,
821 .end = AB8500_INT_LOW_BAT_R,
822 .flags = IORESOURCE_IRQ,
823 },
824 {
825 .name = "CC_INT_CALIB",
826 .start = AB8500_INT_CC_INT_CALIB,
827 .end = AB8500_INT_CC_INT_CALIB,
e098aded
MW
828 .flags = IORESOURCE_IRQ,
829 },
a982362c
BJ
830 {
831 .name = "CCEOC",
832 .start = AB8500_INT_CCEOC,
833 .end = AB8500_INT_CCEOC,
834 .flags = IORESOURCE_IRQ,
835 },
e098aded
MW
836};
837
6af75ecd
LW
838static struct resource __devinitdata ab8500_chargalg_resources[] = {};
839
df720647 840#ifdef CONFIG_DEBUG_FS
5cef8df5 841static struct resource __devinitdata ab8500_debug_resources[] = {
e098aded
MW
842 {
843 .name = "IRQ_FIRST",
844 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
845 .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
846 .flags = IORESOURCE_IRQ,
847 },
848 {
849 .name = "IRQ_LAST",
a982362c
BJ
850 .start = AB8500_INT_XTAL32K_KO,
851 .end = AB8500_INT_XTAL32K_KO,
e098aded
MW
852 .flags = IORESOURCE_IRQ,
853 },
854};
df720647 855#endif
e098aded 856
5cef8df5 857static struct resource __devinitdata ab8500_usb_resources[] = {
e098aded
MW
858 {
859 .name = "ID_WAKEUP_R",
860 .start = AB8500_INT_ID_WAKEUP_R,
861 .end = AB8500_INT_ID_WAKEUP_R,
862 .flags = IORESOURCE_IRQ,
863 },
864 {
865 .name = "ID_WAKEUP_F",
866 .start = AB8500_INT_ID_WAKEUP_F,
867 .end = AB8500_INT_ID_WAKEUP_F,
868 .flags = IORESOURCE_IRQ,
869 },
870 {
871 .name = "VBUS_DET_F",
872 .start = AB8500_INT_VBUS_DET_F,
873 .end = AB8500_INT_VBUS_DET_F,
874 .flags = IORESOURCE_IRQ,
875 },
876 {
877 .name = "VBUS_DET_R",
878 .start = AB8500_INT_VBUS_DET_R,
879 .end = AB8500_INT_VBUS_DET_R,
880 .flags = IORESOURCE_IRQ,
881 },
92d50a41
MW
882 {
883 .name = "USB_LINK_STATUS",
884 .start = AB8500_INT_USB_LINK_STATUS,
885 .end = AB8500_INT_USB_LINK_STATUS,
886 .flags = IORESOURCE_IRQ,
887 },
6af75ecd
LW
888 {
889 .name = "USB_ADP_PROBE_PLUG",
890 .start = AB8500_INT_ADP_PROBE_PLUG,
891 .end = AB8500_INT_ADP_PROBE_PLUG,
892 .flags = IORESOURCE_IRQ,
893 },
894 {
895 .name = "USB_ADP_PROBE_UNPLUG",
896 .start = AB8500_INT_ADP_PROBE_UNPLUG,
897 .end = AB8500_INT_ADP_PROBE_UNPLUG,
898 .flags = IORESOURCE_IRQ,
899 },
e098aded
MW
900};
901
44f72e53
VS
902static struct resource __devinitdata ab8505_iddet_resources[] = {
903 {
904 .name = "KeyDeglitch",
905 .start = AB8505_INT_KEYDEGLITCH,
906 .end = AB8505_INT_KEYDEGLITCH,
907 .flags = IORESOURCE_IRQ,
908 },
909 {
910 .name = "KP",
911 .start = AB8505_INT_KP,
912 .end = AB8505_INT_KP,
913 .flags = IORESOURCE_IRQ,
914 },
915 {
916 .name = "IKP",
917 .start = AB8505_INT_IKP,
918 .end = AB8505_INT_IKP,
919 .flags = IORESOURCE_IRQ,
920 },
921 {
922 .name = "IKR",
923 .start = AB8505_INT_IKR,
924 .end = AB8505_INT_IKR,
925 .flags = IORESOURCE_IRQ,
926 },
927 {
928 .name = "KeyStuck",
929 .start = AB8505_INT_KEYSTUCK,
930 .end = AB8505_INT_KEYSTUCK,
931 .flags = IORESOURCE_IRQ,
932 },
933};
934
5cef8df5 935static struct resource __devinitdata ab8500_temp_resources[] = {
e098aded
MW
936 {
937 .name = "AB8500_TEMP_WARM",
938 .start = AB8500_INT_TEMP_WARM,
939 .end = AB8500_INT_TEMP_WARM,
940 .flags = IORESOURCE_IRQ,
941 },
942};
943
d6255529 944static struct mfd_cell __devinitdata abx500_common_devs[] = {
5814fc35
MW
945#ifdef CONFIG_DEBUG_FS
946 {
947 .name = "ab8500-debug",
e098aded
MW
948 .num_resources = ARRAY_SIZE(ab8500_debug_resources),
949 .resources = ab8500_debug_resources,
5814fc35
MW
950 },
951#endif
e098aded
MW
952 {
953 .name = "ab8500-sysctrl",
954 },
955 {
956 .name = "ab8500-regulator",
957 },
62579266
RV
958 {
959 .name = "ab8500-gpadc",
960 .num_resources = ARRAY_SIZE(ab8500_gpadc_resources),
961 .resources = ab8500_gpadc_resources,
962 },
963 {
964 .name = "ab8500-rtc",
965 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
966 .resources = ab8500_rtc_resources,
967 },
6af75ecd
LW
968 {
969 .name = "ab8500-acc-det",
970 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
971 .resources = ab8500_av_acc_detect_resources,
972 },
e098aded
MW
973 {
974 .name = "ab8500-poweron-key",
975 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
976 .resources = ab8500_poweronkey_db_resources,
977 },
f0f05b1c
AM
978 {
979 .name = "ab8500-pwm",
980 .id = 1,
981 },
982 {
983 .name = "ab8500-pwm",
984 .id = 2,
985 },
986 {
987 .name = "ab8500-pwm",
988 .id = 3,
989 },
e098aded 990 { .name = "ab8500-leds", },
77686517 991 {
e098aded
MW
992 .name = "ab8500-denc",
993 },
994 {
995 .name = "ab8500-temp",
996 .num_resources = ARRAY_SIZE(ab8500_temp_resources),
997 .resources = ab8500_temp_resources,
77686517 998 },
62579266
RV
999};
1000
6ef9418c
RA
1001static struct mfd_cell __devinitdata ab8500_bm_devs[] = {
1002 {
1003 .name = "ab8500-charger",
1004 .num_resources = ARRAY_SIZE(ab8500_charger_resources),
1005 .resources = ab8500_charger_resources,
1006 },
1007 {
1008 .name = "ab8500-btemp",
1009 .num_resources = ARRAY_SIZE(ab8500_btemp_resources),
1010 .resources = ab8500_btemp_resources,
1011 },
1012 {
1013 .name = "ab8500-fg",
1014 .num_resources = ARRAY_SIZE(ab8500_fg_resources),
1015 .resources = ab8500_fg_resources,
1016 },
1017 {
1018 .name = "ab8500-chargalg",
1019 .num_resources = ARRAY_SIZE(ab8500_chargalg_resources),
1020 .resources = ab8500_chargalg_resources,
1021 },
1022};
1023
d6255529
LW
1024static struct mfd_cell __devinitdata ab8500_devs[] = {
1025 {
1026 .name = "ab8500-gpio",
1027 .num_resources = ARRAY_SIZE(ab8500_gpio_resources),
1028 .resources = ab8500_gpio_resources,
1029 },
1030 {
1031 .name = "ab8500-usb",
1032 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
1033 .resources = ab8500_usb_resources,
1034 },
44f72e53
VS
1035 {
1036 .name = "ab8500-codec",
1037 },
d6255529
LW
1038};
1039
1040static struct mfd_cell __devinitdata ab9540_devs[] = {
1041 {
1042 .name = "ab8500-gpio",
1043 .num_resources = ARRAY_SIZE(ab9540_gpio_resources),
1044 .resources = ab9540_gpio_resources,
1045 },
1046 {
1047 .name = "ab9540-usb",
1048 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
1049 .resources = ab8500_usb_resources,
1050 },
44f72e53
VS
1051 {
1052 .name = "ab9540-codec",
1053 },
1054};
1055
1056/* Device list common to ab9540 and ab8505 */
1057static struct mfd_cell __devinitdata ab9540_ab8505_devs[] = {
1058 {
1059 .name = "ab-iddet",
1060 .num_resources = ARRAY_SIZE(ab8505_iddet_resources),
1061 .resources = ab8505_iddet_resources,
1062 },
d6255529
LW
1063};
1064
cca69b67
MW
1065static ssize_t show_chip_id(struct device *dev,
1066 struct device_attribute *attr, char *buf)
1067{
1068 struct ab8500 *ab8500;
1069
1070 ab8500 = dev_get_drvdata(dev);
1071 return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL);
1072}
1073
e5c238c3
MW
1074/*
1075 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
1076 * 0x01 Swoff bit programming
1077 * 0x02 Thermal protection activation
1078 * 0x04 Vbat lower then BattOk falling threshold
1079 * 0x08 Watchdog expired
1080 * 0x10 Non presence of 32kHz clock
1081 * 0x20 Battery level lower than power on reset threshold
1082 * 0x40 Power on key 1 pressed longer than 10 seconds
1083 * 0x80 DB8500 thermal shutdown
1084 */
1085static ssize_t show_switch_off_status(struct device *dev,
1086 struct device_attribute *attr, char *buf)
1087{
1088 int ret;
1089 u8 value;
1090 struct ab8500 *ab8500;
1091
1092 ab8500 = dev_get_drvdata(dev);
1093 ret = get_register_interruptible(ab8500, AB8500_RTC,
1094 AB8500_SWITCH_OFF_STATUS, &value);
1095 if (ret < 0)
1096 return ret;
1097 return sprintf(buf, "%#x\n", value);
1098}
1099
b4a31037
AL
1100/*
1101 * ab8500 has turned on due to (TURN_ON_STATUS):
1102 * 0x01 PORnVbat
1103 * 0x02 PonKey1dbF
1104 * 0x04 PonKey2dbF
1105 * 0x08 RTCAlarm
1106 * 0x10 MainChDet
1107 * 0x20 VbusDet
1108 * 0x40 UsbIDDetect
1109 * 0x80 Reserved
1110 */
1111static ssize_t show_turn_on_status(struct device *dev,
1112 struct device_attribute *attr, char *buf)
1113{
1114 int ret;
1115 u8 value;
1116 struct ab8500 *ab8500;
1117
1118 ab8500 = dev_get_drvdata(dev);
1119 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
1120 AB8500_TURN_ON_STATUS, &value);
1121 if (ret < 0)
1122 return ret;
1123 return sprintf(buf, "%#x\n", value);
1124}
1125
d6255529
LW
1126static ssize_t show_ab9540_dbbrstn(struct device *dev,
1127 struct device_attribute *attr, char *buf)
1128{
1129 struct ab8500 *ab8500;
1130 int ret;
1131 u8 value;
1132
1133 ab8500 = dev_get_drvdata(dev);
1134
1135 ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2,
1136 AB9540_MODEM_CTRL2_REG, &value);
1137 if (ret < 0)
1138 return ret;
1139
1140 return sprintf(buf, "%d\n",
1141 (value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0);
1142}
1143
1144static ssize_t store_ab9540_dbbrstn(struct device *dev,
1145 struct device_attribute *attr, const char *buf, size_t count)
1146{
1147 struct ab8500 *ab8500;
1148 int ret = count;
1149 int err;
1150 u8 bitvalues;
1151
1152 ab8500 = dev_get_drvdata(dev);
1153
1154 if (count > 0) {
1155 switch (buf[0]) {
1156 case '0':
1157 bitvalues = 0;
1158 break;
1159 case '1':
1160 bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT;
1161 break;
1162 default:
1163 goto exit;
1164 }
1165
1166 err = mask_and_set_register_interruptible(ab8500,
1167 AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG,
1168 AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues);
1169 if (err)
1170 dev_info(ab8500->dev,
1171 "Failed to set DBBRSTN %c, err %#x\n",
1172 buf[0], err);
1173 }
1174
1175exit:
1176 return ret;
1177}
1178
cca69b67 1179static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL);
e5c238c3 1180static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL);
b4a31037 1181static DEVICE_ATTR(turn_on_status, S_IRUGO, show_turn_on_status, NULL);
d6255529
LW
1182static DEVICE_ATTR(dbbrstn, S_IRUGO | S_IWUSR,
1183 show_ab9540_dbbrstn, store_ab9540_dbbrstn);
cca69b67
MW
1184
1185static struct attribute *ab8500_sysfs_entries[] = {
1186 &dev_attr_chip_id.attr,
e5c238c3 1187 &dev_attr_switch_off_status.attr,
b4a31037 1188 &dev_attr_turn_on_status.attr,
cca69b67
MW
1189 NULL,
1190};
1191
d6255529
LW
1192static struct attribute *ab9540_sysfs_entries[] = {
1193 &dev_attr_chip_id.attr,
1194 &dev_attr_switch_off_status.attr,
1195 &dev_attr_turn_on_status.attr,
1196 &dev_attr_dbbrstn.attr,
1197 NULL,
1198};
1199
cca69b67
MW
1200static struct attribute_group ab8500_attr_group = {
1201 .attrs = ab8500_sysfs_entries,
1202};
1203
d6255529
LW
1204static struct attribute_group ab9540_attr_group = {
1205 .attrs = ab9540_sysfs_entries,
1206};
1207
d28f1db8 1208static int __devinit ab8500_probe(struct platform_device *pdev)
62579266 1209{
d28f1db8
LJ
1210 struct ab8500_platform_data *plat = dev_get_platdata(&pdev->dev);
1211 const struct platform_device_id *platid = platform_get_device_id(pdev);
1212 enum ab8500_version version = platid->driver_data;
1213 struct ab8500 *ab8500;
1214 struct resource *resource;
62579266
RV
1215 int ret;
1216 int i;
47c16975 1217 u8 value;
62579266 1218
d28f1db8
LJ
1219 ab8500 = kzalloc(sizeof *ab8500, GFP_KERNEL);
1220 if (!ab8500)
1221 return -ENOMEM;
1222
62579266
RV
1223 if (plat)
1224 ab8500->irq_base = plat->irq_base;
1225
d28f1db8
LJ
1226 ab8500->dev = &pdev->dev;
1227
1228 resource = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1229 if (!resource) {
1230 ret = -ENODEV;
1231 goto out_free_ab8500;
1232 }
1233
1234 ab8500->irq = resource->start;
1235
1236 ab8500->read = ab8500_i2c_read;
1237 ab8500->write = ab8500_i2c_write;
1238 ab8500->write_masked = ab8500_i2c_write_masked;
1239
62579266
RV
1240 mutex_init(&ab8500->lock);
1241 mutex_init(&ab8500->irq_lock);
112a80d2 1242 atomic_set(&ab8500->transfer_ongoing, 0);
62579266 1243
d28f1db8
LJ
1244 platform_set_drvdata(pdev, ab8500);
1245
0f620837
LW
1246 if (version != AB8500_VERSION_UNDEFINED)
1247 ab8500->version = version;
1248 else {
1249 ret = get_register_interruptible(ab8500, AB8500_MISC,
1250 AB8500_IC_NAME_REG, &value);
1251 if (ret < 0)
d28f1db8 1252 goto out_free_ab8500;
0f620837
LW
1253
1254 ab8500->version = value;
1255 }
1256
47c16975
MW
1257 ret = get_register_interruptible(ab8500, AB8500_MISC,
1258 AB8500_REV_REG, &value);
62579266 1259 if (ret < 0)
d28f1db8 1260 goto out_free_ab8500;
62579266 1261
47c16975 1262 ab8500->chip_id = value;
62579266 1263
0f620837
LW
1264 dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n",
1265 ab8500_version_str[ab8500->version],
1266 ab8500->chip_id >> 4,
1267 ab8500->chip_id & 0x0F);
1268
d6255529 1269 /* Configure AB8500 or AB9540 IRQ */
a982362c 1270 if (is_ab9540(ab8500) || is_ab8505(ab8500)) {
d6255529
LW
1271 ab8500->mask_size = AB9540_NUM_IRQ_REGS;
1272 ab8500->irq_reg_offset = ab9540_irq_regoffset;
1273 } else {
1274 ab8500->mask_size = AB8500_NUM_IRQ_REGS;
1275 ab8500->irq_reg_offset = ab8500_irq_regoffset;
1276 }
2ced445e
LW
1277 ab8500->mask = kzalloc(ab8500->mask_size, GFP_KERNEL);
1278 if (!ab8500->mask)
1279 return -ENOMEM;
1280 ab8500->oldmask = kzalloc(ab8500->mask_size, GFP_KERNEL);
1281 if (!ab8500->oldmask) {
1282 ret = -ENOMEM;
1283 goto out_freemask;
1284 }
e5c238c3
MW
1285 /*
1286 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
1287 * 0x01 Swoff bit programming
1288 * 0x02 Thermal protection activation
1289 * 0x04 Vbat lower then BattOk falling threshold
1290 * 0x08 Watchdog expired
1291 * 0x10 Non presence of 32kHz clock
1292 * 0x20 Battery level lower than power on reset threshold
1293 * 0x40 Power on key 1 pressed longer than 10 seconds
1294 * 0x80 DB8500 thermal shutdown
1295 */
1296
1297 ret = get_register_interruptible(ab8500, AB8500_RTC,
1298 AB8500_SWITCH_OFF_STATUS, &value);
1299 if (ret < 0)
1300 return ret;
1301 dev_info(ab8500->dev, "switch off status: %#x", value);
1302
62579266
RV
1303 if (plat && plat->init)
1304 plat->init(ab8500);
1305
1306 /* Clear and mask all interrupts */
2ced445e 1307 for (i = 0; i < ab8500->mask_size; i++) {
0f620837
LW
1308 /*
1309 * Interrupt register 12 doesn't exist prior to AB8500 version
1310 * 2.0
1311 */
1312 if (ab8500->irq_reg_offset[i] == 11 &&
1313 is_ab8500_1p1_or_earlier(ab8500))
92d50a41 1314 continue;
62579266 1315
47c16975 1316 get_register_interruptible(ab8500, AB8500_INTERRUPT,
2ced445e 1317 AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i],
92d50a41 1318 &value);
47c16975 1319 set_register_interruptible(ab8500, AB8500_INTERRUPT,
2ced445e 1320 AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff);
62579266
RV
1321 }
1322
47c16975
MW
1323 ret = abx500_register_ops(ab8500->dev, &ab8500_ops);
1324 if (ret)
2ced445e 1325 goto out_freeoldmask;
47c16975 1326
2ced445e 1327 for (i = 0; i < ab8500->mask_size; i++)
62579266
RV
1328 ab8500->mask[i] = ab8500->oldmask[i] = 0xff;
1329
1330 if (ab8500->irq_base) {
1331 ret = ab8500_irq_init(ab8500);
1332 if (ret)
2ced445e 1333 goto out_freeoldmask;
62579266 1334
7ccfe9b1
MJ
1335 /* Activate this feature only in ab9540 */
1336 /* till tests are done on ab8500 1p2 or later*/
1337 if (is_ab9540(ab8500))
1338 ret = request_threaded_irq(ab8500->irq, NULL,
1339 ab8500_hierarchical_irq,
1340 IRQF_ONESHOT | IRQF_NO_SUSPEND,
1341 "ab8500", ab8500);
1342 else
1343 ret = request_threaded_irq(ab8500->irq, NULL,
1344 ab8500_irq,
1345 IRQF_ONESHOT | IRQF_NO_SUSPEND,
1346 "ab8500", ab8500);
62579266
RV
1347 if (ret)
1348 goto out_removeirq;
1349 }
1350
d6255529
LW
1351 ret = mfd_add_devices(ab8500->dev, 0, abx500_common_devs,
1352 ARRAY_SIZE(abx500_common_devs), NULL,
1353 ab8500->irq_base);
1354
1355 if (ret)
1356 goto out_freeirq;
1357
1358 if (is_ab9540(ab8500))
1359 ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs,
1360 ARRAY_SIZE(ab9540_devs), NULL,
1361 ab8500->irq_base);
1362 else
1363 ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs,
44f72e53
VS
1364 ARRAY_SIZE(ab8500_devs), NULL,
1365 ab8500->irq_base);
1366
1367 if (is_ab9540(ab8500) || is_ab8505(ab8500))
1368 ret = mfd_add_devices(ab8500->dev, 0, ab9540_ab8505_devs,
1369 ARRAY_SIZE(ab9540_ab8505_devs), NULL,
62579266 1370 ab8500->irq_base);
44f72e53 1371
62579266
RV
1372 if (ret)
1373 goto out_freeirq;
1374
6ef9418c
RA
1375 if (!no_bm) {
1376 /* Add battery management devices */
1377 ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs,
1378 ARRAY_SIZE(ab8500_bm_devs), NULL,
1379 ab8500->irq_base);
1380 if (ret)
1381 dev_err(ab8500->dev, "error adding bm devices\n");
1382 }
1383
d6255529
LW
1384 if (is_ab9540(ab8500))
1385 ret = sysfs_create_group(&ab8500->dev->kobj,
1386 &ab9540_attr_group);
1387 else
1388 ret = sysfs_create_group(&ab8500->dev->kobj,
1389 &ab8500_attr_group);
cca69b67
MW
1390 if (ret)
1391 dev_err(ab8500->dev, "error creating sysfs entries\n");
d6255529
LW
1392 else
1393 return ret;
62579266
RV
1394
1395out_freeirq:
6d95b7fd 1396 if (ab8500->irq_base)
62579266
RV
1397 free_irq(ab8500->irq, ab8500);
1398out_removeirq:
6d95b7fd 1399 if (ab8500->irq_base)
62579266 1400 ab8500_irq_remove(ab8500);
2ced445e
LW
1401out_freeoldmask:
1402 kfree(ab8500->oldmask);
1403out_freemask:
1404 kfree(ab8500->mask);
d28f1db8
LJ
1405out_free_ab8500:
1406 kfree(ab8500);
6d95b7fd 1407
62579266
RV
1408 return ret;
1409}
1410
d28f1db8 1411static int __devexit ab8500_remove(struct platform_device *pdev)
62579266 1412{
d28f1db8
LJ
1413 struct ab8500 *ab8500 = platform_get_drvdata(pdev);
1414
d6255529
LW
1415 if (is_ab9540(ab8500))
1416 sysfs_remove_group(&ab8500->dev->kobj, &ab9540_attr_group);
1417 else
1418 sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group);
62579266
RV
1419 mfd_remove_devices(ab8500->dev);
1420 if (ab8500->irq_base) {
1421 free_irq(ab8500->irq, ab8500);
1422 ab8500_irq_remove(ab8500);
1423 }
2ced445e
LW
1424 kfree(ab8500->oldmask);
1425 kfree(ab8500->mask);
d28f1db8 1426 kfree(ab8500);
62579266
RV
1427
1428 return 0;
1429}
1430
d28f1db8
LJ
1431static const struct platform_device_id ab8500_id[] = {
1432 { "ab8500-core", AB8500_VERSION_AB8500 },
1433 { "ab8505-i2c", AB8500_VERSION_AB8505 },
1434 { "ab9540-i2c", AB8500_VERSION_AB9540 },
1435 { "ab8540-i2c", AB8500_VERSION_AB8540 },
1436 { }
1437};
1438
1439static struct platform_driver ab8500_core_driver = {
1440 .driver = {
1441 .name = "ab8500-core",
1442 .owner = THIS_MODULE,
1443 },
1444 .probe = ab8500_probe,
1445 .remove = __devexit_p(ab8500_remove),
1446 .id_table = ab8500_id,
1447};
1448
1449static int __init ab8500_core_init(void)
1450{
1451 return platform_driver_register(&ab8500_core_driver);
1452}
1453
1454static void __exit ab8500_core_exit(void)
1455{
1456 platform_driver_unregister(&ab8500_core_driver);
1457}
1458arch_initcall(ab8500_core_init);
1459module_exit(ab8500_core_exit);
1460
adceed62 1461MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent");
62579266
RV
1462MODULE_DESCRIPTION("AB8500 MFD core");
1463MODULE_LICENSE("GPL v2");