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mfd: ab8500: actually handle the AB8500 GPIO IRQs correctly
[mirror_ubuntu-bionic-kernel.git] / drivers / mfd / ab8500-core.c
CommitLineData
62579266
RV		 1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License v2
5 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
6 * Author: Rabin Vincent <rabin.vincent@stericsson.com>
adceed62 7 * Author: Mattias Wallin <mattias.wallin@stericsson.com>
62579266
RV		 8 */
9
10#include <linux/kernel.h>
11#include <linux/slab.h>
12#include <linux/init.h>
13#include <linux/irq.h>
06e589ef 14#include <linux/irqdomain.h>
62579266
RV		 15#include <linux/delay.h>
16#include <linux/interrupt.h>
17#include <linux/module.h>
18#include <linux/platform_device.h>
19#include <linux/mfd/core.h>
47c16975 20#include <linux/mfd/abx500.h>
ee66e653 21#include <linux/mfd/abx500/ab8500.h>
00441b5e 22#include <linux/mfd/abx500/ab8500-bm.h>
d28f1db8 23#include <linux/mfd/dbx500-prcmu.h>
549931f9 24#include <linux/regulator/ab8500.h>
6bc4a568
LJ		 25#include <linux/of.h>
26#include <linux/of_device.h>
62579266
RV		 27
28/*
29 * Interrupt register offsets
30 * Bank : 0x0E
31 */
47c16975
MW		 32#define AB8500_IT_SOURCE1_REG 0x00
33#define AB8500_IT_SOURCE2_REG 0x01
34#define AB8500_IT_SOURCE3_REG 0x02
35#define AB8500_IT_SOURCE4_REG 0x03
36#define AB8500_IT_SOURCE5_REG 0x04
37#define AB8500_IT_SOURCE6_REG 0x05
38#define AB8500_IT_SOURCE7_REG 0x06
39#define AB8500_IT_SOURCE8_REG 0x07
d6255529 40#define AB9540_IT_SOURCE13_REG 0x0C
47c16975
MW		 41#define AB8500_IT_SOURCE19_REG 0x12
42#define AB8500_IT_SOURCE20_REG 0x13
43#define AB8500_IT_SOURCE21_REG 0x14
44#define AB8500_IT_SOURCE22_REG 0x15
45#define AB8500_IT_SOURCE23_REG 0x16
46#define AB8500_IT_SOURCE24_REG 0x17
62579266
RV		 47
48/*
49 * latch registers
50 */
47c16975
MW		 51#define AB8500_IT_LATCH1_REG 0x20
52#define AB8500_IT_LATCH2_REG 0x21
53#define AB8500_IT_LATCH3_REG 0x22
54#define AB8500_IT_LATCH4_REG 0x23
55#define AB8500_IT_LATCH5_REG 0x24
56#define AB8500_IT_LATCH6_REG 0x25
57#define AB8500_IT_LATCH7_REG 0x26
58#define AB8500_IT_LATCH8_REG 0x27
59#define AB8500_IT_LATCH9_REG 0x28
60#define AB8500_IT_LATCH10_REG 0x29
92d50a41 61#define AB8500_IT_LATCH12_REG 0x2B
d6255529 62#define AB9540_IT_LATCH13_REG 0x2C
47c16975
MW		 63#define AB8500_IT_LATCH19_REG 0x32
64#define AB8500_IT_LATCH20_REG 0x33
65#define AB8500_IT_LATCH21_REG 0x34
66#define AB8500_IT_LATCH22_REG 0x35
67#define AB8500_IT_LATCH23_REG 0x36
68#define AB8500_IT_LATCH24_REG 0x37
62579266
RV		 69
70/*
71 * mask registers
72 */
73
47c16975
MW		 74#define AB8500_IT_MASK1_REG 0x40
75#define AB8500_IT_MASK2_REG 0x41
76#define AB8500_IT_MASK3_REG 0x42
77#define AB8500_IT_MASK4_REG 0x43
78#define AB8500_IT_MASK5_REG 0x44
79#define AB8500_IT_MASK6_REG 0x45
80#define AB8500_IT_MASK7_REG 0x46
81#define AB8500_IT_MASK8_REG 0x47
82#define AB8500_IT_MASK9_REG 0x48
83#define AB8500_IT_MASK10_REG 0x49
84#define AB8500_IT_MASK11_REG 0x4A
85#define AB8500_IT_MASK12_REG 0x4B
86#define AB8500_IT_MASK13_REG 0x4C
87#define AB8500_IT_MASK14_REG 0x4D
88#define AB8500_IT_MASK15_REG 0x4E
89#define AB8500_IT_MASK16_REG 0x4F
90#define AB8500_IT_MASK17_REG 0x50
91#define AB8500_IT_MASK18_REG 0x51
92#define AB8500_IT_MASK19_REG 0x52
93#define AB8500_IT_MASK20_REG 0x53
94#define AB8500_IT_MASK21_REG 0x54
95#define AB8500_IT_MASK22_REG 0x55
96#define AB8500_IT_MASK23_REG 0x56
97#define AB8500_IT_MASK24_REG 0x57
98
7ccfe9b1
MJ		 99/*
100 * latch hierarchy registers
101 */
102#define AB8500_IT_LATCHHIER1_REG 0x60
103#define AB8500_IT_LATCHHIER2_REG 0x61
104#define AB8500_IT_LATCHHIER3_REG 0x62
105
106#define AB8500_IT_LATCHHIER_NUM 3
107
47c16975 108#define AB8500_REV_REG 0x80
0f620837 109#define AB8500_IC_NAME_REG 0x82
e5c238c3 110#define AB8500_SWITCH_OFF_STATUS 0x00
62579266 111
b4a31037
AL		 112#define AB8500_TURN_ON_STATUS 0x00
113
6ef9418c
RA		 114static bool no_bm; /* No battery management */
115module_param(no_bm, bool, S_IRUGO);
116
d6255529
LW		 117#define AB9540_MODEM_CTRL2_REG 0x23
118#define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT BIT(2)
119
62579266
RV		 120/*
121 * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt
2ced445e
LW		 122 * numbers are indexed into this array with (num / 8). The interupts are
123 * defined in linux/mfd/ab8500.h
62579266
RV		 124 *
125 * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at
126 * offset 0.
127 */
2ced445e 128/* AB8500 support */
62579266 129static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = {
92d50a41 130 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21,
62579266
RV		 131};
132
d6255529
LW		 133/* AB9540 support */
134static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = {
135 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24,
136};
137
0f620837
LW		 138static const char ab8500_version_str[][7] = {
139 [AB8500_VERSION_AB8500] = "AB8500",
140 [AB8500_VERSION_AB8505] = "AB8505",
141 [AB8500_VERSION_AB9540] = "AB9540",
142 [AB8500_VERSION_AB8540] = "AB8540",
143};
144
822672a7 145static int ab8500_prcmu_write(struct ab8500 *ab8500, u16 addr, u8 data)
d28f1db8
LJ		 146{
147 int ret;
148
149 ret = prcmu_abb_write((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
150 if (ret < 0)
151 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
152 return ret;
153}
154
822672a7 155static int ab8500_prcmu_write_masked(struct ab8500 *ab8500, u16 addr, u8 mask,
d28f1db8
LJ		 156 u8 data)
157{
158 int ret;
159
160 ret = prcmu_abb_write_masked((u8)(addr >> 8), (u8)(addr & 0xFF), &data,
161 &mask, 1);
162 if (ret < 0)
163 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
164 return ret;
165}
166
822672a7 167static int ab8500_prcmu_read(struct ab8500 *ab8500, u16 addr)
d28f1db8
LJ		 168{
169 int ret;
170 u8 data;
171
172 ret = prcmu_abb_read((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
173 if (ret < 0) {
174 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
175 return ret;
176 }
177 return (int)data;
178}
179
47c16975
MW		 180static int ab8500_get_chip_id(struct device *dev)
181{
6bce7bf1
MW		 182 struct ab8500 *ab8500;
183
184 if (!dev)
185 return -EINVAL;
186 ab8500 = dev_get_drvdata(dev->parent);
187 return ab8500 ? (int)ab8500->chip_id : -EINVAL;
47c16975
MW		 188}
189
190static int set_register_interruptible(struct ab8500 *ab8500, u8 bank,
191 u8 reg, u8 data)
62579266
RV		 192{
193 int ret;
47c16975
MW		 194 /*
195 * Put the u8 bank and u8 register together into a an u16.
196 * The bank on higher 8 bits and register in lower 8 bits.
197 * */
198 u16 addr = ((u16)bank) << 8 | reg;
62579266
RV		 199
200 dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data);
201
392cbd1e 202 mutex_lock(&ab8500->lock);
47c16975 203
62579266
RV		 204 ret = ab8500->write(ab8500, addr, data);
205 if (ret < 0)
206 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
207 addr, ret);
47c16975 208 mutex_unlock(&ab8500->lock);
62579266
RV		 209
210 return ret;
211}
212
47c16975
MW		 213static int ab8500_set_register(struct device *dev, u8 bank,
214 u8 reg, u8 value)
62579266 215{
112a80d2 216 int ret;
47c16975 217 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
62579266 218
112a80d2
JA		 219 atomic_inc(&ab8500->transfer_ongoing);
220 ret = set_register_interruptible(ab8500, bank, reg, value);
221 atomic_dec(&ab8500->transfer_ongoing);
222 return ret;
62579266 223}
62579266 224
47c16975
MW		 225static int get_register_interruptible(struct ab8500 *ab8500, u8 bank,
226 u8 reg, u8 *value)
62579266
RV		 227{
228 int ret;
47c16975
MW		 229 /* put the u8 bank and u8 reg together into a an u16.
230 * bank on higher 8 bits and reg in lower */
231 u16 addr = ((u16)bank) << 8 | reg;
232
392cbd1e 233 mutex_lock(&ab8500->lock);
62579266
RV		 234
235 ret = ab8500->read(ab8500, addr);
236 if (ret < 0)
237 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
238 addr, ret);
47c16975
MW		 239 else
240 *value = ret;
62579266 241
47c16975 242 mutex_unlock(&ab8500->lock);
62579266
RV		 243 dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret);
244
245 return ret;
246}
247
47c16975
MW		 248static int ab8500_get_register(struct device *dev, u8 bank,
249 u8 reg, u8 *value)
62579266 250{
112a80d2 251 int ret;
47c16975 252 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
62579266 253
112a80d2
JA		 254 atomic_inc(&ab8500->transfer_ongoing);
255 ret = get_register_interruptible(ab8500, bank, reg, value);
256 atomic_dec(&ab8500->transfer_ongoing);
257 return ret;
62579266 258}
47c16975
MW		 259
260static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank,
261 u8 reg, u8 bitmask, u8 bitvalues)
62579266
RV		 262{
263 int ret;
47c16975
MW		 264 /* put the u8 bank and u8 reg together into a an u16.
265 * bank on higher 8 bits and reg in lower */
266 u16 addr = ((u16)bank) << 8 | reg;
62579266 267
392cbd1e 268 mutex_lock(&ab8500->lock);
62579266 269
bc628fd1
MN		 270 if (ab8500->write_masked == NULL) {
271 u8 data;
62579266 272
bc628fd1
MN		 273 ret = ab8500->read(ab8500, addr);
274 if (ret < 0) {
275 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
276 addr, ret);
277 goto out;
278 }
62579266 279
bc628fd1
MN		 280 data = (u8)ret;
281 data = (~bitmask & data) | (bitmask & bitvalues);
282
283 ret = ab8500->write(ab8500, addr, data);
284 if (ret < 0)
285 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
286 addr, ret);
62579266 287
bc628fd1
MN		 288 dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr,
289 data);
290 goto out;
291 }
292 ret = ab8500->write_masked(ab8500, addr, bitmask, bitvalues);
293 if (ret < 0)
294 dev_err(ab8500->dev, "failed to modify reg %#x: %d\n", addr,
295 ret);
62579266
RV		 296out:
297 mutex_unlock(&ab8500->lock);
298 return ret;
299}
47c16975
MW		 300
301static int ab8500_mask_and_set_register(struct device *dev,
302 u8 bank, u8 reg, u8 bitmask, u8 bitvalues)
303{
112a80d2 304 int ret;
47c16975
MW		 305 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
306
112a80d2
JA		 307 atomic_inc(&ab8500->transfer_ongoing);
308 ret= mask_and_set_register_interruptible(ab8500, bank, reg,
309 bitmask, bitvalues);
310 atomic_dec(&ab8500->transfer_ongoing);
311 return ret;
47c16975
MW		 312}
313
314static struct abx500_ops ab8500_ops = {
315 .get_chip_id = ab8500_get_chip_id,
316 .get_register = ab8500_get_register,
317 .set_register = ab8500_set_register,
318 .get_register_page = NULL,
319 .set_register_page = NULL,
320 .mask_and_set_register = ab8500_mask_and_set_register,
321 .event_registers_startup_state_get = NULL,
322 .startup_irq_enabled = NULL,
323};
62579266 324
9505a0a0 325static void ab8500_irq_lock(struct irq_data *data)
62579266 326{
9505a0a0 327 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
62579266
RV		 328
329 mutex_lock(&ab8500->irq_lock);
112a80d2 330 atomic_inc(&ab8500->transfer_ongoing);
62579266
RV		 331}
332
9505a0a0 333static void ab8500_irq_sync_unlock(struct irq_data *data)
62579266 334{
9505a0a0 335 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
62579266
RV		 336 int i;
337
2ced445e 338 for (i = 0; i < ab8500->mask_size; i++) {
62579266
RV		 339 u8 old = ab8500->oldmask[i];
340 u8 new = ab8500->mask[i];
341 int reg;
342
343 if (new == old)
344 continue;
345
0f620837
LW		 346 /*
347 * Interrupt register 12 doesn't exist prior to AB8500 version
348 * 2.0
349 */
350 if (ab8500->irq_reg_offset[i] == 11 &&
351 is_ab8500_1p1_or_earlier(ab8500))
92d50a41
MW		 352 continue;
353
62579266
RV		 354 ab8500->oldmask[i] = new;
355
2ced445e 356 reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i];
47c16975 357 set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new);
62579266 358 }
112a80d2 359 atomic_dec(&ab8500->transfer_ongoing);
62579266
RV		 360 mutex_unlock(&ab8500->irq_lock);
361}
362
9505a0a0 363static void ab8500_irq_mask(struct irq_data *data)
62579266 364{
9505a0a0 365 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
06e589ef 366 int offset = data->hwirq;
62579266
RV		 367 int index = offset / 8;
368 int mask = 1 << (offset % 8);
369
370 ab8500->mask[index] |= mask;
9c677b9b
LJ		 371
372 /* The AB8500 GPIOs have two interrupts each (rising & falling). */
373 if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R)
374 ab8500->mask[index + 2] |= mask;
375 if (offset >= AB9540_INT_GPIO50R && offset <= AB9540_INT_GPIO54R)
376 ab8500->mask[index + 1] |= mask;
377 if (offset == AB8540_INT_GPIO43R || offset == AB8540_INT_GPIO44R)
e2ddf46a
LW		 378 /* Here the falling IRQ is one bit lower */
379 ab8500->mask[index] |= (mask << 1);
62579266
RV		 380}
381
9505a0a0 382static void ab8500_irq_unmask(struct irq_data *data)
62579266 383{
9505a0a0 384 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
9c677b9b 385 unsigned int type = irqd_get_trigger_type(data);
06e589ef 386 int offset = data->hwirq;
62579266
RV		 387 int index = offset / 8;
388 int mask = 1 << (offset % 8);
389
9c677b9b
LJ		 390 if (type & IRQ_TYPE_EDGE_RISING)
391 ab8500->mask[index] &= ~mask;
392
393 /* The AB8500 GPIOs have two interrupts each (rising & falling). */
394 if (type & IRQ_TYPE_EDGE_FALLING) {
395 if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R)
396 ab8500->mask[index + 2] &= ~mask;
397 else if (offset >= AB9540_INT_GPIO50R && offset <= AB9540_INT_GPIO54R)
398 ab8500->mask[index + 1] &= ~mask;
399 else if (offset == AB8540_INT_GPIO43R || offset == AB8540_INT_GPIO44R)
e2ddf46a
LW		 400 /* Here the falling IRQ is one bit lower */
401 ab8500->mask[index] &= ~(mask << 1);
9c677b9b
LJ		 402 else
403 ab8500->mask[index] &= ~mask;
e2ddf46a 404 } else {
9c677b9b
LJ		 405 /* Satisfies the case where type is not set. */
406 ab8500->mask[index] &= ~mask;
e2ddf46a 407 }
62579266
RV		 408}
409
410static struct irq_chip ab8500_irq_chip = {
411 .name = "ab8500",
9505a0a0
MB		 412 .irq_bus_lock = ab8500_irq_lock,
413 .irq_bus_sync_unlock = ab8500_irq_sync_unlock,
414 .irq_mask = ab8500_irq_mask,
e6f9306e 415 .irq_disable = ab8500_irq_mask,
9505a0a0 416 .irq_unmask = ab8500_irq_unmask,
62579266
RV		 417};
418
7ccfe9b1
MJ		 419static int ab8500_handle_hierarchical_line(struct ab8500 *ab8500,
420 int latch_offset, u8 latch_val)
421{
422 int int_bit = __ffs(latch_val);
423 int line, i;
424
425 do {
426 int_bit = __ffs(latch_val);
427
428 for (i = 0; i < ab8500->mask_size; i++)
429 if (ab8500->irq_reg_offset[i] == latch_offset)
430 break;
431
432 if (i >= ab8500->mask_size) {
433 dev_err(ab8500->dev, "Register offset 0x%2x not declared\n",
434 latch_offset);
435 return -ENXIO;
436 }
437
438 line = (i << 3) + int_bit;
439 latch_val &= ~(1 << int_bit);
440
e2ddf46a
LW		 441 /*
442 * This handles the falling edge hwirqs from the GPIO
443 * lines. Route them back to the line registered for the
444 * rising IRQ, as this is merely a flag for the same IRQ
445 * in linux terms.
446 */
447 if (line >= AB8500_INT_GPIO6F && line <= AB8500_INT_GPIO41F)
448 line -= 16;
449 if (line >= AB9540_INT_GPIO50F && line <= AB9540_INT_GPIO54F)
450 line -= 8;
451 if (line == AB8540_INT_GPIO43F || line == AB8540_INT_GPIO44F)
452 line += 1;
453
7ccfe9b1
MJ		 454 handle_nested_irq(ab8500->irq_base + line);
455 } while (latch_val);
456
457 return 0;
458}
459
460static int ab8500_handle_hierarchical_latch(struct ab8500 *ab8500,
461 int hier_offset, u8 hier_val)
462{
463 int latch_bit, status;
464 u8 latch_offset, latch_val;
465
466 do {
467 latch_bit = __ffs(hier_val);
468 latch_offset = (hier_offset << 3) + latch_bit;
469
470 /* Fix inconsistent ITFromLatch25 bit mapping... */
471 if (unlikely(latch_offset == 17))
472 latch_offset = 24;
473
474 status = get_register_interruptible(ab8500,
475 AB8500_INTERRUPT,
476 AB8500_IT_LATCH1_REG + latch_offset,
477 &latch_val);
478 if (status < 0 || latch_val == 0)
479 goto discard;
480
481 status = ab8500_handle_hierarchical_line(ab8500,
482 latch_offset, latch_val);
483 if (status < 0)
484 return status;
485discard:
486 hier_val &= ~(1 << latch_bit);
487 } while (hier_val);
488
489 return 0;
490}
491
492static irqreturn_t ab8500_hierarchical_irq(int irq, void *dev)
493{
494 struct ab8500 *ab8500 = dev;
495 u8 i;
496
497 dev_vdbg(ab8500->dev, "interrupt\n");
498
499 /* Hierarchical interrupt version */
500 for (i = 0; i < AB8500_IT_LATCHHIER_NUM; i++) {
501 int status;
502 u8 hier_val;
503
504 status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
505 AB8500_IT_LATCHHIER1_REG + i, &hier_val);
506 if (status < 0 || hier_val == 0)
507 continue;
508
509 status = ab8500_handle_hierarchical_latch(ab8500, i, hier_val);
510 if (status < 0)
511 break;
512 }
513 return IRQ_HANDLED;
514}
515
80633f05
LJ		 516/**
517 * ab8500_irq_get_virq(): Map an interrupt on a chip to a virtual IRQ
518 *
519 * @ab8500: ab8500_irq controller to operate on.
520 * @irq: index of the interrupt requested in the chip IRQs
521 *
522 * Useful for drivers to request their own IRQs.
523 */
524static int ab8500_irq_get_virq(struct ab8500 *ab8500, int irq)
525{
526 if (!ab8500)
527 return -EINVAL;
528
529 return irq_create_mapping(ab8500->domain, irq);
530}
531
62579266
RV		 532static irqreturn_t ab8500_irq(int irq, void *dev)
533{
534 struct ab8500 *ab8500 = dev;
535 int i;
536
537 dev_vdbg(ab8500->dev, "interrupt\n");
538
112a80d2
JA		 539 atomic_inc(&ab8500->transfer_ongoing);
540
2ced445e
LW		 541 for (i = 0; i < ab8500->mask_size; i++) {
542 int regoffset = ab8500->irq_reg_offset[i];
62579266 543 int status;
47c16975 544 u8 value;
62579266 545
0f620837
LW		 546 /*
547 * Interrupt register 12 doesn't exist prior to AB8500 version
548 * 2.0
549 */
550 if (regoffset == 11 && is_ab8500_1p1_or_earlier(ab8500))
92d50a41
MW		 551 continue;
552
47c16975
MW		 553 status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
554 AB8500_IT_LATCH1_REG + regoffset, &value);
555 if (status < 0 || value == 0)
62579266
RV		 556 continue;
557
558 do {
88aec4f7 559 int bit = __ffs(value);
62579266 560 int line = i * 8 + bit;
0a37fc56 561 int virq = ab8500_irq_get_virq(ab8500, line);
62579266 562
0a37fc56 563 handle_nested_irq(virq);
47c16975 564 value &= ~(1 << bit);
112a80d2 565
47c16975 566 } while (value);
62579266 567 }
112a80d2 568 atomic_dec(&ab8500->transfer_ongoing);
62579266
RV		 569 return IRQ_HANDLED;
570}
571
06e589ef
LJ		 572static int ab8500_irq_map(struct irq_domain *d, unsigned int virq,
573 irq_hw_number_t hwirq)
574{
575 struct ab8500 *ab8500 = d->host_data;
576
577 if (!ab8500)
578 return -EINVAL;
579
580 irq_set_chip_data(virq, ab8500);
581 irq_set_chip_and_handler(virq, &ab8500_irq_chip,
582 handle_simple_irq);
583 irq_set_nested_thread(virq, 1);
62579266 584#ifdef CONFIG_ARM
06e589ef 585 set_irq_flags(virq, IRQF_VALID);
62579266 586#else
06e589ef 587 irq_set_noprobe(virq);
62579266 588#endif
62579266
RV		 589
590 return 0;
591}
592
06e589ef
LJ		 593static struct irq_domain_ops ab8500_irq_ops = {
594 .map = ab8500_irq_map,
595 .xlate = irq_domain_xlate_twocell,
596};
597
598static int ab8500_irq_init(struct ab8500 *ab8500, struct device_node *np)
62579266 599{
2ced445e
LW		 600 int num_irqs;
601
d6255529
LW		 602 if (is_ab9540(ab8500))
603 num_irqs = AB9540_NR_IRQS;
a982362c
BJ		 604 else if (is_ab8505(ab8500))
605 num_irqs = AB8505_NR_IRQS;
d6255529
LW		 606 else
607 num_irqs = AB8500_NR_IRQS;
62579266 608
f1d11f39
LW		 609 /* If ->irq_base is zero this will give a linear mapping */
610 ab8500->domain = irq_domain_add_simple(NULL,
611 num_irqs, ab8500->irq_base,
612 &ab8500_irq_ops, ab8500);
06e589ef
LJ		 613
614 if (!ab8500->domain) {
615 dev_err(ab8500->dev, "Failed to create irqdomain\n");
616 return -ENOSYS;
617 }
618
619 return 0;
62579266
RV		 620}
621
112a80d2
JA		 622int ab8500_suspend(struct ab8500 *ab8500)
623{
624 if (atomic_read(&ab8500->transfer_ongoing))
625 return -EINVAL;
626 else
627 return 0;
628}
629
a9e9ce4c 630static struct resource ab8500_gpadc_resources[] = {
62579266
RV		 631 {
632 .name = "HW_CONV_END",
633 .start = AB8500_INT_GP_HW_ADC_CONV_END,
634 .end = AB8500_INT_GP_HW_ADC_CONV_END,
635 .flags = IORESOURCE_IRQ,
636 },
637 {
638 .name = "SW_CONV_END",
639 .start = AB8500_INT_GP_SW_ADC_CONV_END,
640 .end = AB8500_INT_GP_SW_ADC_CONV_END,
641 .flags = IORESOURCE_IRQ,
642 },
643};
644
a9e9ce4c 645static struct resource ab8500_rtc_resources[] = {
62579266
RV		 646 {
647 .name = "60S",
648 .start = AB8500_INT_RTC_60S,
649 .end = AB8500_INT_RTC_60S,
650 .flags = IORESOURCE_IRQ,
651 },
652 {
653 .name = "ALARM",
654 .start = AB8500_INT_RTC_ALARM,
655 .end = AB8500_INT_RTC_ALARM,
656 .flags = IORESOURCE_IRQ,
657 },
658};
659
a9e9ce4c 660static struct resource ab8500_poweronkey_db_resources[] = {
77686517
SI		 661 {
662 .name = "ONKEY_DBF",
663 .start = AB8500_INT_PON_KEY1DB_F,
664 .end = AB8500_INT_PON_KEY1DB_F,
665 .flags = IORESOURCE_IRQ,
666 },
667 {
668 .name = "ONKEY_DBR",
669 .start = AB8500_INT_PON_KEY1DB_R,
670 .end = AB8500_INT_PON_KEY1DB_R,
671 .flags = IORESOURCE_IRQ,
672 },
673};
674
a9e9ce4c 675static struct resource ab8500_av_acc_detect_resources[] = {
e098aded 676 {
6af75ecd
LW		 677 .name = "ACC_DETECT_1DB_F",
678 .start = AB8500_INT_ACC_DETECT_1DB_F,
679 .end = AB8500_INT_ACC_DETECT_1DB_F,
680 .flags = IORESOURCE_IRQ,
e098aded
MW		 681 },
682 {
6af75ecd
LW		 683 .name = "ACC_DETECT_1DB_R",
684 .start = AB8500_INT_ACC_DETECT_1DB_R,
685 .end = AB8500_INT_ACC_DETECT_1DB_R,
686 .flags = IORESOURCE_IRQ,
687 },
688 {
689 .name = "ACC_DETECT_21DB_F",
690 .start = AB8500_INT_ACC_DETECT_21DB_F,
691 .end = AB8500_INT_ACC_DETECT_21DB_F,
692 .flags = IORESOURCE_IRQ,
693 },
694 {
695 .name = "ACC_DETECT_21DB_R",
696 .start = AB8500_INT_ACC_DETECT_21DB_R,
697 .end = AB8500_INT_ACC_DETECT_21DB_R,
698 .flags = IORESOURCE_IRQ,
699 },
700 {
701 .name = "ACC_DETECT_22DB_F",
702 .start = AB8500_INT_ACC_DETECT_22DB_F,
703 .end = AB8500_INT_ACC_DETECT_22DB_F,
704 .flags = IORESOURCE_IRQ,
e098aded 705 },
6af75ecd
LW		 706 {
707 .name = "ACC_DETECT_22DB_R",
708 .start = AB8500_INT_ACC_DETECT_22DB_R,
709 .end = AB8500_INT_ACC_DETECT_22DB_R,
710 .flags = IORESOURCE_IRQ,
711 },
712};
713
a9e9ce4c 714static struct resource ab8500_charger_resources[] = {
e098aded
MW		 715 {
716 .name = "MAIN_CH_UNPLUG_DET",
717 .start = AB8500_INT_MAIN_CH_UNPLUG_DET,
718 .end = AB8500_INT_MAIN_CH_UNPLUG_DET,
719 .flags = IORESOURCE_IRQ,
720 },
721 {
722 .name = "MAIN_CHARGE_PLUG_DET",
723 .start = AB8500_INT_MAIN_CH_PLUG_DET,
724 .end = AB8500_INT_MAIN_CH_PLUG_DET,
725 .flags = IORESOURCE_IRQ,
726 },
e098aded
MW		 727 {
728 .name = "VBUS_DET_R",
729 .start = AB8500_INT_VBUS_DET_R,
730 .end = AB8500_INT_VBUS_DET_R,
731 .flags = IORESOURCE_IRQ,
732 },
733 {
6af75ecd
LW		 734 .name = "VBUS_DET_F",
735 .start = AB8500_INT_VBUS_DET_F,
736 .end = AB8500_INT_VBUS_DET_F,
e098aded
MW		 737 .flags = IORESOURCE_IRQ,
738 },
739 {
6af75ecd
LW		 740 .name = "USB_LINK_STATUS",
741 .start = AB8500_INT_USB_LINK_STATUS,
742 .end = AB8500_INT_USB_LINK_STATUS,
743 .flags = IORESOURCE_IRQ,
744 },
e098aded
MW		 745 {
746 .name = "VBUS_OVV",
747 .start = AB8500_INT_VBUS_OVV,
748 .end = AB8500_INT_VBUS_OVV,
749 .flags = IORESOURCE_IRQ,
750 },
751 {
6af75ecd
LW		 752 .name = "USB_CH_TH_PROT_R",
753 .start = AB8500_INT_USB_CH_TH_PROT_R,
754 .end = AB8500_INT_USB_CH_TH_PROT_R,
e098aded
MW		 755 .flags = IORESOURCE_IRQ,
756 },
757 {
6af75ecd
LW		 758 .name = "USB_CH_TH_PROT_F",
759 .start = AB8500_INT_USB_CH_TH_PROT_F,
760 .end = AB8500_INT_USB_CH_TH_PROT_F,
e098aded
MW		 761 .flags = IORESOURCE_IRQ,
762 },
763 {
6af75ecd
LW		 764 .name = "MAIN_EXT_CH_NOT_OK",
765 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
766 .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
767 .flags = IORESOURCE_IRQ,
768 },
769 {
770 .name = "MAIN_CH_TH_PROT_R",
771 .start = AB8500_INT_MAIN_CH_TH_PROT_R,
772 .end = AB8500_INT_MAIN_CH_TH_PROT_R,
773 .flags = IORESOURCE_IRQ,
774 },
775 {
776 .name = "MAIN_CH_TH_PROT_F",
777 .start = AB8500_INT_MAIN_CH_TH_PROT_F,
778 .end = AB8500_INT_MAIN_CH_TH_PROT_F,
779 .flags = IORESOURCE_IRQ,
780 },
781 {
782 .name = "USB_CHARGER_NOT_OKR",
a982362c
BJ		 783 .start = AB8500_INT_USB_CHARGER_NOT_OKR,
784 .end = AB8500_INT_USB_CHARGER_NOT_OKR,
6af75ecd
LW		 785 .flags = IORESOURCE_IRQ,
786 },
787 {
788 .name = "CH_WD_EXP",
789 .start = AB8500_INT_CH_WD_EXP,
790 .end = AB8500_INT_CH_WD_EXP,
791 .flags = IORESOURCE_IRQ,
792 },
793};
794
a9e9ce4c 795static struct resource ab8500_btemp_resources[] = {
6af75ecd
LW		 796 {
797 .name = "BAT_CTRL_INDB",
798 .start = AB8500_INT_BAT_CTRL_INDB,
799 .end = AB8500_INT_BAT_CTRL_INDB,
e098aded
MW		 800 .flags = IORESOURCE_IRQ,
801 },
802 {
803 .name = "BTEMP_LOW",
804 .start = AB8500_INT_BTEMP_LOW,
805 .end = AB8500_INT_BTEMP_LOW,
806 .flags = IORESOURCE_IRQ,
807 },
808 {
809 .name = "BTEMP_HIGH",
810 .start = AB8500_INT_BTEMP_HIGH,
811 .end = AB8500_INT_BTEMP_HIGH,
812 .flags = IORESOURCE_IRQ,
813 },
814 {
6af75ecd
LW		 815 .name = "BTEMP_LOW_MEDIUM",
816 .start = AB8500_INT_BTEMP_LOW_MEDIUM,
817 .end = AB8500_INT_BTEMP_LOW_MEDIUM,
e098aded
MW		 818 .flags = IORESOURCE_IRQ,
819 },
820 {
6af75ecd
LW		 821 .name = "BTEMP_MEDIUM_HIGH",
822 .start = AB8500_INT_BTEMP_MEDIUM_HIGH,
823 .end = AB8500_INT_BTEMP_MEDIUM_HIGH,
e098aded
MW		 824 .flags = IORESOURCE_IRQ,
825 },
6af75ecd
LW		 826};
827
a9e9ce4c 828static struct resource ab8500_fg_resources[] = {
e098aded 829 {
6af75ecd
LW		 830 .name = "NCONV_ACCU",
831 .start = AB8500_INT_CCN_CONV_ACC,
832 .end = AB8500_INT_CCN_CONV_ACC,
e098aded
MW		 833 .flags = IORESOURCE_IRQ,
834 },
835 {
6af75ecd
LW		 836 .name = "BATT_OVV",
837 .start = AB8500_INT_BATT_OVV,
838 .end = AB8500_INT_BATT_OVV,
e098aded
MW		 839 .flags = IORESOURCE_IRQ,
840 },
841 {
6af75ecd
LW		 842 .name = "LOW_BAT_F",
843 .start = AB8500_INT_LOW_BAT_F,
844 .end = AB8500_INT_LOW_BAT_F,
845 .flags = IORESOURCE_IRQ,
846 },
847 {
848 .name = "LOW_BAT_R",
849 .start = AB8500_INT_LOW_BAT_R,
850 .end = AB8500_INT_LOW_BAT_R,
851 .flags = IORESOURCE_IRQ,
852 },
853 {
854 .name = "CC_INT_CALIB",
855 .start = AB8500_INT_CC_INT_CALIB,
856 .end = AB8500_INT_CC_INT_CALIB,
e098aded
MW		 857 .flags = IORESOURCE_IRQ,
858 },
a982362c
BJ		 859 {
860 .name = "CCEOC",
861 .start = AB8500_INT_CCEOC,
862 .end = AB8500_INT_CCEOC,
863 .flags = IORESOURCE_IRQ,
864 },
e098aded
MW		 865};
866
a9e9ce4c 867static struct resource ab8500_chargalg_resources[] = {};
6af75ecd 868
df720647 869#ifdef CONFIG_DEBUG_FS
a9e9ce4c 870static struct resource ab8500_debug_resources[] = {
e098aded
MW		 871 {
872 .name = "IRQ_FIRST",
873 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
874 .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
875 .flags = IORESOURCE_IRQ,
876 },
877 {
878 .name = "IRQ_LAST",
a982362c
BJ		 879 .start = AB8500_INT_XTAL32K_KO,
880 .end = AB8500_INT_XTAL32K_KO,
e098aded
MW		 881 .flags = IORESOURCE_IRQ,
882 },
883};
df720647 884#endif
e098aded 885
a9e9ce4c 886static struct resource ab8500_usb_resources[] = {
e098aded
MW		 887 {
888 .name = "ID_WAKEUP_R",
889 .start = AB8500_INT_ID_WAKEUP_R,
890 .end = AB8500_INT_ID_WAKEUP_R,
891 .flags = IORESOURCE_IRQ,
892 },
893 {
894 .name = "ID_WAKEUP_F",
895 .start = AB8500_INT_ID_WAKEUP_F,
896 .end = AB8500_INT_ID_WAKEUP_F,
897 .flags = IORESOURCE_IRQ,
898 },
899 {
900 .name = "VBUS_DET_F",
901 .start = AB8500_INT_VBUS_DET_F,
902 .end = AB8500_INT_VBUS_DET_F,
903 .flags = IORESOURCE_IRQ,
904 },
905 {
906 .name = "VBUS_DET_R",
907 .start = AB8500_INT_VBUS_DET_R,
908 .end = AB8500_INT_VBUS_DET_R,
909 .flags = IORESOURCE_IRQ,
910 },
92d50a41
MW		 911 {
912 .name = "USB_LINK_STATUS",
913 .start = AB8500_INT_USB_LINK_STATUS,
914 .end = AB8500_INT_USB_LINK_STATUS,
915 .flags = IORESOURCE_IRQ,
916 },
6af75ecd
LW		 917 {
918 .name = "USB_ADP_PROBE_PLUG",
919 .start = AB8500_INT_ADP_PROBE_PLUG,
920 .end = AB8500_INT_ADP_PROBE_PLUG,
921 .flags = IORESOURCE_IRQ,
922 },
923 {
924 .name = "USB_ADP_PROBE_UNPLUG",
925 .start = AB8500_INT_ADP_PROBE_UNPLUG,
926 .end = AB8500_INT_ADP_PROBE_UNPLUG,
927 .flags = IORESOURCE_IRQ,
928 },
e098aded
MW		 929};
930
a9e9ce4c 931static struct resource ab8505_iddet_resources[] = {
44f72e53
VS		 932 {
933 .name = "KeyDeglitch",
934 .start = AB8505_INT_KEYDEGLITCH,
935 .end = AB8505_INT_KEYDEGLITCH,
936 .flags = IORESOURCE_IRQ,
937 },
938 {
939 .name = "KP",
940 .start = AB8505_INT_KP,
941 .end = AB8505_INT_KP,
942 .flags = IORESOURCE_IRQ,
943 },
944 {
945 .name = "IKP",
946 .start = AB8505_INT_IKP,
947 .end = AB8505_INT_IKP,
948 .flags = IORESOURCE_IRQ,
949 },
950 {
951 .name = "IKR",
952 .start = AB8505_INT_IKR,
953 .end = AB8505_INT_IKR,
954 .flags = IORESOURCE_IRQ,
955 },
956 {
957 .name = "KeyStuck",
958 .start = AB8505_INT_KEYSTUCK,
959 .end = AB8505_INT_KEYSTUCK,
960 .flags = IORESOURCE_IRQ,
961 },
962};
963
a9e9ce4c 964static struct resource ab8500_temp_resources[] = {
e098aded
MW		 965 {
966 .name = "AB8500_TEMP_WARM",
967 .start = AB8500_INT_TEMP_WARM,
968 .end = AB8500_INT_TEMP_WARM,
969 .flags = IORESOURCE_IRQ,
970 },
971};
972
a9e9ce4c 973static struct mfd_cell abx500_common_devs[] = {
5814fc35
MW		 974#ifdef CONFIG_DEBUG_FS
975 {
976 .name = "ab8500-debug",
bad76991 977 .of_compatible = "stericsson,ab8500-debug",
e098aded
MW		 978 .num_resources = ARRAY_SIZE(ab8500_debug_resources),
979 .resources = ab8500_debug_resources,
5814fc35
MW		 980 },
981#endif
e098aded
MW		 982 {
983 .name = "ab8500-sysctrl",
bad76991 984 .of_compatible = "stericsson,ab8500-sysctrl",
e098aded
MW		 985 },
986 {
987 .name = "ab8500-regulator",
bad76991 988 .of_compatible = "stericsson,ab8500-regulator",
e098aded 989 },
916a871c
UH		 990 {
991 .name = "abx500-clk",
992 .of_compatible = "stericsson,abx500-clk",
993 },
62579266
RV		 994 {
995 .name = "ab8500-gpadc",
bad76991 996 .of_compatible = "stericsson,ab8500-gpadc",
62579266
RV		 997 .num_resources = ARRAY_SIZE(ab8500_gpadc_resources),
998 .resources = ab8500_gpadc_resources,
999 },
1000 {
1001 .name = "ab8500-rtc",
bad76991 1002 .of_compatible = "stericsson,ab8500-rtc",
62579266
RV		 1003 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
1004 .resources = ab8500_rtc_resources,
1005 },
6af75ecd
LW		 1006 {
1007 .name = "ab8500-acc-det",
bad76991 1008 .of_compatible = "stericsson,ab8500-acc-det",
6af75ecd
LW		 1009 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
1010 .resources = ab8500_av_acc_detect_resources,
1011 },
e098aded
MW		 1012 {
1013 .name = "ab8500-poweron-key",
bad76991 1014 .of_compatible = "stericsson,ab8500-poweron-key",
e098aded
MW		 1015 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
1016 .resources = ab8500_poweronkey_db_resources,
1017 },
f0f05b1c
AM		 1018 {
1019 .name = "ab8500-pwm",
bad76991 1020 .of_compatible = "stericsson,ab8500-pwm",
f0f05b1c
AM		 1021 .id = 1,
1022 },
1023 {
1024 .name = "ab8500-pwm",
bad76991 1025 .of_compatible = "stericsson,ab8500-pwm",
f0f05b1c
AM		 1026 .id = 2,
1027 },
1028 {
1029 .name = "ab8500-pwm",
bad76991 1030 .of_compatible = "stericsson,ab8500-pwm",
f0f05b1c
AM		 1031 .id = 3,
1032 },
bad76991
LJ		 1033 {
1034 .name = "ab8500-leds",
1035 .of_compatible = "stericsson,ab8500-leds",
1036 },
77686517 1037 {
e098aded 1038 .name = "ab8500-denc",
bad76991 1039 .of_compatible = "stericsson,ab8500-denc",
e098aded
MW		 1040 },
1041 {
1042 .name = "ab8500-temp",
bad76991 1043 .of_compatible = "stericsson,ab8500-temp",
e098aded
MW		 1044 .num_resources = ARRAY_SIZE(ab8500_temp_resources),
1045 .resources = ab8500_temp_resources,
77686517 1046 },
62579266
RV		 1047};
1048
a9e9ce4c 1049static struct mfd_cell ab8500_bm_devs[] = {
6ef9418c
RA		 1050 {
1051 .name = "ab8500-charger",
4aef72db 1052 .of_compatible = "stericsson,ab8500-charger",
6ef9418c
RA		 1053 .num_resources = ARRAY_SIZE(ab8500_charger_resources),
1054 .resources = ab8500_charger_resources,
4aef72db
R		 1055#ifndef CONFIG_OF
1056 .platform_data = &ab8500_bm_data,
1057 .pdata_size = sizeof(ab8500_bm_data),
1058#endif
6ef9418c
RA		 1059 },
1060 {
1061 .name = "ab8500-btemp",
bd9e8ab2 1062 .of_compatible = "stericsson,ab8500-btemp",
6ef9418c
RA		 1063 .num_resources = ARRAY_SIZE(ab8500_btemp_resources),
1064 .resources = ab8500_btemp_resources,
bd9e8ab2
R		 1065#ifndef CONFIG_OF
1066 .platform_data = &ab8500_bm_data,
1067 .pdata_size = sizeof(ab8500_bm_data),
1068#endif
6ef9418c
RA		 1069 },
1070 {
1071 .name = "ab8500-fg",
e0f1abeb 1072 .of_compatible = "stericsson,ab8500-fg",
6ef9418c
RA		 1073 .num_resources = ARRAY_SIZE(ab8500_fg_resources),
1074 .resources = ab8500_fg_resources,
e0f1abeb
R		 1075#ifndef CONFIG_OF
1076 .platform_data = &ab8500_bm_data,
1077 .pdata_size = sizeof(ab8500_bm_data),
1078#endif
6ef9418c
RA		 1079 },
1080 {
1081 .name = "ab8500-chargalg",
a12810ab 1082 .of_compatible = "stericsson,ab8500-chargalg",
6ef9418c
RA		 1083 .num_resources = ARRAY_SIZE(ab8500_chargalg_resources),
1084 .resources = ab8500_chargalg_resources,
a12810ab
R		 1085#ifndef CONFIG_OF
1086 .platform_data = &ab8500_bm_data,
1087 .pdata_size = sizeof(ab8500_bm_data),
1088#endif
6ef9418c
RA		 1089 },
1090};
1091
a9e9ce4c 1092static struct mfd_cell ab8500_devs[] = {
d6255529
LW		 1093 {
1094 .name = "ab8500-gpio",
bad76991 1095 .of_compatible = "stericsson,ab8500-gpio",
d6255529
LW		 1096 },
1097 {
1098 .name = "ab8500-usb",
bad76991 1099 .of_compatible = "stericsson,ab8500-usb",
d6255529
LW		 1100 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
1101 .resources = ab8500_usb_resources,
1102 },
44f72e53
VS		 1103 {
1104 .name = "ab8500-codec",
81a21cdd 1105 .of_compatible = "stericsson,ab8500-codec",
44f72e53 1106 },
d6255529
LW		 1107};
1108
a9e9ce4c 1109static struct mfd_cell ab9540_devs[] = {
d6255529
LW		 1110 {
1111 .name = "ab8500-gpio",
d6255529
LW		 1112 },
1113 {
1114 .name = "ab9540-usb",
1115 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
1116 .resources = ab8500_usb_resources,
1117 },
44f72e53
VS		 1118 {
1119 .name = "ab9540-codec",
1120 },
1121};
1122
1123/* Device list common to ab9540 and ab8505 */
a9e9ce4c 1124static struct mfd_cell ab9540_ab8505_devs[] = {
44f72e53
VS		 1125 {
1126 .name = "ab-iddet",
1127 .num_resources = ARRAY_SIZE(ab8505_iddet_resources),
1128 .resources = ab8505_iddet_resources,
1129 },
d6255529
LW		 1130};
1131
cca69b67
MW		 1132static ssize_t show_chip_id(struct device *dev,
1133 struct device_attribute *attr, char *buf)
1134{
1135 struct ab8500 *ab8500;
1136
1137 ab8500 = dev_get_drvdata(dev);
1138 return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL);
1139}
1140
e5c238c3
MW		 1141/*
1142 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
1143 * 0x01 Swoff bit programming
1144 * 0x02 Thermal protection activation
1145 * 0x04 Vbat lower then BattOk falling threshold
1146 * 0x08 Watchdog expired
1147 * 0x10 Non presence of 32kHz clock
1148 * 0x20 Battery level lower than power on reset threshold
1149 * 0x40 Power on key 1 pressed longer than 10 seconds
1150 * 0x80 DB8500 thermal shutdown
1151 */
1152static ssize_t show_switch_off_status(struct device *dev,
1153 struct device_attribute *attr, char *buf)
1154{
1155 int ret;
1156 u8 value;
1157 struct ab8500 *ab8500;
1158
1159 ab8500 = dev_get_drvdata(dev);
1160 ret = get_register_interruptible(ab8500, AB8500_RTC,
1161 AB8500_SWITCH_OFF_STATUS, &value);
1162 if (ret < 0)
1163 return ret;
1164 return sprintf(buf, "%#x\n", value);
1165}
1166
b4a31037
AL		 1167/*
1168 * ab8500 has turned on due to (TURN_ON_STATUS):
1169 * 0x01 PORnVbat
1170 * 0x02 PonKey1dbF
1171 * 0x04 PonKey2dbF
1172 * 0x08 RTCAlarm
1173 * 0x10 MainChDet
1174 * 0x20 VbusDet
1175 * 0x40 UsbIDDetect
1176 * 0x80 Reserved
1177 */
1178static ssize_t show_turn_on_status(struct device *dev,
1179 struct device_attribute *attr, char *buf)
1180{
1181 int ret;
1182 u8 value;
1183 struct ab8500 *ab8500;
1184
1185 ab8500 = dev_get_drvdata(dev);
1186 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
1187 AB8500_TURN_ON_STATUS, &value);
1188 if (ret < 0)
1189 return ret;
1190 return sprintf(buf, "%#x\n", value);
1191}
1192
d6255529
LW		 1193static ssize_t show_ab9540_dbbrstn(struct device *dev,
1194 struct device_attribute *attr, char *buf)
1195{
1196 struct ab8500 *ab8500;
1197 int ret;
1198 u8 value;
1199
1200 ab8500 = dev_get_drvdata(dev);
1201
1202 ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2,
1203 AB9540_MODEM_CTRL2_REG, &value);
1204 if (ret < 0)
1205 return ret;
1206
1207 return sprintf(buf, "%d\n",
1208 (value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0);
1209}
1210
1211static ssize_t store_ab9540_dbbrstn(struct device *dev,
1212 struct device_attribute *attr, const char *buf, size_t count)
1213{
1214 struct ab8500 *ab8500;
1215 int ret = count;
1216 int err;
1217 u8 bitvalues;
1218
1219 ab8500 = dev_get_drvdata(dev);
1220
1221 if (count > 0) {
1222 switch (buf[0]) {
1223 case '0':
1224 bitvalues = 0;
1225 break;
1226 case '1':
1227 bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT;
1228 break;
1229 default:
1230 goto exit;
1231 }
1232
1233 err = mask_and_set_register_interruptible(ab8500,
1234 AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG,
1235 AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues);
1236 if (err)
1237 dev_info(ab8500->dev,
1238 "Failed to set DBBRSTN %c, err %#x\n",
1239 buf[0], err);
1240 }
1241
1242exit:
1243 return ret;
1244}
1245
cca69b67 1246static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL);
e5c238c3 1247static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL);
b4a31037 1248static DEVICE_ATTR(turn_on_status, S_IRUGO, show_turn_on_status, NULL);
d6255529
LW		 1249static DEVICE_ATTR(dbbrstn, S_IRUGO | S_IWUSR,
1250 show_ab9540_dbbrstn, store_ab9540_dbbrstn);
cca69b67
MW		 1251
1252static struct attribute *ab8500_sysfs_entries[] = {
1253 &dev_attr_chip_id.attr,
e5c238c3 1254 &dev_attr_switch_off_status.attr,
b4a31037 1255 &dev_attr_turn_on_status.attr,
cca69b67
MW		 1256 NULL,
1257};
1258
d6255529
LW		 1259static struct attribute *ab9540_sysfs_entries[] = {
1260 &dev_attr_chip_id.attr,
1261 &dev_attr_switch_off_status.attr,
1262 &dev_attr_turn_on_status.attr,
1263 &dev_attr_dbbrstn.attr,
1264 NULL,
1265};
1266
cca69b67
MW		 1267static struct attribute_group ab8500_attr_group = {
1268 .attrs = ab8500_sysfs_entries,
1269};
1270
d6255529
LW		 1271static struct attribute_group ab9540_attr_group = {
1272 .attrs = ab9540_sysfs_entries,
1273};
1274
f791be49 1275static int ab8500_probe(struct platform_device *pdev)
62579266 1276{
b04c530c
JA		 1277 static char *switch_off_status[] = {
1278 "Swoff bit programming",
1279 "Thermal protection activation",
1280 "Vbat lower then BattOk falling threshold",
1281 "Watchdog expired",
1282 "Non presence of 32kHz clock",
1283 "Battery level lower than power on reset threshold",
1284 "Power on key 1 pressed longer than 10 seconds",
1285 "DB8500 thermal shutdown"};
d28f1db8
LJ		 1286 struct ab8500_platform_data *plat = dev_get_platdata(&pdev->dev);
1287 const struct platform_device_id *platid = platform_get_device_id(pdev);
6bc4a568
LJ		 1288 enum ab8500_version version = AB8500_VERSION_UNDEFINED;
1289 struct device_node *np = pdev->dev.of_node;
d28f1db8
LJ		 1290 struct ab8500 *ab8500;
1291 struct resource *resource;
62579266
RV		 1292 int ret;
1293 int i;
47c16975 1294 u8 value;
62579266 1295
8c4203cb 1296 ab8500 = devm_kzalloc(&pdev->dev, sizeof *ab8500, GFP_KERNEL);
d28f1db8
LJ		 1297 if (!ab8500)
1298 return -ENOMEM;
1299
62579266
RV		 1300 if (plat)
1301 ab8500->irq_base = plat->irq_base;
1302
d28f1db8
LJ		 1303 ab8500->dev = &pdev->dev;
1304
1305 resource = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
8c4203cb
LJ		 1306 if (!resource)
1307 return -ENODEV;
d28f1db8
LJ		 1308
1309 ab8500->irq = resource->start;
1310
822672a7
LJ		 1311 ab8500->read = ab8500_prcmu_read;
1312 ab8500->write = ab8500_prcmu_write;
1313 ab8500->write_masked = ab8500_prcmu_write_masked;
d28f1db8 1314
62579266
RV		 1315 mutex_init(&ab8500->lock);
1316 mutex_init(&ab8500->irq_lock);
112a80d2 1317 atomic_set(&ab8500->transfer_ongoing, 0);
62579266 1318
d28f1db8
LJ		 1319 platform_set_drvdata(pdev, ab8500);
1320
6bc4a568
LJ		 1321 if (platid)
1322 version = platid->driver_data;
6bc4a568 1323
0f620837
LW		 1324 if (version != AB8500_VERSION_UNDEFINED)
1325 ab8500->version = version;
1326 else {
1327 ret = get_register_interruptible(ab8500, AB8500_MISC,
1328 AB8500_IC_NAME_REG, &value);
1329 if (ret < 0)
8c4203cb 1330 return ret;
0f620837
LW		 1331
1332 ab8500->version = value;
1333 }
1334
47c16975
MW		 1335 ret = get_register_interruptible(ab8500, AB8500_MISC,
1336 AB8500_REV_REG, &value);
62579266 1337 if (ret < 0)
8c4203cb 1338 return ret;
62579266 1339
47c16975 1340 ab8500->chip_id = value;
62579266 1341
0f620837
LW		 1342 dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n",
1343 ab8500_version_str[ab8500->version],
1344 ab8500->chip_id >> 4,
1345 ab8500->chip_id & 0x0F);
1346
d6255529 1347 /* Configure AB8500 or AB9540 IRQ */
a982362c 1348 if (is_ab9540(ab8500) || is_ab8505(ab8500)) {
d6255529
LW		 1349 ab8500->mask_size = AB9540_NUM_IRQ_REGS;
1350 ab8500->irq_reg_offset = ab9540_irq_regoffset;
1351 } else {
1352 ab8500->mask_size = AB8500_NUM_IRQ_REGS;
1353 ab8500->irq_reg_offset = ab8500_irq_regoffset;
1354 }
8c4203cb 1355 ab8500->mask = devm_kzalloc(&pdev->dev, ab8500->mask_size, GFP_KERNEL);
2ced445e
LW		 1356 if (!ab8500->mask)
1357 return -ENOMEM;
8c4203cb
LJ		 1358 ab8500->oldmask = devm_kzalloc(&pdev->dev, ab8500->mask_size, GFP_KERNEL);
1359 if (!ab8500->oldmask)
1360 return -ENOMEM;
1361
e5c238c3
MW		 1362 /*
1363 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
1364 * 0x01 Swoff bit programming
1365 * 0x02 Thermal protection activation
1366 * 0x04 Vbat lower then BattOk falling threshold
1367 * 0x08 Watchdog expired
1368 * 0x10 Non presence of 32kHz clock
1369 * 0x20 Battery level lower than power on reset threshold
1370 * 0x40 Power on key 1 pressed longer than 10 seconds
1371 * 0x80 DB8500 thermal shutdown
1372 */
1373
1374 ret = get_register_interruptible(ab8500, AB8500_RTC,
1375 AB8500_SWITCH_OFF_STATUS, &value);
1376 if (ret < 0)
1377 return ret;
b04c530c
JA		 1378 dev_info(ab8500->dev, "switch off cause(s) (%#x): ", value);
1379
1380 if (value) {
1381 for (i = 0; i < ARRAY_SIZE(switch_off_status); i++) {
1382 if (value & 1)
1383 printk(KERN_CONT " \"%s\"",
1384 switch_off_status[i]);
1385 value = value >> 1;
1386
1387 }
1388 printk(KERN_CONT "\n");
1389 } else {
1390 printk(KERN_CONT " None\n");
1391 }
e5c238c3 1392
62579266
RV		 1393 if (plat && plat->init)
1394 plat->init(ab8500);
1395
1396 /* Clear and mask all interrupts */
2ced445e 1397 for (i = 0; i < ab8500->mask_size; i++) {
0f620837
LW		 1398 /*
1399 * Interrupt register 12 doesn't exist prior to AB8500 version
1400 * 2.0
1401 */
1402 if (ab8500->irq_reg_offset[i] == 11 &&
1403 is_ab8500_1p1_or_earlier(ab8500))
92d50a41 1404 continue;
62579266 1405
47c16975 1406 get_register_interruptible(ab8500, AB8500_INTERRUPT,
2ced445e 1407 AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i],
92d50a41 1408 &value);
47c16975 1409 set_register_interruptible(ab8500, AB8500_INTERRUPT,
2ced445e 1410 AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff);
62579266
RV		 1411 }
1412
47c16975
MW		 1413 ret = abx500_register_ops(ab8500->dev, &ab8500_ops);
1414 if (ret)
8c4203cb 1415 return ret;
47c16975 1416
2ced445e 1417 for (i = 0; i < ab8500->mask_size; i++)
62579266
RV		 1418 ab8500->mask[i] = ab8500->oldmask[i] = 0xff;
1419
06e589ef
LJ		 1420 ret = ab8500_irq_init(ab8500, np);
1421 if (ret)
8c4203cb 1422 return ret;
62579266 1423
06e589ef
LJ		 1424 /* Activate this feature only in ab9540 */
1425 /* till tests are done on ab8500 1p2 or later*/
1426 if (is_ab9540(ab8500)) {
8c4203cb
LJ		 1427 ret = devm_request_threaded_irq(&pdev->dev, ab8500->irq, NULL,
1428 ab8500_hierarchical_irq,
1429 IRQF_ONESHOT | IRQF_NO_SUSPEND,
1430 "ab8500", ab8500);
06e589ef
LJ		 1431 }
1432 else {
8c4203cb
LJ		 1433 ret = devm_request_threaded_irq(&pdev->dev, ab8500->irq, NULL,
1434 ab8500_irq,
1435 IRQF_ONESHOT | IRQF_NO_SUSPEND,
1436 "ab8500", ab8500);
62579266 1437 if (ret)
8c4203cb 1438 return ret;
62579266
RV		 1439 }
1440
bad76991
LJ		 1441 ret = mfd_add_devices(ab8500->dev, 0, abx500_common_devs,
1442 ARRAY_SIZE(abx500_common_devs), NULL,
55692af5 1443 ab8500->irq_base, ab8500->domain);
bad76991 1444 if (ret)
8c4203cb 1445 return ret;
d6255529 1446
bad76991
LJ		 1447 if (is_ab9540(ab8500))
1448 ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs,
1449 ARRAY_SIZE(ab9540_devs), NULL,
55692af5 1450 ab8500->irq_base, ab8500->domain);
bad76991
LJ		 1451 else
1452 ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs,
1453 ARRAY_SIZE(ab8500_devs), NULL,
55692af5 1454 ab8500->irq_base, ab8500->domain);
bad76991 1455 if (ret)
8c4203cb 1456 return ret;
44f72e53 1457
bad76991
LJ		 1458 if (is_ab9540(ab8500) || is_ab8505(ab8500))
1459 ret = mfd_add_devices(ab8500->dev, 0, ab9540_ab8505_devs,
1460 ARRAY_SIZE(ab9540_ab8505_devs), NULL,
55692af5 1461 ab8500->irq_base, ab8500->domain);
bad76991 1462 if (ret)
8c4203cb 1463 return ret;
62579266 1464
6ef9418c
RA		 1465 if (!no_bm) {
1466 /* Add battery management devices */
1467 ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs,
1468 ARRAY_SIZE(ab8500_bm_devs), NULL,
55692af5 1469 ab8500->irq_base, ab8500->domain);
6ef9418c
RA		 1470 if (ret)
1471 dev_err(ab8500->dev, "error adding bm devices\n");
1472 }
1473
d6255529
LW		 1474 if (is_ab9540(ab8500))
1475 ret = sysfs_create_group(&ab8500->dev->kobj,
1476 &ab9540_attr_group);
1477 else
1478 ret = sysfs_create_group(&ab8500->dev->kobj,
1479 &ab8500_attr_group);
cca69b67
MW		 1480 if (ret)
1481 dev_err(ab8500->dev, "error creating sysfs entries\n");
06e589ef
LJ		 1482
1483 return ret;
62579266
RV		 1484}
1485
4740f73f 1486static int ab8500_remove(struct platform_device *pdev)
62579266 1487{
d28f1db8
LJ		 1488 struct ab8500 *ab8500 = platform_get_drvdata(pdev);
1489
d6255529
LW		 1490 if (is_ab9540(ab8500))
1491 sysfs_remove_group(&ab8500->dev->kobj, &ab9540_attr_group);
1492 else
1493 sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group);
06e589ef 1494
62579266 1495 mfd_remove_devices(ab8500->dev);
62579266
RV		 1496
1497 return 0;
1498}
1499
d28f1db8
LJ		 1500static const struct platform_device_id ab8500_id[] = {
1501 { "ab8500-core", AB8500_VERSION_AB8500 },
1502 { "ab8505-i2c", AB8500_VERSION_AB8505 },
1503 { "ab9540-i2c", AB8500_VERSION_AB9540 },
1504 { "ab8540-i2c", AB8500_VERSION_AB8540 },
1505 { }
1506};
1507
1508static struct platform_driver ab8500_core_driver = {
1509 .driver = {
1510 .name = "ab8500-core",
1511 .owner = THIS_MODULE,
1512 },
1513 .probe = ab8500_probe,
84449216 1514 .remove = ab8500_remove,
d28f1db8
LJ		 1515 .id_table = ab8500_id,
1516};
1517
1518static int __init ab8500_core_init(void)
1519{
1520 return platform_driver_register(&ab8500_core_driver);
1521}
1522
1523static void __exit ab8500_core_exit(void)
1524{
1525 platform_driver_unregister(&ab8500_core_driver);
1526}
ba7cbc3e 1527core_initcall(ab8500_core_init);
d28f1db8
LJ		 1528module_exit(ab8500_core_exit);
1529
adceed62 1530MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent");
62579266
RV		 1531MODULE_DESCRIPTION("AB8500 MFD core");
1532MODULE_LICENSE("GPL v2");
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