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Commit | Line | Data |
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d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
3cc72986 MB |
2 | /* |
3 | * Arizona core driver | |
4 | * | |
5 | * Copyright 2012 Wolfson Microelectronics plc | |
6 | * | |
7 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
3cc72986 MB |
8 | */ |
9 | ||
cdd8da8c | 10 | #include <linux/clk.h> |
3cc72986 | 11 | #include <linux/delay.h> |
59db9691 | 12 | #include <linux/err.h> |
c1860466 | 13 | #include <linux/gpio/consumer.h> |
3cc72986 MB |
14 | #include <linux/interrupt.h> |
15 | #include <linux/mfd/core.h> | |
16 | #include <linux/module.h> | |
d781009c MB |
17 | #include <linux/of.h> |
18 | #include <linux/of_device.h> | |
3cc72986 MB |
19 | #include <linux/pm_runtime.h> |
20 | #include <linux/regmap.h> | |
21 | #include <linux/regulator/consumer.h> | |
5927467d | 22 | #include <linux/regulator/machine.h> |
3cc72986 | 23 | #include <linux/slab.h> |
f99fea94 | 24 | #include <linux/ktime.h> |
ae05ea36 | 25 | #include <linux/platform_device.h> |
3cc72986 MB |
26 | |
27 | #include <linux/mfd/arizona/core.h> | |
28 | #include <linux/mfd/arizona/registers.h> | |
29 | ||
30 | #include "arizona.h" | |
31 | ||
3762aede | 32 | static const char * const wm5102_core_supplies[] = { |
3cc72986 MB |
33 | "AVDD", |
34 | "DBVDD1", | |
3cc72986 MB |
35 | }; |
36 | ||
37 | int arizona_clk32k_enable(struct arizona *arizona) | |
38 | { | |
39 | int ret = 0; | |
40 | ||
41 | mutex_lock(&arizona->clk_lock); | |
42 | ||
43 | arizona->clk32k_ref++; | |
44 | ||
247fa192 MB |
45 | if (arizona->clk32k_ref == 1) { |
46 | switch (arizona->pdata.clk32k_src) { | |
47 | case ARIZONA_32KZ_MCLK1: | |
48 | ret = pm_runtime_get_sync(arizona->dev); | |
49 | if (ret != 0) | |
cdd8da8c SN |
50 | goto err_ref; |
51 | ret = clk_prepare_enable(arizona->mclk[ARIZONA_MCLK1]); | |
6b269a41 SB |
52 | if (ret != 0) { |
53 | pm_runtime_put_sync(arizona->dev); | |
54 | goto err_ref; | |
55 | } | |
cdd8da8c SN |
56 | break; |
57 | case ARIZONA_32KZ_MCLK2: | |
58 | ret = clk_prepare_enable(arizona->mclk[ARIZONA_MCLK2]); | |
59 | if (ret != 0) | |
60 | goto err_ref; | |
247fa192 MB |
61 | break; |
62 | } | |
63 | ||
3cc72986 MB |
64 | ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, |
65 | ARIZONA_CLK_32K_ENA, | |
66 | ARIZONA_CLK_32K_ENA); | |
247fa192 | 67 | } |
3cc72986 | 68 | |
cdd8da8c | 69 | err_ref: |
3cc72986 MB |
70 | if (ret != 0) |
71 | arizona->clk32k_ref--; | |
72 | ||
73 | mutex_unlock(&arizona->clk_lock); | |
74 | ||
75 | return ret; | |
76 | } | |
77 | EXPORT_SYMBOL_GPL(arizona_clk32k_enable); | |
78 | ||
79 | int arizona_clk32k_disable(struct arizona *arizona) | |
80 | { | |
3cc72986 MB |
81 | mutex_lock(&arizona->clk_lock); |
82 | ||
14024cc9 | 83 | WARN_ON(arizona->clk32k_ref <= 0); |
3cc72986 MB |
84 | |
85 | arizona->clk32k_ref--; | |
86 | ||
247fa192 | 87 | if (arizona->clk32k_ref == 0) { |
3cc72986 MB |
88 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, |
89 | ARIZONA_CLK_32K_ENA, 0); | |
90 | ||
247fa192 MB |
91 | switch (arizona->pdata.clk32k_src) { |
92 | case ARIZONA_32KZ_MCLK1: | |
93 | pm_runtime_put_sync(arizona->dev); | |
cdd8da8c SN |
94 | clk_disable_unprepare(arizona->mclk[ARIZONA_MCLK1]); |
95 | break; | |
96 | case ARIZONA_32KZ_MCLK2: | |
97 | clk_disable_unprepare(arizona->mclk[ARIZONA_MCLK2]); | |
247fa192 MB |
98 | break; |
99 | } | |
100 | } | |
101 | ||
3cc72986 MB |
102 | mutex_unlock(&arizona->clk_lock); |
103 | ||
a260fba1 | 104 | return 0; |
3cc72986 MB |
105 | } |
106 | EXPORT_SYMBOL_GPL(arizona_clk32k_disable); | |
107 | ||
108 | static irqreturn_t arizona_clkgen_err(int irq, void *data) | |
109 | { | |
110 | struct arizona *arizona = data; | |
111 | ||
112 | dev_err(arizona->dev, "CLKGEN error\n"); | |
113 | ||
114 | return IRQ_HANDLED; | |
115 | } | |
116 | ||
117 | static irqreturn_t arizona_underclocked(int irq, void *data) | |
118 | { | |
119 | struct arizona *arizona = data; | |
120 | unsigned int val; | |
121 | int ret; | |
122 | ||
123 | ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8, | |
124 | &val); | |
125 | if (ret != 0) { | |
126 | dev_err(arizona->dev, "Failed to read underclock status: %d\n", | |
127 | ret); | |
128 | return IRQ_NONE; | |
129 | } | |
130 | ||
3cc72986 MB |
131 | if (val & ARIZONA_AIF3_UNDERCLOCKED_STS) |
132 | dev_err(arizona->dev, "AIF3 underclocked\n"); | |
133 | if (val & ARIZONA_AIF2_UNDERCLOCKED_STS) | |
3ebef34d CK |
134 | dev_err(arizona->dev, "AIF2 underclocked\n"); |
135 | if (val & ARIZONA_AIF1_UNDERCLOCKED_STS) | |
3cc72986 | 136 | dev_err(arizona->dev, "AIF1 underclocked\n"); |
6e440d27 CK |
137 | if (val & ARIZONA_ISRC3_UNDERCLOCKED_STS) |
138 | dev_err(arizona->dev, "ISRC3 underclocked\n"); | |
3cc72986 MB |
139 | if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS) |
140 | dev_err(arizona->dev, "ISRC2 underclocked\n"); | |
141 | if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS) | |
142 | dev_err(arizona->dev, "ISRC1 underclocked\n"); | |
143 | if (val & ARIZONA_FX_UNDERCLOCKED_STS) | |
144 | dev_err(arizona->dev, "FX underclocked\n"); | |
145 | if (val & ARIZONA_ASRC_UNDERCLOCKED_STS) | |
146 | dev_err(arizona->dev, "ASRC underclocked\n"); | |
147 | if (val & ARIZONA_DAC_UNDERCLOCKED_STS) | |
148 | dev_err(arizona->dev, "DAC underclocked\n"); | |
149 | if (val & ARIZONA_ADC_UNDERCLOCKED_STS) | |
150 | dev_err(arizona->dev, "ADC underclocked\n"); | |
151 | if (val & ARIZONA_MIXER_UNDERCLOCKED_STS) | |
648a9880 | 152 | dev_err(arizona->dev, "Mixer dropped sample\n"); |
3cc72986 MB |
153 | |
154 | return IRQ_HANDLED; | |
155 | } | |
156 | ||
157 | static irqreturn_t arizona_overclocked(int irq, void *data) | |
158 | { | |
159 | struct arizona *arizona = data; | |
6887b042 | 160 | unsigned int val[3]; |
3cc72986 | 161 | int ret; |
3762aede | 162 | |
3cc72986 | 163 | ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6, |
6887b042 | 164 | &val[0], 3); |
3cc72986 MB |
165 | if (ret != 0) { |
166 | dev_err(arizona->dev, "Failed to read overclock status: %d\n", | |
167 | ret); | |
168 | return IRQ_NONE; | |
169 | } | |
170 | ||
6887b042 RF |
171 | switch (arizona->type) { |
172 | case WM8998: | |
173 | case WM1814: | |
174 | /* Some bits are shifted on WM8998, | |
175 | * rearrange to match the standard bit layout | |
176 | */ | |
177 | val[0] = ((val[0] & 0x60e0) >> 1) | | |
178 | ((val[0] & 0x1e00) >> 2) | | |
179 | (val[0] & 0x000f); | |
180 | break; | |
181 | default: | |
182 | break; | |
183 | } | |
184 | ||
3cc72986 MB |
185 | if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS) |
186 | dev_err(arizona->dev, "PWM overclocked\n"); | |
187 | if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS) | |
188 | dev_err(arizona->dev, "FX core overclocked\n"); | |
189 | if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS) | |
190 | dev_err(arizona->dev, "DAC SYS overclocked\n"); | |
191 | if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS) | |
192 | dev_err(arizona->dev, "DAC WARP overclocked\n"); | |
193 | if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS) | |
194 | dev_err(arizona->dev, "ADC overclocked\n"); | |
195 | if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS) | |
196 | dev_err(arizona->dev, "Mixer overclocked\n"); | |
197 | if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS) | |
198 | dev_err(arizona->dev, "AIF3 overclocked\n"); | |
199 | if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS) | |
200 | dev_err(arizona->dev, "AIF2 overclocked\n"); | |
201 | if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS) | |
202 | dev_err(arizona->dev, "AIF1 overclocked\n"); | |
203 | if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS) | |
204 | dev_err(arizona->dev, "Pad control overclocked\n"); | |
205 | ||
206 | if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS) | |
207 | dev_err(arizona->dev, "Slimbus subsystem overclocked\n"); | |
208 | if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS) | |
209 | dev_err(arizona->dev, "Slimbus async overclocked\n"); | |
210 | if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS) | |
211 | dev_err(arizona->dev, "Slimbus sync overclocked\n"); | |
212 | if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS) | |
213 | dev_err(arizona->dev, "ASRC async system overclocked\n"); | |
214 | if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS) | |
215 | dev_err(arizona->dev, "ASRC async WARP overclocked\n"); | |
216 | if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS) | |
217 | dev_err(arizona->dev, "ASRC sync system overclocked\n"); | |
218 | if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS) | |
219 | dev_err(arizona->dev, "ASRC sync WARP overclocked\n"); | |
220 | if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS) | |
221 | dev_err(arizona->dev, "DSP1 overclocked\n"); | |
6e440d27 CK |
222 | if (val[1] & ARIZONA_ISRC3_OVERCLOCKED_STS) |
223 | dev_err(arizona->dev, "ISRC3 overclocked\n"); | |
3cc72986 MB |
224 | if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS) |
225 | dev_err(arizona->dev, "ISRC2 overclocked\n"); | |
226 | if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS) | |
227 | dev_err(arizona->dev, "ISRC1 overclocked\n"); | |
228 | ||
6887b042 RF |
229 | if (val[2] & ARIZONA_SPDIF_OVERCLOCKED_STS) |
230 | dev_err(arizona->dev, "SPDIF overclocked\n"); | |
231 | ||
3cc72986 MB |
232 | return IRQ_HANDLED; |
233 | } | |
234 | ||
ef84f885 CK |
235 | #define ARIZONA_REG_POLL_DELAY_US 7500 |
236 | ||
f99fea94 CK |
237 | static inline bool arizona_poll_reg_delay(ktime_t timeout) |
238 | { | |
239 | if (ktime_compare(ktime_get(), timeout) > 0) | |
240 | return false; | |
241 | ||
242 | usleep_range(ARIZONA_REG_POLL_DELAY_US / 2, ARIZONA_REG_POLL_DELAY_US); | |
243 | ||
244 | return true; | |
245 | } | |
246 | ||
9d53dfdc | 247 | static int arizona_poll_reg(struct arizona *arizona, |
ef84f885 | 248 | int timeout_ms, unsigned int reg, |
9d53dfdc | 249 | unsigned int mask, unsigned int target) |
3cc72986 | 250 | { |
f99fea94 | 251 | ktime_t timeout = ktime_add_us(ktime_get(), timeout_ms * USEC_PER_MSEC); |
9d53dfdc | 252 | unsigned int val = 0; |
ef84f885 | 253 | int ret; |
9d53dfdc | 254 | |
f99fea94 CK |
255 | do { |
256 | ret = regmap_read(arizona->regmap, reg, &val); | |
3cc72986 | 257 | |
f99fea94 CK |
258 | if ((val & mask) == target) |
259 | return 0; | |
260 | } while (arizona_poll_reg_delay(timeout)); | |
261 | ||
262 | if (ret) { | |
263 | dev_err(arizona->dev, "Failed polling reg 0x%x: %d\n", | |
264 | reg, ret); | |
265 | return ret; | |
266 | } | |
267 | ||
268 | dev_err(arizona->dev, "Polling reg 0x%x timed out: %x\n", reg, val); | |
269 | return -ETIMEDOUT; | |
9d53dfdc CK |
270 | } |
271 | ||
272 | static int arizona_wait_for_boot(struct arizona *arizona) | |
273 | { | |
274 | int ret; | |
275 | ||
276 | /* | |
277 | * We can't use an interrupt as we need to runtime resume to do so, | |
278 | * we won't race with the interrupt handler as it'll be blocked on | |
279 | * runtime resume. | |
280 | */ | |
ef84f885 | 281 | ret = arizona_poll_reg(arizona, 30, ARIZONA_INTERRUPT_RAW_STATUS_5, |
9d53dfdc CK |
282 | ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS); |
283 | ||
284 | if (!ret) | |
3cc72986 MB |
285 | regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5, |
286 | ARIZONA_BOOT_DONE_STS); | |
3cc72986 MB |
287 | |
288 | pm_runtime_mark_last_busy(arizona->dev); | |
289 | ||
9d53dfdc | 290 | return ret; |
3cc72986 MB |
291 | } |
292 | ||
2229875d CK |
293 | static inline void arizona_enable_reset(struct arizona *arizona) |
294 | { | |
295 | if (arizona->pdata.reset) | |
c1860466 | 296 | gpiod_set_raw_value_cansleep(arizona->pdata.reset, 0); |
2229875d CK |
297 | } |
298 | ||
299 | static void arizona_disable_reset(struct arizona *arizona) | |
300 | { | |
301 | if (arizona->pdata.reset) { | |
121c075c CK |
302 | switch (arizona->type) { |
303 | case WM5110: | |
304 | case WM8280: | |
305 | /* Meet requirements for minimum reset duration */ | |
b79a980f | 306 | usleep_range(5000, 10000); |
121c075c CK |
307 | break; |
308 | default: | |
309 | break; | |
310 | } | |
311 | ||
c1860466 | 312 | gpiod_set_raw_value_cansleep(arizona->pdata.reset, 1); |
b79a980f | 313 | usleep_range(1000, 5000); |
2229875d CK |
314 | } |
315 | } | |
316 | ||
3850e3ee CK |
317 | struct arizona_sysclk_state { |
318 | unsigned int fll; | |
319 | unsigned int sysclk; | |
320 | }; | |
321 | ||
322 | static int arizona_enable_freerun_sysclk(struct arizona *arizona, | |
323 | struct arizona_sysclk_state *state) | |
e80436bb | 324 | { |
e80436bb CK |
325 | int ret, err; |
326 | ||
e80436bb | 327 | /* Cache existing FLL and SYSCLK settings */ |
3850e3ee | 328 | ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &state->fll); |
0be068a0 | 329 | if (ret) { |
e80436bb CK |
330 | dev_err(arizona->dev, "Failed to cache FLL settings: %d\n", |
331 | ret); | |
332 | return ret; | |
333 | } | |
3850e3ee CK |
334 | ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, |
335 | &state->sysclk); | |
0be068a0 | 336 | if (ret) { |
e80436bb CK |
337 | dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n", |
338 | ret); | |
339 | return ret; | |
340 | } | |
341 | ||
342 | /* Start up SYSCLK using the FLL in free running mode */ | |
343 | ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, | |
344 | ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN); | |
0be068a0 | 345 | if (ret) { |
e80436bb CK |
346 | dev_err(arizona->dev, |
347 | "Failed to start FLL in freerunning mode: %d\n", | |
348 | ret); | |
349 | return ret; | |
350 | } | |
ef84f885 | 351 | ret = arizona_poll_reg(arizona, 180, ARIZONA_INTERRUPT_RAW_STATUS_5, |
e80436bb CK |
352 | ARIZONA_FLL1_CLOCK_OK_STS, |
353 | ARIZONA_FLL1_CLOCK_OK_STS); | |
de4ea10a | 354 | if (ret) |
e80436bb | 355 | goto err_fll; |
e80436bb CK |
356 | |
357 | ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144); | |
0be068a0 | 358 | if (ret) { |
e80436bb CK |
359 | dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret); |
360 | goto err_fll; | |
361 | } | |
362 | ||
3850e3ee CK |
363 | return 0; |
364 | ||
365 | err_fll: | |
366 | err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll); | |
367 | if (err) | |
368 | dev_err(arizona->dev, | |
369 | "Failed to re-apply old FLL settings: %d\n", err); | |
370 | ||
371 | return ret; | |
372 | } | |
373 | ||
374 | static int arizona_disable_freerun_sysclk(struct arizona *arizona, | |
375 | struct arizona_sysclk_state *state) | |
376 | { | |
377 | int ret; | |
378 | ||
379 | ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, | |
380 | state->sysclk); | |
381 | if (ret) { | |
382 | dev_err(arizona->dev, | |
383 | "Failed to re-apply old SYSCLK settings: %d\n", ret); | |
384 | return ret; | |
385 | } | |
386 | ||
387 | ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll); | |
388 | if (ret) { | |
389 | dev_err(arizona->dev, | |
390 | "Failed to re-apply old FLL settings: %d\n", ret); | |
391 | return ret; | |
392 | } | |
393 | ||
394 | return 0; | |
395 | } | |
396 | ||
397 | static int wm5102_apply_hardware_patch(struct arizona *arizona) | |
398 | { | |
399 | struct arizona_sysclk_state state; | |
400 | int err, ret; | |
401 | ||
402 | ret = arizona_enable_freerun_sysclk(arizona, &state); | |
403 | if (ret) | |
404 | return ret; | |
405 | ||
e80436bb CK |
406 | /* Start the write sequencer and wait for it to finish */ |
407 | ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, | |
0be068a0 CK |
408 | ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160); |
409 | if (ret) { | |
e80436bb CK |
410 | dev_err(arizona->dev, "Failed to start write sequencer: %d\n", |
411 | ret); | |
3850e3ee | 412 | goto err; |
e80436bb | 413 | } |
3850e3ee | 414 | |
ef84f885 | 415 | ret = arizona_poll_reg(arizona, 30, ARIZONA_WRITE_SEQUENCER_CTRL_1, |
e80436bb | 416 | ARIZONA_WSEQ_BUSY, 0); |
de4ea10a | 417 | if (ret) |
e80436bb | 418 | regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, |
0be068a0 | 419 | ARIZONA_WSEQ_ABORT); |
e80436bb | 420 | |
3850e3ee CK |
421 | err: |
422 | err = arizona_disable_freerun_sysclk(arizona, &state); | |
e80436bb | 423 | |
0be068a0 | 424 | return ret ?: err; |
e80436bb CK |
425 | } |
426 | ||
882bc468 CK |
427 | /* |
428 | * Register patch to some of the CODECs internal write sequences | |
429 | * to ensure a clean exit from the low power sleep state. | |
430 | */ | |
8019ff6c | 431 | static const struct reg_sequence wm5110_sleep_patch[] = { |
882bc468 CK |
432 | { 0x337A, 0xC100 }, |
433 | { 0x337B, 0x0041 }, | |
434 | { 0x3300, 0xA210 }, | |
435 | { 0x3301, 0x050C }, | |
436 | }; | |
437 | ||
438 | static int wm5110_apply_sleep_patch(struct arizona *arizona) | |
439 | { | |
440 | struct arizona_sysclk_state state; | |
441 | int err, ret; | |
442 | ||
443 | ret = arizona_enable_freerun_sysclk(arizona, &state); | |
444 | if (ret) | |
445 | return ret; | |
446 | ||
447 | ret = regmap_multi_reg_write_bypassed(arizona->regmap, | |
448 | wm5110_sleep_patch, | |
449 | ARRAY_SIZE(wm5110_sleep_patch)); | |
450 | ||
451 | err = arizona_disable_freerun_sysclk(arizona, &state); | |
452 | ||
453 | return ret ?: err; | |
454 | } | |
455 | ||
1c1c6bba CK |
456 | static int wm5102_clear_write_sequencer(struct arizona *arizona) |
457 | { | |
458 | int ret; | |
459 | ||
460 | ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_3, | |
461 | 0x0); | |
462 | if (ret) { | |
463 | dev_err(arizona->dev, | |
464 | "Failed to clear write sequencer state: %d\n", ret); | |
465 | return ret; | |
466 | } | |
467 | ||
468 | arizona_enable_reset(arizona); | |
469 | regulator_disable(arizona->dcvdd); | |
470 | ||
471 | msleep(20); | |
472 | ||
473 | ret = regulator_enable(arizona->dcvdd); | |
474 | if (ret) { | |
475 | dev_err(arizona->dev, "Failed to re-enable DCVDD: %d\n", ret); | |
476 | return ret; | |
477 | } | |
478 | arizona_disable_reset(arizona); | |
479 | ||
480 | return 0; | |
481 | } | |
482 | ||
48bb9fe4 | 483 | #ifdef CONFIG_PM |
e7811147 RF |
484 | static int arizona_isolate_dcvdd(struct arizona *arizona) |
485 | { | |
486 | int ret; | |
487 | ||
488 | ret = regmap_update_bits(arizona->regmap, | |
489 | ARIZONA_ISOLATION_CONTROL, | |
490 | ARIZONA_ISOLATE_DCVDD1, | |
491 | ARIZONA_ISOLATE_DCVDD1); | |
492 | if (ret != 0) | |
493 | dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n", ret); | |
494 | ||
495 | return ret; | |
496 | } | |
497 | ||
498 | static int arizona_connect_dcvdd(struct arizona *arizona) | |
499 | { | |
500 | int ret; | |
501 | ||
502 | ret = regmap_update_bits(arizona->regmap, | |
503 | ARIZONA_ISOLATION_CONTROL, | |
504 | ARIZONA_ISOLATE_DCVDD1, 0); | |
505 | if (ret != 0) | |
506 | dev_err(arizona->dev, "Failed to connect DCVDD: %d\n", ret); | |
507 | ||
508 | return ret; | |
509 | } | |
510 | ||
e3424273 RF |
511 | static int arizona_is_jack_det_active(struct arizona *arizona) |
512 | { | |
513 | unsigned int val; | |
514 | int ret; | |
515 | ||
516 | ret = regmap_read(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, &val); | |
517 | if (ret) { | |
518 | dev_err(arizona->dev, | |
519 | "Failed to check jack det status: %d\n", ret); | |
520 | return ret; | |
521 | } else if (val & ARIZONA_JD1_ENA) { | |
522 | return 1; | |
523 | } else { | |
524 | return 0; | |
525 | } | |
526 | } | |
527 | ||
3cc72986 MB |
528 | static int arizona_runtime_resume(struct device *dev) |
529 | { | |
530 | struct arizona *arizona = dev_get_drvdata(dev); | |
531 | int ret; | |
532 | ||
508c8299 MB |
533 | dev_dbg(arizona->dev, "Leaving AoD mode\n"); |
534 | ||
e6cb7341 CK |
535 | if (arizona->has_fully_powered_off) { |
536 | dev_dbg(arizona->dev, "Re-enabling core supplies\n"); | |
537 | ||
538 | ret = regulator_bulk_enable(arizona->num_core_supplies, | |
539 | arizona->core_supplies); | |
540 | if (ret) { | |
541 | dev_err(dev, "Failed to enable core supplies: %d\n", | |
542 | ret); | |
543 | return ret; | |
544 | } | |
545 | } | |
546 | ||
59db9691 MB |
547 | ret = regulator_enable(arizona->dcvdd); |
548 | if (ret != 0) { | |
549 | dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret); | |
e6cb7341 CK |
550 | if (arizona->has_fully_powered_off) |
551 | regulator_bulk_disable(arizona->num_core_supplies, | |
552 | arizona->core_supplies); | |
59db9691 MB |
553 | return ret; |
554 | } | |
3cc72986 | 555 | |
e6cb7341 CK |
556 | if (arizona->has_fully_powered_off) { |
557 | arizona_disable_reset(arizona); | |
558 | enable_irq(arizona->irq); | |
559 | arizona->has_fully_powered_off = false; | |
560 | } | |
561 | ||
3cc72986 MB |
562 | regcache_cache_only(arizona->regmap, false); |
563 | ||
4c9bb8bc CK |
564 | switch (arizona->type) { |
565 | case WM5102: | |
5927467d | 566 | if (arizona->external_dcvdd) { |
e7811147 RF |
567 | ret = arizona_connect_dcvdd(arizona); |
568 | if (ret != 0) | |
5927467d | 569 | goto err; |
5927467d MB |
570 | } |
571 | ||
4c9bb8bc CK |
572 | ret = wm5102_patch(arizona); |
573 | if (ret != 0) { | |
574 | dev_err(arizona->dev, "Failed to apply patch: %d\n", | |
575 | ret); | |
576 | goto err; | |
577 | } | |
e80436bb | 578 | |
0be068a0 CK |
579 | ret = wm5102_apply_hardware_patch(arizona); |
580 | if (ret) { | |
e80436bb CK |
581 | dev_err(arizona->dev, |
582 | "Failed to apply hardware patch: %d\n", | |
583 | ret); | |
584 | goto err; | |
585 | } | |
586 | break; | |
96129a0e CK |
587 | case WM5110: |
588 | case WM8280: | |
589 | ret = arizona_wait_for_boot(arizona); | |
590 | if (ret) | |
591 | goto err; | |
592 | ||
593 | if (arizona->external_dcvdd) { | |
e7811147 RF |
594 | ret = arizona_connect_dcvdd(arizona); |
595 | if (ret != 0) | |
96129a0e | 596 | goto err; |
96129a0e CK |
597 | } else { |
598 | /* | |
599 | * As this is only called for the internal regulator | |
600 | * (where we know voltage ranges available) it is ok | |
601 | * to request an exact range. | |
602 | */ | |
603 | ret = regulator_set_voltage(arizona->dcvdd, | |
604 | 1200000, 1200000); | |
605 | if (ret < 0) { | |
606 | dev_err(arizona->dev, | |
607 | "Failed to set resume voltage: %d\n", | |
608 | ret); | |
609 | goto err; | |
610 | } | |
611 | } | |
e6cb7341 CK |
612 | |
613 | ret = wm5110_apply_sleep_patch(arizona); | |
614 | if (ret) { | |
615 | dev_err(arizona->dev, | |
616 | "Failed to re-apply sleep patch: %d\n", | |
617 | ret); | |
618 | goto err; | |
619 | } | |
96129a0e | 620 | break; |
ea1f3339 RF |
621 | case WM1831: |
622 | case CS47L24: | |
623 | ret = arizona_wait_for_boot(arizona); | |
624 | if (ret != 0) | |
625 | goto err; | |
626 | break; | |
e80436bb | 627 | default: |
12bb68ed | 628 | ret = arizona_wait_for_boot(arizona); |
3762aede | 629 | if (ret != 0) |
12bb68ed | 630 | goto err; |
12bb68ed | 631 | |
5927467d | 632 | if (arizona->external_dcvdd) { |
e7811147 RF |
633 | ret = arizona_connect_dcvdd(arizona); |
634 | if (ret != 0) | |
5927467d | 635 | goto err; |
5927467d | 636 | } |
e80436bb | 637 | break; |
4c9bb8bc CK |
638 | } |
639 | ||
9270bdf5 MB |
640 | ret = regcache_sync(arizona->regmap); |
641 | if (ret != 0) { | |
642 | dev_err(arizona->dev, "Failed to restore register cache\n"); | |
4816bd1c | 643 | goto err; |
9270bdf5 | 644 | } |
3cc72986 MB |
645 | |
646 | return 0; | |
4816bd1c MB |
647 | |
648 | err: | |
649 | regcache_cache_only(arizona->regmap, true); | |
650 | regulator_disable(arizona->dcvdd); | |
651 | return ret; | |
3cc72986 MB |
652 | } |
653 | ||
654 | static int arizona_runtime_suspend(struct device *dev) | |
655 | { | |
656 | struct arizona *arizona = dev_get_drvdata(dev); | |
a05950a4 | 657 | int jd_active = 0; |
5927467d | 658 | int ret; |
3cc72986 | 659 | |
508c8299 MB |
660 | dev_dbg(arizona->dev, "Entering AoD mode\n"); |
661 | ||
e6cb7341 CK |
662 | switch (arizona->type) { |
663 | case WM5110: | |
664 | case WM8280: | |
e3424273 RF |
665 | jd_active = arizona_is_jack_det_active(arizona); |
666 | if (jd_active < 0) | |
667 | return jd_active; | |
668 | ||
e7811147 RF |
669 | if (arizona->external_dcvdd) { |
670 | ret = arizona_isolate_dcvdd(arizona); | |
671 | if (ret != 0) | |
672 | return ret; | |
673 | } else { | |
674 | /* | |
675 | * As this is only called for the internal regulator | |
676 | * (where we know voltage ranges available) it is ok | |
677 | * to request an exact range. | |
678 | */ | |
679 | ret = regulator_set_voltage(arizona->dcvdd, | |
680 | 1175000, 1175000); | |
681 | if (ret < 0) { | |
682 | dev_err(arizona->dev, | |
683 | "Failed to set suspend voltage: %d\n", | |
684 | ret); | |
685 | return ret; | |
686 | } | |
e6cb7341 CK |
687 | } |
688 | break; | |
689 | case WM5102: | |
e3424273 RF |
690 | jd_active = arizona_is_jack_det_active(arizona); |
691 | if (jd_active < 0) | |
692 | return jd_active; | |
693 | ||
e7811147 RF |
694 | if (arizona->external_dcvdd) { |
695 | ret = arizona_isolate_dcvdd(arizona); | |
696 | if (ret != 0) | |
697 | return ret; | |
698 | } | |
699 | ||
e3424273 | 700 | if (!jd_active) { |
e6cb7341 CK |
701 | ret = regmap_write(arizona->regmap, |
702 | ARIZONA_WRITE_SEQUENCER_CTRL_3, 0x0); | |
703 | if (ret) { | |
96129a0e | 704 | dev_err(arizona->dev, |
e6cb7341 | 705 | "Failed to clear write sequencer: %d\n", |
96129a0e CK |
706 | ret); |
707 | return ret; | |
708 | } | |
96129a0e | 709 | } |
e6cb7341 | 710 | break; |
ea1f3339 RF |
711 | case WM1831: |
712 | case CS47L24: | |
713 | break; | |
e6cb7341 | 714 | default: |
e3424273 RF |
715 | jd_active = arizona_is_jack_det_active(arizona); |
716 | if (jd_active < 0) | |
717 | return jd_active; | |
718 | ||
e7811147 RF |
719 | if (arizona->external_dcvdd) { |
720 | ret = arizona_isolate_dcvdd(arizona); | |
721 | if (ret != 0) | |
722 | return ret; | |
723 | } | |
e6cb7341 | 724 | break; |
5927467d MB |
725 | } |
726 | ||
59db9691 MB |
727 | regcache_cache_only(arizona->regmap, true); |
728 | regcache_mark_dirty(arizona->regmap); | |
e293e847 | 729 | regulator_disable(arizona->dcvdd); |
3cc72986 | 730 | |
e6cb7341 | 731 | /* Allow us to completely power down if no jack detection */ |
e3424273 | 732 | if (!jd_active) { |
e6cb7341 CK |
733 | dev_dbg(arizona->dev, "Fully powering off\n"); |
734 | ||
735 | arizona->has_fully_powered_off = true; | |
736 | ||
11150929 | 737 | disable_irq_nosync(arizona->irq); |
e6cb7341 CK |
738 | arizona_enable_reset(arizona); |
739 | regulator_bulk_disable(arizona->num_core_supplies, | |
740 | arizona->core_supplies); | |
741 | } | |
742 | ||
3cc72986 MB |
743 | return 0; |
744 | } | |
745 | #endif | |
746 | ||
dc781d0e | 747 | #ifdef CONFIG_PM_SLEEP |
67c99296 MB |
748 | static int arizona_suspend(struct device *dev) |
749 | { | |
750 | struct arizona *arizona = dev_get_drvdata(dev); | |
751 | ||
752 | dev_dbg(arizona->dev, "Suspend, disabling IRQ\n"); | |
753 | disable_irq(arizona->irq); | |
754 | ||
755 | return 0; | |
756 | } | |
757 | ||
3612b27c | 758 | static int arizona_suspend_noirq(struct device *dev) |
67c99296 MB |
759 | { |
760 | struct arizona *arizona = dev_get_drvdata(dev); | |
761 | ||
762 | dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n"); | |
763 | enable_irq(arizona->irq); | |
764 | ||
765 | return 0; | |
766 | } | |
767 | ||
dc781d0e MB |
768 | static int arizona_resume_noirq(struct device *dev) |
769 | { | |
770 | struct arizona *arizona = dev_get_drvdata(dev); | |
771 | ||
772 | dev_dbg(arizona->dev, "Early resume, disabling IRQ\n"); | |
773 | disable_irq(arizona->irq); | |
774 | ||
775 | return 0; | |
776 | } | |
777 | ||
778 | static int arizona_resume(struct device *dev) | |
779 | { | |
780 | struct arizona *arizona = dev_get_drvdata(dev); | |
781 | ||
3612b27c | 782 | dev_dbg(arizona->dev, "Resume, reenabling IRQ\n"); |
dc781d0e MB |
783 | enable_irq(arizona->irq); |
784 | ||
785 | return 0; | |
786 | } | |
787 | #endif | |
788 | ||
3cc72986 MB |
789 | const struct dev_pm_ops arizona_pm_ops = { |
790 | SET_RUNTIME_PM_OPS(arizona_runtime_suspend, | |
791 | arizona_runtime_resume, | |
792 | NULL) | |
67c99296 | 793 | SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume) |
3612b27c CK |
794 | SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(arizona_suspend_noirq, |
795 | arizona_resume_noirq) | |
3cc72986 MB |
796 | }; |
797 | EXPORT_SYMBOL_GPL(arizona_pm_ops); | |
798 | ||
d781009c | 799 | #ifdef CONFIG_OF |
942786e6 | 800 | unsigned long arizona_of_get_type(struct device *dev) |
d781009c MB |
801 | { |
802 | const struct of_device_id *id = of_match_device(arizona_of_match, dev); | |
803 | ||
804 | if (id) | |
942786e6 | 805 | return (unsigned long)id->data; |
d781009c MB |
806 | else |
807 | return 0; | |
808 | } | |
809 | EXPORT_SYMBOL_GPL(arizona_of_get_type); | |
810 | ||
811 | static int arizona_of_get_core_pdata(struct arizona *arizona) | |
812 | { | |
e4fcb1d6 | 813 | struct arizona_pdata *pdata = &arizona->pdata; |
d781009c MB |
814 | int ret, i; |
815 | ||
c1860466 | 816 | /* Handle old non-standard DT binding */ |
5da3f767 | 817 | pdata->reset = devm_gpiod_get(arizona->dev, "wlf,reset", GPIOD_OUT_LOW); |
c1860466 CK |
818 | if (IS_ERR(pdata->reset)) { |
819 | ret = PTR_ERR(pdata->reset); | |
1961531d | 820 | |
c1860466 CK |
821 | /* |
822 | * Reset missing will be caught when other binding is read | |
823 | * but all other errors imply this binding is in use but has | |
824 | * encountered a problem so should be handled. | |
825 | */ | |
826 | if (ret == -EPROBE_DEFER) | |
827 | return ret; | |
828 | else if (ret != -ENOENT && ret != -ENOSYS) | |
829 | dev_err(arizona->dev, "Reset GPIO malformed: %d\n", | |
830 | ret); | |
831 | ||
832 | pdata->reset = NULL; | |
1961531d | 833 | } |
d781009c MB |
834 | |
835 | ret = of_property_read_u32_array(arizona->dev->of_node, | |
836 | "wlf,gpio-defaults", | |
3762aede CK |
837 | pdata->gpio_defaults, |
838 | ARRAY_SIZE(pdata->gpio_defaults)); | |
d781009c MB |
839 | if (ret >= 0) { |
840 | /* | |
841 | * All values are literal except out of range values | |
842 | * which are chip default, translate into platform | |
843 | * data which uses 0 as chip default and out of range | |
844 | * as zero. | |
845 | */ | |
3762aede CK |
846 | for (i = 0; i < ARRAY_SIZE(pdata->gpio_defaults); i++) { |
847 | if (pdata->gpio_defaults[i] > 0xffff) | |
848 | pdata->gpio_defaults[i] = 0; | |
849 | else if (pdata->gpio_defaults[i] == 0) | |
850 | pdata->gpio_defaults[i] = 0x10000; | |
d781009c MB |
851 | } |
852 | } else { | |
853 | dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n", | |
854 | ret); | |
855 | } | |
856 | ||
857 | return 0; | |
858 | } | |
859 | ||
860 | const struct of_device_id arizona_of_match[] = { | |
861 | { .compatible = "wlf,wm5102", .data = (void *)WM5102 }, | |
862 | { .compatible = "wlf,wm5110", .data = (void *)WM5110 }, | |
e5d4ef0d | 863 | { .compatible = "wlf,wm8280", .data = (void *)WM8280 }, |
dc7d4863 | 864 | { .compatible = "wlf,wm8997", .data = (void *)WM8997 }, |
6887b042 RF |
865 | { .compatible = "wlf,wm8998", .data = (void *)WM8998 }, |
866 | { .compatible = "wlf,wm1814", .data = (void *)WM1814 }, | |
ea1f3339 RF |
867 | { .compatible = "wlf,wm1831", .data = (void *)WM1831 }, |
868 | { .compatible = "cirrus,cs47l24", .data = (void *)CS47L24 }, | |
d781009c MB |
869 | {}, |
870 | }; | |
871 | EXPORT_SYMBOL_GPL(arizona_of_match); | |
872 | #else | |
873 | static inline int arizona_of_get_core_pdata(struct arizona *arizona) | |
874 | { | |
875 | return 0; | |
876 | } | |
877 | #endif | |
878 | ||
5ac98553 | 879 | static const struct mfd_cell early_devs[] = { |
3cc72986 MB |
880 | { .name = "arizona-ldo1" }, |
881 | }; | |
882 | ||
3762aede | 883 | static const char * const wm5102_supplies[] = { |
5fc6c396 | 884 | "MICVDD", |
32dadef2 CK |
885 | "DBVDD2", |
886 | "DBVDD3", | |
887 | "CPVDD", | |
888 | "SPKVDDL", | |
889 | "SPKVDDR", | |
890 | }; | |
891 | ||
5ac98553 | 892 | static const struct mfd_cell wm5102_devs[] = { |
d7768111 | 893 | { .name = "arizona-micsupp" }, |
f83c218c | 894 | { .name = "arizona-gpio" }, |
5fc6c396 CK |
895 | { |
896 | .name = "arizona-extcon", | |
897 | .parent_supplies = wm5102_supplies, | |
898 | .num_parent_supplies = 1, /* We only need MICVDD */ | |
899 | }, | |
503b1cac | 900 | { .name = "arizona-haptics" }, |
3cc72986 | 901 | { .name = "arizona-pwm" }, |
32dadef2 CK |
902 | { |
903 | .name = "wm5102-codec", | |
904 | .parent_supplies = wm5102_supplies, | |
905 | .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), | |
906 | }, | |
3cc72986 MB |
907 | }; |
908 | ||
5ac98553 | 909 | static const struct mfd_cell wm5110_devs[] = { |
d7768111 | 910 | { .name = "arizona-micsupp" }, |
f83c218c | 911 | { .name = "arizona-gpio" }, |
5fc6c396 CK |
912 | { |
913 | .name = "arizona-extcon", | |
914 | .parent_supplies = wm5102_supplies, | |
915 | .num_parent_supplies = 1, /* We only need MICVDD */ | |
916 | }, | |
503b1cac | 917 | { .name = "arizona-haptics" }, |
e102befe | 918 | { .name = "arizona-pwm" }, |
32dadef2 CK |
919 | { |
920 | .name = "wm5110-codec", | |
921 | .parent_supplies = wm5102_supplies, | |
922 | .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), | |
923 | }, | |
924 | }; | |
925 | ||
ea1f3339 RF |
926 | static const char * const cs47l24_supplies[] = { |
927 | "MICVDD", | |
928 | "CPVDD", | |
929 | "SPKVDD", | |
930 | }; | |
931 | ||
932 | static const struct mfd_cell cs47l24_devs[] = { | |
933 | { .name = "arizona-gpio" }, | |
934 | { .name = "arizona-haptics" }, | |
935 | { .name = "arizona-pwm" }, | |
936 | { | |
937 | .name = "cs47l24-codec", | |
938 | .parent_supplies = cs47l24_supplies, | |
939 | .num_parent_supplies = ARRAY_SIZE(cs47l24_supplies), | |
940 | }, | |
941 | }; | |
942 | ||
3762aede | 943 | static const char * const wm8997_supplies[] = { |
996c2d4f | 944 | "MICVDD", |
32dadef2 CK |
945 | "DBVDD2", |
946 | "CPVDD", | |
947 | "SPKVDD", | |
e102befe MB |
948 | }; |
949 | ||
5ac98553 | 950 | static const struct mfd_cell wm8997_devs[] = { |
dc7d4863 | 951 | { .name = "arizona-micsupp" }, |
f83c218c | 952 | { .name = "arizona-gpio" }, |
5fc6c396 CK |
953 | { |
954 | .name = "arizona-extcon", | |
955 | .parent_supplies = wm8997_supplies, | |
956 | .num_parent_supplies = 1, /* We only need MICVDD */ | |
957 | }, | |
dc7d4863 CK |
958 | { .name = "arizona-haptics" }, |
959 | { .name = "arizona-pwm" }, | |
32dadef2 CK |
960 | { |
961 | .name = "wm8997-codec", | |
962 | .parent_supplies = wm8997_supplies, | |
963 | .num_parent_supplies = ARRAY_SIZE(wm8997_supplies), | |
964 | }, | |
dc7d4863 CK |
965 | }; |
966 | ||
6887b042 | 967 | static const struct mfd_cell wm8998_devs[] = { |
f83c218c CK |
968 | { .name = "arizona-micsupp" }, |
969 | { .name = "arizona-gpio" }, | |
6887b042 RF |
970 | { |
971 | .name = "arizona-extcon", | |
972 | .parent_supplies = wm5102_supplies, | |
973 | .num_parent_supplies = 1, /* We only need MICVDD */ | |
974 | }, | |
6887b042 RF |
975 | { .name = "arizona-haptics" }, |
976 | { .name = "arizona-pwm" }, | |
977 | { | |
978 | .name = "wm8998-codec", | |
979 | .parent_supplies = wm5102_supplies, | |
980 | .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), | |
981 | }, | |
6887b042 RF |
982 | }; |
983 | ||
f791be49 | 984 | int arizona_dev_init(struct arizona *arizona) |
3cc72986 | 985 | { |
8e27a563 | 986 | static const char * const mclk_name[] = { "mclk1", "mclk2" }; |
3cc72986 | 987 | struct device *dev = arizona->dev; |
ea1f3339 | 988 | const char *type_name = NULL; |
6000c99e | 989 | unsigned int reg, val; |
62d62b59 | 990 | int (*apply_patch)(struct arizona *) = NULL; |
ae05ea36 | 991 | const struct mfd_cell *subdevs = NULL; |
5da6cbcd | 992 | int n_subdevs = 0, ret, i; |
3cc72986 MB |
993 | |
994 | dev_set_drvdata(arizona->dev, arizona); | |
995 | mutex_init(&arizona->clk_lock); | |
996 | ||
b8d336ed | 997 | if (dev_get_platdata(arizona->dev)) { |
3cc72986 MB |
998 | memcpy(&arizona->pdata, dev_get_platdata(arizona->dev), |
999 | sizeof(arizona->pdata)); | |
b8d336ed CK |
1000 | } else { |
1001 | ret = arizona_of_get_core_pdata(arizona); | |
1002 | if (ret < 0) | |
1003 | return ret; | |
1004 | } | |
3cc72986 | 1005 | |
cdd8da8c SN |
1006 | BUILD_BUG_ON(ARRAY_SIZE(arizona->mclk) != ARRAY_SIZE(mclk_name)); |
1007 | for (i = 0; i < ARRAY_SIZE(arizona->mclk); i++) { | |
1008 | arizona->mclk[i] = devm_clk_get(arizona->dev, mclk_name[i]); | |
1009 | if (IS_ERR(arizona->mclk[i])) { | |
1010 | dev_info(arizona->dev, "Failed to get %s: %ld\n", | |
1011 | mclk_name[i], PTR_ERR(arizona->mclk[i])); | |
1012 | arizona->mclk[i] = NULL; | |
1013 | } | |
1014 | } | |
1015 | ||
3cc72986 MB |
1016 | regcache_cache_only(arizona->regmap, true); |
1017 | ||
1018 | switch (arizona->type) { | |
1019 | case WM5102: | |
e102befe | 1020 | case WM5110: |
e5d4ef0d | 1021 | case WM8280: |
dc7d4863 | 1022 | case WM8997: |
6887b042 RF |
1023 | case WM8998: |
1024 | case WM1814: | |
ea1f3339 RF |
1025 | case WM1831: |
1026 | case CS47L24: | |
3cc72986 MB |
1027 | for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++) |
1028 | arizona->core_supplies[i].supply | |
1029 | = wm5102_core_supplies[i]; | |
1030 | arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies); | |
1031 | break; | |
1032 | default: | |
1033 | dev_err(arizona->dev, "Unknown device type %d\n", | |
1034 | arizona->type); | |
75d8a2b0 | 1035 | return -ENODEV; |
3cc72986 MB |
1036 | } |
1037 | ||
4a8c475f CK |
1038 | /* Mark DCVDD as external, LDO1 driver will clear if internal */ |
1039 | arizona->external_dcvdd = true; | |
1040 | ||
ea1f3339 RF |
1041 | switch (arizona->type) { |
1042 | case WM1831: | |
1043 | case CS47L24: | |
1044 | break; /* No LDO1 regulator */ | |
1045 | default: | |
1046 | ret = mfd_add_devices(arizona->dev, -1, early_devs, | |
1047 | ARRAY_SIZE(early_devs), NULL, 0, NULL); | |
1048 | if (ret != 0) { | |
1049 | dev_err(dev, "Failed to add early children: %d\n", ret); | |
1050 | return ret; | |
1051 | } | |
1052 | break; | |
3cc72986 MB |
1053 | } |
1054 | ||
1055 | ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies, | |
1056 | arizona->core_supplies); | |
1057 | if (ret != 0) { | |
1058 | dev_err(dev, "Failed to request core supplies: %d\n", | |
1059 | ret); | |
1060 | goto err_early; | |
1061 | } | |
1062 | ||
0c2d0ffb CK |
1063 | /** |
1064 | * Don't use devres here because the only device we have to get | |
1065 | * against is the MFD device and DCVDD will likely be supplied by | |
1066 | * one of its children. Meaning that the regulator will be | |
1067 | * destroyed by the time devres calls regulator put. | |
1068 | */ | |
e6021511 | 1069 | arizona->dcvdd = regulator_get(arizona->dev, "DCVDD"); |
59db9691 MB |
1070 | if (IS_ERR(arizona->dcvdd)) { |
1071 | ret = PTR_ERR(arizona->dcvdd); | |
1072 | dev_err(dev, "Failed to request DCVDD: %d\n", ret); | |
1073 | goto err_early; | |
1074 | } | |
1075 | ||
c1860466 | 1076 | if (!arizona->pdata.reset) { |
87d3af4a | 1077 | /* Start out with /RESET low to put the chip into reset */ |
c1860466 CK |
1078 | arizona->pdata.reset = devm_gpiod_get(arizona->dev, "reset", |
1079 | GPIOD_OUT_LOW); | |
1080 | if (IS_ERR(arizona->pdata.reset)) { | |
1081 | ret = PTR_ERR(arizona->pdata.reset); | |
1082 | if (ret == -EPROBE_DEFER) | |
1083 | goto err_dcvdd; | |
1084 | ||
1085 | dev_err(arizona->dev, | |
1086 | "Reset GPIO missing/malformed: %d\n", ret); | |
1087 | ||
1088 | arizona->pdata.reset = NULL; | |
87d3af4a MB |
1089 | } |
1090 | } | |
1091 | ||
3cc72986 MB |
1092 | ret = regulator_bulk_enable(arizona->num_core_supplies, |
1093 | arizona->core_supplies); | |
1094 | if (ret != 0) { | |
1095 | dev_err(dev, "Failed to enable core supplies: %d\n", | |
1096 | ret); | |
e6021511 | 1097 | goto err_dcvdd; |
3cc72986 MB |
1098 | } |
1099 | ||
59db9691 MB |
1100 | ret = regulator_enable(arizona->dcvdd); |
1101 | if (ret != 0) { | |
1102 | dev_err(dev, "Failed to enable DCVDD: %d\n", ret); | |
1103 | goto err_enable; | |
1104 | } | |
1105 | ||
2229875d | 1106 | arizona_disable_reset(arizona); |
3cc72986 | 1107 | |
3cc72986 MB |
1108 | regcache_cache_only(arizona->regmap, false); |
1109 | ||
ca76ceb8 | 1110 | /* Verify that this is a chip we know about */ |
3cc72986 MB |
1111 | ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); |
1112 | if (ret != 0) { | |
1113 | dev_err(dev, "Failed to read ID register: %d\n", ret); | |
59db9691 | 1114 | goto err_reset; |
3cc72986 MB |
1115 | } |
1116 | ||
3cc72986 MB |
1117 | switch (reg) { |
1118 | case 0x5102: | |
e102befe | 1119 | case 0x5110: |
6887b042 | 1120 | case 0x6349: |
ea1f3339 | 1121 | case 0x6363: |
dc7d4863 | 1122 | case 0x8997: |
e102befe | 1123 | break; |
3cc72986 | 1124 | default: |
ca76ceb8 | 1125 | dev_err(arizona->dev, "Unknown device ID: %x\n", reg); |
75d8a2b0 | 1126 | ret = -ENODEV; |
59db9691 | 1127 | goto err_reset; |
3cc72986 MB |
1128 | } |
1129 | ||
3cc72986 MB |
1130 | /* If we have a /RESET GPIO we'll already be reset */ |
1131 | if (!arizona->pdata.reset) { | |
1132 | ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0); | |
1133 | if (ret != 0) { | |
1134 | dev_err(dev, "Failed to reset device: %d\n", ret); | |
59db9691 | 1135 | goto err_reset; |
3cc72986 | 1136 | } |
46b9d13a | 1137 | |
b79a980f | 1138 | usleep_range(1000, 5000); |
3cc72986 MB |
1139 | } |
1140 | ||
ca76ceb8 | 1141 | /* Ensure device startup is complete */ |
d955cba8 CK |
1142 | switch (arizona->type) { |
1143 | case WM5102: | |
48018943 MB |
1144 | ret = regmap_read(arizona->regmap, |
1145 | ARIZONA_WRITE_SEQUENCER_CTRL_3, &val); | |
1c1c6bba | 1146 | if (ret) { |
d955cba8 CK |
1147 | dev_err(dev, |
1148 | "Failed to check write sequencer state: %d\n", | |
1149 | ret); | |
1c1c6bba CK |
1150 | } else if (val & 0x01) { |
1151 | ret = wm5102_clear_write_sequencer(arizona); | |
1152 | if (ret) | |
1153 | return ret; | |
d955cba8 CK |
1154 | } |
1155 | break; | |
1c1c6bba CK |
1156 | default: |
1157 | break; | |
1158 | } | |
1159 | ||
1160 | ret = arizona_wait_for_boot(arizona); | |
1161 | if (ret) { | |
1162 | dev_err(arizona->dev, "Device failed initial boot: %d\n", ret); | |
1163 | goto err_reset; | |
af65a361 | 1164 | } |
3cc72986 | 1165 | |
ca76ceb8 MB |
1166 | /* Read the device ID information & do device specific stuff */ |
1167 | ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); | |
1168 | if (ret != 0) { | |
1169 | dev_err(dev, "Failed to read ID register: %d\n", ret); | |
1170 | goto err_reset; | |
1171 | } | |
1172 | ||
1173 | ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION, | |
1174 | &arizona->rev); | |
1175 | if (ret != 0) { | |
1176 | dev_err(dev, "Failed to read revision register: %d\n", ret); | |
1177 | goto err_reset; | |
1178 | } | |
1179 | arizona->rev &= ARIZONA_DEVICE_REVISION_MASK; | |
1180 | ||
1181 | switch (reg) { | |
ca76ceb8 | 1182 | case 0x5102: |
b61c1ec0 RF |
1183 | if (IS_ENABLED(CONFIG_MFD_WM5102)) { |
1184 | type_name = "WM5102"; | |
1185 | if (arizona->type != WM5102) { | |
1186 | dev_warn(arizona->dev, | |
1187 | "WM5102 registered as %d\n", | |
1188 | arizona->type); | |
1189 | arizona->type = WM5102; | |
1190 | } | |
1191 | ||
1192 | apply_patch = wm5102_patch; | |
1193 | arizona->rev &= 0x7; | |
1194 | subdevs = wm5102_devs; | |
1195 | n_subdevs = ARRAY_SIZE(wm5102_devs); | |
ca76ceb8 | 1196 | } |
ca76ceb8 | 1197 | break; |
ca76ceb8 | 1198 | case 0x5110: |
b61c1ec0 RF |
1199 | if (IS_ENABLED(CONFIG_MFD_WM5110)) { |
1200 | switch (arizona->type) { | |
1201 | case WM5110: | |
1202 | type_name = "WM5110"; | |
1203 | break; | |
1204 | case WM8280: | |
1205 | type_name = "WM8280"; | |
1206 | break; | |
1207 | default: | |
1208 | type_name = "WM5110"; | |
1209 | dev_warn(arizona->dev, | |
1210 | "WM5110 registered as %d\n", | |
1211 | arizona->type); | |
1212 | arizona->type = WM5110; | |
1213 | break; | |
1214 | } | |
1215 | ||
1216 | apply_patch = wm5110_patch; | |
1217 | subdevs = wm5110_devs; | |
1218 | n_subdevs = ARRAY_SIZE(wm5110_devs); | |
ca76ceb8 | 1219 | } |
ca76ceb8 | 1220 | break; |
ea1f3339 RF |
1221 | case 0x6363: |
1222 | if (IS_ENABLED(CONFIG_MFD_CS47L24)) { | |
1223 | switch (arizona->type) { | |
1224 | case CS47L24: | |
1225 | type_name = "CS47L24"; | |
1226 | break; | |
1227 | ||
1228 | case WM1831: | |
1229 | type_name = "WM1831"; | |
1230 | break; | |
1231 | ||
1232 | default: | |
1233 | dev_warn(arizona->dev, | |
1234 | "CS47L24 registered as %d\n", | |
1235 | arizona->type); | |
1236 | arizona->type = CS47L24; | |
1237 | break; | |
1238 | } | |
1239 | ||
1240 | apply_patch = cs47l24_patch; | |
1241 | subdevs = cs47l24_devs; | |
1242 | n_subdevs = ARRAY_SIZE(cs47l24_devs); | |
1243 | } | |
1244 | break; | |
dc7d4863 | 1245 | case 0x8997: |
b61c1ec0 RF |
1246 | if (IS_ENABLED(CONFIG_MFD_WM8997)) { |
1247 | type_name = "WM8997"; | |
1248 | if (arizona->type != WM8997) { | |
1249 | dev_warn(arizona->dev, | |
1250 | "WM8997 registered as %d\n", | |
1251 | arizona->type); | |
1252 | arizona->type = WM8997; | |
1253 | } | |
1254 | ||
1255 | apply_patch = wm8997_patch; | |
1256 | subdevs = wm8997_devs; | |
1257 | n_subdevs = ARRAY_SIZE(wm8997_devs); | |
dc7d4863 | 1258 | } |
dc7d4863 | 1259 | break; |
6887b042 | 1260 | case 0x6349: |
b61c1ec0 RF |
1261 | if (IS_ENABLED(CONFIG_MFD_WM8998)) { |
1262 | switch (arizona->type) { | |
1263 | case WM8998: | |
1264 | type_name = "WM8998"; | |
1265 | break; | |
1266 | ||
1267 | case WM1814: | |
1268 | type_name = "WM1814"; | |
1269 | break; | |
1270 | ||
1271 | default: | |
1272 | type_name = "WM8998"; | |
1273 | dev_warn(arizona->dev, | |
1274 | "WM8998 registered as %d\n", | |
1275 | arizona->type); | |
1276 | arizona->type = WM8998; | |
1277 | } | |
6887b042 | 1278 | |
b61c1ec0 RF |
1279 | apply_patch = wm8998_patch; |
1280 | subdevs = wm8998_devs; | |
1281 | n_subdevs = ARRAY_SIZE(wm8998_devs); | |
6887b042 | 1282 | } |
6887b042 | 1283 | break; |
ca76ceb8 MB |
1284 | default: |
1285 | dev_err(arizona->dev, "Unknown device ID %x\n", reg); | |
75d8a2b0 | 1286 | ret = -ENODEV; |
ca76ceb8 MB |
1287 | goto err_reset; |
1288 | } | |
1289 | ||
b61c1ec0 RF |
1290 | if (!subdevs) { |
1291 | dev_err(arizona->dev, | |
1292 | "No kernel support for device ID %x\n", reg); | |
75d8a2b0 | 1293 | ret = -ENODEV; |
b61c1ec0 RF |
1294 | goto err_reset; |
1295 | } | |
1296 | ||
ca76ceb8 MB |
1297 | dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A'); |
1298 | ||
62d62b59 MB |
1299 | if (apply_patch) { |
1300 | ret = apply_patch(arizona); | |
1301 | if (ret != 0) { | |
1302 | dev_err(arizona->dev, "Failed to apply patch: %d\n", | |
1303 | ret); | |
1304 | goto err_reset; | |
1305 | } | |
e80436bb CK |
1306 | |
1307 | switch (arizona->type) { | |
1308 | case WM5102: | |
0be068a0 CK |
1309 | ret = wm5102_apply_hardware_patch(arizona); |
1310 | if (ret) { | |
e80436bb CK |
1311 | dev_err(arizona->dev, |
1312 | "Failed to apply hardware patch: %d\n", | |
1313 | ret); | |
1314 | goto err_reset; | |
1315 | } | |
1316 | break; | |
882bc468 CK |
1317 | case WM5110: |
1318 | case WM8280: | |
1319 | ret = wm5110_apply_sleep_patch(arizona); | |
1320 | if (ret) { | |
1321 | dev_err(arizona->dev, | |
1322 | "Failed to apply sleep patch: %d\n", | |
1323 | ret); | |
1324 | goto err_reset; | |
1325 | } | |
1326 | break; | |
e80436bb CK |
1327 | default: |
1328 | break; | |
1329 | } | |
62d62b59 MB |
1330 | } |
1331 | ||
3cc72986 MB |
1332 | for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) { |
1333 | if (!arizona->pdata.gpio_defaults[i]) | |
1334 | continue; | |
1335 | ||
1336 | regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i, | |
1337 | arizona->pdata.gpio_defaults[i]); | |
1338 | } | |
1339 | ||
3cc72986 MB |
1340 | /* Chip default */ |
1341 | if (!arizona->pdata.clk32k_src) | |
1342 | arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2; | |
1343 | ||
1344 | switch (arizona->pdata.clk32k_src) { | |
1345 | case ARIZONA_32KZ_MCLK1: | |
1346 | case ARIZONA_32KZ_MCLK2: | |
1347 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, | |
1348 | ARIZONA_CLK_32K_SRC_MASK, | |
1349 | arizona->pdata.clk32k_src - 1); | |
767c6dc0 | 1350 | arizona_clk32k_enable(arizona); |
3cc72986 MB |
1351 | break; |
1352 | case ARIZONA_32KZ_NONE: | |
1353 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, | |
1354 | ARIZONA_CLK_32K_SRC_MASK, 2); | |
1355 | break; | |
1356 | default: | |
1357 | dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n", | |
1358 | arizona->pdata.clk32k_src); | |
1359 | ret = -EINVAL; | |
59db9691 | 1360 | goto err_reset; |
3cc72986 MB |
1361 | } |
1362 | ||
3d91f828 | 1363 | for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) { |
544c7aad MB |
1364 | if (!arizona->pdata.micbias[i].mV && |
1365 | !arizona->pdata.micbias[i].bypass) | |
3d91f828 MB |
1366 | continue; |
1367 | ||
544c7aad MB |
1368 | /* Apply default for bypass mode */ |
1369 | if (!arizona->pdata.micbias[i].mV) | |
1370 | arizona->pdata.micbias[i].mV = 2800; | |
1371 | ||
3d91f828 | 1372 | val = (arizona->pdata.micbias[i].mV - 1500) / 100; |
544c7aad | 1373 | |
3d91f828 MB |
1374 | val <<= ARIZONA_MICB1_LVL_SHIFT; |
1375 | ||
1376 | if (arizona->pdata.micbias[i].ext_cap) | |
1377 | val |= ARIZONA_MICB1_EXT_CAP; | |
1378 | ||
1379 | if (arizona->pdata.micbias[i].discharge) | |
1380 | val |= ARIZONA_MICB1_DISCH; | |
1381 | ||
f773fc6d | 1382 | if (arizona->pdata.micbias[i].soft_start) |
3d91f828 MB |
1383 | val |= ARIZONA_MICB1_RATE; |
1384 | ||
544c7aad MB |
1385 | if (arizona->pdata.micbias[i].bypass) |
1386 | val |= ARIZONA_MICB1_BYPASS; | |
1387 | ||
3d91f828 MB |
1388 | regmap_update_bits(arizona->regmap, |
1389 | ARIZONA_MIC_BIAS_CTRL_1 + i, | |
1390 | ARIZONA_MICB1_LVL_MASK | | |
71d134b9 | 1391 | ARIZONA_MICB1_EXT_CAP | |
3d91f828 | 1392 | ARIZONA_MICB1_DISCH | |
544c7aad | 1393 | ARIZONA_MICB1_BYPASS | |
3d91f828 MB |
1394 | ARIZONA_MICB1_RATE, val); |
1395 | } | |
1396 | ||
72e43164 CK |
1397 | pm_runtime_set_active(arizona->dev); |
1398 | pm_runtime_enable(arizona->dev); | |
1399 | ||
3cc72986 MB |
1400 | /* Set up for interrupts */ |
1401 | ret = arizona_irq_init(arizona); | |
1402 | if (ret != 0) | |
d347792c | 1403 | goto err_pm; |
3cc72986 | 1404 | |
72e43164 CK |
1405 | pm_runtime_set_autosuspend_delay(arizona->dev, 100); |
1406 | pm_runtime_use_autosuspend(arizona->dev); | |
1407 | ||
3cc72986 MB |
1408 | arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error", |
1409 | arizona_clkgen_err, arizona); | |
1410 | arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked", | |
1411 | arizona_overclocked, arizona); | |
1412 | arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked", | |
1413 | arizona_underclocked, arizona); | |
1414 | ||
ae05ea36 RF |
1415 | ret = mfd_add_devices(arizona->dev, PLATFORM_DEVID_NONE, |
1416 | subdevs, n_subdevs, NULL, 0, NULL); | |
3cc72986 | 1417 | |
ae05ea36 | 1418 | if (ret) { |
3cc72986 MB |
1419 | dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret); |
1420 | goto err_irq; | |
1421 | } | |
1422 | ||
1423 | return 0; | |
1424 | ||
1425 | err_irq: | |
1426 | arizona_irq_exit(arizona); | |
d347792c CK |
1427 | err_pm: |
1428 | pm_runtime_disable(arizona->dev); | |
ddff6c45 CK |
1429 | |
1430 | switch (arizona->pdata.clk32k_src) { | |
1431 | case ARIZONA_32KZ_MCLK1: | |
1432 | case ARIZONA_32KZ_MCLK2: | |
1433 | arizona_clk32k_disable(arizona); | |
1434 | break; | |
1435 | default: | |
1436 | break; | |
1437 | } | |
3cc72986 | 1438 | err_reset: |
2229875d | 1439 | arizona_enable_reset(arizona); |
59db9691 | 1440 | regulator_disable(arizona->dcvdd); |
3cc72986 | 1441 | err_enable: |
3a36a0db | 1442 | regulator_bulk_disable(arizona->num_core_supplies, |
3cc72986 | 1443 | arizona->core_supplies); |
e6021511 CK |
1444 | err_dcvdd: |
1445 | regulator_put(arizona->dcvdd); | |
3cc72986 MB |
1446 | err_early: |
1447 | mfd_remove_devices(dev); | |
1448 | return ret; | |
1449 | } | |
1450 | EXPORT_SYMBOL_GPL(arizona_dev_init); | |
1451 | ||
4740f73f | 1452 | int arizona_dev_exit(struct arizona *arizona) |
3cc72986 | 1453 | { |
fb36f77e | 1454 | disable_irq(arizona->irq); |
b804020a CK |
1455 | pm_runtime_disable(arizona->dev); |
1456 | ||
df6b3352 | 1457 | regulator_disable(arizona->dcvdd); |
e6021511 | 1458 | regulator_put(arizona->dcvdd); |
df6b3352 | 1459 | |
ddff6c45 CK |
1460 | switch (arizona->pdata.clk32k_src) { |
1461 | case ARIZONA_32KZ_MCLK1: | |
1462 | case ARIZONA_32KZ_MCLK2: | |
1463 | arizona_clk32k_disable(arizona); | |
1464 | break; | |
1465 | default: | |
1466 | break; | |
1467 | } | |
1468 | ||
3cc72986 MB |
1469 | mfd_remove_devices(arizona->dev); |
1470 | arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona); | |
1471 | arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona); | |
1472 | arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona); | |
3cc72986 | 1473 | arizona_irq_exit(arizona); |
2229875d | 1474 | arizona_enable_reset(arizona); |
df6b3352 | 1475 | |
4420286e | 1476 | regulator_bulk_disable(arizona->num_core_supplies, |
1d017b6b | 1477 | arizona->core_supplies); |
3cc72986 MB |
1478 | return 0; |
1479 | } | |
1480 | EXPORT_SYMBOL_GPL(arizona_dev_exit); |