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[mirror_ubuntu-zesty-kernel.git] / drivers / mfd / arizona-core.c
CommitLineData
3cc72986
MB		 1/*
2 * Arizona core driver
3 *
4 * Copyright 2012 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
cdd8da8c 13#include <linux/clk.h>
3cc72986 14#include <linux/delay.h>
59db9691 15#include <linux/err.h>
3cc72986
MB		 16#include <linux/gpio.h>
17#include <linux/interrupt.h>
18#include <linux/mfd/core.h>
19#include <linux/module.h>
d781009c
MB		 20#include <linux/of.h>
21#include <linux/of_device.h>
22#include <linux/of_gpio.h>
3cc72986
MB		 23#include <linux/pm_runtime.h>
24#include <linux/regmap.h>
25#include <linux/regulator/consumer.h>
5927467d 26#include <linux/regulator/machine.h>
3cc72986 27#include <linux/slab.h>
ae05ea36 28#include <linux/platform_device.h>
3cc72986
MB		 29
30#include <linux/mfd/arizona/core.h>
31#include <linux/mfd/arizona/registers.h>
32
33#include "arizona.h"
34
3762aede 35static const char * const wm5102_core_supplies[] = {
3cc72986
MB		 36 "AVDD",
37 "DBVDD1",
3cc72986
MB		 38};
39
40int arizona_clk32k_enable(struct arizona *arizona)
41{
42 int ret = 0;
43
44 mutex_lock(&arizona->clk_lock);
45
46 arizona->clk32k_ref++;
47
247fa192
MB		 48 if (arizona->clk32k_ref == 1) {
49 switch (arizona->pdata.clk32k_src) {
50 case ARIZONA_32KZ_MCLK1:
51 ret = pm_runtime_get_sync(arizona->dev);
52 if (ret != 0)
cdd8da8c
SN		 53 goto err_ref;
54 ret = clk_prepare_enable(arizona->mclk[ARIZONA_MCLK1]);
55 if (ret != 0)
56 goto err_pm;
57 break;
58 case ARIZONA_32KZ_MCLK2:
59 ret = clk_prepare_enable(arizona->mclk[ARIZONA_MCLK2]);
60 if (ret != 0)
61 goto err_ref;
247fa192
MB		 62 break;
63 }
64
3cc72986
MB		 65 ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
66 ARIZONA_CLK_32K_ENA,
67 ARIZONA_CLK_32K_ENA);
247fa192 68 }
3cc72986 69
cdd8da8c
SN		 70err_pm:
71 pm_runtime_put_sync(arizona->dev);
72err_ref:
3cc72986
MB		 73 if (ret != 0)
74 arizona->clk32k_ref--;
75
76 mutex_unlock(&arizona->clk_lock);
77
78 return ret;
79}
80EXPORT_SYMBOL_GPL(arizona_clk32k_enable);
81
82int arizona_clk32k_disable(struct arizona *arizona)
83{
3cc72986
MB		 84 mutex_lock(&arizona->clk_lock);
85
86 BUG_ON(arizona->clk32k_ref <= 0);
87
88 arizona->clk32k_ref--;
89
247fa192 90 if (arizona->clk32k_ref == 0) {
3cc72986
MB		 91 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
92 ARIZONA_CLK_32K_ENA, 0);
93
247fa192
MB		 94 switch (arizona->pdata.clk32k_src) {
95 case ARIZONA_32KZ_MCLK1:
96 pm_runtime_put_sync(arizona->dev);
cdd8da8c
SN		 97 clk_disable_unprepare(arizona->mclk[ARIZONA_MCLK1]);
98 break;
99 case ARIZONA_32KZ_MCLK2:
100 clk_disable_unprepare(arizona->mclk[ARIZONA_MCLK2]);
247fa192
MB		 101 break;
102 }
103 }
104
3cc72986
MB		 105 mutex_unlock(&arizona->clk_lock);
106
a260fba1 107 return 0;
3cc72986
MB		 108}
109EXPORT_SYMBOL_GPL(arizona_clk32k_disable);
110
111static irqreturn_t arizona_clkgen_err(int irq, void *data)
112{
113 struct arizona *arizona = data;
114
115 dev_err(arizona->dev, "CLKGEN error\n");
116
117 return IRQ_HANDLED;
118}
119
120static irqreturn_t arizona_underclocked(int irq, void *data)
121{
122 struct arizona *arizona = data;
123 unsigned int val;
124 int ret;
125
126 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8,
127 &val);
128 if (ret != 0) {
129 dev_err(arizona->dev, "Failed to read underclock status: %d\n",
130 ret);
131 return IRQ_NONE;
132 }
133
3cc72986
MB		 134 if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
135 dev_err(arizona->dev, "AIF3 underclocked\n");
136 if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
3ebef34d
CK		 137 dev_err(arizona->dev, "AIF2 underclocked\n");
138 if (val & ARIZONA_AIF1_UNDERCLOCKED_STS)
3cc72986 139 dev_err(arizona->dev, "AIF1 underclocked\n");
6e440d27
CK		 140 if (val & ARIZONA_ISRC3_UNDERCLOCKED_STS)
141 dev_err(arizona->dev, "ISRC3 underclocked\n");
3cc72986
MB		 142 if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
143 dev_err(arizona->dev, "ISRC2 underclocked\n");
144 if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS)
145 dev_err(arizona->dev, "ISRC1 underclocked\n");
146 if (val & ARIZONA_FX_UNDERCLOCKED_STS)
147 dev_err(arizona->dev, "FX underclocked\n");
148 if (val & ARIZONA_ASRC_UNDERCLOCKED_STS)
149 dev_err(arizona->dev, "ASRC underclocked\n");
150 if (val & ARIZONA_DAC_UNDERCLOCKED_STS)
151 dev_err(arizona->dev, "DAC underclocked\n");
152 if (val & ARIZONA_ADC_UNDERCLOCKED_STS)
153 dev_err(arizona->dev, "ADC underclocked\n");
154 if (val & ARIZONA_MIXER_UNDERCLOCKED_STS)
648a9880 155 dev_err(arizona->dev, "Mixer dropped sample\n");
3cc72986
MB		 156
157 return IRQ_HANDLED;
158}
159
160static irqreturn_t arizona_overclocked(int irq, void *data)
161{
162 struct arizona *arizona = data;
6887b042 163 unsigned int val[3];
3cc72986 164 int ret;
3762aede 165
3cc72986 166 ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
6887b042 167 &val[0], 3);
3cc72986
MB		 168 if (ret != 0) {
169 dev_err(arizona->dev, "Failed to read overclock status: %d\n",
170 ret);
171 return IRQ_NONE;
172 }
173
6887b042
RF		 174 switch (arizona->type) {
175 case WM8998:
176 case WM1814:
177 /* Some bits are shifted on WM8998,
178 * rearrange to match the standard bit layout
179 */
180 val[0] = ((val[0] & 0x60e0) >> 1) |
181 ((val[0] & 0x1e00) >> 2) |
182 (val[0] & 0x000f);
183 break;
184 default:
185 break;
186 }
187
3cc72986
MB		 188 if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
189 dev_err(arizona->dev, "PWM overclocked\n");
190 if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
191 dev_err(arizona->dev, "FX core overclocked\n");
192 if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
193 dev_err(arizona->dev, "DAC SYS overclocked\n");
194 if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
195 dev_err(arizona->dev, "DAC WARP overclocked\n");
196 if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
197 dev_err(arizona->dev, "ADC overclocked\n");
198 if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
199 dev_err(arizona->dev, "Mixer overclocked\n");
200 if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
201 dev_err(arizona->dev, "AIF3 overclocked\n");
202 if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
203 dev_err(arizona->dev, "AIF2 overclocked\n");
204 if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
205 dev_err(arizona->dev, "AIF1 overclocked\n");
206 if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
207 dev_err(arizona->dev, "Pad control overclocked\n");
208
209 if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
210 dev_err(arizona->dev, "Slimbus subsystem overclocked\n");
211 if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
212 dev_err(arizona->dev, "Slimbus async overclocked\n");
213 if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
214 dev_err(arizona->dev, "Slimbus sync overclocked\n");
215 if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
216 dev_err(arizona->dev, "ASRC async system overclocked\n");
217 if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
218 dev_err(arizona->dev, "ASRC async WARP overclocked\n");
219 if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
220 dev_err(arizona->dev, "ASRC sync system overclocked\n");
221 if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
222 dev_err(arizona->dev, "ASRC sync WARP overclocked\n");
223 if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
224 dev_err(arizona->dev, "DSP1 overclocked\n");
6e440d27
CK		 225 if (val[1] & ARIZONA_ISRC3_OVERCLOCKED_STS)
226 dev_err(arizona->dev, "ISRC3 overclocked\n");
3cc72986
MB		 227 if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
228 dev_err(arizona->dev, "ISRC2 overclocked\n");
229 if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
230 dev_err(arizona->dev, "ISRC1 overclocked\n");
231
6887b042
RF		 232 if (val[2] & ARIZONA_SPDIF_OVERCLOCKED_STS)
233 dev_err(arizona->dev, "SPDIF overclocked\n");
234
3cc72986
MB		 235 return IRQ_HANDLED;
236}
237
9d53dfdc
CK		 238static int arizona_poll_reg(struct arizona *arizona,
239 int timeout, unsigned int reg,
240 unsigned int mask, unsigned int target)
3cc72986 241{
9d53dfdc 242 unsigned int val = 0;
3cc72986
MB		 243 int ret, i;
244
9d53dfdc
CK		 245 for (i = 0; i < timeout; i++) {
246 ret = regmap_read(arizona->regmap, reg, &val);
3cc72986 247 if (ret != 0) {
9d53dfdc
CK		 248 dev_err(arizona->dev, "Failed to read reg %u: %d\n",
249 reg, ret);
cfe775ce 250 continue;
3cc72986
MB		 251 }
252
9d53dfdc
CK		 253 if ((val & mask) == target)
254 return 0;
255
b79a980f 256 usleep_range(1000, 5000);
3cc72986
MB		 257 }
258
9d53dfdc
CK		 259 dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val);
260 return -ETIMEDOUT;
261}
262
263static int arizona_wait_for_boot(struct arizona *arizona)
264{
265 int ret;
266
267 /*
268 * We can't use an interrupt as we need to runtime resume to do so,
269 * we won't race with the interrupt handler as it'll be blocked on
270 * runtime resume.
271 */
272 ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5,
273 ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS);
274
275 if (!ret)
3cc72986
MB		 276 regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
277 ARIZONA_BOOT_DONE_STS);
3cc72986
MB		 278
279 pm_runtime_mark_last_busy(arizona->dev);
280
9d53dfdc 281 return ret;
3cc72986
MB		 282}
283
2229875d
CK		 284static inline void arizona_enable_reset(struct arizona *arizona)
285{
286 if (arizona->pdata.reset)
287 gpio_set_value_cansleep(arizona->pdata.reset, 0);
288}
289
290static void arizona_disable_reset(struct arizona *arizona)
291{
292 if (arizona->pdata.reset) {
121c075c
CK		 293 switch (arizona->type) {
294 case WM5110:
295 case WM8280:
296 /* Meet requirements for minimum reset duration */
b79a980f 297 usleep_range(5000, 10000);
121c075c
CK		 298 break;
299 default:
300 break;
301 }
302
2229875d 303 gpio_set_value_cansleep(arizona->pdata.reset, 1);
b79a980f 304 usleep_range(1000, 5000);
2229875d
CK		 305 }
306}
307
3850e3ee
CK		 308struct arizona_sysclk_state {
309 unsigned int fll;
310 unsigned int sysclk;
311};
312
313static int arizona_enable_freerun_sysclk(struct arizona *arizona,
314 struct arizona_sysclk_state *state)
e80436bb 315{
e80436bb
CK		 316 int ret, err;
317
e80436bb 318 /* Cache existing FLL and SYSCLK settings */
3850e3ee 319 ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &state->fll);
0be068a0 320 if (ret) {
e80436bb
CK		 321 dev_err(arizona->dev, "Failed to cache FLL settings: %d\n",
322 ret);
323 return ret;
324 }
3850e3ee
CK		 325 ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1,
326 &state->sysclk);
0be068a0 327 if (ret) {
e80436bb
CK		 328 dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n",
329 ret);
330 return ret;
331 }
332
333 /* Start up SYSCLK using the FLL in free running mode */
334 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1,
335 ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN);
0be068a0 336 if (ret) {
e80436bb
CK		 337 dev_err(arizona->dev,
338 "Failed to start FLL in freerunning mode: %d\n",
339 ret);
340 return ret;
341 }
342 ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5,
343 ARIZONA_FLL1_CLOCK_OK_STS,
344 ARIZONA_FLL1_CLOCK_OK_STS);
0be068a0 345 if (ret) {
e80436bb
CK		 346 ret = -ETIMEDOUT;
347 goto err_fll;
348 }
349
350 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144);
0be068a0 351 if (ret) {
e80436bb
CK		 352 dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret);
353 goto err_fll;
354 }
355
3850e3ee
CK		 356 return 0;
357
358err_fll:
359 err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll);
360 if (err)
361 dev_err(arizona->dev,
362 "Failed to re-apply old FLL settings: %d\n", err);
363
364 return ret;
365}
366
367static int arizona_disable_freerun_sysclk(struct arizona *arizona,
368 struct arizona_sysclk_state *state)
369{
370 int ret;
371
372 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1,
373 state->sysclk);
374 if (ret) {
375 dev_err(arizona->dev,
376 "Failed to re-apply old SYSCLK settings: %d\n", ret);
377 return ret;
378 }
379
380 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll);
381 if (ret) {
382 dev_err(arizona->dev,
383 "Failed to re-apply old FLL settings: %d\n", ret);
384 return ret;
385 }
386
387 return 0;
388}
389
390static int wm5102_apply_hardware_patch(struct arizona *arizona)
391{
392 struct arizona_sysclk_state state;
393 int err, ret;
394
395 ret = arizona_enable_freerun_sysclk(arizona, &state);
396 if (ret)
397 return ret;
398
e80436bb
CK		 399 /* Start the write sequencer and wait for it to finish */
400 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
0be068a0
CK		 401 ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160);
402 if (ret) {
e80436bb
CK		 403 dev_err(arizona->dev, "Failed to start write sequencer: %d\n",
404 ret);
3850e3ee 405 goto err;
e80436bb 406 }
3850e3ee 407
e80436bb
CK		 408 ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1,
409 ARIZONA_WSEQ_BUSY, 0);
0be068a0 410 if (ret) {
e80436bb 411 regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
0be068a0 412 ARIZONA_WSEQ_ABORT);
e80436bb
CK		 413 ret = -ETIMEDOUT;
414 }
415
3850e3ee
CK		 416err:
417 err = arizona_disable_freerun_sysclk(arizona, &state);
e80436bb 418
0be068a0 419 return ret ?: err;
e80436bb
CK		 420}
421
882bc468
CK		 422/*
423 * Register patch to some of the CODECs internal write sequences
424 * to ensure a clean exit from the low power sleep state.
425 */
8019ff6c 426static const struct reg_sequence wm5110_sleep_patch[] = {
882bc468
CK		 427 { 0x337A, 0xC100 },
428 { 0x337B, 0x0041 },
429 { 0x3300, 0xA210 },
430 { 0x3301, 0x050C },
431};
432
433static int wm5110_apply_sleep_patch(struct arizona *arizona)
434{
435 struct arizona_sysclk_state state;
436 int err, ret;
437
438 ret = arizona_enable_freerun_sysclk(arizona, &state);
439 if (ret)
440 return ret;
441
442 ret = regmap_multi_reg_write_bypassed(arizona->regmap,
443 wm5110_sleep_patch,
444 ARRAY_SIZE(wm5110_sleep_patch));
445
446 err = arizona_disable_freerun_sysclk(arizona, &state);
447
448 return ret ?: err;
449}
450
1c1c6bba
CK		 451static int wm5102_clear_write_sequencer(struct arizona *arizona)
452{
453 int ret;
454
455 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_3,
456 0x0);
457 if (ret) {
458 dev_err(arizona->dev,
459 "Failed to clear write sequencer state: %d\n", ret);
460 return ret;
461 }
462
463 arizona_enable_reset(arizona);
464 regulator_disable(arizona->dcvdd);
465
466 msleep(20);
467
468 ret = regulator_enable(arizona->dcvdd);
469 if (ret) {
470 dev_err(arizona->dev, "Failed to re-enable DCVDD: %d\n", ret);
471 return ret;
472 }
473 arizona_disable_reset(arizona);
474
475 return 0;
476}
477
48bb9fe4 478#ifdef CONFIG_PM
e7811147
RF		 479static int arizona_isolate_dcvdd(struct arizona *arizona)
480{
481 int ret;
482
483 ret = regmap_update_bits(arizona->regmap,
484 ARIZONA_ISOLATION_CONTROL,
485 ARIZONA_ISOLATE_DCVDD1,
486 ARIZONA_ISOLATE_DCVDD1);
487 if (ret != 0)
488 dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n", ret);
489
490 return ret;
491}
492
493static int arizona_connect_dcvdd(struct arizona *arizona)
494{
495 int ret;
496
497 ret = regmap_update_bits(arizona->regmap,
498 ARIZONA_ISOLATION_CONTROL,
499 ARIZONA_ISOLATE_DCVDD1, 0);
500 if (ret != 0)
501 dev_err(arizona->dev, "Failed to connect DCVDD: %d\n", ret);
502
503 return ret;
504}
505
e3424273
RF		 506static int arizona_is_jack_det_active(struct arizona *arizona)
507{
508 unsigned int val;
509 int ret;
510
511 ret = regmap_read(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, &val);
512 if (ret) {
513 dev_err(arizona->dev,
514 "Failed to check jack det status: %d\n", ret);
515 return ret;
516 } else if (val & ARIZONA_JD1_ENA) {
517 return 1;
518 } else {
519 return 0;
520 }
521}
522
3cc72986
MB		 523static int arizona_runtime_resume(struct device *dev)
524{
525 struct arizona *arizona = dev_get_drvdata(dev);
526 int ret;
527
508c8299
MB		 528 dev_dbg(arizona->dev, "Leaving AoD mode\n");
529
e6cb7341
CK		 530 if (arizona->has_fully_powered_off) {
531 dev_dbg(arizona->dev, "Re-enabling core supplies\n");
532
533 ret = regulator_bulk_enable(arizona->num_core_supplies,
534 arizona->core_supplies);
535 if (ret) {
536 dev_err(dev, "Failed to enable core supplies: %d\n",
537 ret);
538 return ret;
539 }
540 }
541
59db9691
MB		 542 ret = regulator_enable(arizona->dcvdd);
543 if (ret != 0) {
544 dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret);
e6cb7341
CK		 545 if (arizona->has_fully_powered_off)
546 regulator_bulk_disable(arizona->num_core_supplies,
547 arizona->core_supplies);
59db9691
MB		 548 return ret;
549 }
3cc72986 550
e6cb7341
CK		 551 if (arizona->has_fully_powered_off) {
552 arizona_disable_reset(arizona);
553 enable_irq(arizona->irq);
554 arizona->has_fully_powered_off = false;
555 }
556
3cc72986
MB		 557 regcache_cache_only(arizona->regmap, false);
558
4c9bb8bc
CK		 559 switch (arizona->type) {
560 case WM5102:
5927467d 561 if (arizona->external_dcvdd) {
e7811147
RF		 562 ret = arizona_connect_dcvdd(arizona);
563 if (ret != 0)
5927467d 564 goto err;
5927467d
MB		 565 }
566
4c9bb8bc
CK		 567 ret = wm5102_patch(arizona);
568 if (ret != 0) {
569 dev_err(arizona->dev, "Failed to apply patch: %d\n",
570 ret);
571 goto err;
572 }
e80436bb 573
0be068a0
CK		 574 ret = wm5102_apply_hardware_patch(arizona);
575 if (ret) {
e80436bb
CK		 576 dev_err(arizona->dev,
577 "Failed to apply hardware patch: %d\n",
578 ret);
579 goto err;
580 }
581 break;
96129a0e
CK		 582 case WM5110:
583 case WM8280:
584 ret = arizona_wait_for_boot(arizona);
585 if (ret)
586 goto err;
587
588 if (arizona->external_dcvdd) {
e7811147
RF		 589 ret = arizona_connect_dcvdd(arizona);
590 if (ret != 0)
96129a0e 591 goto err;
96129a0e
CK		 592 } else {
593 /*
594 * As this is only called for the internal regulator
595 * (where we know voltage ranges available) it is ok
596 * to request an exact range.
597 */
598 ret = regulator_set_voltage(arizona->dcvdd,
599 1200000, 1200000);
600 if (ret < 0) {
601 dev_err(arizona->dev,
602 "Failed to set resume voltage: %d\n",
603 ret);
604 goto err;
605 }
606 }
e6cb7341
CK		 607
608 ret = wm5110_apply_sleep_patch(arizona);
609 if (ret) {
610 dev_err(arizona->dev,
611 "Failed to re-apply sleep patch: %d\n",
612 ret);
613 goto err;
614 }
96129a0e 615 break;
ea1f3339
RF		 616 case WM1831:
617 case CS47L24:
618 ret = arizona_wait_for_boot(arizona);
619 if (ret != 0)
620 goto err;
621 break;
e80436bb 622 default:
12bb68ed 623 ret = arizona_wait_for_boot(arizona);
3762aede 624 if (ret != 0)
12bb68ed 625 goto err;
12bb68ed 626
5927467d 627 if (arizona->external_dcvdd) {
e7811147
RF		 628 ret = arizona_connect_dcvdd(arizona);
629 if (ret != 0)
5927467d 630 goto err;
5927467d 631 }
e80436bb 632 break;
4c9bb8bc
CK		 633 }
634
9270bdf5
MB		 635 ret = regcache_sync(arizona->regmap);
636 if (ret != 0) {
637 dev_err(arizona->dev, "Failed to restore register cache\n");
4816bd1c 638 goto err;
9270bdf5 639 }
3cc72986
MB		 640
641 return 0;
4816bd1c
MB		 642
643err:
644 regcache_cache_only(arizona->regmap, true);
645 regulator_disable(arizona->dcvdd);
646 return ret;
3cc72986
MB		 647}
648
649static int arizona_runtime_suspend(struct device *dev)
650{
651 struct arizona *arizona = dev_get_drvdata(dev);
a05950a4 652 int jd_active = 0;
5927467d 653 int ret;
3cc72986 654
508c8299
MB		 655 dev_dbg(arizona->dev, "Entering AoD mode\n");
656
e6cb7341
CK		 657 switch (arizona->type) {
658 case WM5110:
659 case WM8280:
e3424273
RF		 660 jd_active = arizona_is_jack_det_active(arizona);
661 if (jd_active < 0)
662 return jd_active;
663
e7811147
RF		 664 if (arizona->external_dcvdd) {
665 ret = arizona_isolate_dcvdd(arizona);
666 if (ret != 0)
667 return ret;
668 } else {
669 /*
670 * As this is only called for the internal regulator
671 * (where we know voltage ranges available) it is ok
672 * to request an exact range.
673 */
674 ret = regulator_set_voltage(arizona->dcvdd,
675 1175000, 1175000);
676 if (ret < 0) {
677 dev_err(arizona->dev,
678 "Failed to set suspend voltage: %d\n",
679 ret);
680 return ret;
681 }
e6cb7341
CK		 682 }
683 break;
684 case WM5102:
e3424273
RF		 685 jd_active = arizona_is_jack_det_active(arizona);
686 if (jd_active < 0)
687 return jd_active;
688
e7811147
RF		 689 if (arizona->external_dcvdd) {
690 ret = arizona_isolate_dcvdd(arizona);
691 if (ret != 0)
692 return ret;
693 }
694
e3424273 695 if (!jd_active) {
e6cb7341
CK		 696 ret = regmap_write(arizona->regmap,
697 ARIZONA_WRITE_SEQUENCER_CTRL_3, 0x0);
698 if (ret) {
96129a0e 699 dev_err(arizona->dev,
e6cb7341 700 "Failed to clear write sequencer: %d\n",
96129a0e
CK		 701 ret);
702 return ret;
703 }
96129a0e 704 }
e6cb7341 705 break;
ea1f3339
RF		 706 case WM1831:
707 case CS47L24:
708 break;
e6cb7341 709 default:
e3424273
RF		 710 jd_active = arizona_is_jack_det_active(arizona);
711 if (jd_active < 0)
712 return jd_active;
713
e7811147
RF		 714 if (arizona->external_dcvdd) {
715 ret = arizona_isolate_dcvdd(arizona);
716 if (ret != 0)
717 return ret;
718 }
e6cb7341 719 break;
5927467d
MB		 720 }
721
59db9691
MB		 722 regcache_cache_only(arizona->regmap, true);
723 regcache_mark_dirty(arizona->regmap);
e293e847 724 regulator_disable(arizona->dcvdd);
3cc72986 725
e6cb7341 726 /* Allow us to completely power down if no jack detection */
e3424273 727 if (!jd_active) {
e6cb7341
CK		 728 dev_dbg(arizona->dev, "Fully powering off\n");
729
730 arizona->has_fully_powered_off = true;
731
11150929 732 disable_irq_nosync(arizona->irq);
e6cb7341
CK		 733 arizona_enable_reset(arizona);
734 regulator_bulk_disable(arizona->num_core_supplies,
735 arizona->core_supplies);
736 }
737
3cc72986
MB		 738 return 0;
739}
740#endif
741
dc781d0e 742#ifdef CONFIG_PM_SLEEP
67c99296
MB		 743static int arizona_suspend(struct device *dev)
744{
745 struct arizona *arizona = dev_get_drvdata(dev);
746
747 dev_dbg(arizona->dev, "Suspend, disabling IRQ\n");
748 disable_irq(arizona->irq);
749
750 return 0;
751}
752
3612b27c 753static int arizona_suspend_noirq(struct device *dev)
67c99296
MB		 754{
755 struct arizona *arizona = dev_get_drvdata(dev);
756
757 dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n");
758 enable_irq(arizona->irq);
759
760 return 0;
761}
762
dc781d0e
MB		 763static int arizona_resume_noirq(struct device *dev)
764{
765 struct arizona *arizona = dev_get_drvdata(dev);
766
767 dev_dbg(arizona->dev, "Early resume, disabling IRQ\n");
768 disable_irq(arizona->irq);
769
770 return 0;
771}
772
773static int arizona_resume(struct device *dev)
774{
775 struct arizona *arizona = dev_get_drvdata(dev);
776
3612b27c 777 dev_dbg(arizona->dev, "Resume, reenabling IRQ\n");
dc781d0e
MB		 778 enable_irq(arizona->irq);
779
780 return 0;
781}
782#endif
783
3cc72986
MB		 784const struct dev_pm_ops arizona_pm_ops = {
785 SET_RUNTIME_PM_OPS(arizona_runtime_suspend,
786 arizona_runtime_resume,
787 NULL)
67c99296 788 SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume)
3612b27c
CK		 789 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(arizona_suspend_noirq,
790 arizona_resume_noirq)
3cc72986
MB		 791};
792EXPORT_SYMBOL_GPL(arizona_pm_ops);
793
d781009c 794#ifdef CONFIG_OF
942786e6 795unsigned long arizona_of_get_type(struct device *dev)
d781009c
MB		 796{
797 const struct of_device_id *id = of_match_device(arizona_of_match, dev);
798
799 if (id)
942786e6 800 return (unsigned long)id->data;
d781009c
MB		 801 else
802 return 0;
803}
804EXPORT_SYMBOL_GPL(arizona_of_get_type);
805
806static int arizona_of_get_core_pdata(struct arizona *arizona)
807{
e4fcb1d6 808 struct arizona_pdata *pdata = &arizona->pdata;
cc47aed9
IS		 809 struct property *prop;
810 const __be32 *cur;
811 u32 val;
f4c05262 812 u32 pdm_val[ARIZONA_MAX_PDM_SPK];
d781009c 813 int ret, i;
cc47aed9 814 int count = 0;
d781009c 815
1961531d 816 pdata->reset = of_get_named_gpio(arizona->dev->of_node, "wlf,reset", 0);
b8d336ed
CK		 817 if (pdata->reset == -EPROBE_DEFER) {
818 return pdata->reset;
819 } else if (pdata->reset < 0) {
1961531d
CK		 820 dev_err(arizona->dev, "Reset GPIO missing/malformed: %d\n",
821 pdata->reset);
822
823 pdata->reset = 0;
824 }
d781009c
MB		 825
826 ret = of_property_read_u32_array(arizona->dev->of_node,
827 "wlf,gpio-defaults",
3762aede
CK		 828 pdata->gpio_defaults,
829 ARRAY_SIZE(pdata->gpio_defaults));
d781009c
MB		 830 if (ret >= 0) {
831 /*
832 * All values are literal except out of range values
833 * which are chip default, translate into platform
834 * data which uses 0 as chip default and out of range
835 * as zero.
836 */
3762aede
CK		 837 for (i = 0; i < ARRAY_SIZE(pdata->gpio_defaults); i++) {
838 if (pdata->gpio_defaults[i] > 0xffff)
839 pdata->gpio_defaults[i] = 0;
840 else if (pdata->gpio_defaults[i] == 0)
841 pdata->gpio_defaults[i] = 0x10000;
d781009c
MB		 842 }
843 } else {
844 dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n",
845 ret);
846 }
847
cc47aed9
IS		 848 of_property_for_each_u32(arizona->dev->of_node, "wlf,inmode", prop,
849 cur, val) {
3762aede 850 if (count == ARRAY_SIZE(pdata->inmode))
cc47aed9
IS		 851 break;
852
3762aede 853 pdata->inmode[count] = val;
cc47aed9
IS		 854 count++;
855 }
856
e7ad27ca
CK		 857 count = 0;
858 of_property_for_each_u32(arizona->dev->of_node, "wlf,dmic-ref", prop,
859 cur, val) {
3762aede 860 if (count == ARRAY_SIZE(pdata->dmic_ref))
e7ad27ca
CK		 861 break;
862
3762aede 863 pdata->dmic_ref[count] = val;
e7ad27ca
CK		 864 count++;
865 }
866
f199d393
CK		 867 count = 0;
868 of_property_for_each_u32(arizona->dev->of_node, "wlf,out-mono", prop,
869 cur, val) {
870 if (count == ARRAY_SIZE(pdata->out_mono))
871 break;
872
873 pdata->out_mono[count] = !!val;
874 count++;
875 }
876
f4c05262
RF		 877 count = 0;
878 of_property_for_each_u32(arizona->dev->of_node,
879 "wlf,max-channels-clocked",
880 prop, cur, val) {
881 if (count == ARRAY_SIZE(pdata->max_channels_clocked))
882 break;
883
884 pdata->max_channels_clocked[count] = val;
885 count++;
886 }
887
888 ret = of_property_read_u32_array(arizona->dev->of_node,
889 "wlf,spk-fmt",
890 pdm_val,
891 ARRAY_SIZE(pdm_val));
892
893 if (ret >= 0)
894 for (count = 0; count < ARRAY_SIZE(pdata->spk_fmt); ++count)
895 pdata->spk_fmt[count] = pdm_val[count];
896
897 ret = of_property_read_u32_array(arizona->dev->of_node,
898 "wlf,spk-mute",
899 pdm_val,
900 ARRAY_SIZE(pdm_val));
901
902 if (ret >= 0)
903 for (count = 0; count < ARRAY_SIZE(pdata->spk_mute); ++count)
904 pdata->spk_mute[count] = pdm_val[count];
905
d781009c
MB		 906 return 0;
907}
908
909const struct of_device_id arizona_of_match[] = {
910 { .compatible = "wlf,wm5102", .data = (void *)WM5102 },
911 { .compatible = "wlf,wm5110", .data = (void *)WM5110 },
e5d4ef0d 912 { .compatible = "wlf,wm8280", .data = (void *)WM8280 },
dc7d4863 913 { .compatible = "wlf,wm8997", .data = (void *)WM8997 },
6887b042
RF		 914 { .compatible = "wlf,wm8998", .data = (void *)WM8998 },
915 { .compatible = "wlf,wm1814", .data = (void *)WM1814 },
ea1f3339
RF		 916 { .compatible = "wlf,wm1831", .data = (void *)WM1831 },
917 { .compatible = "cirrus,cs47l24", .data = (void *)CS47L24 },
d781009c
MB		 918 {},
919};
920EXPORT_SYMBOL_GPL(arizona_of_match);
921#else
922static inline int arizona_of_get_core_pdata(struct arizona *arizona)
923{
924 return 0;
925}
926#endif
927
5ac98553 928static const struct mfd_cell early_devs[] = {
3cc72986
MB		 929 { .name = "arizona-ldo1" },
930};
931
3762aede 932static const char * const wm5102_supplies[] = {
5fc6c396 933 "MICVDD",
32dadef2
CK		 934 "DBVDD2",
935 "DBVDD3",
936 "CPVDD",
937 "SPKVDDL",
938 "SPKVDDR",
939};
940
5ac98553 941static const struct mfd_cell wm5102_devs[] = {
d7768111 942 { .name = "arizona-micsupp" },
f83c218c 943 { .name = "arizona-gpio" },
5fc6c396
CK		 944 {
945 .name = "arizona-extcon",
946 .parent_supplies = wm5102_supplies,
947 .num_parent_supplies = 1, /* We only need MICVDD */
948 },
503b1cac 949 { .name = "arizona-haptics" },
3cc72986 950 { .name = "arizona-pwm" },
32dadef2
CK		 951 {
952 .name = "wm5102-codec",
953 .parent_supplies = wm5102_supplies,
954 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
955 },
3cc72986
MB		 956};
957
5ac98553 958static const struct mfd_cell wm5110_devs[] = {
d7768111 959 { .name = "arizona-micsupp" },
f83c218c 960 { .name = "arizona-gpio" },
5fc6c396
CK		 961 {
962 .name = "arizona-extcon",
963 .parent_supplies = wm5102_supplies,
964 .num_parent_supplies = 1, /* We only need MICVDD */
965 },
503b1cac 966 { .name = "arizona-haptics" },
e102befe 967 { .name = "arizona-pwm" },
32dadef2
CK		 968 {
969 .name = "wm5110-codec",
970 .parent_supplies = wm5102_supplies,
971 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
972 },
973};
974
ea1f3339
RF		 975static const char * const cs47l24_supplies[] = {
976 "MICVDD",
977 "CPVDD",
978 "SPKVDD",
979};
980
981static const struct mfd_cell cs47l24_devs[] = {
982 { .name = "arizona-gpio" },
983 { .name = "arizona-haptics" },
984 { .name = "arizona-pwm" },
985 {
986 .name = "cs47l24-codec",
987 .parent_supplies = cs47l24_supplies,
988 .num_parent_supplies = ARRAY_SIZE(cs47l24_supplies),
989 },
990};
991
3762aede 992static const char * const wm8997_supplies[] = {
996c2d4f 993 "MICVDD",
32dadef2
CK		 994 "DBVDD2",
995 "CPVDD",
996 "SPKVDD",
e102befe
MB		 997};
998
5ac98553 999static const struct mfd_cell wm8997_devs[] = {
dc7d4863 1000 { .name = "arizona-micsupp" },
f83c218c 1001 { .name = "arizona-gpio" },
5fc6c396
CK		 1002 {
1003 .name = "arizona-extcon",
1004 .parent_supplies = wm8997_supplies,
1005 .num_parent_supplies = 1, /* We only need MICVDD */
1006 },
dc7d4863
CK		 1007 { .name = "arizona-haptics" },
1008 { .name = "arizona-pwm" },
32dadef2
CK		 1009 {
1010 .name = "wm8997-codec",
1011 .parent_supplies = wm8997_supplies,
1012 .num_parent_supplies = ARRAY_SIZE(wm8997_supplies),
1013 },
dc7d4863
CK		 1014};
1015
6887b042 1016static const struct mfd_cell wm8998_devs[] = {
f83c218c
CK		 1017 { .name = "arizona-micsupp" },
1018 { .name = "arizona-gpio" },
6887b042
RF		 1019 {
1020 .name = "arizona-extcon",
1021 .parent_supplies = wm5102_supplies,
1022 .num_parent_supplies = 1, /* We only need MICVDD */
1023 },
6887b042
RF		 1024 { .name = "arizona-haptics" },
1025 { .name = "arizona-pwm" },
1026 {
1027 .name = "wm8998-codec",
1028 .parent_supplies = wm5102_supplies,
1029 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
1030 },
6887b042
RF		 1031};
1032
f791be49 1033int arizona_dev_init(struct arizona *arizona)
3cc72986 1034{
cdd8da8c 1035 const char * const mclk_name[] = { "mclk1", "mclk2" };
3cc72986 1036 struct device *dev = arizona->dev;
ea1f3339 1037 const char *type_name = NULL;
6887b042 1038 unsigned int reg, val, mask;
62d62b59 1039 int (*apply_patch)(struct arizona *) = NULL;
ae05ea36
RF		 1040 const struct mfd_cell *subdevs = NULL;
1041 int n_subdevs, ret, i;
3cc72986
MB		 1042
1043 dev_set_drvdata(arizona->dev, arizona);
1044 mutex_init(&arizona->clk_lock);
1045
b8d336ed 1046 if (dev_get_platdata(arizona->dev)) {
3cc72986
MB		 1047 memcpy(&arizona->pdata, dev_get_platdata(arizona->dev),
1048 sizeof(arizona->pdata));
b8d336ed
CK		 1049 } else {
1050 ret = arizona_of_get_core_pdata(arizona);
1051 if (ret < 0)
1052 return ret;
1053 }
3cc72986 1054
cdd8da8c
SN		 1055 BUILD_BUG_ON(ARRAY_SIZE(arizona->mclk) != ARRAY_SIZE(mclk_name));
1056 for (i = 0; i < ARRAY_SIZE(arizona->mclk); i++) {
1057 arizona->mclk[i] = devm_clk_get(arizona->dev, mclk_name[i]);
1058 if (IS_ERR(arizona->mclk[i])) {
1059 dev_info(arizona->dev, "Failed to get %s: %ld\n",
1060 mclk_name[i], PTR_ERR(arizona->mclk[i]));
1061 arizona->mclk[i] = NULL;
1062 }
1063 }
1064
3cc72986
MB		 1065 regcache_cache_only(arizona->regmap, true);
1066
1067 switch (arizona->type) {
1068 case WM5102:
e102befe 1069 case WM5110:
e5d4ef0d 1070 case WM8280:
dc7d4863 1071 case WM8997:
6887b042
RF		 1072 case WM8998:
1073 case WM1814:
ea1f3339
RF		 1074 case WM1831:
1075 case CS47L24:
3cc72986
MB		 1076 for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
1077 arizona->core_supplies[i].supply
1078 = wm5102_core_supplies[i];
1079 arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies);
1080 break;
1081 default:
1082 dev_err(arizona->dev, "Unknown device type %d\n",
1083 arizona->type);
75d8a2b0 1084 return -ENODEV;
3cc72986
MB		 1085 }
1086
4a8c475f
CK		 1087 /* Mark DCVDD as external, LDO1 driver will clear if internal */
1088 arizona->external_dcvdd = true;
1089
ea1f3339
RF		 1090 switch (arizona->type) {
1091 case WM1831:
1092 case CS47L24:
1093 break; /* No LDO1 regulator */
1094 default:
1095 ret = mfd_add_devices(arizona->dev, -1, early_devs,
1096 ARRAY_SIZE(early_devs), NULL, 0, NULL);
1097 if (ret != 0) {
1098 dev_err(dev, "Failed to add early children: %d\n", ret);
1099 return ret;
1100 }
1101 break;
3cc72986
MB		 1102 }
1103
1104 ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
1105 arizona->core_supplies);
1106 if (ret != 0) {
1107 dev_err(dev, "Failed to request core supplies: %d\n",
1108 ret);
1109 goto err_early;
1110 }
1111
0c2d0ffb
CK		 1112 /**
1113 * Don't use devres here because the only device we have to get
1114 * against is the MFD device and DCVDD will likely be supplied by
1115 * one of its children. Meaning that the regulator will be
1116 * destroyed by the time devres calls regulator put.
1117 */
e6021511 1118 arizona->dcvdd = regulator_get(arizona->dev, "DCVDD");
59db9691
MB		 1119 if (IS_ERR(arizona->dcvdd)) {
1120 ret = PTR_ERR(arizona->dcvdd);
1121 dev_err(dev, "Failed to request DCVDD: %d\n", ret);
1122 goto err_early;
1123 }
1124
87d3af4a
MB		 1125 if (arizona->pdata.reset) {
1126 /* Start out with /RESET low to put the chip into reset */
5f056bf0
CK		 1127 ret = devm_gpio_request_one(arizona->dev, arizona->pdata.reset,
1128 GPIOF_DIR_OUT | GPIOF_INIT_LOW,
1129 "arizona /RESET");
87d3af4a
MB		 1130 if (ret != 0) {
1131 dev_err(dev, "Failed to request /RESET: %d\n", ret);
e6021511 1132 goto err_dcvdd;
87d3af4a
MB		 1133 }
1134 }
1135
3cc72986
MB		 1136 ret = regulator_bulk_enable(arizona->num_core_supplies,
1137 arizona->core_supplies);
1138 if (ret != 0) {
1139 dev_err(dev, "Failed to enable core supplies: %d\n",
1140 ret);
e6021511 1141 goto err_dcvdd;
3cc72986
MB		 1142 }
1143
59db9691
MB		 1144 ret = regulator_enable(arizona->dcvdd);
1145 if (ret != 0) {
1146 dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
1147 goto err_enable;
1148 }
1149
2229875d 1150 arizona_disable_reset(arizona);
3cc72986 1151
3cc72986
MB		 1152 regcache_cache_only(arizona->regmap, false);
1153
ca76ceb8 1154 /* Verify that this is a chip we know about */
3cc72986
MB		 1155 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
1156 if (ret != 0) {
1157 dev_err(dev, "Failed to read ID register: %d\n", ret);
59db9691 1158 goto err_reset;
3cc72986
MB		 1159 }
1160
3cc72986
MB		 1161 switch (reg) {
1162 case 0x5102:
e102befe 1163 case 0x5110:
6887b042 1164 case 0x6349:
ea1f3339 1165 case 0x6363:
dc7d4863 1166 case 0x8997:
e102befe 1167 break;
3cc72986 1168 default:
ca76ceb8 1169 dev_err(arizona->dev, "Unknown device ID: %x\n", reg);
75d8a2b0 1170 ret = -ENODEV;
59db9691 1171 goto err_reset;
3cc72986
MB		 1172 }
1173
3cc72986
MB		 1174 /* If we have a /RESET GPIO we'll already be reset */
1175 if (!arizona->pdata.reset) {
1176 ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
1177 if (ret != 0) {
1178 dev_err(dev, "Failed to reset device: %d\n", ret);
59db9691 1179 goto err_reset;
3cc72986 1180 }
46b9d13a 1181
b79a980f 1182 usleep_range(1000, 5000);
3cc72986
MB		 1183 }
1184
ca76ceb8 1185 /* Ensure device startup is complete */
d955cba8
CK		 1186 switch (arizona->type) {
1187 case WM5102:
48018943
MB		 1188 ret = regmap_read(arizona->regmap,
1189 ARIZONA_WRITE_SEQUENCER_CTRL_3, &val);
1c1c6bba 1190 if (ret) {
d955cba8
CK		 1191 dev_err(dev,
1192 "Failed to check write sequencer state: %d\n",
1193 ret);
1c1c6bba
CK		 1194 } else if (val & 0x01) {
1195 ret = wm5102_clear_write_sequencer(arizona);
1196 if (ret)
1197 return ret;
d955cba8
CK		 1198 }
1199 break;
1c1c6bba
CK		 1200 default:
1201 break;
1202 }
1203
1204 ret = arizona_wait_for_boot(arizona);
1205 if (ret) {
1206 dev_err(arizona->dev, "Device failed initial boot: %d\n", ret);
1207 goto err_reset;
af65a361 1208 }
3cc72986 1209
ca76ceb8
MB		 1210 /* Read the device ID information & do device specific stuff */
1211 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
1212 if (ret != 0) {
1213 dev_err(dev, "Failed to read ID register: %d\n", ret);
1214 goto err_reset;
1215 }
1216
1217 ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
1218 &arizona->rev);
1219 if (ret != 0) {
1220 dev_err(dev, "Failed to read revision register: %d\n", ret);
1221 goto err_reset;
1222 }
1223 arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
1224
1225 switch (reg) {
ca76ceb8 1226 case 0x5102:
b61c1ec0
RF		 1227 if (IS_ENABLED(CONFIG_MFD_WM5102)) {
1228 type_name = "WM5102";
1229 if (arizona->type != WM5102) {
1230 dev_warn(arizona->dev,
1231 "WM5102 registered as %d\n",
1232 arizona->type);
1233 arizona->type = WM5102;
1234 }
1235
1236 apply_patch = wm5102_patch;
1237 arizona->rev &= 0x7;
1238 subdevs = wm5102_devs;
1239 n_subdevs = ARRAY_SIZE(wm5102_devs);
ca76ceb8 1240 }
ca76ceb8 1241 break;
ca76ceb8 1242 case 0x5110:
b61c1ec0
RF		 1243 if (IS_ENABLED(CONFIG_MFD_WM5110)) {
1244 switch (arizona->type) {
1245 case WM5110:
1246 type_name = "WM5110";
1247 break;
1248 case WM8280:
1249 type_name = "WM8280";
1250 break;
1251 default:
1252 type_name = "WM5110";
1253 dev_warn(arizona->dev,
1254 "WM5110 registered as %d\n",
1255 arizona->type);
1256 arizona->type = WM5110;
1257 break;
1258 }
1259
1260 apply_patch = wm5110_patch;
1261 subdevs = wm5110_devs;
1262 n_subdevs = ARRAY_SIZE(wm5110_devs);
ca76ceb8 1263 }
ca76ceb8 1264 break;
ea1f3339
RF		 1265 case 0x6363:
1266 if (IS_ENABLED(CONFIG_MFD_CS47L24)) {
1267 switch (arizona->type) {
1268 case CS47L24:
1269 type_name = "CS47L24";
1270 break;
1271
1272 case WM1831:
1273 type_name = "WM1831";
1274 break;
1275
1276 default:
1277 dev_warn(arizona->dev,
1278 "CS47L24 registered as %d\n",
1279 arizona->type);
1280 arizona->type = CS47L24;
1281 break;
1282 }
1283
1284 apply_patch = cs47l24_patch;
1285 subdevs = cs47l24_devs;
1286 n_subdevs = ARRAY_SIZE(cs47l24_devs);
1287 }
1288 break;
dc7d4863 1289 case 0x8997:
b61c1ec0
RF		 1290 if (IS_ENABLED(CONFIG_MFD_WM8997)) {
1291 type_name = "WM8997";
1292 if (arizona->type != WM8997) {
1293 dev_warn(arizona->dev,
1294 "WM8997 registered as %d\n",
1295 arizona->type);
1296 arizona->type = WM8997;
1297 }
1298
1299 apply_patch = wm8997_patch;
1300 subdevs = wm8997_devs;
1301 n_subdevs = ARRAY_SIZE(wm8997_devs);
dc7d4863 1302 }
dc7d4863 1303 break;
6887b042 1304 case 0x6349:
b61c1ec0
RF		 1305 if (IS_ENABLED(CONFIG_MFD_WM8998)) {
1306 switch (arizona->type) {
1307 case WM8998:
1308 type_name = "WM8998";
1309 break;
1310
1311 case WM1814:
1312 type_name = "WM1814";
1313 break;
1314
1315 default:
1316 type_name = "WM8998";
1317 dev_warn(arizona->dev,
1318 "WM8998 registered as %d\n",
1319 arizona->type);
1320 arizona->type = WM8998;
1321 }
6887b042 1322
b61c1ec0
RF		 1323 apply_patch = wm8998_patch;
1324 subdevs = wm8998_devs;
1325 n_subdevs = ARRAY_SIZE(wm8998_devs);
6887b042 1326 }
6887b042 1327 break;
ca76ceb8
MB		 1328 default:
1329 dev_err(arizona->dev, "Unknown device ID %x\n", reg);
75d8a2b0 1330 ret = -ENODEV;
ca76ceb8
MB		 1331 goto err_reset;
1332 }
1333
b61c1ec0
RF		 1334 if (!subdevs) {
1335 dev_err(arizona->dev,
1336 "No kernel support for device ID %x\n", reg);
75d8a2b0 1337 ret = -ENODEV;
b61c1ec0
RF		 1338 goto err_reset;
1339 }
1340
ca76ceb8
MB		 1341 dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
1342
62d62b59
MB		 1343 if (apply_patch) {
1344 ret = apply_patch(arizona);
1345 if (ret != 0) {
1346 dev_err(arizona->dev, "Failed to apply patch: %d\n",
1347 ret);
1348 goto err_reset;
1349 }
e80436bb
CK		 1350
1351 switch (arizona->type) {
1352 case WM5102:
0be068a0
CK		 1353 ret = wm5102_apply_hardware_patch(arizona);
1354 if (ret) {
e80436bb
CK		 1355 dev_err(arizona->dev,
1356 "Failed to apply hardware patch: %d\n",
1357 ret);
1358 goto err_reset;
1359 }
1360 break;
882bc468
CK		 1361 case WM5110:
1362 case WM8280:
1363 ret = wm5110_apply_sleep_patch(arizona);
1364 if (ret) {
1365 dev_err(arizona->dev,
1366 "Failed to apply sleep patch: %d\n",
1367 ret);
1368 goto err_reset;
1369 }
1370 break;
e80436bb
CK		 1371 default:
1372 break;
1373 }
62d62b59
MB		 1374 }
1375
3cc72986
MB		 1376 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
1377 if (!arizona->pdata.gpio_defaults[i])
1378 continue;
1379
1380 regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i,
1381 arizona->pdata.gpio_defaults[i]);
1382 }
1383
3cc72986
MB		 1384 /* Chip default */
1385 if (!arizona->pdata.clk32k_src)
1386 arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
1387
1388 switch (arizona->pdata.clk32k_src) {
1389 case ARIZONA_32KZ_MCLK1:
1390 case ARIZONA_32KZ_MCLK2:
1391 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
1392 ARIZONA_CLK_32K_SRC_MASK,
1393 arizona->pdata.clk32k_src - 1);
767c6dc0 1394 arizona_clk32k_enable(arizona);
3cc72986
MB		 1395 break;
1396 case ARIZONA_32KZ_NONE:
1397 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
1398 ARIZONA_CLK_32K_SRC_MASK, 2);
1399 break;
1400 default:
1401 dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n",
1402 arizona->pdata.clk32k_src);
1403 ret = -EINVAL;
59db9691 1404 goto err_reset;
3cc72986
MB		 1405 }
1406
3d91f828 1407 for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) {
544c7aad
MB		 1408 if (!arizona->pdata.micbias[i].mV &&
1409 !arizona->pdata.micbias[i].bypass)
3d91f828
MB		 1410 continue;
1411
544c7aad
MB		 1412 /* Apply default for bypass mode */
1413 if (!arizona->pdata.micbias[i].mV)
1414 arizona->pdata.micbias[i].mV = 2800;
1415
3d91f828 1416 val = (arizona->pdata.micbias[i].mV - 1500) / 100;
544c7aad 1417
3d91f828
MB		 1418 val <<= ARIZONA_MICB1_LVL_SHIFT;
1419
1420 if (arizona->pdata.micbias[i].ext_cap)
1421 val |= ARIZONA_MICB1_EXT_CAP;
1422
1423 if (arizona->pdata.micbias[i].discharge)
1424 val |= ARIZONA_MICB1_DISCH;
1425
f773fc6d 1426 if (arizona->pdata.micbias[i].soft_start)
3d91f828
MB		 1427 val |= ARIZONA_MICB1_RATE;
1428
544c7aad
MB		 1429 if (arizona->pdata.micbias[i].bypass)
1430 val |= ARIZONA_MICB1_BYPASS;
1431
3d91f828
MB		 1432 regmap_update_bits(arizona->regmap,
1433 ARIZONA_MIC_BIAS_CTRL_1 + i,
1434 ARIZONA_MICB1_LVL_MASK |
71d134b9 1435 ARIZONA_MICB1_EXT_CAP |
3d91f828 1436 ARIZONA_MICB1_DISCH |
544c7aad 1437 ARIZONA_MICB1_BYPASS |
3d91f828
MB		 1438 ARIZONA_MICB1_RATE, val);
1439 }
1440
3cc72986
MB		 1441 for (i = 0; i < ARIZONA_MAX_INPUT; i++) {
1442 /* Default for both is 0 so noop with defaults */
1443 val = arizona->pdata.dmic_ref[i]
1444 << ARIZONA_IN1_DMIC_SUP_SHIFT;
fc027d13
RF		 1445 if (arizona->pdata.inmode[i] & ARIZONA_INMODE_DMIC)
1446 val |= 1 << ARIZONA_IN1_MODE_SHIFT;
6887b042
RF		 1447
1448 switch (arizona->type) {
1449 case WM8998:
1450 case WM1814:
1451 regmap_update_bits(arizona->regmap,
1452 ARIZONA_ADC_DIGITAL_VOLUME_1L + (i * 8),
1453 ARIZONA_IN1L_SRC_SE_MASK,
1454 (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE)
1455 << ARIZONA_IN1L_SRC_SE_SHIFT);
1456
1457 regmap_update_bits(arizona->regmap,
1458 ARIZONA_ADC_DIGITAL_VOLUME_1R + (i * 8),
1459 ARIZONA_IN1R_SRC_SE_MASK,
1460 (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE)
1461 << ARIZONA_IN1R_SRC_SE_SHIFT);
1462
1463 mask = ARIZONA_IN1_DMIC_SUP_MASK |
1464 ARIZONA_IN1_MODE_MASK;
1465 break;
1466 default:
1467 if (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE)
1468 val |= 1 << ARIZONA_IN1_SINGLE_ENDED_SHIFT;
1469
1470 mask = ARIZONA_IN1_DMIC_SUP_MASK |
1471 ARIZONA_IN1_MODE_MASK |
1472 ARIZONA_IN1_SINGLE_ENDED_MASK;
1473 break;
1474 }
3cc72986
MB		 1475
1476 regmap_update_bits(arizona->regmap,
1477 ARIZONA_IN1L_CONTROL + (i * 8),
6887b042 1478 mask, val);
3cc72986
MB		 1479 }
1480
1481 for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) {
1482 /* Default is 0 so noop with defaults */
1483 if (arizona->pdata.out_mono[i])
1484 val = ARIZONA_OUT1_MONO;
1485 else
1486 val = 0;
1487
1488 regmap_update_bits(arizona->regmap,
1489 ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8),
1490 ARIZONA_OUT1_MONO, val);
1491 }
1492
3cc72986
MB		 1493 for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) {
1494 if (arizona->pdata.spk_mute[i])
1495 regmap_update_bits(arizona->regmap,
2a51da04 1496 ARIZONA_PDM_SPK1_CTRL_1 + (i * 2),
3cc72986
MB		 1497 ARIZONA_SPK1_MUTE_ENDIAN_MASK |
1498 ARIZONA_SPK1_MUTE_SEQ1_MASK,
1499 arizona->pdata.spk_mute[i]);
1500
1501 if (arizona->pdata.spk_fmt[i])
1502 regmap_update_bits(arizona->regmap,
2a51da04 1503 ARIZONA_PDM_SPK1_CTRL_2 + (i * 2),
3cc72986
MB		 1504 ARIZONA_SPK1_FMT_MASK,
1505 arizona->pdata.spk_fmt[i]);
1506 }
1507
72e43164
CK		 1508 pm_runtime_set_active(arizona->dev);
1509 pm_runtime_enable(arizona->dev);
1510
3cc72986
MB		 1511 /* Set up for interrupts */
1512 ret = arizona_irq_init(arizona);
1513 if (ret != 0)
d347792c 1514 goto err_pm;
3cc72986 1515
72e43164
CK		 1516 pm_runtime_set_autosuspend_delay(arizona->dev, 100);
1517 pm_runtime_use_autosuspend(arizona->dev);
1518
3cc72986
MB		 1519 arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
1520 arizona_clkgen_err, arizona);
1521 arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
1522 arizona_overclocked, arizona);
1523 arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked",
1524 arizona_underclocked, arizona);
1525
ae05ea36
RF		 1526 ret = mfd_add_devices(arizona->dev, PLATFORM_DEVID_NONE,
1527 subdevs, n_subdevs, NULL, 0, NULL);
3cc72986 1528
ae05ea36 1529 if (ret) {
3cc72986
MB		 1530 dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret);
1531 goto err_irq;
1532 }
1533
1534 return 0;
1535
1536err_irq:
1537 arizona_irq_exit(arizona);
d347792c
CK		 1538err_pm:
1539 pm_runtime_disable(arizona->dev);
3cc72986 1540err_reset:
2229875d 1541 arizona_enable_reset(arizona);
59db9691 1542 regulator_disable(arizona->dcvdd);
3cc72986 1543err_enable:
3a36a0db 1544 regulator_bulk_disable(arizona->num_core_supplies,
3cc72986 1545 arizona->core_supplies);
e6021511
CK		 1546err_dcvdd:
1547 regulator_put(arizona->dcvdd);
3cc72986
MB		 1548err_early:
1549 mfd_remove_devices(dev);
1550 return ret;
1551}
1552EXPORT_SYMBOL_GPL(arizona_dev_init);
1553
4740f73f 1554int arizona_dev_exit(struct arizona *arizona)
3cc72986 1555{
fb36f77e 1556 disable_irq(arizona->irq);
b804020a
CK		 1557 pm_runtime_disable(arizona->dev);
1558
df6b3352 1559 regulator_disable(arizona->dcvdd);
e6021511 1560 regulator_put(arizona->dcvdd);
df6b3352 1561
3cc72986
MB		 1562 mfd_remove_devices(arizona->dev);
1563 arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona);
1564 arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona);
1565 arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona);
3cc72986 1566 arizona_irq_exit(arizona);
2229875d 1567 arizona_enable_reset(arizona);
df6b3352 1568
4420286e 1569 regulator_bulk_disable(arizona->num_core_supplies,
1d017b6b 1570 arizona->core_supplies);
3cc72986
MB		 1571 return 0;
1572}
1573EXPORT_SYMBOL_GPL(arizona_dev_exit);
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