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Commit | Line | Data |
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3cc72986 MB |
1 | /* |
2 | * Arizona core driver | |
3 | * | |
4 | * Copyright 2012 Wolfson Microelectronics plc | |
5 | * | |
6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/delay.h> | |
59db9691 | 14 | #include <linux/err.h> |
3cc72986 MB |
15 | #include <linux/gpio.h> |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/mfd/core.h> | |
18 | #include <linux/module.h> | |
19 | #include <linux/pm_runtime.h> | |
20 | #include <linux/regmap.h> | |
21 | #include <linux/regulator/consumer.h> | |
22 | #include <linux/slab.h> | |
23 | ||
24 | #include <linux/mfd/arizona/core.h> | |
25 | #include <linux/mfd/arizona/registers.h> | |
26 | ||
27 | #include "arizona.h" | |
28 | ||
29 | static const char *wm5102_core_supplies[] = { | |
30 | "AVDD", | |
31 | "DBVDD1", | |
3cc72986 MB |
32 | }; |
33 | ||
34 | int arizona_clk32k_enable(struct arizona *arizona) | |
35 | { | |
36 | int ret = 0; | |
37 | ||
38 | mutex_lock(&arizona->clk_lock); | |
39 | ||
40 | arizona->clk32k_ref++; | |
41 | ||
42 | if (arizona->clk32k_ref == 1) | |
43 | ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, | |
44 | ARIZONA_CLK_32K_ENA, | |
45 | ARIZONA_CLK_32K_ENA); | |
46 | ||
47 | if (ret != 0) | |
48 | arizona->clk32k_ref--; | |
49 | ||
50 | mutex_unlock(&arizona->clk_lock); | |
51 | ||
52 | return ret; | |
53 | } | |
54 | EXPORT_SYMBOL_GPL(arizona_clk32k_enable); | |
55 | ||
56 | int arizona_clk32k_disable(struct arizona *arizona) | |
57 | { | |
58 | int ret = 0; | |
59 | ||
60 | mutex_lock(&arizona->clk_lock); | |
61 | ||
62 | BUG_ON(arizona->clk32k_ref <= 0); | |
63 | ||
64 | arizona->clk32k_ref--; | |
65 | ||
66 | if (arizona->clk32k_ref == 0) | |
67 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, | |
68 | ARIZONA_CLK_32K_ENA, 0); | |
69 | ||
70 | mutex_unlock(&arizona->clk_lock); | |
71 | ||
72 | return ret; | |
73 | } | |
74 | EXPORT_SYMBOL_GPL(arizona_clk32k_disable); | |
75 | ||
76 | static irqreturn_t arizona_clkgen_err(int irq, void *data) | |
77 | { | |
78 | struct arizona *arizona = data; | |
79 | ||
80 | dev_err(arizona->dev, "CLKGEN error\n"); | |
81 | ||
82 | return IRQ_HANDLED; | |
83 | } | |
84 | ||
85 | static irqreturn_t arizona_underclocked(int irq, void *data) | |
86 | { | |
87 | struct arizona *arizona = data; | |
88 | unsigned int val; | |
89 | int ret; | |
90 | ||
91 | ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8, | |
92 | &val); | |
93 | if (ret != 0) { | |
94 | dev_err(arizona->dev, "Failed to read underclock status: %d\n", | |
95 | ret); | |
96 | return IRQ_NONE; | |
97 | } | |
98 | ||
99 | if (val & ARIZONA_AIF3_UNDERCLOCKED_STS) | |
100 | dev_err(arizona->dev, "AIF3 underclocked\n"); | |
101 | if (val & ARIZONA_AIF3_UNDERCLOCKED_STS) | |
102 | dev_err(arizona->dev, "AIF3 underclocked\n"); | |
103 | if (val & ARIZONA_AIF2_UNDERCLOCKED_STS) | |
104 | dev_err(arizona->dev, "AIF1 underclocked\n"); | |
105 | if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS) | |
106 | dev_err(arizona->dev, "ISRC2 underclocked\n"); | |
107 | if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS) | |
108 | dev_err(arizona->dev, "ISRC1 underclocked\n"); | |
109 | if (val & ARIZONA_FX_UNDERCLOCKED_STS) | |
110 | dev_err(arizona->dev, "FX underclocked\n"); | |
111 | if (val & ARIZONA_ASRC_UNDERCLOCKED_STS) | |
112 | dev_err(arizona->dev, "ASRC underclocked\n"); | |
113 | if (val & ARIZONA_DAC_UNDERCLOCKED_STS) | |
114 | dev_err(arizona->dev, "DAC underclocked\n"); | |
115 | if (val & ARIZONA_ADC_UNDERCLOCKED_STS) | |
116 | dev_err(arizona->dev, "ADC underclocked\n"); | |
117 | if (val & ARIZONA_MIXER_UNDERCLOCKED_STS) | |
118 | dev_err(arizona->dev, "Mixer underclocked\n"); | |
119 | ||
120 | return IRQ_HANDLED; | |
121 | } | |
122 | ||
123 | static irqreturn_t arizona_overclocked(int irq, void *data) | |
124 | { | |
125 | struct arizona *arizona = data; | |
126 | unsigned int val[2]; | |
127 | int ret; | |
128 | ||
129 | ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6, | |
130 | &val[0], 2); | |
131 | if (ret != 0) { | |
132 | dev_err(arizona->dev, "Failed to read overclock status: %d\n", | |
133 | ret); | |
134 | return IRQ_NONE; | |
135 | } | |
136 | ||
137 | if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS) | |
138 | dev_err(arizona->dev, "PWM overclocked\n"); | |
139 | if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS) | |
140 | dev_err(arizona->dev, "FX core overclocked\n"); | |
141 | if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS) | |
142 | dev_err(arizona->dev, "DAC SYS overclocked\n"); | |
143 | if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS) | |
144 | dev_err(arizona->dev, "DAC WARP overclocked\n"); | |
145 | if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS) | |
146 | dev_err(arizona->dev, "ADC overclocked\n"); | |
147 | if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS) | |
148 | dev_err(arizona->dev, "Mixer overclocked\n"); | |
149 | if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS) | |
150 | dev_err(arizona->dev, "AIF3 overclocked\n"); | |
151 | if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS) | |
152 | dev_err(arizona->dev, "AIF2 overclocked\n"); | |
153 | if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS) | |
154 | dev_err(arizona->dev, "AIF1 overclocked\n"); | |
155 | if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS) | |
156 | dev_err(arizona->dev, "Pad control overclocked\n"); | |
157 | ||
158 | if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS) | |
159 | dev_err(arizona->dev, "Slimbus subsystem overclocked\n"); | |
160 | if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS) | |
161 | dev_err(arizona->dev, "Slimbus async overclocked\n"); | |
162 | if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS) | |
163 | dev_err(arizona->dev, "Slimbus sync overclocked\n"); | |
164 | if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS) | |
165 | dev_err(arizona->dev, "ASRC async system overclocked\n"); | |
166 | if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS) | |
167 | dev_err(arizona->dev, "ASRC async WARP overclocked\n"); | |
168 | if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS) | |
169 | dev_err(arizona->dev, "ASRC sync system overclocked\n"); | |
170 | if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS) | |
171 | dev_err(arizona->dev, "ASRC sync WARP overclocked\n"); | |
172 | if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS) | |
173 | dev_err(arizona->dev, "DSP1 overclocked\n"); | |
174 | if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS) | |
175 | dev_err(arizona->dev, "ISRC2 overclocked\n"); | |
176 | if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS) | |
177 | dev_err(arizona->dev, "ISRC1 overclocked\n"); | |
178 | ||
179 | return IRQ_HANDLED; | |
180 | } | |
181 | ||
182 | static int arizona_wait_for_boot(struct arizona *arizona) | |
183 | { | |
184 | unsigned int reg; | |
185 | int ret, i; | |
186 | ||
187 | /* | |
188 | * We can't use an interrupt as we need to runtime resume to do so, | |
189 | * we won't race with the interrupt handler as it'll be blocked on | |
190 | * runtime resume. | |
191 | */ | |
192 | for (i = 0; i < 5; i++) { | |
193 | msleep(1); | |
194 | ||
195 | ret = regmap_read(arizona->regmap, | |
196 | ARIZONA_INTERRUPT_RAW_STATUS_5, ®); | |
197 | if (ret != 0) { | |
198 | dev_err(arizona->dev, "Failed to read boot state: %d\n", | |
199 | ret); | |
cfe775ce | 200 | continue; |
3cc72986 MB |
201 | } |
202 | ||
203 | if (reg & ARIZONA_BOOT_DONE_STS) | |
204 | break; | |
205 | } | |
206 | ||
207 | if (reg & ARIZONA_BOOT_DONE_STS) { | |
208 | regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5, | |
209 | ARIZONA_BOOT_DONE_STS); | |
210 | } else { | |
211 | dev_err(arizona->dev, "Device boot timed out: %x\n", reg); | |
212 | return -ETIMEDOUT; | |
213 | } | |
214 | ||
215 | pm_runtime_mark_last_busy(arizona->dev); | |
216 | ||
217 | return 0; | |
218 | } | |
219 | ||
220 | #ifdef CONFIG_PM_RUNTIME | |
221 | static int arizona_runtime_resume(struct device *dev) | |
222 | { | |
223 | struct arizona *arizona = dev_get_drvdata(dev); | |
224 | int ret; | |
225 | ||
508c8299 MB |
226 | dev_dbg(arizona->dev, "Leaving AoD mode\n"); |
227 | ||
59db9691 MB |
228 | ret = regulator_enable(arizona->dcvdd); |
229 | if (ret != 0) { | |
230 | dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret); | |
231 | return ret; | |
232 | } | |
3cc72986 MB |
233 | |
234 | regcache_cache_only(arizona->regmap, false); | |
235 | ||
236 | ret = arizona_wait_for_boot(arizona); | |
5879f571 MB |
237 | if (ret != 0) { |
238 | regulator_disable(arizona->dcvdd); | |
3cc72986 | 239 | return ret; |
5879f571 | 240 | } |
3cc72986 MB |
241 | |
242 | regcache_sync(arizona->regmap); | |
243 | ||
244 | return 0; | |
245 | } | |
246 | ||
247 | static int arizona_runtime_suspend(struct device *dev) | |
248 | { | |
249 | struct arizona *arizona = dev_get_drvdata(dev); | |
250 | ||
508c8299 MB |
251 | dev_dbg(arizona->dev, "Entering AoD mode\n"); |
252 | ||
59db9691 MB |
253 | regulator_disable(arizona->dcvdd); |
254 | regcache_cache_only(arizona->regmap, true); | |
255 | regcache_mark_dirty(arizona->regmap); | |
3cc72986 MB |
256 | |
257 | return 0; | |
258 | } | |
259 | #endif | |
260 | ||
261 | const struct dev_pm_ops arizona_pm_ops = { | |
262 | SET_RUNTIME_PM_OPS(arizona_runtime_suspend, | |
263 | arizona_runtime_resume, | |
264 | NULL) | |
265 | }; | |
266 | EXPORT_SYMBOL_GPL(arizona_pm_ops); | |
267 | ||
268 | static struct mfd_cell early_devs[] = { | |
269 | { .name = "arizona-ldo1" }, | |
270 | }; | |
271 | ||
272 | static struct mfd_cell wm5102_devs[] = { | |
273 | { .name = "arizona-extcon" }, | |
274 | { .name = "arizona-gpio" }, | |
b2e2558e | 275 | { .name = "arizona-haptics" }, |
3cc72986 MB |
276 | { .name = "arizona-micsupp" }, |
277 | { .name = "arizona-pwm" }, | |
278 | { .name = "wm5102-codec" }, | |
279 | }; | |
280 | ||
e102befe MB |
281 | static struct mfd_cell wm5110_devs[] = { |
282 | { .name = "arizona-extcon" }, | |
283 | { .name = "arizona-gpio" }, | |
b2e2558e | 284 | { .name = "arizona-haptics" }, |
e102befe MB |
285 | { .name = "arizona-micsupp" }, |
286 | { .name = "arizona-pwm" }, | |
287 | { .name = "wm5110-codec" }, | |
288 | }; | |
289 | ||
3cc72986 MB |
290 | int __devinit arizona_dev_init(struct arizona *arizona) |
291 | { | |
292 | struct device *dev = arizona->dev; | |
293 | const char *type_name; | |
294 | unsigned int reg, val; | |
295 | int ret, i; | |
296 | ||
297 | dev_set_drvdata(arizona->dev, arizona); | |
298 | mutex_init(&arizona->clk_lock); | |
299 | ||
300 | if (dev_get_platdata(arizona->dev)) | |
301 | memcpy(&arizona->pdata, dev_get_platdata(arizona->dev), | |
302 | sizeof(arizona->pdata)); | |
303 | ||
304 | regcache_cache_only(arizona->regmap, true); | |
305 | ||
306 | switch (arizona->type) { | |
307 | case WM5102: | |
e102befe | 308 | case WM5110: |
3cc72986 MB |
309 | for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++) |
310 | arizona->core_supplies[i].supply | |
311 | = wm5102_core_supplies[i]; | |
312 | arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies); | |
313 | break; | |
314 | default: | |
315 | dev_err(arizona->dev, "Unknown device type %d\n", | |
316 | arizona->type); | |
317 | return -EINVAL; | |
318 | } | |
319 | ||
320 | ret = mfd_add_devices(arizona->dev, -1, early_devs, | |
0848c94f | 321 | ARRAY_SIZE(early_devs), NULL, 0, NULL); |
3cc72986 MB |
322 | if (ret != 0) { |
323 | dev_err(dev, "Failed to add early children: %d\n", ret); | |
324 | return ret; | |
325 | } | |
326 | ||
327 | ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies, | |
328 | arizona->core_supplies); | |
329 | if (ret != 0) { | |
330 | dev_err(dev, "Failed to request core supplies: %d\n", | |
331 | ret); | |
332 | goto err_early; | |
333 | } | |
334 | ||
59db9691 MB |
335 | arizona->dcvdd = devm_regulator_get(arizona->dev, "DCVDD"); |
336 | if (IS_ERR(arizona->dcvdd)) { | |
337 | ret = PTR_ERR(arizona->dcvdd); | |
338 | dev_err(dev, "Failed to request DCVDD: %d\n", ret); | |
339 | goto err_early; | |
340 | } | |
341 | ||
3cc72986 MB |
342 | ret = regulator_bulk_enable(arizona->num_core_supplies, |
343 | arizona->core_supplies); | |
344 | if (ret != 0) { | |
345 | dev_err(dev, "Failed to enable core supplies: %d\n", | |
346 | ret); | |
347 | goto err_early; | |
348 | } | |
349 | ||
59db9691 MB |
350 | ret = regulator_enable(arizona->dcvdd); |
351 | if (ret != 0) { | |
352 | dev_err(dev, "Failed to enable DCVDD: %d\n", ret); | |
353 | goto err_enable; | |
354 | } | |
355 | ||
3cc72986 MB |
356 | if (arizona->pdata.reset) { |
357 | /* Start out with /RESET low to put the chip into reset */ | |
358 | ret = gpio_request_one(arizona->pdata.reset, | |
359 | GPIOF_DIR_OUT | GPIOF_INIT_LOW, | |
360 | "arizona /RESET"); | |
361 | if (ret != 0) { | |
362 | dev_err(dev, "Failed to request /RESET: %d\n", ret); | |
59db9691 | 363 | goto err_dcvdd; |
3cc72986 MB |
364 | } |
365 | ||
366 | gpio_set_value_cansleep(arizona->pdata.reset, 1); | |
367 | } | |
368 | ||
3cc72986 MB |
369 | regcache_cache_only(arizona->regmap, false); |
370 | ||
371 | ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); | |
372 | if (ret != 0) { | |
373 | dev_err(dev, "Failed to read ID register: %d\n", ret); | |
59db9691 | 374 | goto err_reset; |
3cc72986 MB |
375 | } |
376 | ||
377 | ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION, | |
378 | &arizona->rev); | |
379 | if (ret != 0) { | |
380 | dev_err(dev, "Failed to read revision register: %d\n", ret); | |
59db9691 | 381 | goto err_reset; |
3cc72986 MB |
382 | } |
383 | arizona->rev &= ARIZONA_DEVICE_REVISION_MASK; | |
384 | ||
385 | switch (reg) { | |
863df8d5 | 386 | #ifdef CONFIG_MFD_WM5102 |
3cc72986 MB |
387 | case 0x5102: |
388 | type_name = "WM5102"; | |
389 | if (arizona->type != WM5102) { | |
390 | dev_err(arizona->dev, "WM5102 registered as %d\n", | |
391 | arizona->type); | |
392 | arizona->type = WM5102; | |
393 | } | |
394 | ret = wm5102_patch(arizona); | |
395 | break; | |
e102befe MB |
396 | #endif |
397 | #ifdef CONFIG_MFD_WM5110 | |
398 | case 0x5110: | |
399 | type_name = "WM5110"; | |
400 | if (arizona->type != WM5110) { | |
401 | dev_err(arizona->dev, "WM5110 registered as %d\n", | |
402 | arizona->type); | |
403 | arizona->type = WM5110; | |
404 | } | |
405 | ret = wm5110_patch(arizona); | |
406 | break; | |
863df8d5 | 407 | #endif |
3cc72986 MB |
408 | default: |
409 | dev_err(arizona->dev, "Unknown device ID %x\n", reg); | |
59db9691 | 410 | goto err_reset; |
3cc72986 MB |
411 | } |
412 | ||
413 | dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A'); | |
414 | ||
415 | if (ret != 0) | |
416 | dev_err(arizona->dev, "Failed to apply patch: %d\n", ret); | |
417 | ||
418 | /* If we have a /RESET GPIO we'll already be reset */ | |
419 | if (!arizona->pdata.reset) { | |
420 | ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0); | |
421 | if (ret != 0) { | |
422 | dev_err(dev, "Failed to reset device: %d\n", ret); | |
59db9691 | 423 | goto err_reset; |
3cc72986 MB |
424 | } |
425 | } | |
426 | ||
af65a361 MB |
427 | ret = arizona_wait_for_boot(arizona); |
428 | if (ret != 0) { | |
429 | dev_err(arizona->dev, "Device failed initial boot: %d\n", ret); | |
430 | goto err_reset; | |
431 | } | |
3cc72986 MB |
432 | |
433 | for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) { | |
434 | if (!arizona->pdata.gpio_defaults[i]) | |
435 | continue; | |
436 | ||
437 | regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i, | |
438 | arizona->pdata.gpio_defaults[i]); | |
439 | } | |
440 | ||
441 | pm_runtime_set_autosuspend_delay(arizona->dev, 100); | |
442 | pm_runtime_use_autosuspend(arizona->dev); | |
443 | pm_runtime_enable(arizona->dev); | |
444 | ||
445 | /* Chip default */ | |
446 | if (!arizona->pdata.clk32k_src) | |
447 | arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2; | |
448 | ||
449 | switch (arizona->pdata.clk32k_src) { | |
450 | case ARIZONA_32KZ_MCLK1: | |
451 | case ARIZONA_32KZ_MCLK2: | |
452 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, | |
453 | ARIZONA_CLK_32K_SRC_MASK, | |
454 | arizona->pdata.clk32k_src - 1); | |
455 | break; | |
456 | case ARIZONA_32KZ_NONE: | |
457 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, | |
458 | ARIZONA_CLK_32K_SRC_MASK, 2); | |
459 | break; | |
460 | default: | |
461 | dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n", | |
462 | arizona->pdata.clk32k_src); | |
463 | ret = -EINVAL; | |
59db9691 | 464 | goto err_reset; |
3cc72986 MB |
465 | } |
466 | ||
467 | for (i = 0; i < ARIZONA_MAX_INPUT; i++) { | |
468 | /* Default for both is 0 so noop with defaults */ | |
469 | val = arizona->pdata.dmic_ref[i] | |
470 | << ARIZONA_IN1_DMIC_SUP_SHIFT; | |
471 | val |= arizona->pdata.inmode[i] << ARIZONA_IN1_MODE_SHIFT; | |
472 | ||
473 | regmap_update_bits(arizona->regmap, | |
474 | ARIZONA_IN1L_CONTROL + (i * 8), | |
475 | ARIZONA_IN1_DMIC_SUP_MASK | | |
476 | ARIZONA_IN1_MODE_MASK, val); | |
477 | } | |
478 | ||
479 | for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) { | |
480 | /* Default is 0 so noop with defaults */ | |
481 | if (arizona->pdata.out_mono[i]) | |
482 | val = ARIZONA_OUT1_MONO; | |
483 | else | |
484 | val = 0; | |
485 | ||
486 | regmap_update_bits(arizona->regmap, | |
487 | ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8), | |
488 | ARIZONA_OUT1_MONO, val); | |
489 | } | |
490 | ||
3cc72986 MB |
491 | for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) { |
492 | if (arizona->pdata.spk_mute[i]) | |
493 | regmap_update_bits(arizona->regmap, | |
2a51da04 | 494 | ARIZONA_PDM_SPK1_CTRL_1 + (i * 2), |
3cc72986 MB |
495 | ARIZONA_SPK1_MUTE_ENDIAN_MASK | |
496 | ARIZONA_SPK1_MUTE_SEQ1_MASK, | |
497 | arizona->pdata.spk_mute[i]); | |
498 | ||
499 | if (arizona->pdata.spk_fmt[i]) | |
500 | regmap_update_bits(arizona->regmap, | |
2a51da04 | 501 | ARIZONA_PDM_SPK1_CTRL_2 + (i * 2), |
3cc72986 MB |
502 | ARIZONA_SPK1_FMT_MASK, |
503 | arizona->pdata.spk_fmt[i]); | |
504 | } | |
505 | ||
506 | /* Set up for interrupts */ | |
507 | ret = arizona_irq_init(arizona); | |
508 | if (ret != 0) | |
59db9691 | 509 | goto err_reset; |
3cc72986 MB |
510 | |
511 | arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error", | |
512 | arizona_clkgen_err, arizona); | |
513 | arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked", | |
514 | arizona_overclocked, arizona); | |
515 | arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked", | |
516 | arizona_underclocked, arizona); | |
517 | ||
518 | switch (arizona->type) { | |
519 | case WM5102: | |
520 | ret = mfd_add_devices(arizona->dev, -1, wm5102_devs, | |
0848c94f | 521 | ARRAY_SIZE(wm5102_devs), NULL, 0, NULL); |
e102befe MB |
522 | break; |
523 | case WM5110: | |
524 | ret = mfd_add_devices(arizona->dev, -1, wm5110_devs, | |
0848c94f | 525 | ARRAY_SIZE(wm5102_devs), NULL, 0, NULL); |
3cc72986 MB |
526 | break; |
527 | } | |
528 | ||
529 | if (ret != 0) { | |
530 | dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret); | |
531 | goto err_irq; | |
532 | } | |
533 | ||
59db9691 MB |
534 | #ifdef CONFIG_PM_RUNTIME |
535 | regulator_disable(arizona->dcvdd); | |
536 | #endif | |
537 | ||
3cc72986 MB |
538 | return 0; |
539 | ||
540 | err_irq: | |
541 | arizona_irq_exit(arizona); | |
3cc72986 MB |
542 | err_reset: |
543 | if (arizona->pdata.reset) { | |
544 | gpio_set_value_cansleep(arizona->pdata.reset, 1); | |
545 | gpio_free(arizona->pdata.reset); | |
546 | } | |
59db9691 MB |
547 | err_dcvdd: |
548 | regulator_disable(arizona->dcvdd); | |
3cc72986 | 549 | err_enable: |
3a36a0db | 550 | regulator_bulk_disable(arizona->num_core_supplies, |
3cc72986 MB |
551 | arizona->core_supplies); |
552 | err_early: | |
553 | mfd_remove_devices(dev); | |
554 | return ret; | |
555 | } | |
556 | EXPORT_SYMBOL_GPL(arizona_dev_init); | |
557 | ||
558 | int __devexit arizona_dev_exit(struct arizona *arizona) | |
559 | { | |
560 | mfd_remove_devices(arizona->dev); | |
561 | arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona); | |
562 | arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona); | |
563 | arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona); | |
564 | pm_runtime_disable(arizona->dev); | |
565 | arizona_irq_exit(arizona); | |
566 | return 0; | |
567 | } | |
568 | EXPORT_SYMBOL_GPL(arizona_dev_exit); |