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mfd: arizona: Update DT bindings to add CS47L24 and WM1831
[mirror_ubuntu-hirsute-kernel.git] / drivers / mfd / arizona-core.c
CommitLineData
3cc72986
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1/*
2 * Arizona core driver
3 *
4 * Copyright 2012 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/delay.h>
59db9691 14#include <linux/err.h>
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15#include <linux/gpio.h>
16#include <linux/interrupt.h>
17#include <linux/mfd/core.h>
18#include <linux/module.h>
d781009c
MB
19#include <linux/of.h>
20#include <linux/of_device.h>
21#include <linux/of_gpio.h>
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22#include <linux/pm_runtime.h>
23#include <linux/regmap.h>
24#include <linux/regulator/consumer.h>
5927467d 25#include <linux/regulator/machine.h>
3cc72986 26#include <linux/slab.h>
ae05ea36 27#include <linux/platform_device.h>
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28
29#include <linux/mfd/arizona/core.h>
30#include <linux/mfd/arizona/registers.h>
31
32#include "arizona.h"
33
3762aede 34static const char * const wm5102_core_supplies[] = {
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35 "AVDD",
36 "DBVDD1",
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MB
37};
38
39int arizona_clk32k_enable(struct arizona *arizona)
40{
41 int ret = 0;
42
43 mutex_lock(&arizona->clk_lock);
44
45 arizona->clk32k_ref++;
46
247fa192
MB
47 if (arizona->clk32k_ref == 1) {
48 switch (arizona->pdata.clk32k_src) {
49 case ARIZONA_32KZ_MCLK1:
50 ret = pm_runtime_get_sync(arizona->dev);
51 if (ret != 0)
52 goto out;
53 break;
54 }
55
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56 ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
57 ARIZONA_CLK_32K_ENA,
58 ARIZONA_CLK_32K_ENA);
247fa192 59 }
3cc72986 60
247fa192 61out:
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62 if (ret != 0)
63 arizona->clk32k_ref--;
64
65 mutex_unlock(&arizona->clk_lock);
66
67 return ret;
68}
69EXPORT_SYMBOL_GPL(arizona_clk32k_enable);
70
71int arizona_clk32k_disable(struct arizona *arizona)
72{
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73 mutex_lock(&arizona->clk_lock);
74
75 BUG_ON(arizona->clk32k_ref <= 0);
76
77 arizona->clk32k_ref--;
78
247fa192 79 if (arizona->clk32k_ref == 0) {
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80 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
81 ARIZONA_CLK_32K_ENA, 0);
82
247fa192
MB
83 switch (arizona->pdata.clk32k_src) {
84 case ARIZONA_32KZ_MCLK1:
85 pm_runtime_put_sync(arizona->dev);
86 break;
87 }
88 }
89
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90 mutex_unlock(&arizona->clk_lock);
91
a260fba1 92 return 0;
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93}
94EXPORT_SYMBOL_GPL(arizona_clk32k_disable);
95
96static irqreturn_t arizona_clkgen_err(int irq, void *data)
97{
98 struct arizona *arizona = data;
99
100 dev_err(arizona->dev, "CLKGEN error\n");
101
102 return IRQ_HANDLED;
103}
104
105static irqreturn_t arizona_underclocked(int irq, void *data)
106{
107 struct arizona *arizona = data;
108 unsigned int val;
109 int ret;
110
111 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8,
112 &val);
113 if (ret != 0) {
114 dev_err(arizona->dev, "Failed to read underclock status: %d\n",
115 ret);
116 return IRQ_NONE;
117 }
118
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119 if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
120 dev_err(arizona->dev, "AIF3 underclocked\n");
121 if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
3ebef34d
CK
122 dev_err(arizona->dev, "AIF2 underclocked\n");
123 if (val & ARIZONA_AIF1_UNDERCLOCKED_STS)
3cc72986 124 dev_err(arizona->dev, "AIF1 underclocked\n");
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CK
125 if (val & ARIZONA_ISRC3_UNDERCLOCKED_STS)
126 dev_err(arizona->dev, "ISRC3 underclocked\n");
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127 if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
128 dev_err(arizona->dev, "ISRC2 underclocked\n");
129 if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS)
130 dev_err(arizona->dev, "ISRC1 underclocked\n");
131 if (val & ARIZONA_FX_UNDERCLOCKED_STS)
132 dev_err(arizona->dev, "FX underclocked\n");
133 if (val & ARIZONA_ASRC_UNDERCLOCKED_STS)
134 dev_err(arizona->dev, "ASRC underclocked\n");
135 if (val & ARIZONA_DAC_UNDERCLOCKED_STS)
136 dev_err(arizona->dev, "DAC underclocked\n");
137 if (val & ARIZONA_ADC_UNDERCLOCKED_STS)
138 dev_err(arizona->dev, "ADC underclocked\n");
139 if (val & ARIZONA_MIXER_UNDERCLOCKED_STS)
648a9880 140 dev_err(arizona->dev, "Mixer dropped sample\n");
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141
142 return IRQ_HANDLED;
143}
144
145static irqreturn_t arizona_overclocked(int irq, void *data)
146{
147 struct arizona *arizona = data;
6887b042 148 unsigned int val[3];
3cc72986 149 int ret;
3762aede 150
3cc72986 151 ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
6887b042 152 &val[0], 3);
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153 if (ret != 0) {
154 dev_err(arizona->dev, "Failed to read overclock status: %d\n",
155 ret);
156 return IRQ_NONE;
157 }
158
6887b042
RF
159 switch (arizona->type) {
160 case WM8998:
161 case WM1814:
162 /* Some bits are shifted on WM8998,
163 * rearrange to match the standard bit layout
164 */
165 val[0] = ((val[0] & 0x60e0) >> 1) |
166 ((val[0] & 0x1e00) >> 2) |
167 (val[0] & 0x000f);
168 break;
169 default:
170 break;
171 }
172
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173 if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
174 dev_err(arizona->dev, "PWM overclocked\n");
175 if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
176 dev_err(arizona->dev, "FX core overclocked\n");
177 if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
178 dev_err(arizona->dev, "DAC SYS overclocked\n");
179 if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
180 dev_err(arizona->dev, "DAC WARP overclocked\n");
181 if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
182 dev_err(arizona->dev, "ADC overclocked\n");
183 if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
184 dev_err(arizona->dev, "Mixer overclocked\n");
185 if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
186 dev_err(arizona->dev, "AIF3 overclocked\n");
187 if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
188 dev_err(arizona->dev, "AIF2 overclocked\n");
189 if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
190 dev_err(arizona->dev, "AIF1 overclocked\n");
191 if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
192 dev_err(arizona->dev, "Pad control overclocked\n");
193
194 if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
195 dev_err(arizona->dev, "Slimbus subsystem overclocked\n");
196 if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
197 dev_err(arizona->dev, "Slimbus async overclocked\n");
198 if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
199 dev_err(arizona->dev, "Slimbus sync overclocked\n");
200 if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
201 dev_err(arizona->dev, "ASRC async system overclocked\n");
202 if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
203 dev_err(arizona->dev, "ASRC async WARP overclocked\n");
204 if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
205 dev_err(arizona->dev, "ASRC sync system overclocked\n");
206 if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
207 dev_err(arizona->dev, "ASRC sync WARP overclocked\n");
208 if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
209 dev_err(arizona->dev, "DSP1 overclocked\n");
6e440d27
CK
210 if (val[1] & ARIZONA_ISRC3_OVERCLOCKED_STS)
211 dev_err(arizona->dev, "ISRC3 overclocked\n");
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212 if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
213 dev_err(arizona->dev, "ISRC2 overclocked\n");
214 if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
215 dev_err(arizona->dev, "ISRC1 overclocked\n");
216
6887b042
RF
217 if (val[2] & ARIZONA_SPDIF_OVERCLOCKED_STS)
218 dev_err(arizona->dev, "SPDIF overclocked\n");
219
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220 return IRQ_HANDLED;
221}
222
9d53dfdc
CK
223static int arizona_poll_reg(struct arizona *arizona,
224 int timeout, unsigned int reg,
225 unsigned int mask, unsigned int target)
3cc72986 226{
9d53dfdc 227 unsigned int val = 0;
3cc72986
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228 int ret, i;
229
9d53dfdc
CK
230 for (i = 0; i < timeout; i++) {
231 ret = regmap_read(arizona->regmap, reg, &val);
3cc72986 232 if (ret != 0) {
9d53dfdc
CK
233 dev_err(arizona->dev, "Failed to read reg %u: %d\n",
234 reg, ret);
cfe775ce 235 continue;
3cc72986
MB
236 }
237
9d53dfdc
CK
238 if ((val & mask) == target)
239 return 0;
240
241 msleep(1);
3cc72986
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242 }
243
9d53dfdc
CK
244 dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val);
245 return -ETIMEDOUT;
246}
247
248static int arizona_wait_for_boot(struct arizona *arizona)
249{
250 int ret;
251
252 /*
253 * We can't use an interrupt as we need to runtime resume to do so,
254 * we won't race with the interrupt handler as it'll be blocked on
255 * runtime resume.
256 */
257 ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5,
258 ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS);
259
260 if (!ret)
3cc72986
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261 regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
262 ARIZONA_BOOT_DONE_STS);
3cc72986
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263
264 pm_runtime_mark_last_busy(arizona->dev);
265
9d53dfdc 266 return ret;
3cc72986
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267}
268
2229875d
CK
269static inline void arizona_enable_reset(struct arizona *arizona)
270{
271 if (arizona->pdata.reset)
272 gpio_set_value_cansleep(arizona->pdata.reset, 0);
273}
274
275static void arizona_disable_reset(struct arizona *arizona)
276{
277 if (arizona->pdata.reset) {
121c075c
CK
278 switch (arizona->type) {
279 case WM5110:
280 case WM8280:
281 /* Meet requirements for minimum reset duration */
282 msleep(5);
283 break;
284 default:
285 break;
286 }
287
2229875d
CK
288 gpio_set_value_cansleep(arizona->pdata.reset, 1);
289 msleep(1);
290 }
291}
292
3850e3ee
CK
293struct arizona_sysclk_state {
294 unsigned int fll;
295 unsigned int sysclk;
296};
297
298static int arizona_enable_freerun_sysclk(struct arizona *arizona,
299 struct arizona_sysclk_state *state)
e80436bb 300{
e80436bb
CK
301 int ret, err;
302
e80436bb 303 /* Cache existing FLL and SYSCLK settings */
3850e3ee 304 ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &state->fll);
0be068a0 305 if (ret) {
e80436bb
CK
306 dev_err(arizona->dev, "Failed to cache FLL settings: %d\n",
307 ret);
308 return ret;
309 }
3850e3ee
CK
310 ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1,
311 &state->sysclk);
0be068a0 312 if (ret) {
e80436bb
CK
313 dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n",
314 ret);
315 return ret;
316 }
317
318 /* Start up SYSCLK using the FLL in free running mode */
319 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1,
320 ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN);
0be068a0 321 if (ret) {
e80436bb
CK
322 dev_err(arizona->dev,
323 "Failed to start FLL in freerunning mode: %d\n",
324 ret);
325 return ret;
326 }
327 ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5,
328 ARIZONA_FLL1_CLOCK_OK_STS,
329 ARIZONA_FLL1_CLOCK_OK_STS);
0be068a0 330 if (ret) {
e80436bb
CK
331 ret = -ETIMEDOUT;
332 goto err_fll;
333 }
334
335 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144);
0be068a0 336 if (ret) {
e80436bb
CK
337 dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret);
338 goto err_fll;
339 }
340
3850e3ee
CK
341 return 0;
342
343err_fll:
344 err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll);
345 if (err)
346 dev_err(arizona->dev,
347 "Failed to re-apply old FLL settings: %d\n", err);
348
349 return ret;
350}
351
352static int arizona_disable_freerun_sysclk(struct arizona *arizona,
353 struct arizona_sysclk_state *state)
354{
355 int ret;
356
357 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1,
358 state->sysclk);
359 if (ret) {
360 dev_err(arizona->dev,
361 "Failed to re-apply old SYSCLK settings: %d\n", ret);
362 return ret;
363 }
364
365 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll);
366 if (ret) {
367 dev_err(arizona->dev,
368 "Failed to re-apply old FLL settings: %d\n", ret);
369 return ret;
370 }
371
372 return 0;
373}
374
375static int wm5102_apply_hardware_patch(struct arizona *arizona)
376{
377 struct arizona_sysclk_state state;
378 int err, ret;
379
380 ret = arizona_enable_freerun_sysclk(arizona, &state);
381 if (ret)
382 return ret;
383
e80436bb
CK
384 /* Start the write sequencer and wait for it to finish */
385 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
0be068a0
CK
386 ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160);
387 if (ret) {
e80436bb
CK
388 dev_err(arizona->dev, "Failed to start write sequencer: %d\n",
389 ret);
3850e3ee 390 goto err;
e80436bb 391 }
3850e3ee 392
e80436bb
CK
393 ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1,
394 ARIZONA_WSEQ_BUSY, 0);
0be068a0 395 if (ret) {
e80436bb 396 regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
0be068a0 397 ARIZONA_WSEQ_ABORT);
e80436bb
CK
398 ret = -ETIMEDOUT;
399 }
400
3850e3ee
CK
401err:
402 err = arizona_disable_freerun_sysclk(arizona, &state);
e80436bb 403
0be068a0 404 return ret ?: err;
e80436bb
CK
405}
406
882bc468
CK
407/*
408 * Register patch to some of the CODECs internal write sequences
409 * to ensure a clean exit from the low power sleep state.
410 */
8019ff6c 411static const struct reg_sequence wm5110_sleep_patch[] = {
882bc468
CK
412 { 0x337A, 0xC100 },
413 { 0x337B, 0x0041 },
414 { 0x3300, 0xA210 },
415 { 0x3301, 0x050C },
416};
417
418static int wm5110_apply_sleep_patch(struct arizona *arizona)
419{
420 struct arizona_sysclk_state state;
421 int err, ret;
422
423 ret = arizona_enable_freerun_sysclk(arizona, &state);
424 if (ret)
425 return ret;
426
427 ret = regmap_multi_reg_write_bypassed(arizona->regmap,
428 wm5110_sleep_patch,
429 ARRAY_SIZE(wm5110_sleep_patch));
430
431 err = arizona_disable_freerun_sysclk(arizona, &state);
432
433 return ret ?: err;
434}
435
1c1c6bba
CK
436static int wm5102_clear_write_sequencer(struct arizona *arizona)
437{
438 int ret;
439
440 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_3,
441 0x0);
442 if (ret) {
443 dev_err(arizona->dev,
444 "Failed to clear write sequencer state: %d\n", ret);
445 return ret;
446 }
447
448 arizona_enable_reset(arizona);
449 regulator_disable(arizona->dcvdd);
450
451 msleep(20);
452
453 ret = regulator_enable(arizona->dcvdd);
454 if (ret) {
455 dev_err(arizona->dev, "Failed to re-enable DCVDD: %d\n", ret);
456 return ret;
457 }
458 arizona_disable_reset(arizona);
459
460 return 0;
461}
462
48bb9fe4 463#ifdef CONFIG_PM
e7811147
RF
464static int arizona_isolate_dcvdd(struct arizona *arizona)
465{
466 int ret;
467
468 ret = regmap_update_bits(arizona->regmap,
469 ARIZONA_ISOLATION_CONTROL,
470 ARIZONA_ISOLATE_DCVDD1,
471 ARIZONA_ISOLATE_DCVDD1);
472 if (ret != 0)
473 dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n", ret);
474
475 return ret;
476}
477
478static int arizona_connect_dcvdd(struct arizona *arizona)
479{
480 int ret;
481
482 ret = regmap_update_bits(arizona->regmap,
483 ARIZONA_ISOLATION_CONTROL,
484 ARIZONA_ISOLATE_DCVDD1, 0);
485 if (ret != 0)
486 dev_err(arizona->dev, "Failed to connect DCVDD: %d\n", ret);
487
488 return ret;
489}
490
e3424273
RF
491static int arizona_is_jack_det_active(struct arizona *arizona)
492{
493 unsigned int val;
494 int ret;
495
496 ret = regmap_read(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, &val);
497 if (ret) {
498 dev_err(arizona->dev,
499 "Failed to check jack det status: %d\n", ret);
500 return ret;
501 } else if (val & ARIZONA_JD1_ENA) {
502 return 1;
503 } else {
504 return 0;
505 }
506}
507
3cc72986
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508static int arizona_runtime_resume(struct device *dev)
509{
510 struct arizona *arizona = dev_get_drvdata(dev);
511 int ret;
512
508c8299
MB
513 dev_dbg(arizona->dev, "Leaving AoD mode\n");
514
e6cb7341
CK
515 if (arizona->has_fully_powered_off) {
516 dev_dbg(arizona->dev, "Re-enabling core supplies\n");
517
518 ret = regulator_bulk_enable(arizona->num_core_supplies,
519 arizona->core_supplies);
520 if (ret) {
521 dev_err(dev, "Failed to enable core supplies: %d\n",
522 ret);
523 return ret;
524 }
525 }
526
59db9691
MB
527 ret = regulator_enable(arizona->dcvdd);
528 if (ret != 0) {
529 dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret);
e6cb7341
CK
530 if (arizona->has_fully_powered_off)
531 regulator_bulk_disable(arizona->num_core_supplies,
532 arizona->core_supplies);
59db9691
MB
533 return ret;
534 }
3cc72986 535
e6cb7341
CK
536 if (arizona->has_fully_powered_off) {
537 arizona_disable_reset(arizona);
538 enable_irq(arizona->irq);
539 arizona->has_fully_powered_off = false;
540 }
541
3cc72986
MB
542 regcache_cache_only(arizona->regmap, false);
543
4c9bb8bc
CK
544 switch (arizona->type) {
545 case WM5102:
5927467d 546 if (arizona->external_dcvdd) {
e7811147
RF
547 ret = arizona_connect_dcvdd(arizona);
548 if (ret != 0)
5927467d 549 goto err;
5927467d
MB
550 }
551
4c9bb8bc
CK
552 ret = wm5102_patch(arizona);
553 if (ret != 0) {
554 dev_err(arizona->dev, "Failed to apply patch: %d\n",
555 ret);
556 goto err;
557 }
e80436bb 558
0be068a0
CK
559 ret = wm5102_apply_hardware_patch(arizona);
560 if (ret) {
e80436bb
CK
561 dev_err(arizona->dev,
562 "Failed to apply hardware patch: %d\n",
563 ret);
564 goto err;
565 }
566 break;
96129a0e
CK
567 case WM5110:
568 case WM8280:
569 ret = arizona_wait_for_boot(arizona);
570 if (ret)
571 goto err;
572
573 if (arizona->external_dcvdd) {
e7811147
RF
574 ret = arizona_connect_dcvdd(arizona);
575 if (ret != 0)
96129a0e 576 goto err;
96129a0e
CK
577 } else {
578 /*
579 * As this is only called for the internal regulator
580 * (where we know voltage ranges available) it is ok
581 * to request an exact range.
582 */
583 ret = regulator_set_voltage(arizona->dcvdd,
584 1200000, 1200000);
585 if (ret < 0) {
586 dev_err(arizona->dev,
587 "Failed to set resume voltage: %d\n",
588 ret);
589 goto err;
590 }
591 }
e6cb7341
CK
592
593 ret = wm5110_apply_sleep_patch(arizona);
594 if (ret) {
595 dev_err(arizona->dev,
596 "Failed to re-apply sleep patch: %d\n",
597 ret);
598 goto err;
599 }
96129a0e 600 break;
e80436bb 601 default:
12bb68ed 602 ret = arizona_wait_for_boot(arizona);
3762aede 603 if (ret != 0)
12bb68ed 604 goto err;
12bb68ed 605
5927467d 606 if (arizona->external_dcvdd) {
e7811147
RF
607 ret = arizona_connect_dcvdd(arizona);
608 if (ret != 0)
5927467d 609 goto err;
5927467d 610 }
e80436bb 611 break;
4c9bb8bc
CK
612 }
613
9270bdf5
MB
614 ret = regcache_sync(arizona->regmap);
615 if (ret != 0) {
616 dev_err(arizona->dev, "Failed to restore register cache\n");
4816bd1c 617 goto err;
9270bdf5 618 }
3cc72986
MB
619
620 return 0;
4816bd1c
MB
621
622err:
623 regcache_cache_only(arizona->regmap, true);
624 regulator_disable(arizona->dcvdd);
625 return ret;
3cc72986
MB
626}
627
628static int arizona_runtime_suspend(struct device *dev)
629{
630 struct arizona *arizona = dev_get_drvdata(dev);
a05950a4 631 int jd_active = 0;
5927467d 632 int ret;
3cc72986 633
508c8299
MB
634 dev_dbg(arizona->dev, "Entering AoD mode\n");
635
e6cb7341
CK
636 switch (arizona->type) {
637 case WM5110:
638 case WM8280:
e3424273
RF
639 jd_active = arizona_is_jack_det_active(arizona);
640 if (jd_active < 0)
641 return jd_active;
642
e7811147
RF
643 if (arizona->external_dcvdd) {
644 ret = arizona_isolate_dcvdd(arizona);
645 if (ret != 0)
646 return ret;
647 } else {
648 /*
649 * As this is only called for the internal regulator
650 * (where we know voltage ranges available) it is ok
651 * to request an exact range.
652 */
653 ret = regulator_set_voltage(arizona->dcvdd,
654 1175000, 1175000);
655 if (ret < 0) {
656 dev_err(arizona->dev,
657 "Failed to set suspend voltage: %d\n",
658 ret);
659 return ret;
660 }
e6cb7341
CK
661 }
662 break;
663 case WM5102:
e3424273
RF
664 jd_active = arizona_is_jack_det_active(arizona);
665 if (jd_active < 0)
666 return jd_active;
667
e7811147
RF
668 if (arizona->external_dcvdd) {
669 ret = arizona_isolate_dcvdd(arizona);
670 if (ret != 0)
671 return ret;
672 }
673
e3424273 674 if (!jd_active) {
e6cb7341
CK
675 ret = regmap_write(arizona->regmap,
676 ARIZONA_WRITE_SEQUENCER_CTRL_3, 0x0);
677 if (ret) {
96129a0e 678 dev_err(arizona->dev,
e6cb7341 679 "Failed to clear write sequencer: %d\n",
96129a0e
CK
680 ret);
681 return ret;
682 }
96129a0e 683 }
e6cb7341
CK
684 break;
685 default:
e3424273
RF
686 jd_active = arizona_is_jack_det_active(arizona);
687 if (jd_active < 0)
688 return jd_active;
689
e7811147
RF
690 if (arizona->external_dcvdd) {
691 ret = arizona_isolate_dcvdd(arizona);
692 if (ret != 0)
693 return ret;
694 }
e6cb7341 695 break;
5927467d
MB
696 }
697
59db9691
MB
698 regcache_cache_only(arizona->regmap, true);
699 regcache_mark_dirty(arizona->regmap);
e293e847 700 regulator_disable(arizona->dcvdd);
3cc72986 701
e6cb7341 702 /* Allow us to completely power down if no jack detection */
e3424273 703 if (!jd_active) {
e6cb7341
CK
704 dev_dbg(arizona->dev, "Fully powering off\n");
705
706 arizona->has_fully_powered_off = true;
707
11150929 708 disable_irq_nosync(arizona->irq);
e6cb7341
CK
709 arizona_enable_reset(arizona);
710 regulator_bulk_disable(arizona->num_core_supplies,
711 arizona->core_supplies);
712 }
713
3cc72986
MB
714 return 0;
715}
716#endif
717
dc781d0e 718#ifdef CONFIG_PM_SLEEP
67c99296
MB
719static int arizona_suspend(struct device *dev)
720{
721 struct arizona *arizona = dev_get_drvdata(dev);
722
723 dev_dbg(arizona->dev, "Suspend, disabling IRQ\n");
724 disable_irq(arizona->irq);
725
726 return 0;
727}
728
729static int arizona_suspend_late(struct device *dev)
730{
731 struct arizona *arizona = dev_get_drvdata(dev);
732
733 dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n");
734 enable_irq(arizona->irq);
735
736 return 0;
737}
738
dc781d0e
MB
739static int arizona_resume_noirq(struct device *dev)
740{
741 struct arizona *arizona = dev_get_drvdata(dev);
742
743 dev_dbg(arizona->dev, "Early resume, disabling IRQ\n");
744 disable_irq(arizona->irq);
745
746 return 0;
747}
748
749static int arizona_resume(struct device *dev)
750{
751 struct arizona *arizona = dev_get_drvdata(dev);
752
753 dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n");
754 enable_irq(arizona->irq);
755
756 return 0;
757}
758#endif
759
3cc72986
MB
760const struct dev_pm_ops arizona_pm_ops = {
761 SET_RUNTIME_PM_OPS(arizona_runtime_suspend,
762 arizona_runtime_resume,
763 NULL)
67c99296 764 SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume)
dc781d0e 765#ifdef CONFIG_PM_SLEEP
67c99296 766 .suspend_late = arizona_suspend_late,
dc781d0e
MB
767 .resume_noirq = arizona_resume_noirq,
768#endif
3cc72986
MB
769};
770EXPORT_SYMBOL_GPL(arizona_pm_ops);
771
d781009c 772#ifdef CONFIG_OF
942786e6 773unsigned long arizona_of_get_type(struct device *dev)
d781009c
MB
774{
775 const struct of_device_id *id = of_match_device(arizona_of_match, dev);
776
777 if (id)
942786e6 778 return (unsigned long)id->data;
d781009c
MB
779 else
780 return 0;
781}
782EXPORT_SYMBOL_GPL(arizona_of_get_type);
783
e4fcb1d6
CK
784int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop,
785 bool mandatory)
786{
787 int gpio;
788
789 gpio = of_get_named_gpio(arizona->dev->of_node, prop, 0);
790 if (gpio < 0) {
791 if (mandatory)
792 dev_err(arizona->dev,
793 "Mandatory DT gpio %s missing/malformed: %d\n",
794 prop, gpio);
795
796 gpio = 0;
797 }
798
799 return gpio;
800}
801EXPORT_SYMBOL_GPL(arizona_of_get_named_gpio);
802
d781009c
MB
803static int arizona_of_get_core_pdata(struct arizona *arizona)
804{
e4fcb1d6 805 struct arizona_pdata *pdata = &arizona->pdata;
cc47aed9
IS
806 struct property *prop;
807 const __be32 *cur;
808 u32 val;
d781009c 809 int ret, i;
cc47aed9 810 int count = 0;
d781009c 811
e4fcb1d6 812 pdata->reset = arizona_of_get_named_gpio(arizona, "wlf,reset", true);
d781009c
MB
813
814 ret = of_property_read_u32_array(arizona->dev->of_node,
815 "wlf,gpio-defaults",
3762aede
CK
816 pdata->gpio_defaults,
817 ARRAY_SIZE(pdata->gpio_defaults));
d781009c
MB
818 if (ret >= 0) {
819 /*
820 * All values are literal except out of range values
821 * which are chip default, translate into platform
822 * data which uses 0 as chip default and out of range
823 * as zero.
824 */
3762aede
CK
825 for (i = 0; i < ARRAY_SIZE(pdata->gpio_defaults); i++) {
826 if (pdata->gpio_defaults[i] > 0xffff)
827 pdata->gpio_defaults[i] = 0;
828 else if (pdata->gpio_defaults[i] == 0)
829 pdata->gpio_defaults[i] = 0x10000;
d781009c
MB
830 }
831 } else {
832 dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n",
833 ret);
834 }
835
cc47aed9
IS
836 of_property_for_each_u32(arizona->dev->of_node, "wlf,inmode", prop,
837 cur, val) {
3762aede 838 if (count == ARRAY_SIZE(pdata->inmode))
cc47aed9
IS
839 break;
840
3762aede 841 pdata->inmode[count] = val;
cc47aed9
IS
842 count++;
843 }
844
e7ad27ca
CK
845 count = 0;
846 of_property_for_each_u32(arizona->dev->of_node, "wlf,dmic-ref", prop,
847 cur, val) {
3762aede 848 if (count == ARRAY_SIZE(pdata->dmic_ref))
e7ad27ca
CK
849 break;
850
3762aede 851 pdata->dmic_ref[count] = val;
e7ad27ca
CK
852 count++;
853 }
854
d781009c
MB
855 return 0;
856}
857
858const struct of_device_id arizona_of_match[] = {
859 { .compatible = "wlf,wm5102", .data = (void *)WM5102 },
860 { .compatible = "wlf,wm5110", .data = (void *)WM5110 },
e5d4ef0d 861 { .compatible = "wlf,wm8280", .data = (void *)WM8280 },
dc7d4863 862 { .compatible = "wlf,wm8997", .data = (void *)WM8997 },
6887b042
RF
863 { .compatible = "wlf,wm8998", .data = (void *)WM8998 },
864 { .compatible = "wlf,wm1814", .data = (void *)WM1814 },
d781009c
MB
865 {},
866};
867EXPORT_SYMBOL_GPL(arizona_of_match);
868#else
869static inline int arizona_of_get_core_pdata(struct arizona *arizona)
870{
871 return 0;
872}
873#endif
874
5ac98553 875static const struct mfd_cell early_devs[] = {
3cc72986
MB
876 { .name = "arizona-ldo1" },
877};
878
3762aede 879static const char * const wm5102_supplies[] = {
5fc6c396 880 "MICVDD",
32dadef2
CK
881 "DBVDD2",
882 "DBVDD3",
883 "CPVDD",
884 "SPKVDDL",
885 "SPKVDDR",
886};
887
5ac98553 888static const struct mfd_cell wm5102_devs[] = {
d7768111 889 { .name = "arizona-micsupp" },
5fc6c396
CK
890 {
891 .name = "arizona-extcon",
892 .parent_supplies = wm5102_supplies,
893 .num_parent_supplies = 1, /* We only need MICVDD */
894 },
3cc72986 895 { .name = "arizona-gpio" },
503b1cac 896 { .name = "arizona-haptics" },
3cc72986 897 { .name = "arizona-pwm" },
32dadef2
CK
898 {
899 .name = "wm5102-codec",
900 .parent_supplies = wm5102_supplies,
901 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
902 },
3cc72986
MB
903};
904
5ac98553 905static const struct mfd_cell wm5110_devs[] = {
d7768111 906 { .name = "arizona-micsupp" },
5fc6c396
CK
907 {
908 .name = "arizona-extcon",
909 .parent_supplies = wm5102_supplies,
910 .num_parent_supplies = 1, /* We only need MICVDD */
911 },
e102befe 912 { .name = "arizona-gpio" },
503b1cac 913 { .name = "arizona-haptics" },
e102befe 914 { .name = "arizona-pwm" },
32dadef2
CK
915 {
916 .name = "wm5110-codec",
917 .parent_supplies = wm5102_supplies,
918 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
919 },
920};
921
3762aede 922static const char * const wm8997_supplies[] = {
996c2d4f 923 "MICVDD",
32dadef2
CK
924 "DBVDD2",
925 "CPVDD",
926 "SPKVDD",
e102befe
MB
927};
928
5ac98553 929static const struct mfd_cell wm8997_devs[] = {
dc7d4863 930 { .name = "arizona-micsupp" },
5fc6c396
CK
931 {
932 .name = "arizona-extcon",
933 .parent_supplies = wm8997_supplies,
934 .num_parent_supplies = 1, /* We only need MICVDD */
935 },
dc7d4863
CK
936 { .name = "arizona-gpio" },
937 { .name = "arizona-haptics" },
938 { .name = "arizona-pwm" },
32dadef2
CK
939 {
940 .name = "wm8997-codec",
941 .parent_supplies = wm8997_supplies,
942 .num_parent_supplies = ARRAY_SIZE(wm8997_supplies),
943 },
dc7d4863
CK
944};
945
6887b042
RF
946static const struct mfd_cell wm8998_devs[] = {
947 {
948 .name = "arizona-extcon",
949 .parent_supplies = wm5102_supplies,
950 .num_parent_supplies = 1, /* We only need MICVDD */
951 },
952 { .name = "arizona-gpio" },
953 { .name = "arizona-haptics" },
954 { .name = "arizona-pwm" },
955 {
956 .name = "wm8998-codec",
957 .parent_supplies = wm5102_supplies,
958 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
959 },
960 { .name = "arizona-micsupp" },
961};
962
f791be49 963int arizona_dev_init(struct arizona *arizona)
3cc72986
MB
964{
965 struct device *dev = arizona->dev;
966 const char *type_name;
6887b042 967 unsigned int reg, val, mask;
62d62b59 968 int (*apply_patch)(struct arizona *) = NULL;
ae05ea36
RF
969 const struct mfd_cell *subdevs = NULL;
970 int n_subdevs, ret, i;
3cc72986
MB
971
972 dev_set_drvdata(arizona->dev, arizona);
973 mutex_init(&arizona->clk_lock);
974
975 if (dev_get_platdata(arizona->dev))
976 memcpy(&arizona->pdata, dev_get_platdata(arizona->dev),
977 sizeof(arizona->pdata));
22d7dc8a
LJ
978 else
979 arizona_of_get_core_pdata(arizona);
3cc72986
MB
980
981 regcache_cache_only(arizona->regmap, true);
982
983 switch (arizona->type) {
984 case WM5102:
e102befe 985 case WM5110:
e5d4ef0d 986 case WM8280:
dc7d4863 987 case WM8997:
6887b042
RF
988 case WM8998:
989 case WM1814:
3cc72986
MB
990 for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
991 arizona->core_supplies[i].supply
992 = wm5102_core_supplies[i];
993 arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies);
994 break;
995 default:
996 dev_err(arizona->dev, "Unknown device type %d\n",
997 arizona->type);
998 return -EINVAL;
999 }
1000
4a8c475f
CK
1001 /* Mark DCVDD as external, LDO1 driver will clear if internal */
1002 arizona->external_dcvdd = true;
1003
3cc72986 1004 ret = mfd_add_devices(arizona->dev, -1, early_devs,
0848c94f 1005 ARRAY_SIZE(early_devs), NULL, 0, NULL);
3cc72986
MB
1006 if (ret != 0) {
1007 dev_err(dev, "Failed to add early children: %d\n", ret);
1008 return ret;
1009 }
1010
1011 ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
1012 arizona->core_supplies);
1013 if (ret != 0) {
1014 dev_err(dev, "Failed to request core supplies: %d\n",
1015 ret);
1016 goto err_early;
1017 }
1018
0c2d0ffb
CK
1019 /**
1020 * Don't use devres here because the only device we have to get
1021 * against is the MFD device and DCVDD will likely be supplied by
1022 * one of its children. Meaning that the regulator will be
1023 * destroyed by the time devres calls regulator put.
1024 */
e6021511 1025 arizona->dcvdd = regulator_get(arizona->dev, "DCVDD");
59db9691
MB
1026 if (IS_ERR(arizona->dcvdd)) {
1027 ret = PTR_ERR(arizona->dcvdd);
1028 dev_err(dev, "Failed to request DCVDD: %d\n", ret);
1029 goto err_early;
1030 }
1031
87d3af4a
MB
1032 if (arizona->pdata.reset) {
1033 /* Start out with /RESET low to put the chip into reset */
5f056bf0
CK
1034 ret = devm_gpio_request_one(arizona->dev, arizona->pdata.reset,
1035 GPIOF_DIR_OUT | GPIOF_INIT_LOW,
1036 "arizona /RESET");
87d3af4a
MB
1037 if (ret != 0) {
1038 dev_err(dev, "Failed to request /RESET: %d\n", ret);
e6021511 1039 goto err_dcvdd;
87d3af4a
MB
1040 }
1041 }
1042
3cc72986
MB
1043 ret = regulator_bulk_enable(arizona->num_core_supplies,
1044 arizona->core_supplies);
1045 if (ret != 0) {
1046 dev_err(dev, "Failed to enable core supplies: %d\n",
1047 ret);
e6021511 1048 goto err_dcvdd;
3cc72986
MB
1049 }
1050
59db9691
MB
1051 ret = regulator_enable(arizona->dcvdd);
1052 if (ret != 0) {
1053 dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
1054 goto err_enable;
1055 }
1056
2229875d 1057 arizona_disable_reset(arizona);
3cc72986 1058
3cc72986
MB
1059 regcache_cache_only(arizona->regmap, false);
1060
ca76ceb8 1061 /* Verify that this is a chip we know about */
3cc72986
MB
1062 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
1063 if (ret != 0) {
1064 dev_err(dev, "Failed to read ID register: %d\n", ret);
59db9691 1065 goto err_reset;
3cc72986
MB
1066 }
1067
3cc72986
MB
1068 switch (reg) {
1069 case 0x5102:
e102befe 1070 case 0x5110:
6887b042 1071 case 0x6349:
dc7d4863 1072 case 0x8997:
e102befe 1073 break;
3cc72986 1074 default:
ca76ceb8 1075 dev_err(arizona->dev, "Unknown device ID: %x\n", reg);
59db9691 1076 goto err_reset;
3cc72986
MB
1077 }
1078
3cc72986
MB
1079 /* If we have a /RESET GPIO we'll already be reset */
1080 if (!arizona->pdata.reset) {
1081 ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
1082 if (ret != 0) {
1083 dev_err(dev, "Failed to reset device: %d\n", ret);
59db9691 1084 goto err_reset;
3cc72986 1085 }
46b9d13a 1086
c25feaa5 1087 msleep(1);
3cc72986
MB
1088 }
1089
ca76ceb8 1090 /* Ensure device startup is complete */
d955cba8
CK
1091 switch (arizona->type) {
1092 case WM5102:
48018943
MB
1093 ret = regmap_read(arizona->regmap,
1094 ARIZONA_WRITE_SEQUENCER_CTRL_3, &val);
1c1c6bba 1095 if (ret) {
d955cba8
CK
1096 dev_err(dev,
1097 "Failed to check write sequencer state: %d\n",
1098 ret);
1c1c6bba
CK
1099 } else if (val & 0x01) {
1100 ret = wm5102_clear_write_sequencer(arizona);
1101 if (ret)
1102 return ret;
d955cba8
CK
1103 }
1104 break;
1c1c6bba
CK
1105 default:
1106 break;
1107 }
1108
1109 ret = arizona_wait_for_boot(arizona);
1110 if (ret) {
1111 dev_err(arizona->dev, "Device failed initial boot: %d\n", ret);
1112 goto err_reset;
af65a361 1113 }
3cc72986 1114
ca76ceb8
MB
1115 /* Read the device ID information & do device specific stuff */
1116 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
1117 if (ret != 0) {
1118 dev_err(dev, "Failed to read ID register: %d\n", ret);
1119 goto err_reset;
1120 }
1121
1122 ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
1123 &arizona->rev);
1124 if (ret != 0) {
1125 dev_err(dev, "Failed to read revision register: %d\n", ret);
1126 goto err_reset;
1127 }
1128 arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
1129
1130 switch (reg) {
ca76ceb8 1131 case 0x5102:
b61c1ec0
RF
1132 if (IS_ENABLED(CONFIG_MFD_WM5102)) {
1133 type_name = "WM5102";
1134 if (arizona->type != WM5102) {
1135 dev_warn(arizona->dev,
1136 "WM5102 registered as %d\n",
1137 arizona->type);
1138 arizona->type = WM5102;
1139 }
1140
1141 apply_patch = wm5102_patch;
1142 arizona->rev &= 0x7;
1143 subdevs = wm5102_devs;
1144 n_subdevs = ARRAY_SIZE(wm5102_devs);
ca76ceb8 1145 }
ca76ceb8 1146 break;
ca76ceb8 1147 case 0x5110:
b61c1ec0
RF
1148 if (IS_ENABLED(CONFIG_MFD_WM5110)) {
1149 switch (arizona->type) {
1150 case WM5110:
1151 type_name = "WM5110";
1152 break;
1153 case WM8280:
1154 type_name = "WM8280";
1155 break;
1156 default:
1157 type_name = "WM5110";
1158 dev_warn(arizona->dev,
1159 "WM5110 registered as %d\n",
1160 arizona->type);
1161 arizona->type = WM5110;
1162 break;
1163 }
1164
1165 apply_patch = wm5110_patch;
1166 subdevs = wm5110_devs;
1167 n_subdevs = ARRAY_SIZE(wm5110_devs);
ca76ceb8 1168 }
ca76ceb8 1169 break;
dc7d4863 1170 case 0x8997:
b61c1ec0
RF
1171 if (IS_ENABLED(CONFIG_MFD_WM8997)) {
1172 type_name = "WM8997";
1173 if (arizona->type != WM8997) {
1174 dev_warn(arizona->dev,
1175 "WM8997 registered as %d\n",
1176 arizona->type);
1177 arizona->type = WM8997;
1178 }
1179
1180 apply_patch = wm8997_patch;
1181 subdevs = wm8997_devs;
1182 n_subdevs = ARRAY_SIZE(wm8997_devs);
dc7d4863 1183 }
dc7d4863 1184 break;
6887b042 1185 case 0x6349:
b61c1ec0
RF
1186 if (IS_ENABLED(CONFIG_MFD_WM8998)) {
1187 switch (arizona->type) {
1188 case WM8998:
1189 type_name = "WM8998";
1190 break;
1191
1192 case WM1814:
1193 type_name = "WM1814";
1194 break;
1195
1196 default:
1197 type_name = "WM8998";
1198 dev_warn(arizona->dev,
1199 "WM8998 registered as %d\n",
1200 arizona->type);
1201 arizona->type = WM8998;
1202 }
6887b042 1203
b61c1ec0
RF
1204 apply_patch = wm8998_patch;
1205 subdevs = wm8998_devs;
1206 n_subdevs = ARRAY_SIZE(wm8998_devs);
6887b042 1207 }
6887b042 1208 break;
ca76ceb8
MB
1209 default:
1210 dev_err(arizona->dev, "Unknown device ID %x\n", reg);
1211 goto err_reset;
1212 }
1213
b61c1ec0
RF
1214 if (!subdevs) {
1215 dev_err(arizona->dev,
1216 "No kernel support for device ID %x\n", reg);
1217 goto err_reset;
1218 }
1219
ca76ceb8
MB
1220 dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
1221
62d62b59
MB
1222 if (apply_patch) {
1223 ret = apply_patch(arizona);
1224 if (ret != 0) {
1225 dev_err(arizona->dev, "Failed to apply patch: %d\n",
1226 ret);
1227 goto err_reset;
1228 }
e80436bb
CK
1229
1230 switch (arizona->type) {
1231 case WM5102:
0be068a0
CK
1232 ret = wm5102_apply_hardware_patch(arizona);
1233 if (ret) {
e80436bb
CK
1234 dev_err(arizona->dev,
1235 "Failed to apply hardware patch: %d\n",
1236 ret);
1237 goto err_reset;
1238 }
1239 break;
882bc468
CK
1240 case WM5110:
1241 case WM8280:
1242 ret = wm5110_apply_sleep_patch(arizona);
1243 if (ret) {
1244 dev_err(arizona->dev,
1245 "Failed to apply sleep patch: %d\n",
1246 ret);
1247 goto err_reset;
1248 }
1249 break;
e80436bb
CK
1250 default:
1251 break;
1252 }
62d62b59
MB
1253 }
1254
3cc72986
MB
1255 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
1256 if (!arizona->pdata.gpio_defaults[i])
1257 continue;
1258
1259 regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i,
1260 arizona->pdata.gpio_defaults[i]);
1261 }
1262
3cc72986
MB
1263 /* Chip default */
1264 if (!arizona->pdata.clk32k_src)
1265 arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
1266
1267 switch (arizona->pdata.clk32k_src) {
1268 case ARIZONA_32KZ_MCLK1:
1269 case ARIZONA_32KZ_MCLK2:
1270 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
1271 ARIZONA_CLK_32K_SRC_MASK,
1272 arizona->pdata.clk32k_src - 1);
767c6dc0 1273 arizona_clk32k_enable(arizona);
3cc72986
MB
1274 break;
1275 case ARIZONA_32KZ_NONE:
1276 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
1277 ARIZONA_CLK_32K_SRC_MASK, 2);
1278 break;
1279 default:
1280 dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n",
1281 arizona->pdata.clk32k_src);
1282 ret = -EINVAL;
59db9691 1283 goto err_reset;
3cc72986
MB
1284 }
1285
3d91f828 1286 for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) {
544c7aad
MB
1287 if (!arizona->pdata.micbias[i].mV &&
1288 !arizona->pdata.micbias[i].bypass)
3d91f828
MB
1289 continue;
1290
544c7aad
MB
1291 /* Apply default for bypass mode */
1292 if (!arizona->pdata.micbias[i].mV)
1293 arizona->pdata.micbias[i].mV = 2800;
1294
3d91f828 1295 val = (arizona->pdata.micbias[i].mV - 1500) / 100;
544c7aad 1296
3d91f828
MB
1297 val <<= ARIZONA_MICB1_LVL_SHIFT;
1298
1299 if (arizona->pdata.micbias[i].ext_cap)
1300 val |= ARIZONA_MICB1_EXT_CAP;
1301
1302 if (arizona->pdata.micbias[i].discharge)
1303 val |= ARIZONA_MICB1_DISCH;
1304
f773fc6d 1305 if (arizona->pdata.micbias[i].soft_start)
3d91f828
MB
1306 val |= ARIZONA_MICB1_RATE;
1307
544c7aad
MB
1308 if (arizona->pdata.micbias[i].bypass)
1309 val |= ARIZONA_MICB1_BYPASS;
1310
3d91f828
MB
1311 regmap_update_bits(arizona->regmap,
1312 ARIZONA_MIC_BIAS_CTRL_1 + i,
1313 ARIZONA_MICB1_LVL_MASK |
71d134b9 1314 ARIZONA_MICB1_EXT_CAP |
3d91f828 1315 ARIZONA_MICB1_DISCH |
544c7aad 1316 ARIZONA_MICB1_BYPASS |
3d91f828
MB
1317 ARIZONA_MICB1_RATE, val);
1318 }
1319
3cc72986
MB
1320 for (i = 0; i < ARIZONA_MAX_INPUT; i++) {
1321 /* Default for both is 0 so noop with defaults */
1322 val = arizona->pdata.dmic_ref[i]
1323 << ARIZONA_IN1_DMIC_SUP_SHIFT;
fc027d13
RF
1324 if (arizona->pdata.inmode[i] & ARIZONA_INMODE_DMIC)
1325 val |= 1 << ARIZONA_IN1_MODE_SHIFT;
6887b042
RF
1326
1327 switch (arizona->type) {
1328 case WM8998:
1329 case WM1814:
1330 regmap_update_bits(arizona->regmap,
1331 ARIZONA_ADC_DIGITAL_VOLUME_1L + (i * 8),
1332 ARIZONA_IN1L_SRC_SE_MASK,
1333 (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE)
1334 << ARIZONA_IN1L_SRC_SE_SHIFT);
1335
1336 regmap_update_bits(arizona->regmap,
1337 ARIZONA_ADC_DIGITAL_VOLUME_1R + (i * 8),
1338 ARIZONA_IN1R_SRC_SE_MASK,
1339 (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE)
1340 << ARIZONA_IN1R_SRC_SE_SHIFT);
1341
1342 mask = ARIZONA_IN1_DMIC_SUP_MASK |
1343 ARIZONA_IN1_MODE_MASK;
1344 break;
1345 default:
1346 if (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE)
1347 val |= 1 << ARIZONA_IN1_SINGLE_ENDED_SHIFT;
1348
1349 mask = ARIZONA_IN1_DMIC_SUP_MASK |
1350 ARIZONA_IN1_MODE_MASK |
1351 ARIZONA_IN1_SINGLE_ENDED_MASK;
1352 break;
1353 }
3cc72986
MB
1354
1355 regmap_update_bits(arizona->regmap,
1356 ARIZONA_IN1L_CONTROL + (i * 8),
6887b042 1357 mask, val);
3cc72986
MB
1358 }
1359
1360 for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) {
1361 /* Default is 0 so noop with defaults */
1362 if (arizona->pdata.out_mono[i])
1363 val = ARIZONA_OUT1_MONO;
1364 else
1365 val = 0;
1366
1367 regmap_update_bits(arizona->regmap,
1368 ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8),
1369 ARIZONA_OUT1_MONO, val);
1370 }
1371
3cc72986
MB
1372 for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) {
1373 if (arizona->pdata.spk_mute[i])
1374 regmap_update_bits(arizona->regmap,
2a51da04 1375 ARIZONA_PDM_SPK1_CTRL_1 + (i * 2),
3cc72986
MB
1376 ARIZONA_SPK1_MUTE_ENDIAN_MASK |
1377 ARIZONA_SPK1_MUTE_SEQ1_MASK,
1378 arizona->pdata.spk_mute[i]);
1379
1380 if (arizona->pdata.spk_fmt[i])
1381 regmap_update_bits(arizona->regmap,
2a51da04 1382 ARIZONA_PDM_SPK1_CTRL_2 + (i * 2),
3cc72986
MB
1383 ARIZONA_SPK1_FMT_MASK,
1384 arizona->pdata.spk_fmt[i]);
1385 }
1386
72e43164
CK
1387 pm_runtime_set_active(arizona->dev);
1388 pm_runtime_enable(arizona->dev);
1389
3cc72986
MB
1390 /* Set up for interrupts */
1391 ret = arizona_irq_init(arizona);
1392 if (ret != 0)
59db9691 1393 goto err_reset;
3cc72986 1394
72e43164
CK
1395 pm_runtime_set_autosuspend_delay(arizona->dev, 100);
1396 pm_runtime_use_autosuspend(arizona->dev);
1397
3cc72986
MB
1398 arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
1399 arizona_clkgen_err, arizona);
1400 arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
1401 arizona_overclocked, arizona);
1402 arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked",
1403 arizona_underclocked, arizona);
1404
ae05ea36
RF
1405 ret = mfd_add_devices(arizona->dev, PLATFORM_DEVID_NONE,
1406 subdevs, n_subdevs, NULL, 0, NULL);
3cc72986 1407
ae05ea36 1408 if (ret) {
3cc72986
MB
1409 dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret);
1410 goto err_irq;
1411 }
1412
1413 return 0;
1414
1415err_irq:
1416 arizona_irq_exit(arizona);
3cc72986 1417err_reset:
2229875d 1418 arizona_enable_reset(arizona);
59db9691 1419 regulator_disable(arizona->dcvdd);
3cc72986 1420err_enable:
3a36a0db 1421 regulator_bulk_disable(arizona->num_core_supplies,
3cc72986 1422 arizona->core_supplies);
e6021511
CK
1423err_dcvdd:
1424 regulator_put(arizona->dcvdd);
3cc72986
MB
1425err_early:
1426 mfd_remove_devices(dev);
1427 return ret;
1428}
1429EXPORT_SYMBOL_GPL(arizona_dev_init);
1430
4740f73f 1431int arizona_dev_exit(struct arizona *arizona)
3cc72986 1432{
b804020a
CK
1433 pm_runtime_disable(arizona->dev);
1434
df6b3352 1435 regulator_disable(arizona->dcvdd);
e6021511 1436 regulator_put(arizona->dcvdd);
df6b3352 1437
3cc72986
MB
1438 mfd_remove_devices(arizona->dev);
1439 arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona);
1440 arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona);
1441 arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona);
3cc72986 1442 arizona_irq_exit(arizona);
2229875d 1443 arizona_enable_reset(arizona);
df6b3352 1444
4420286e 1445 regulator_bulk_disable(arizona->num_core_supplies,
1d017b6b 1446 arizona->core_supplies);
3cc72986
MB
1447 return 0;
1448}
1449EXPORT_SYMBOL_GPL(arizona_dev_exit);