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3cc72986
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1/*
2 * Arizona core driver
3 *
4 * Copyright 2012 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/delay.h>
59db9691 14#include <linux/err.h>
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15#include <linux/gpio.h>
16#include <linux/interrupt.h>
17#include <linux/mfd/core.h>
18#include <linux/module.h>
d781009c
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19#include <linux/of.h>
20#include <linux/of_device.h>
21#include <linux/of_gpio.h>
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22#include <linux/pm_runtime.h>
23#include <linux/regmap.h>
24#include <linux/regulator/consumer.h>
5927467d 25#include <linux/regulator/machine.h>
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26#include <linux/slab.h>
27
28#include <linux/mfd/arizona/core.h>
29#include <linux/mfd/arizona/registers.h>
30
31#include "arizona.h"
32
33static const char *wm5102_core_supplies[] = {
34 "AVDD",
35 "DBVDD1",
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36};
37
38int arizona_clk32k_enable(struct arizona *arizona)
39{
40 int ret = 0;
41
42 mutex_lock(&arizona->clk_lock);
43
44 arizona->clk32k_ref++;
45
247fa192
MB
46 if (arizona->clk32k_ref == 1) {
47 switch (arizona->pdata.clk32k_src) {
48 case ARIZONA_32KZ_MCLK1:
49 ret = pm_runtime_get_sync(arizona->dev);
50 if (ret != 0)
51 goto out;
52 break;
53 }
54
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55 ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
56 ARIZONA_CLK_32K_ENA,
57 ARIZONA_CLK_32K_ENA);
247fa192 58 }
3cc72986 59
247fa192 60out:
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61 if (ret != 0)
62 arizona->clk32k_ref--;
63
64 mutex_unlock(&arizona->clk_lock);
65
66 return ret;
67}
68EXPORT_SYMBOL_GPL(arizona_clk32k_enable);
69
70int arizona_clk32k_disable(struct arizona *arizona)
71{
72 int ret = 0;
73
74 mutex_lock(&arizona->clk_lock);
75
76 BUG_ON(arizona->clk32k_ref <= 0);
77
78 arizona->clk32k_ref--;
79
247fa192 80 if (arizona->clk32k_ref == 0) {
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81 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
82 ARIZONA_CLK_32K_ENA, 0);
83
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84 switch (arizona->pdata.clk32k_src) {
85 case ARIZONA_32KZ_MCLK1:
86 pm_runtime_put_sync(arizona->dev);
87 break;
88 }
89 }
90
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91 mutex_unlock(&arizona->clk_lock);
92
93 return ret;
94}
95EXPORT_SYMBOL_GPL(arizona_clk32k_disable);
96
97static irqreturn_t arizona_clkgen_err(int irq, void *data)
98{
99 struct arizona *arizona = data;
100
101 dev_err(arizona->dev, "CLKGEN error\n");
102
103 return IRQ_HANDLED;
104}
105
106static irqreturn_t arizona_underclocked(int irq, void *data)
107{
108 struct arizona *arizona = data;
109 unsigned int val;
110 int ret;
111
112 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8,
113 &val);
114 if (ret != 0) {
115 dev_err(arizona->dev, "Failed to read underclock status: %d\n",
116 ret);
117 return IRQ_NONE;
118 }
119
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120 if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
121 dev_err(arizona->dev, "AIF3 underclocked\n");
122 if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
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CK
123 dev_err(arizona->dev, "AIF2 underclocked\n");
124 if (val & ARIZONA_AIF1_UNDERCLOCKED_STS)
3cc72986 125 dev_err(arizona->dev, "AIF1 underclocked\n");
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126 if (val & ARIZONA_ISRC3_UNDERCLOCKED_STS)
127 dev_err(arizona->dev, "ISRC3 underclocked\n");
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128 if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
129 dev_err(arizona->dev, "ISRC2 underclocked\n");
130 if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS)
131 dev_err(arizona->dev, "ISRC1 underclocked\n");
132 if (val & ARIZONA_FX_UNDERCLOCKED_STS)
133 dev_err(arizona->dev, "FX underclocked\n");
134 if (val & ARIZONA_ASRC_UNDERCLOCKED_STS)
135 dev_err(arizona->dev, "ASRC underclocked\n");
136 if (val & ARIZONA_DAC_UNDERCLOCKED_STS)
137 dev_err(arizona->dev, "DAC underclocked\n");
138 if (val & ARIZONA_ADC_UNDERCLOCKED_STS)
139 dev_err(arizona->dev, "ADC underclocked\n");
140 if (val & ARIZONA_MIXER_UNDERCLOCKED_STS)
648a9880 141 dev_err(arizona->dev, "Mixer dropped sample\n");
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142
143 return IRQ_HANDLED;
144}
145
146static irqreturn_t arizona_overclocked(int irq, void *data)
147{
148 struct arizona *arizona = data;
149 unsigned int val[2];
150 int ret;
151
152 ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
153 &val[0], 2);
154 if (ret != 0) {
155 dev_err(arizona->dev, "Failed to read overclock status: %d\n",
156 ret);
157 return IRQ_NONE;
158 }
159
160 if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
161 dev_err(arizona->dev, "PWM overclocked\n");
162 if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
163 dev_err(arizona->dev, "FX core overclocked\n");
164 if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
165 dev_err(arizona->dev, "DAC SYS overclocked\n");
166 if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
167 dev_err(arizona->dev, "DAC WARP overclocked\n");
168 if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
169 dev_err(arizona->dev, "ADC overclocked\n");
170 if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
171 dev_err(arizona->dev, "Mixer overclocked\n");
172 if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
173 dev_err(arizona->dev, "AIF3 overclocked\n");
174 if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
175 dev_err(arizona->dev, "AIF2 overclocked\n");
176 if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
177 dev_err(arizona->dev, "AIF1 overclocked\n");
178 if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
179 dev_err(arizona->dev, "Pad control overclocked\n");
180
181 if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
182 dev_err(arizona->dev, "Slimbus subsystem overclocked\n");
183 if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
184 dev_err(arizona->dev, "Slimbus async overclocked\n");
185 if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
186 dev_err(arizona->dev, "Slimbus sync overclocked\n");
187 if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
188 dev_err(arizona->dev, "ASRC async system overclocked\n");
189 if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
190 dev_err(arizona->dev, "ASRC async WARP overclocked\n");
191 if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
192 dev_err(arizona->dev, "ASRC sync system overclocked\n");
193 if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
194 dev_err(arizona->dev, "ASRC sync WARP overclocked\n");
195 if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
196 dev_err(arizona->dev, "DSP1 overclocked\n");
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CK
197 if (val[1] & ARIZONA_ISRC3_OVERCLOCKED_STS)
198 dev_err(arizona->dev, "ISRC3 overclocked\n");
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199 if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
200 dev_err(arizona->dev, "ISRC2 overclocked\n");
201 if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
202 dev_err(arizona->dev, "ISRC1 overclocked\n");
203
204 return IRQ_HANDLED;
205}
206
9d53dfdc
CK
207static int arizona_poll_reg(struct arizona *arizona,
208 int timeout, unsigned int reg,
209 unsigned int mask, unsigned int target)
3cc72986 210{
9d53dfdc 211 unsigned int val = 0;
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212 int ret, i;
213
9d53dfdc
CK
214 for (i = 0; i < timeout; i++) {
215 ret = regmap_read(arizona->regmap, reg, &val);
3cc72986 216 if (ret != 0) {
9d53dfdc
CK
217 dev_err(arizona->dev, "Failed to read reg %u: %d\n",
218 reg, ret);
cfe775ce 219 continue;
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220 }
221
9d53dfdc
CK
222 if ((val & mask) == target)
223 return 0;
224
225 msleep(1);
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226 }
227
9d53dfdc
CK
228 dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val);
229 return -ETIMEDOUT;
230}
231
232static int arizona_wait_for_boot(struct arizona *arizona)
233{
234 int ret;
235
236 /*
237 * We can't use an interrupt as we need to runtime resume to do so,
238 * we won't race with the interrupt handler as it'll be blocked on
239 * runtime resume.
240 */
241 ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5,
242 ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS);
243
244 if (!ret)
3cc72986
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245 regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
246 ARIZONA_BOOT_DONE_STS);
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247
248 pm_runtime_mark_last_busy(arizona->dev);
249
9d53dfdc 250 return ret;
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251}
252
e80436bb
CK
253static int arizona_apply_hardware_patch(struct arizona* arizona)
254{
255 unsigned int fll, sysclk;
256 int ret, err;
257
e80436bb
CK
258 /* Cache existing FLL and SYSCLK settings */
259 ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &fll);
260 if (ret != 0) {
261 dev_err(arizona->dev, "Failed to cache FLL settings: %d\n",
262 ret);
263 return ret;
264 }
265 ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &sysclk);
266 if (ret != 0) {
267 dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n",
268 ret);
269 return ret;
270 }
271
272 /* Start up SYSCLK using the FLL in free running mode */
273 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1,
274 ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN);
275 if (ret != 0) {
276 dev_err(arizona->dev,
277 "Failed to start FLL in freerunning mode: %d\n",
278 ret);
279 return ret;
280 }
281 ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5,
282 ARIZONA_FLL1_CLOCK_OK_STS,
283 ARIZONA_FLL1_CLOCK_OK_STS);
284 if (ret != 0) {
285 ret = -ETIMEDOUT;
286 goto err_fll;
287 }
288
289 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144);
290 if (ret != 0) {
291 dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret);
292 goto err_fll;
293 }
294
295 /* Start the write sequencer and wait for it to finish */
296 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
297 ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160);
298 if (ret != 0) {
299 dev_err(arizona->dev, "Failed to start write sequencer: %d\n",
300 ret);
301 goto err_sysclk;
302 }
303 ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1,
304 ARIZONA_WSEQ_BUSY, 0);
305 if (ret != 0) {
306 regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
307 ARIZONA_WSEQ_ABORT);
308 ret = -ETIMEDOUT;
309 }
310
311err_sysclk:
312 err = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, sysclk);
313 if (err != 0) {
314 dev_err(arizona->dev,
315 "Failed to re-apply old SYSCLK settings: %d\n",
316 err);
317 }
318
319err_fll:
320 err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, fll);
321 if (err != 0) {
322 dev_err(arizona->dev,
323 "Failed to re-apply old FLL settings: %d\n",
324 err);
325 }
326
e80436bb
CK
327 if (ret != 0)
328 return ret;
329 else
330 return err;
331}
332
48bb9fe4 333#ifdef CONFIG_PM
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334static int arizona_runtime_resume(struct device *dev)
335{
336 struct arizona *arizona = dev_get_drvdata(dev);
337 int ret;
338
508c8299
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339 dev_dbg(arizona->dev, "Leaving AoD mode\n");
340
59db9691
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341 ret = regulator_enable(arizona->dcvdd);
342 if (ret != 0) {
343 dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret);
344 return ret;
345 }
3cc72986
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346
347 regcache_cache_only(arizona->regmap, false);
348
4c9bb8bc
CK
349 switch (arizona->type) {
350 case WM5102:
5927467d
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351 if (arizona->external_dcvdd) {
352 ret = regmap_update_bits(arizona->regmap,
353 ARIZONA_ISOLATION_CONTROL,
354 ARIZONA_ISOLATE_DCVDD1, 0);
355 if (ret != 0) {
356 dev_err(arizona->dev,
357 "Failed to connect DCVDD: %d\n", ret);
358 goto err;
359 }
360 }
361
4c9bb8bc
CK
362 ret = wm5102_patch(arizona);
363 if (ret != 0) {
364 dev_err(arizona->dev, "Failed to apply patch: %d\n",
365 ret);
366 goto err;
367 }
e80436bb
CK
368
369 ret = arizona_apply_hardware_patch(arizona);
370 if (ret != 0) {
371 dev_err(arizona->dev,
372 "Failed to apply hardware patch: %d\n",
373 ret);
374 goto err;
375 }
376 break;
377 default:
12bb68ed
CK
378 ret = arizona_wait_for_boot(arizona);
379 if (ret != 0) {
380 goto err;
381 }
382
5927467d
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383 if (arizona->external_dcvdd) {
384 ret = regmap_update_bits(arizona->regmap,
385 ARIZONA_ISOLATION_CONTROL,
386 ARIZONA_ISOLATE_DCVDD1, 0);
387 if (ret != 0) {
388 dev_err(arizona->dev,
389 "Failed to connect DCVDD: %d\n", ret);
390 goto err;
391 }
392 }
e80436bb 393 break;
4c9bb8bc
CK
394 }
395
9270bdf5
MB
396 ret = regcache_sync(arizona->regmap);
397 if (ret != 0) {
398 dev_err(arizona->dev, "Failed to restore register cache\n");
4816bd1c 399 goto err;
9270bdf5 400 }
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401
402 return 0;
4816bd1c
MB
403
404err:
405 regcache_cache_only(arizona->regmap, true);
406 regulator_disable(arizona->dcvdd);
407 return ret;
3cc72986
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408}
409
410static int arizona_runtime_suspend(struct device *dev)
411{
412 struct arizona *arizona = dev_get_drvdata(dev);
5927467d 413 int ret;
3cc72986 414
508c8299
MB
415 dev_dbg(arizona->dev, "Entering AoD mode\n");
416
5927467d
MB
417 if (arizona->external_dcvdd) {
418 ret = regmap_update_bits(arizona->regmap,
419 ARIZONA_ISOLATION_CONTROL,
420 ARIZONA_ISOLATE_DCVDD1,
421 ARIZONA_ISOLATE_DCVDD1);
422 if (ret != 0) {
423 dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n",
424 ret);
425 return ret;
426 }
427 }
428
59db9691
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429 regcache_cache_only(arizona->regmap, true);
430 regcache_mark_dirty(arizona->regmap);
e293e847 431 regulator_disable(arizona->dcvdd);
3cc72986
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432
433 return 0;
434}
435#endif
436
dc781d0e 437#ifdef CONFIG_PM_SLEEP
67c99296
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438static int arizona_suspend(struct device *dev)
439{
440 struct arizona *arizona = dev_get_drvdata(dev);
441
442 dev_dbg(arizona->dev, "Suspend, disabling IRQ\n");
443 disable_irq(arizona->irq);
444
445 return 0;
446}
447
448static int arizona_suspend_late(struct device *dev)
449{
450 struct arizona *arizona = dev_get_drvdata(dev);
451
452 dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n");
453 enable_irq(arizona->irq);
454
455 return 0;
456}
457
dc781d0e
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458static int arizona_resume_noirq(struct device *dev)
459{
460 struct arizona *arizona = dev_get_drvdata(dev);
461
462 dev_dbg(arizona->dev, "Early resume, disabling IRQ\n");
463 disable_irq(arizona->irq);
464
465 return 0;
466}
467
468static int arizona_resume(struct device *dev)
469{
470 struct arizona *arizona = dev_get_drvdata(dev);
471
472 dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n");
473 enable_irq(arizona->irq);
474
475 return 0;
476}
477#endif
478
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479const struct dev_pm_ops arizona_pm_ops = {
480 SET_RUNTIME_PM_OPS(arizona_runtime_suspend,
481 arizona_runtime_resume,
482 NULL)
67c99296 483 SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume)
dc781d0e 484#ifdef CONFIG_PM_SLEEP
67c99296 485 .suspend_late = arizona_suspend_late,
dc781d0e
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486 .resume_noirq = arizona_resume_noirq,
487#endif
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488};
489EXPORT_SYMBOL_GPL(arizona_pm_ops);
490
d781009c 491#ifdef CONFIG_OF
942786e6 492unsigned long arizona_of_get_type(struct device *dev)
d781009c
MB
493{
494 const struct of_device_id *id = of_match_device(arizona_of_match, dev);
495
496 if (id)
942786e6 497 return (unsigned long)id->data;
d781009c
MB
498 else
499 return 0;
500}
501EXPORT_SYMBOL_GPL(arizona_of_get_type);
502
e4fcb1d6
CK
503int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop,
504 bool mandatory)
505{
506 int gpio;
507
508 gpio = of_get_named_gpio(arizona->dev->of_node, prop, 0);
509 if (gpio < 0) {
510 if (mandatory)
511 dev_err(arizona->dev,
512 "Mandatory DT gpio %s missing/malformed: %d\n",
513 prop, gpio);
514
515 gpio = 0;
516 }
517
518 return gpio;
519}
520EXPORT_SYMBOL_GPL(arizona_of_get_named_gpio);
521
d781009c
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522static int arizona_of_get_core_pdata(struct arizona *arizona)
523{
e4fcb1d6 524 struct arizona_pdata *pdata = &arizona->pdata;
cc47aed9
IS
525 struct property *prop;
526 const __be32 *cur;
527 u32 val;
d781009c 528 int ret, i;
cc47aed9 529 int count = 0;
d781009c 530
e4fcb1d6 531 pdata->reset = arizona_of_get_named_gpio(arizona, "wlf,reset", true);
d781009c
MB
532
533 ret = of_property_read_u32_array(arizona->dev->of_node,
534 "wlf,gpio-defaults",
535 arizona->pdata.gpio_defaults,
536 ARRAY_SIZE(arizona->pdata.gpio_defaults));
537 if (ret >= 0) {
538 /*
539 * All values are literal except out of range values
540 * which are chip default, translate into platform
541 * data which uses 0 as chip default and out of range
542 * as zero.
543 */
544 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
545 if (arizona->pdata.gpio_defaults[i] > 0xffff)
546 arizona->pdata.gpio_defaults[i] = 0;
91c73935 547 else if (arizona->pdata.gpio_defaults[i] == 0)
d781009c
MB
548 arizona->pdata.gpio_defaults[i] = 0x10000;
549 }
550 } else {
551 dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n",
552 ret);
553 }
554
cc47aed9
IS
555 of_property_for_each_u32(arizona->dev->of_node, "wlf,inmode", prop,
556 cur, val) {
557 if (count == ARRAY_SIZE(arizona->pdata.inmode))
558 break;
559
560 arizona->pdata.inmode[count] = val;
561 count++;
562 }
563
d781009c
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564 return 0;
565}
566
567const struct of_device_id arizona_of_match[] = {
568 { .compatible = "wlf,wm5102", .data = (void *)WM5102 },
569 { .compatible = "wlf,wm5110", .data = (void *)WM5110 },
dc7d4863 570 { .compatible = "wlf,wm8997", .data = (void *)WM8997 },
d781009c
MB
571 {},
572};
573EXPORT_SYMBOL_GPL(arizona_of_match);
574#else
575static inline int arizona_of_get_core_pdata(struct arizona *arizona)
576{
577 return 0;
578}
579#endif
580
5ac98553 581static const struct mfd_cell early_devs[] = {
3cc72986
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582 { .name = "arizona-ldo1" },
583};
584
32dadef2 585static const char *wm5102_supplies[] = {
5fc6c396 586 "MICVDD",
32dadef2
CK
587 "DBVDD2",
588 "DBVDD3",
589 "CPVDD",
590 "SPKVDDL",
591 "SPKVDDR",
592};
593
5ac98553 594static const struct mfd_cell wm5102_devs[] = {
d7768111 595 { .name = "arizona-micsupp" },
5fc6c396
CK
596 {
597 .name = "arizona-extcon",
598 .parent_supplies = wm5102_supplies,
599 .num_parent_supplies = 1, /* We only need MICVDD */
600 },
3cc72986 601 { .name = "arizona-gpio" },
503b1cac 602 { .name = "arizona-haptics" },
3cc72986 603 { .name = "arizona-pwm" },
32dadef2
CK
604 {
605 .name = "wm5102-codec",
606 .parent_supplies = wm5102_supplies,
607 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
608 },
3cc72986
MB
609};
610
5ac98553 611static const struct mfd_cell wm5110_devs[] = {
d7768111 612 { .name = "arizona-micsupp" },
5fc6c396
CK
613 {
614 .name = "arizona-extcon",
615 .parent_supplies = wm5102_supplies,
616 .num_parent_supplies = 1, /* We only need MICVDD */
617 },
e102befe 618 { .name = "arizona-gpio" },
503b1cac 619 { .name = "arizona-haptics" },
e102befe 620 { .name = "arizona-pwm" },
32dadef2
CK
621 {
622 .name = "wm5110-codec",
623 .parent_supplies = wm5102_supplies,
624 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
625 },
626};
627
628static const char *wm8997_supplies[] = {
996c2d4f 629 "MICVDD",
32dadef2
CK
630 "DBVDD2",
631 "CPVDD",
632 "SPKVDD",
e102befe
MB
633};
634
5ac98553 635static const struct mfd_cell wm8997_devs[] = {
dc7d4863 636 { .name = "arizona-micsupp" },
5fc6c396
CK
637 {
638 .name = "arizona-extcon",
639 .parent_supplies = wm8997_supplies,
640 .num_parent_supplies = 1, /* We only need MICVDD */
641 },
dc7d4863
CK
642 { .name = "arizona-gpio" },
643 { .name = "arizona-haptics" },
644 { .name = "arizona-pwm" },
32dadef2
CK
645 {
646 .name = "wm8997-codec",
647 .parent_supplies = wm8997_supplies,
648 .num_parent_supplies = ARRAY_SIZE(wm8997_supplies),
649 },
dc7d4863
CK
650};
651
f791be49 652int arizona_dev_init(struct arizona *arizona)
3cc72986
MB
653{
654 struct device *dev = arizona->dev;
655 const char *type_name;
656 unsigned int reg, val;
62d62b59 657 int (*apply_patch)(struct arizona *) = NULL;
3cc72986
MB
658 int ret, i;
659
660 dev_set_drvdata(arizona->dev, arizona);
661 mutex_init(&arizona->clk_lock);
662
663 if (dev_get_platdata(arizona->dev))
664 memcpy(&arizona->pdata, dev_get_platdata(arizona->dev),
665 sizeof(arizona->pdata));
22d7dc8a
LJ
666 else
667 arizona_of_get_core_pdata(arizona);
3cc72986
MB
668
669 regcache_cache_only(arizona->regmap, true);
670
671 switch (arizona->type) {
672 case WM5102:
e102befe 673 case WM5110:
dc7d4863 674 case WM8997:
3cc72986
MB
675 for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
676 arizona->core_supplies[i].supply
677 = wm5102_core_supplies[i];
678 arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies);
679 break;
680 default:
681 dev_err(arizona->dev, "Unknown device type %d\n",
682 arizona->type);
683 return -EINVAL;
684 }
685
4a8c475f
CK
686 /* Mark DCVDD as external, LDO1 driver will clear if internal */
687 arizona->external_dcvdd = true;
688
3cc72986 689 ret = mfd_add_devices(arizona->dev, -1, early_devs,
0848c94f 690 ARRAY_SIZE(early_devs), NULL, 0, NULL);
3cc72986
MB
691 if (ret != 0) {
692 dev_err(dev, "Failed to add early children: %d\n", ret);
693 return ret;
694 }
695
696 ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
697 arizona->core_supplies);
698 if (ret != 0) {
699 dev_err(dev, "Failed to request core supplies: %d\n",
700 ret);
701 goto err_early;
702 }
703
0c2d0ffb
CK
704 /**
705 * Don't use devres here because the only device we have to get
706 * against is the MFD device and DCVDD will likely be supplied by
707 * one of its children. Meaning that the regulator will be
708 * destroyed by the time devres calls regulator put.
709 */
e6021511 710 arizona->dcvdd = regulator_get(arizona->dev, "DCVDD");
59db9691
MB
711 if (IS_ERR(arizona->dcvdd)) {
712 ret = PTR_ERR(arizona->dcvdd);
713 dev_err(dev, "Failed to request DCVDD: %d\n", ret);
714 goto err_early;
715 }
716
87d3af4a
MB
717 if (arizona->pdata.reset) {
718 /* Start out with /RESET low to put the chip into reset */
719 ret = gpio_request_one(arizona->pdata.reset,
720 GPIOF_DIR_OUT | GPIOF_INIT_LOW,
721 "arizona /RESET");
722 if (ret != 0) {
723 dev_err(dev, "Failed to request /RESET: %d\n", ret);
e6021511 724 goto err_dcvdd;
87d3af4a
MB
725 }
726 }
727
3cc72986
MB
728 ret = regulator_bulk_enable(arizona->num_core_supplies,
729 arizona->core_supplies);
730 if (ret != 0) {
731 dev_err(dev, "Failed to enable core supplies: %d\n",
732 ret);
e6021511 733 goto err_dcvdd;
3cc72986
MB
734 }
735
59db9691
MB
736 ret = regulator_enable(arizona->dcvdd);
737 if (ret != 0) {
738 dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
739 goto err_enable;
740 }
741
c25feaa5 742 if (arizona->pdata.reset) {
3cc72986 743 gpio_set_value_cansleep(arizona->pdata.reset, 1);
c25feaa5
CK
744 msleep(1);
745 }
3cc72986 746
3cc72986
MB
747 regcache_cache_only(arizona->regmap, false);
748
ca76ceb8 749 /* Verify that this is a chip we know about */
3cc72986
MB
750 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
751 if (ret != 0) {
752 dev_err(dev, "Failed to read ID register: %d\n", ret);
59db9691 753 goto err_reset;
3cc72986
MB
754 }
755
3cc72986
MB
756 switch (reg) {
757 case 0x5102:
e102befe 758 case 0x5110:
dc7d4863 759 case 0x8997:
e102befe 760 break;
3cc72986 761 default:
ca76ceb8 762 dev_err(arizona->dev, "Unknown device ID: %x\n", reg);
59db9691 763 goto err_reset;
3cc72986
MB
764 }
765
3cc72986
MB
766 /* If we have a /RESET GPIO we'll already be reset */
767 if (!arizona->pdata.reset) {
46b9d13a
CK
768 regcache_mark_dirty(arizona->regmap);
769
3cc72986
MB
770 ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
771 if (ret != 0) {
772 dev_err(dev, "Failed to reset device: %d\n", ret);
59db9691 773 goto err_reset;
3cc72986 774 }
46b9d13a 775
c25feaa5
CK
776 msleep(1);
777
46b9d13a
CK
778 ret = regcache_sync(arizona->regmap);
779 if (ret != 0) {
780 dev_err(dev, "Failed to sync device: %d\n", ret);
781 goto err_reset;
782 }
3cc72986
MB
783 }
784
ca76ceb8 785 /* Ensure device startup is complete */
d955cba8
CK
786 switch (arizona->type) {
787 case WM5102:
48018943
MB
788 ret = regmap_read(arizona->regmap,
789 ARIZONA_WRITE_SEQUENCER_CTRL_3, &val);
d955cba8
CK
790 if (ret != 0)
791 dev_err(dev,
792 "Failed to check write sequencer state: %d\n",
793 ret);
794 else if (val & 0x01)
795 break;
796 /* Fall through */
797 default:
798 ret = arizona_wait_for_boot(arizona);
799 if (ret != 0) {
800 dev_err(arizona->dev,
801 "Device failed initial boot: %d\n", ret);
802 goto err_reset;
803 }
804 break;
af65a361 805 }
3cc72986 806
ca76ceb8
MB
807 /* Read the device ID information & do device specific stuff */
808 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
809 if (ret != 0) {
810 dev_err(dev, "Failed to read ID register: %d\n", ret);
811 goto err_reset;
812 }
813
814 ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
815 &arizona->rev);
816 if (ret != 0) {
817 dev_err(dev, "Failed to read revision register: %d\n", ret);
818 goto err_reset;
819 }
820 arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
821
822 switch (reg) {
823#ifdef CONFIG_MFD_WM5102
824 case 0x5102:
825 type_name = "WM5102";
826 if (arizona->type != WM5102) {
827 dev_err(arizona->dev, "WM5102 registered as %d\n",
828 arizona->type);
829 arizona->type = WM5102;
830 }
831 apply_patch = wm5102_patch;
832 arizona->rev &= 0x7;
833 break;
834#endif
835#ifdef CONFIG_MFD_WM5110
836 case 0x5110:
837 type_name = "WM5110";
838 if (arizona->type != WM5110) {
839 dev_err(arizona->dev, "WM5110 registered as %d\n",
840 arizona->type);
841 arizona->type = WM5110;
842 }
843 apply_patch = wm5110_patch;
844 break;
dc7d4863
CK
845#endif
846#ifdef CONFIG_MFD_WM8997
847 case 0x8997:
848 type_name = "WM8997";
849 if (arizona->type != WM8997) {
850 dev_err(arizona->dev, "WM8997 registered as %d\n",
851 arizona->type);
852 arizona->type = WM8997;
853 }
854 apply_patch = wm8997_patch;
855 break;
ca76ceb8
MB
856#endif
857 default:
858 dev_err(arizona->dev, "Unknown device ID %x\n", reg);
859 goto err_reset;
860 }
861
862 dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
863
62d62b59
MB
864 if (apply_patch) {
865 ret = apply_patch(arizona);
866 if (ret != 0) {
867 dev_err(arizona->dev, "Failed to apply patch: %d\n",
868 ret);
869 goto err_reset;
870 }
e80436bb
CK
871
872 switch (arizona->type) {
873 case WM5102:
874 ret = arizona_apply_hardware_patch(arizona);
875 if (ret != 0) {
876 dev_err(arizona->dev,
877 "Failed to apply hardware patch: %d\n",
878 ret);
879 goto err_reset;
880 }
881 break;
882 default:
883 break;
884 }
62d62b59
MB
885 }
886
3cc72986
MB
887 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
888 if (!arizona->pdata.gpio_defaults[i])
889 continue;
890
891 regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i,
892 arizona->pdata.gpio_defaults[i]);
893 }
894
895 pm_runtime_set_autosuspend_delay(arizona->dev, 100);
896 pm_runtime_use_autosuspend(arizona->dev);
897 pm_runtime_enable(arizona->dev);
898
899 /* Chip default */
900 if (!arizona->pdata.clk32k_src)
901 arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
902
903 switch (arizona->pdata.clk32k_src) {
904 case ARIZONA_32KZ_MCLK1:
905 case ARIZONA_32KZ_MCLK2:
906 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
907 ARIZONA_CLK_32K_SRC_MASK,
908 arizona->pdata.clk32k_src - 1);
767c6dc0 909 arizona_clk32k_enable(arizona);
3cc72986
MB
910 break;
911 case ARIZONA_32KZ_NONE:
912 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
913 ARIZONA_CLK_32K_SRC_MASK, 2);
914 break;
915 default:
916 dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n",
917 arizona->pdata.clk32k_src);
918 ret = -EINVAL;
59db9691 919 goto err_reset;
3cc72986
MB
920 }
921
3d91f828 922 for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) {
544c7aad
MB
923 if (!arizona->pdata.micbias[i].mV &&
924 !arizona->pdata.micbias[i].bypass)
3d91f828
MB
925 continue;
926
544c7aad
MB
927 /* Apply default for bypass mode */
928 if (!arizona->pdata.micbias[i].mV)
929 arizona->pdata.micbias[i].mV = 2800;
930
3d91f828 931 val = (arizona->pdata.micbias[i].mV - 1500) / 100;
544c7aad 932
3d91f828
MB
933 val <<= ARIZONA_MICB1_LVL_SHIFT;
934
935 if (arizona->pdata.micbias[i].ext_cap)
936 val |= ARIZONA_MICB1_EXT_CAP;
937
938 if (arizona->pdata.micbias[i].discharge)
939 val |= ARIZONA_MICB1_DISCH;
940
f773fc6d 941 if (arizona->pdata.micbias[i].soft_start)
3d91f828
MB
942 val |= ARIZONA_MICB1_RATE;
943
544c7aad
MB
944 if (arizona->pdata.micbias[i].bypass)
945 val |= ARIZONA_MICB1_BYPASS;
946
3d91f828
MB
947 regmap_update_bits(arizona->regmap,
948 ARIZONA_MIC_BIAS_CTRL_1 + i,
949 ARIZONA_MICB1_LVL_MASK |
71d134b9 950 ARIZONA_MICB1_EXT_CAP |
3d91f828 951 ARIZONA_MICB1_DISCH |
544c7aad 952 ARIZONA_MICB1_BYPASS |
3d91f828
MB
953 ARIZONA_MICB1_RATE, val);
954 }
955
3cc72986
MB
956 for (i = 0; i < ARIZONA_MAX_INPUT; i++) {
957 /* Default for both is 0 so noop with defaults */
958 val = arizona->pdata.dmic_ref[i]
959 << ARIZONA_IN1_DMIC_SUP_SHIFT;
960 val |= arizona->pdata.inmode[i] << ARIZONA_IN1_MODE_SHIFT;
961
962 regmap_update_bits(arizona->regmap,
963 ARIZONA_IN1L_CONTROL + (i * 8),
964 ARIZONA_IN1_DMIC_SUP_MASK |
965 ARIZONA_IN1_MODE_MASK, val);
966 }
967
968 for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) {
969 /* Default is 0 so noop with defaults */
970 if (arizona->pdata.out_mono[i])
971 val = ARIZONA_OUT1_MONO;
972 else
973 val = 0;
974
975 regmap_update_bits(arizona->regmap,
976 ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8),
977 ARIZONA_OUT1_MONO, val);
978 }
979
3cc72986
MB
980 for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) {
981 if (arizona->pdata.spk_mute[i])
982 regmap_update_bits(arizona->regmap,
2a51da04 983 ARIZONA_PDM_SPK1_CTRL_1 + (i * 2),
3cc72986
MB
984 ARIZONA_SPK1_MUTE_ENDIAN_MASK |
985 ARIZONA_SPK1_MUTE_SEQ1_MASK,
986 arizona->pdata.spk_mute[i]);
987
988 if (arizona->pdata.spk_fmt[i])
989 regmap_update_bits(arizona->regmap,
2a51da04 990 ARIZONA_PDM_SPK1_CTRL_2 + (i * 2),
3cc72986
MB
991 ARIZONA_SPK1_FMT_MASK,
992 arizona->pdata.spk_fmt[i]);
993 }
994
995 /* Set up for interrupts */
996 ret = arizona_irq_init(arizona);
997 if (ret != 0)
59db9691 998 goto err_reset;
3cc72986
MB
999
1000 arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
1001 arizona_clkgen_err, arizona);
1002 arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
1003 arizona_overclocked, arizona);
1004 arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked",
1005 arizona_underclocked, arizona);
1006
1007 switch (arizona->type) {
1008 case WM5102:
1009 ret = mfd_add_devices(arizona->dev, -1, wm5102_devs,
0848c94f 1010 ARRAY_SIZE(wm5102_devs), NULL, 0, NULL);
e102befe
MB
1011 break;
1012 case WM5110:
1013 ret = mfd_add_devices(arizona->dev, -1, wm5110_devs,
78566afd 1014 ARRAY_SIZE(wm5110_devs), NULL, 0, NULL);
3cc72986 1015 break;
dc7d4863
CK
1016 case WM8997:
1017 ret = mfd_add_devices(arizona->dev, -1, wm8997_devs,
1018 ARRAY_SIZE(wm8997_devs), NULL, 0, NULL);
1019 break;
3cc72986
MB
1020 }
1021
1022 if (ret != 0) {
1023 dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret);
1024 goto err_irq;
1025 }
1026
48bb9fe4 1027#ifdef CONFIG_PM
59db9691
MB
1028 regulator_disable(arizona->dcvdd);
1029#endif
1030
3cc72986
MB
1031 return 0;
1032
1033err_irq:
1034 arizona_irq_exit(arizona);
3cc72986
MB
1035err_reset:
1036 if (arizona->pdata.reset) {
87d3af4a 1037 gpio_set_value_cansleep(arizona->pdata.reset, 0);
3cc72986
MB
1038 gpio_free(arizona->pdata.reset);
1039 }
59db9691 1040 regulator_disable(arizona->dcvdd);
3cc72986 1041err_enable:
3a36a0db 1042 regulator_bulk_disable(arizona->num_core_supplies,
3cc72986 1043 arizona->core_supplies);
e6021511
CK
1044err_dcvdd:
1045 regulator_put(arizona->dcvdd);
3cc72986
MB
1046err_early:
1047 mfd_remove_devices(dev);
1048 return ret;
1049}
1050EXPORT_SYMBOL_GPL(arizona_dev_init);
1051
4740f73f 1052int arizona_dev_exit(struct arizona *arizona)
3cc72986 1053{
b804020a
CK
1054 pm_runtime_disable(arizona->dev);
1055
df6b3352 1056 regulator_disable(arizona->dcvdd);
e6021511 1057 regulator_put(arizona->dcvdd);
df6b3352 1058
3cc72986
MB
1059 mfd_remove_devices(arizona->dev);
1060 arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona);
1061 arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona);
1062 arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona);
3cc72986 1063 arizona_irq_exit(arizona);
1d017b6b
MB
1064 if (arizona->pdata.reset)
1065 gpio_set_value_cansleep(arizona->pdata.reset, 0);
df6b3352 1066
4420286e 1067 regulator_bulk_disable(arizona->num_core_supplies,
1d017b6b 1068 arizona->core_supplies);
3cc72986
MB
1069 return 0;
1070}
1071EXPORT_SYMBOL_GPL(arizona_dev_exit);