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Merge tag 'staging-4.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh...
[mirror_ubuntu-bionic-kernel.git] / drivers / mfd / cros_ec_spi.c
CommitLineData
a17d94f0
SG
1/*
2 * ChromeOS EC multi-function device (SPI)
3 *
4 * Copyright (C) 2012 Google, Inc
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <linux/delay.h>
17#include <linux/kernel.h>
18#include <linux/module.h>
19#include <linux/mfd/cros_ec.h>
20#include <linux/mfd/cros_ec_commands.h>
01e73c89 21#include <linux/of.h>
a17d94f0
SG
22#include <linux/platform_device.h>
23#include <linux/slab.h>
24#include <linux/spi/spi.h>
25
26
27/* The header byte, which follows the preamble */
28#define EC_MSG_HEADER 0xec
29
30/*
31 * Number of EC preamble bytes we read at a time. Since it takes
32 * about 400-500us for the EC to respond there is not a lot of
33 * point in tuning this. If the EC could respond faster then
34 * we could increase this so that might expect the preamble and
35 * message to occur in a single transaction. However, the maximum
36 * SPI transfer size is 256 bytes, so at 5MHz we need a response
37 * time of perhaps <320us (200 bytes / 1600 bits).
38 */
39#define EC_MSG_PREAMBLE_COUNT 32
40
41/*
9c0b54a1
DA
42 * Allow for a long time for the EC to respond. We support i2c
43 * tunneling and support fairly long messages for the tunnel (249
44 * bytes long at the moment). If we're talking to a 100 kHz device
45 * on the other end and need to transfer ~256 bytes, then we need:
46 * 10 us/bit * ~10 bits/byte * ~256 bytes = ~25ms
47 *
ca691f71
DA
48 * We'll wait 8 times that to handle clock stretching and other
49 * paranoia. Note that some battery gas gauge ICs claim to have a
50 * clock stretch of 144ms in rare situations. That's incentive for
51 * not directly passing i2c through, but it's too late for that for
52 * existing hardware.
9c0b54a1
DA
53 *
54 * It's pretty unlikely that we'll really see a 249 byte tunnel in
55 * anything other than testing. If this was more common we might
56 * consider having slow commands like this require a GET_STATUS
57 * wait loop. The 'flash write' command would be another candidate
58 * for this, clocking in at 2-3ms.
59 */
ca691f71 60#define EC_MSG_DEADLINE_MS 200
a17d94f0
SG
61
62/*
63 * Time between raising the SPI chip select (for the end of a
64 * transaction) and dropping it again (for the next transaction).
49f91ac3
DB
65 * If we go too fast, the EC will miss the transaction. We know that we
66 * need at least 70 us with the 16 MHz STM32 EC, so go with 200 us to be
67 * safe.
a17d94f0 68 */
49f91ac3 69#define EC_SPI_RECOVERY_TIME_NS (200 * 1000)
a17d94f0
SG
70
71/**
72 * struct cros_ec_spi - information about a SPI-connected EC
73 *
74 * @spi: SPI device we are connected to
75 * @last_transfer_ns: time that we last finished a transfer, or 0 if there
76 * if no record
ff4378f4
AS
77 * @start_of_msg_delay: used to set the delay_usecs on the spi_transfer that
78 * is sent when we want to turn on CS at the start of a transaction.
01e73c89
RK
79 * @end_of_msg_delay: used to set the delay_usecs on the spi_transfer that
80 * is sent when we want to turn off CS at the end of a transaction.
a17d94f0
SG
81 */
82struct cros_ec_spi {
83 struct spi_device *spi;
84 s64 last_transfer_ns;
ff4378f4 85 unsigned int start_of_msg_delay;
01e73c89 86 unsigned int end_of_msg_delay;
a17d94f0
SG
87};
88
89static void debug_packet(struct device *dev, const char *name, u8 *ptr,
d3654070 90 int len)
a17d94f0
SG
91{
92#ifdef DEBUG
93 int i;
94
95 dev_dbg(dev, "%s: ", name);
96 for (i = 0; i < len; i++)
9e146f43
TR
97 pr_cont(" %02x", ptr[i]);
98
99 pr_cont("\n");
a17d94f0
SG
100#endif
101}
102
d3654070
SB
103static int terminate_request(struct cros_ec_device *ec_dev)
104{
105 struct cros_ec_spi *ec_spi = ec_dev->priv;
106 struct spi_message msg;
107 struct spi_transfer trans;
108 int ret;
109
110 /*
111 * Turn off CS, possibly adding a delay to ensure the rising edge
112 * doesn't come too soon after the end of the data.
113 */
114 spi_message_init(&msg);
115 memset(&trans, 0, sizeof(trans));
116 trans.delay_usecs = ec_spi->end_of_msg_delay;
117 spi_message_add_tail(&trans, &msg);
118
6d6e44a9 119 ret = spi_sync_locked(ec_spi->spi, &msg);
d3654070
SB
120
121 /* Reset end-of-response timer */
122 ec_spi->last_transfer_ns = ktime_get_ns();
123 if (ret < 0) {
124 dev_err(ec_dev->dev,
125 "cs-deassert spi transfer failed: %d\n",
126 ret);
127 }
128
129 return ret;
130}
131
132/**
133 * receive_n_bytes - receive n bytes from the EC.
134 *
135 * Assumes buf is a pointer into the ec_dev->din buffer
136 */
137static int receive_n_bytes(struct cros_ec_device *ec_dev, u8 *buf, int n)
138{
139 struct cros_ec_spi *ec_spi = ec_dev->priv;
140 struct spi_transfer trans;
141 struct spi_message msg;
142 int ret;
143
144 BUG_ON(buf - ec_dev->din + n > ec_dev->din_size);
145
146 memset(&trans, 0, sizeof(trans));
147 trans.cs_change = 1;
148 trans.rx_buf = buf;
149 trans.len = n;
150
151 spi_message_init(&msg);
152 spi_message_add_tail(&trans, &msg);
6d6e44a9 153 ret = spi_sync_locked(ec_spi->spi, &msg);
d3654070
SB
154 if (ret < 0)
155 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
156
157 return ret;
158}
159
160/**
161 * cros_ec_spi_receive_packet - Receive a packet from the EC.
162 *
163 * This function has two phases: reading the preamble bytes (since if we read
164 * data from the EC before it is ready to send, we just get preamble) and
165 * reading the actual message.
166 *
167 * The received data is placed into ec_dev->din.
168 *
169 * @ec_dev: ChromeOS EC device
170 * @need_len: Number of message bytes we need to read
171 */
172static int cros_ec_spi_receive_packet(struct cros_ec_device *ec_dev,
173 int need_len)
174{
175 struct ec_host_response *response;
176 u8 *ptr, *end;
177 int ret;
178 unsigned long deadline;
179 int todo;
180
8827a642 181 BUG_ON(ec_dev->din_size < EC_MSG_PREAMBLE_COUNT);
d3654070
SB
182
183 /* Receive data until we see the header byte */
184 deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS);
185 while (true) {
186 unsigned long start_jiffies = jiffies;
187
188 ret = receive_n_bytes(ec_dev,
189 ec_dev->din,
190 EC_MSG_PREAMBLE_COUNT);
191 if (ret < 0)
192 return ret;
193
194 ptr = ec_dev->din;
195 for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) {
196 if (*ptr == EC_SPI_FRAME_START) {
197 dev_dbg(ec_dev->dev, "msg found at %zd\n",
198 ptr - ec_dev->din);
199 break;
200 }
201 }
202 if (ptr != end)
203 break;
204
205 /*
206 * Use the time at the start of the loop as a timeout. This
207 * gives us one last shot at getting the transfer and is useful
208 * in case we got context switched out for a while.
209 */
210 if (time_after(start_jiffies, deadline)) {
211 dev_warn(ec_dev->dev, "EC failed to respond in time\n");
212 return -ETIMEDOUT;
213 }
214 }
215
216 /*
217 * ptr now points to the header byte. Copy any valid data to the
218 * start of our buffer
219 */
220 todo = end - ++ptr;
221 BUG_ON(todo < 0 || todo > ec_dev->din_size);
222 todo = min(todo, need_len);
223 memmove(ec_dev->din, ptr, todo);
224 ptr = ec_dev->din + todo;
225 dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n",
226 need_len, todo);
227 need_len -= todo;
228
229 /* If the entire response struct wasn't read, get the rest of it. */
230 if (todo < sizeof(*response)) {
231 ret = receive_n_bytes(ec_dev, ptr, sizeof(*response) - todo);
232 if (ret < 0)
233 return -EBADMSG;
234 ptr += (sizeof(*response) - todo);
235 todo = sizeof(*response);
236 }
237
238 response = (struct ec_host_response *)ec_dev->din;
239
240 /* Abort if data_len is too large. */
241 if (response->data_len > ec_dev->din_size)
242 return -EMSGSIZE;
243
244 /* Receive data until we have it all */
245 while (need_len > 0) {
246 /*
247 * We can't support transfers larger than the SPI FIFO size
248 * unless we have DMA. We don't have DMA on the ISP SPI ports
249 * for Exynos. We need a way of asking SPI driver for
250 * maximum-supported transfer size.
251 */
252 todo = min(need_len, 256);
253 dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n",
254 todo, need_len, ptr - ec_dev->din);
255
256 ret = receive_n_bytes(ec_dev, ptr, todo);
257 if (ret < 0)
258 return ret;
259
260 ptr += todo;
261 need_len -= todo;
262 }
263
264 dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din);
265
266 return 0;
267}
268
a17d94f0
SG
269/**
270 * cros_ec_spi_receive_response - Receive a response from the EC.
271 *
272 * This function has two phases: reading the preamble bytes (since if we read
273 * data from the EC before it is ready to send, we just get preamble) and
274 * reading the actual message.
275 *
276 * The received data is placed into ec_dev->din.
277 *
278 * @ec_dev: ChromeOS EC device
279 * @need_len: Number of message bytes we need to read
280 */
281static int cros_ec_spi_receive_response(struct cros_ec_device *ec_dev,
282 int need_len)
283{
a17d94f0
SG
284 u8 *ptr, *end;
285 int ret;
286 unsigned long deadline;
287 int todo;
288
8827a642 289 BUG_ON(ec_dev->din_size < EC_MSG_PREAMBLE_COUNT);
d3654070 290
a17d94f0
SG
291 /* Receive data until we see the header byte */
292 deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS);
c9a81d67
DA
293 while (true) {
294 unsigned long start_jiffies = jiffies;
295
d3654070
SB
296 ret = receive_n_bytes(ec_dev,
297 ec_dev->din,
298 EC_MSG_PREAMBLE_COUNT);
299 if (ret < 0)
a17d94f0 300 return ret;
a17d94f0 301
d3654070 302 ptr = ec_dev->din;
a17d94f0 303 for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) {
d3654070 304 if (*ptr == EC_SPI_FRAME_START) {
c34924b9 305 dev_dbg(ec_dev->dev, "msg found at %zd\n",
a17d94f0
SG
306 ptr - ec_dev->din);
307 break;
308 }
309 }
c9a81d67
DA
310 if (ptr != end)
311 break;
a17d94f0 312
c9a81d67
DA
313 /*
314 * Use the time at the start of the loop as a timeout. This
315 * gives us one last shot at getting the transfer and is useful
316 * in case we got context switched out for a while.
317 */
318 if (time_after(start_jiffies, deadline)) {
a17d94f0
SG
319 dev_warn(ec_dev->dev, "EC failed to respond in time\n");
320 return -ETIMEDOUT;
321 }
c9a81d67 322 }
a17d94f0
SG
323
324 /*
325 * ptr now points to the header byte. Copy any valid data to the
326 * start of our buffer
327 */
328 todo = end - ++ptr;
329 BUG_ON(todo < 0 || todo > ec_dev->din_size);
330 todo = min(todo, need_len);
331 memmove(ec_dev->din, ptr, todo);
332 ptr = ec_dev->din + todo;
333 dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n",
334 need_len, todo);
335 need_len -= todo;
336
337 /* Receive data until we have it all */
338 while (need_len > 0) {
339 /*
340 * We can't support transfers larger than the SPI FIFO size
341 * unless we have DMA. We don't have DMA on the ISP SPI ports
342 * for Exynos. We need a way of asking SPI driver for
343 * maximum-supported transfer size.
344 */
345 todo = min(need_len, 256);
c34924b9 346 dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n",
a17d94f0
SG
347 todo, need_len, ptr - ec_dev->din);
348
d3654070
SB
349 ret = receive_n_bytes(ec_dev, ptr, todo);
350 if (ret < 0)
a17d94f0 351 return ret;
a17d94f0
SG
352
353 debug_packet(ec_dev->dev, "interim", ptr, todo);
354 ptr += todo;
355 need_len -= todo;
356 }
357
c34924b9 358 dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din);
a17d94f0
SG
359
360 return 0;
361}
362
d3654070
SB
363/**
364 * cros_ec_pkt_xfer_spi - Transfer a packet over SPI and receive the reply
365 *
366 * @ec_dev: ChromeOS EC device
367 * @ec_msg: Message to transfer
368 */
369static int cros_ec_pkt_xfer_spi(struct cros_ec_device *ec_dev,
370 struct cros_ec_command *ec_msg)
371{
d3654070
SB
372 struct ec_host_response *response;
373 struct cros_ec_spi *ec_spi = ec_dev->priv;
ff4378f4 374 struct spi_transfer trans, trans_delay;
d3654070
SB
375 struct spi_message msg;
376 int i, len;
377 u8 *ptr;
378 u8 *rx_buf;
379 u8 sum;
380 int ret = 0, final_ret;
381
382 len = cros_ec_prepare_tx(ec_dev, ec_msg);
d3654070
SB
383 dev_dbg(ec_dev->dev, "prepared, len=%d\n", len);
384
385 /* If it's too soon to do another transaction, wait */
386 if (ec_spi->last_transfer_ns) {
387 unsigned long delay; /* The delay completed so far */
388
389 delay = ktime_get_ns() - ec_spi->last_transfer_ns;
390 if (delay < EC_SPI_RECOVERY_TIME_NS)
391 ndelay(EC_SPI_RECOVERY_TIME_NS - delay);
392 }
393
394 rx_buf = kzalloc(len, GFP_KERNEL);
6d6e44a9
NB
395 if (!rx_buf)
396 return -ENOMEM;
397
398 spi_bus_lock(ec_spi->spi->master);
d3654070 399
ff4378f4
AS
400 /*
401 * Leave a gap between CS assertion and clocking of data to allow the
402 * EC time to wakeup.
403 */
404 spi_message_init(&msg);
405 if (ec_spi->start_of_msg_delay) {
406 memset(&trans_delay, 0, sizeof(trans_delay));
407 trans_delay.delay_usecs = ec_spi->start_of_msg_delay;
408 spi_message_add_tail(&trans_delay, &msg);
409 }
410
d3654070
SB
411 /* Transmit phase - send our message */
412 memset(&trans, 0, sizeof(trans));
413 trans.tx_buf = ec_dev->dout;
414 trans.rx_buf = rx_buf;
415 trans.len = len;
416 trans.cs_change = 1;
d3654070 417 spi_message_add_tail(&trans, &msg);
6d6e44a9 418 ret = spi_sync_locked(ec_spi->spi, &msg);
d3654070
SB
419
420 /* Get the response */
421 if (!ret) {
422 /* Verify that EC can process command */
423 for (i = 0; i < len; i++) {
424 switch (rx_buf[i]) {
425 case EC_SPI_PAST_END:
426 case EC_SPI_RX_BAD_DATA:
427 case EC_SPI_NOT_READY:
428 ret = -EAGAIN;
429 ec_msg->result = EC_RES_IN_PROGRESS;
430 default:
431 break;
432 }
433 if (ret)
434 break;
435 }
436 if (!ret)
437 ret = cros_ec_spi_receive_packet(ec_dev,
438 ec_msg->insize + sizeof(*response));
439 } else {
440 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
441 }
442
443 final_ret = terminate_request(ec_dev);
6d6e44a9
NB
444
445 spi_bus_unlock(ec_spi->spi->master);
446
d3654070
SB
447 if (!ret)
448 ret = final_ret;
449 if (ret < 0)
450 goto exit;
451
452 ptr = ec_dev->din;
453
454 /* check response error code */
455 response = (struct ec_host_response *)ptr;
456 ec_msg->result = response->result;
457
458 ret = cros_ec_check_result(ec_dev, ec_msg);
459 if (ret)
460 goto exit;
461
462 len = response->data_len;
463 sum = 0;
464 if (len > ec_msg->insize) {
465 dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)",
466 len, ec_msg->insize);
467 ret = -EMSGSIZE;
468 goto exit;
469 }
470
471 for (i = 0; i < sizeof(*response); i++)
472 sum += ptr[i];
473
474 /* copy response packet payload and compute checksum */
475 memcpy(ec_msg->data, ptr + sizeof(*response), len);
476 for (i = 0; i < len; i++)
477 sum += ec_msg->data[i];
478
479 if (sum) {
480 dev_err(ec_dev->dev,
481 "bad packet checksum, calculated %x\n",
482 sum);
483 ret = -EBADMSG;
484 goto exit;
485 }
486
487 ret = len;
488exit:
489 kfree(rx_buf);
490 if (ec_msg->command == EC_CMD_REBOOT_EC)
491 msleep(EC_REBOOT_DELAY_MS);
492
493 return ret;
494}
495
a17d94f0 496/**
7e6cb5b4 497 * cros_ec_cmd_xfer_spi - Transfer a message over SPI and receive the reply
a17d94f0
SG
498 *
499 * @ec_dev: ChromeOS EC device
500 * @ec_msg: Message to transfer
501 */
7e6cb5b4 502static int cros_ec_cmd_xfer_spi(struct cros_ec_device *ec_dev,
5d4773e2 503 struct cros_ec_command *ec_msg)
a17d94f0
SG
504{
505 struct cros_ec_spi *ec_spi = ec_dev->priv;
506 struct spi_transfer trans;
507 struct spi_message msg;
508 int i, len;
509 u8 *ptr;
d3654070 510 u8 *rx_buf;
a17d94f0
SG
511 int sum;
512 int ret = 0, final_ret;
a17d94f0
SG
513
514 len = cros_ec_prepare_tx(ec_dev, ec_msg);
515 dev_dbg(ec_dev->dev, "prepared, len=%d\n", len);
516
517 /* If it's too soon to do another transaction, wait */
518 if (ec_spi->last_transfer_ns) {
a17d94f0
SG
519 unsigned long delay; /* The delay completed so far */
520
154adc14 521 delay = ktime_get_ns() - ec_spi->last_transfer_ns;
a17d94f0 522 if (delay < EC_SPI_RECOVERY_TIME_NS)
1fe36866 523 ndelay(EC_SPI_RECOVERY_TIME_NS - delay);
a17d94f0
SG
524 }
525
d3654070 526 rx_buf = kzalloc(len, GFP_KERNEL);
6d6e44a9
NB
527 if (!rx_buf)
528 return -ENOMEM;
529
530 spi_bus_lock(ec_spi->spi->master);
d3654070 531
a17d94f0
SG
532 /* Transmit phase - send our message */
533 debug_packet(ec_dev->dev, "out", ec_dev->dout, len);
daf93d22 534 memset(&trans, 0, sizeof(trans));
a17d94f0 535 trans.tx_buf = ec_dev->dout;
d3654070 536 trans.rx_buf = rx_buf;
a17d94f0
SG
537 trans.len = len;
538 trans.cs_change = 1;
539 spi_message_init(&msg);
540 spi_message_add_tail(&trans, &msg);
6d6e44a9 541 ret = spi_sync_locked(ec_spi->spi, &msg);
a17d94f0
SG
542
543 /* Get the response */
544 if (!ret) {
d3654070
SB
545 /* Verify that EC can process command */
546 for (i = 0; i < len; i++) {
547 switch (rx_buf[i]) {
548 case EC_SPI_PAST_END:
549 case EC_SPI_RX_BAD_DATA:
550 case EC_SPI_NOT_READY:
551 ret = -EAGAIN;
552 ec_msg->result = EC_RES_IN_PROGRESS;
553 default:
554 break;
555 }
556 if (ret)
557 break;
558 }
559 if (!ret)
560 ret = cros_ec_spi_receive_response(ec_dev,
561 ec_msg->insize + EC_MSG_TX_PROTO_BYTES);
a17d94f0
SG
562 } else {
563 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
564 }
565
d3654070 566 final_ret = terminate_request(ec_dev);
6d6e44a9
NB
567
568 spi_bus_unlock(ec_spi->spi->master);
569
a17d94f0
SG
570 if (!ret)
571 ret = final_ret;
d3654070 572 if (ret < 0)
362196e5 573 goto exit;
a17d94f0 574
a17d94f0 575 ptr = ec_dev->din;
6db07b63
BR
576
577 /* check response error code */
578 ec_msg->result = ptr[0];
579 ret = cros_ec_check_result(ec_dev, ec_msg);
580 if (ret)
362196e5 581 goto exit;
6db07b63 582
a17d94f0
SG
583 len = ptr[1];
584 sum = ptr[0] + ptr[1];
5d4773e2 585 if (len > ec_msg->insize) {
a17d94f0 586 dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)",
5d4773e2 587 len, ec_msg->insize);
362196e5
DA
588 ret = -ENOSPC;
589 goto exit;
a17d94f0
SG
590 }
591
592 /* copy response packet payload and compute checksum */
593 for (i = 0; i < len; i++) {
594 sum += ptr[i + 2];
5d4773e2 595 if (ec_msg->insize)
a8411784 596 ec_msg->data[i] = ptr[i + 2];
a17d94f0
SG
597 }
598 sum &= 0xff;
599
600 debug_packet(ec_dev->dev, "in", ptr, len + 3);
601
602 if (sum != ptr[len + 2]) {
603 dev_err(ec_dev->dev,
604 "bad packet checksum, expected %02x, got %02x\n",
605 sum, ptr[len + 2]);
362196e5
DA
606 ret = -EBADMSG;
607 goto exit;
a17d94f0
SG
608 }
609
12ebc8a5 610 ret = len;
362196e5 611exit:
d3654070 612 kfree(rx_buf);
659e142b
DA
613 if (ec_msg->command == EC_CMD_REBOOT_EC)
614 msleep(EC_REBOOT_DELAY_MS);
615
362196e5 616 return ret;
a17d94f0
SG
617}
618
01e73c89
RK
619static void cros_ec_spi_dt_probe(struct cros_ec_spi *ec_spi, struct device *dev)
620{
621 struct device_node *np = dev->of_node;
622 u32 val;
623 int ret;
624
ff4378f4
AS
625 ret = of_property_read_u32(np, "google,cros-ec-spi-pre-delay", &val);
626 if (!ret)
627 ec_spi->start_of_msg_delay = val;
628
01e73c89
RK
629 ret = of_property_read_u32(np, "google,cros-ec-spi-msg-delay", &val);
630 if (!ret)
631 ec_spi->end_of_msg_delay = val;
632}
633
9922b412 634static int cros_ec_spi_probe(struct spi_device *spi)
a17d94f0
SG
635{
636 struct device *dev = &spi->dev;
637 struct cros_ec_device *ec_dev;
638 struct cros_ec_spi *ec_spi;
639 int err;
640
641 spi->bits_per_word = 8;
642 spi->mode = SPI_MODE_0;
643 err = spi_setup(spi);
644 if (err < 0)
645 return err;
646
647 ec_spi = devm_kzalloc(dev, sizeof(*ec_spi), GFP_KERNEL);
648 if (ec_spi == NULL)
649 return -ENOMEM;
650 ec_spi->spi = spi;
651 ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);
652 if (!ec_dev)
653 return -ENOMEM;
654
01e73c89
RK
655 /* Check for any DT properties */
656 cros_ec_spi_dt_probe(ec_spi, dev);
657
a17d94f0 658 spi_set_drvdata(spi, ec_dev);
a17d94f0
SG
659 ec_dev->dev = dev;
660 ec_dev->priv = ec_spi;
661 ec_dev->irq = spi->irq;
7e6cb5b4 662 ec_dev->cmd_xfer = cros_ec_cmd_xfer_spi;
d3654070 663 ec_dev->pkt_xfer = cros_ec_pkt_xfer_spi;
a17d94f0 664 ec_dev->phys_name = dev_name(&ec_spi->spi->dev);
2c7589af
SB
665 ec_dev->din_size = EC_MSG_PREAMBLE_COUNT +
666 sizeof(struct ec_host_response) +
667 sizeof(struct ec_response_get_protocol_info);
668 ec_dev->dout_size = sizeof(struct ec_host_request);
a17d94f0 669
d3654070 670
a17d94f0
SG
671 err = cros_ec_register(ec_dev);
672 if (err) {
673 dev_err(dev, "cannot register EC\n");
674 return err;
675 }
676
fb50497c
P
677 device_init_wakeup(&spi->dev, true);
678
a17d94f0
SG
679 return 0;
680}
681
9922b412 682static int cros_ec_spi_remove(struct spi_device *spi)
a17d94f0
SG
683{
684 struct cros_ec_device *ec_dev;
685
686 ec_dev = spi_get_drvdata(spi);
687 cros_ec_remove(ec_dev);
688
689 return 0;
690}
691
692#ifdef CONFIG_PM_SLEEP
693static int cros_ec_spi_suspend(struct device *dev)
694{
695 struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
696
697 return cros_ec_suspend(ec_dev);
698}
699
700static int cros_ec_spi_resume(struct device *dev)
701{
702 struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
703
704 return cros_ec_resume(ec_dev);
705}
706#endif
707
708static SIMPLE_DEV_PM_OPS(cros_ec_spi_pm_ops, cros_ec_spi_suspend,
709 cros_ec_spi_resume);
710
a78ea195
JMC
711static const struct of_device_id cros_ec_spi_of_match[] = {
712 { .compatible = "google,cros-ec-spi", },
713 { /* sentinel */ },
714};
715MODULE_DEVICE_TABLE(of, cros_ec_spi_of_match);
716
a17d94f0
SG
717static const struct spi_device_id cros_ec_spi_id[] = {
718 { "cros-ec-spi", 0 },
719 { }
720};
721MODULE_DEVICE_TABLE(spi, cros_ec_spi_id);
722
723static struct spi_driver cros_ec_driver_spi = {
724 .driver = {
725 .name = "cros-ec-spi",
a78ea195 726 .of_match_table = of_match_ptr(cros_ec_spi_of_match),
a17d94f0
SG
727 .pm = &cros_ec_spi_pm_ops,
728 },
9922b412
TR
729 .probe = cros_ec_spi_probe,
730 .remove = cros_ec_spi_remove,
a17d94f0
SG
731 .id_table = cros_ec_spi_id,
732};
733
734module_spi_driver(cros_ec_driver_spi);
735
ea0f8b0b 736MODULE_LICENSE("GPL v2");
a17d94f0 737MODULE_DESCRIPTION("ChromeOS EC multi function device (SPI)");