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a17d94f0 SG |
1 | /* |
2 | * ChromeOS EC multi-function device (SPI) | |
3 | * | |
4 | * Copyright (C) 2012 Google, Inc | |
5 | * | |
6 | * This software is licensed under the terms of the GNU General Public | |
7 | * License version 2, as published by the Free Software Foundation, and | |
8 | * may be copied, distributed, and modified under those terms. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | */ | |
15 | ||
16 | #include <linux/delay.h> | |
17 | #include <linux/kernel.h> | |
18 | #include <linux/module.h> | |
19 | #include <linux/mfd/cros_ec.h> | |
20 | #include <linux/mfd/cros_ec_commands.h> | |
01e73c89 | 21 | #include <linux/of.h> |
a17d94f0 SG |
22 | #include <linux/platform_device.h> |
23 | #include <linux/slab.h> | |
24 | #include <linux/spi/spi.h> | |
25 | ||
26 | ||
27 | /* The header byte, which follows the preamble */ | |
28 | #define EC_MSG_HEADER 0xec | |
29 | ||
30 | /* | |
31 | * Number of EC preamble bytes we read at a time. Since it takes | |
32 | * about 400-500us for the EC to respond there is not a lot of | |
33 | * point in tuning this. If the EC could respond faster then | |
34 | * we could increase this so that might expect the preamble and | |
35 | * message to occur in a single transaction. However, the maximum | |
36 | * SPI transfer size is 256 bytes, so at 5MHz we need a response | |
37 | * time of perhaps <320us (200 bytes / 1600 bits). | |
38 | */ | |
39 | #define EC_MSG_PREAMBLE_COUNT 32 | |
40 | ||
41 | /* | |
42 | * We must get a response from the EC in 5ms. This is a very long | |
43 | * time, but the flash write command can take 2-3ms. The EC command | |
44 | * processing is currently not very fast (about 500us). We could | |
45 | * look at speeding this up and making the flash write command a | |
46 | * 'slow' command, requiring a GET_STATUS wait loop, like flash | |
47 | * erase. | |
48 | */ | |
49 | #define EC_MSG_DEADLINE_MS 5 | |
50 | ||
51 | /* | |
52 | * Time between raising the SPI chip select (for the end of a | |
53 | * transaction) and dropping it again (for the next transaction). | |
49f91ac3 DB |
54 | * If we go too fast, the EC will miss the transaction. We know that we |
55 | * need at least 70 us with the 16 MHz STM32 EC, so go with 200 us to be | |
56 | * safe. | |
a17d94f0 | 57 | */ |
49f91ac3 | 58 | #define EC_SPI_RECOVERY_TIME_NS (200 * 1000) |
a17d94f0 SG |
59 | |
60 | /** | |
61 | * struct cros_ec_spi - information about a SPI-connected EC | |
62 | * | |
63 | * @spi: SPI device we are connected to | |
64 | * @last_transfer_ns: time that we last finished a transfer, or 0 if there | |
65 | * if no record | |
01e73c89 RK |
66 | * @end_of_msg_delay: used to set the delay_usecs on the spi_transfer that |
67 | * is sent when we want to turn off CS at the end of a transaction. | |
362196e5 | 68 | * @lock: mutex to ensure only one user of cros_ec_command_spi_xfer at a time |
a17d94f0 SG |
69 | */ |
70 | struct cros_ec_spi { | |
71 | struct spi_device *spi; | |
72 | s64 last_transfer_ns; | |
01e73c89 | 73 | unsigned int end_of_msg_delay; |
362196e5 | 74 | struct mutex lock; |
a17d94f0 SG |
75 | }; |
76 | ||
77 | static void debug_packet(struct device *dev, const char *name, u8 *ptr, | |
78 | int len) | |
79 | { | |
80 | #ifdef DEBUG | |
81 | int i; | |
82 | ||
83 | dev_dbg(dev, "%s: ", name); | |
84 | for (i = 0; i < len; i++) | |
9e146f43 TR |
85 | pr_cont(" %02x", ptr[i]); |
86 | ||
87 | pr_cont("\n"); | |
a17d94f0 SG |
88 | #endif |
89 | } | |
90 | ||
91 | /** | |
92 | * cros_ec_spi_receive_response - Receive a response from the EC. | |
93 | * | |
94 | * This function has two phases: reading the preamble bytes (since if we read | |
95 | * data from the EC before it is ready to send, we just get preamble) and | |
96 | * reading the actual message. | |
97 | * | |
98 | * The received data is placed into ec_dev->din. | |
99 | * | |
100 | * @ec_dev: ChromeOS EC device | |
101 | * @need_len: Number of message bytes we need to read | |
102 | */ | |
103 | static int cros_ec_spi_receive_response(struct cros_ec_device *ec_dev, | |
104 | int need_len) | |
105 | { | |
106 | struct cros_ec_spi *ec_spi = ec_dev->priv; | |
107 | struct spi_transfer trans; | |
108 | struct spi_message msg; | |
109 | u8 *ptr, *end; | |
110 | int ret; | |
111 | unsigned long deadline; | |
112 | int todo; | |
113 | ||
114 | /* Receive data until we see the header byte */ | |
115 | deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS); | |
c9a81d67 DA |
116 | while (true) { |
117 | unsigned long start_jiffies = jiffies; | |
118 | ||
daf93d22 | 119 | memset(&trans, 0, sizeof(trans)); |
a17d94f0 SG |
120 | trans.cs_change = 1; |
121 | trans.rx_buf = ptr = ec_dev->din; | |
122 | trans.len = EC_MSG_PREAMBLE_COUNT; | |
123 | ||
124 | spi_message_init(&msg); | |
125 | spi_message_add_tail(&trans, &msg); | |
126 | ret = spi_sync(ec_spi->spi, &msg); | |
127 | if (ret < 0) { | |
128 | dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); | |
129 | return ret; | |
130 | } | |
131 | ||
132 | for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) { | |
133 | if (*ptr == EC_MSG_HEADER) { | |
c34924b9 | 134 | dev_dbg(ec_dev->dev, "msg found at %zd\n", |
a17d94f0 SG |
135 | ptr - ec_dev->din); |
136 | break; | |
137 | } | |
138 | } | |
c9a81d67 DA |
139 | if (ptr != end) |
140 | break; | |
a17d94f0 | 141 | |
c9a81d67 DA |
142 | /* |
143 | * Use the time at the start of the loop as a timeout. This | |
144 | * gives us one last shot at getting the transfer and is useful | |
145 | * in case we got context switched out for a while. | |
146 | */ | |
147 | if (time_after(start_jiffies, deadline)) { | |
a17d94f0 SG |
148 | dev_warn(ec_dev->dev, "EC failed to respond in time\n"); |
149 | return -ETIMEDOUT; | |
150 | } | |
c9a81d67 | 151 | } |
a17d94f0 SG |
152 | |
153 | /* | |
154 | * ptr now points to the header byte. Copy any valid data to the | |
155 | * start of our buffer | |
156 | */ | |
157 | todo = end - ++ptr; | |
158 | BUG_ON(todo < 0 || todo > ec_dev->din_size); | |
159 | todo = min(todo, need_len); | |
160 | memmove(ec_dev->din, ptr, todo); | |
161 | ptr = ec_dev->din + todo; | |
162 | dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n", | |
163 | need_len, todo); | |
164 | need_len -= todo; | |
165 | ||
166 | /* Receive data until we have it all */ | |
167 | while (need_len > 0) { | |
168 | /* | |
169 | * We can't support transfers larger than the SPI FIFO size | |
170 | * unless we have DMA. We don't have DMA on the ISP SPI ports | |
171 | * for Exynos. We need a way of asking SPI driver for | |
172 | * maximum-supported transfer size. | |
173 | */ | |
174 | todo = min(need_len, 256); | |
c34924b9 | 175 | dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n", |
a17d94f0 SG |
176 | todo, need_len, ptr - ec_dev->din); |
177 | ||
daf93d22 | 178 | memset(&trans, 0, sizeof(trans)); |
a17d94f0 SG |
179 | trans.cs_change = 1; |
180 | trans.rx_buf = ptr; | |
181 | trans.len = todo; | |
182 | spi_message_init(&msg); | |
183 | spi_message_add_tail(&trans, &msg); | |
184 | ||
185 | /* send command to EC and read answer */ | |
186 | BUG_ON((u8 *)trans.rx_buf - ec_dev->din + todo > | |
187 | ec_dev->din_size); | |
188 | ret = spi_sync(ec_spi->spi, &msg); | |
189 | if (ret < 0) { | |
190 | dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); | |
191 | return ret; | |
192 | } | |
193 | ||
194 | debug_packet(ec_dev->dev, "interim", ptr, todo); | |
195 | ptr += todo; | |
196 | need_len -= todo; | |
197 | } | |
198 | ||
c34924b9 | 199 | dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din); |
a17d94f0 SG |
200 | |
201 | return 0; | |
202 | } | |
203 | ||
204 | /** | |
205 | * cros_ec_command_spi_xfer - Transfer a message over SPI and receive the reply | |
206 | * | |
207 | * @ec_dev: ChromeOS EC device | |
208 | * @ec_msg: Message to transfer | |
209 | */ | |
210 | static int cros_ec_command_spi_xfer(struct cros_ec_device *ec_dev, | |
211 | struct cros_ec_msg *ec_msg) | |
212 | { | |
213 | struct cros_ec_spi *ec_spi = ec_dev->priv; | |
214 | struct spi_transfer trans; | |
215 | struct spi_message msg; | |
216 | int i, len; | |
217 | u8 *ptr; | |
218 | int sum; | |
219 | int ret = 0, final_ret; | |
220 | struct timespec ts; | |
221 | ||
362196e5 DA |
222 | /* |
223 | * We have the shared ec_dev buffer plus we do lots of separate spi_sync | |
224 | * calls, so we need to make sure only one person is using this at a | |
225 | * time. | |
226 | */ | |
227 | mutex_lock(&ec_spi->lock); | |
228 | ||
a17d94f0 SG |
229 | len = cros_ec_prepare_tx(ec_dev, ec_msg); |
230 | dev_dbg(ec_dev->dev, "prepared, len=%d\n", len); | |
231 | ||
232 | /* If it's too soon to do another transaction, wait */ | |
233 | if (ec_spi->last_transfer_ns) { | |
234 | struct timespec ts; | |
235 | unsigned long delay; /* The delay completed so far */ | |
236 | ||
237 | ktime_get_ts(&ts); | |
238 | delay = timespec_to_ns(&ts) - ec_spi->last_transfer_ns; | |
239 | if (delay < EC_SPI_RECOVERY_TIME_NS) | |
1fe36866 | 240 | ndelay(EC_SPI_RECOVERY_TIME_NS - delay); |
a17d94f0 SG |
241 | } |
242 | ||
243 | /* Transmit phase - send our message */ | |
244 | debug_packet(ec_dev->dev, "out", ec_dev->dout, len); | |
daf93d22 | 245 | memset(&trans, 0, sizeof(trans)); |
a17d94f0 SG |
246 | trans.tx_buf = ec_dev->dout; |
247 | trans.len = len; | |
248 | trans.cs_change = 1; | |
249 | spi_message_init(&msg); | |
250 | spi_message_add_tail(&trans, &msg); | |
251 | ret = spi_sync(ec_spi->spi, &msg); | |
252 | ||
253 | /* Get the response */ | |
254 | if (!ret) { | |
255 | ret = cros_ec_spi_receive_response(ec_dev, | |
256 | ec_msg->in_len + EC_MSG_TX_PROTO_BYTES); | |
257 | } else { | |
258 | dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); | |
259 | } | |
260 | ||
261 | /* turn off CS */ | |
262 | spi_message_init(&msg); | |
01e73c89 RK |
263 | |
264 | if (ec_spi->end_of_msg_delay) { | |
265 | /* | |
266 | * Add delay for last transaction, to ensure the rising edge | |
267 | * doesn't come too soon after the end of the data. | |
268 | */ | |
269 | memset(&trans, 0, sizeof(trans)); | |
270 | trans.delay_usecs = ec_spi->end_of_msg_delay; | |
271 | spi_message_add_tail(&trans, &msg); | |
272 | } | |
273 | ||
a17d94f0 SG |
274 | final_ret = spi_sync(ec_spi->spi, &msg); |
275 | ktime_get_ts(&ts); | |
276 | ec_spi->last_transfer_ns = timespec_to_ns(&ts); | |
277 | if (!ret) | |
278 | ret = final_ret; | |
279 | if (ret < 0) { | |
280 | dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); | |
362196e5 | 281 | goto exit; |
a17d94f0 SG |
282 | } |
283 | ||
284 | /* check response error code */ | |
285 | ptr = ec_dev->din; | |
286 | if (ptr[0]) { | |
287 | dev_warn(ec_dev->dev, "command 0x%02x returned an error %d\n", | |
288 | ec_msg->cmd, ptr[0]); | |
289 | debug_packet(ec_dev->dev, "in_err", ptr, len); | |
362196e5 DA |
290 | ret = -EINVAL; |
291 | goto exit; | |
a17d94f0 SG |
292 | } |
293 | len = ptr[1]; | |
294 | sum = ptr[0] + ptr[1]; | |
295 | if (len > ec_msg->in_len) { | |
296 | dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)", | |
297 | len, ec_msg->in_len); | |
362196e5 DA |
298 | ret = -ENOSPC; |
299 | goto exit; | |
a17d94f0 SG |
300 | } |
301 | ||
302 | /* copy response packet payload and compute checksum */ | |
303 | for (i = 0; i < len; i++) { | |
304 | sum += ptr[i + 2]; | |
305 | if (ec_msg->in_len) | |
306 | ec_msg->in_buf[i] = ptr[i + 2]; | |
307 | } | |
308 | sum &= 0xff; | |
309 | ||
310 | debug_packet(ec_dev->dev, "in", ptr, len + 3); | |
311 | ||
312 | if (sum != ptr[len + 2]) { | |
313 | dev_err(ec_dev->dev, | |
314 | "bad packet checksum, expected %02x, got %02x\n", | |
315 | sum, ptr[len + 2]); | |
362196e5 DA |
316 | ret = -EBADMSG; |
317 | goto exit; | |
a17d94f0 SG |
318 | } |
319 | ||
362196e5 DA |
320 | ret = 0; |
321 | exit: | |
322 | mutex_unlock(&ec_spi->lock); | |
323 | return ret; | |
a17d94f0 SG |
324 | } |
325 | ||
01e73c89 RK |
326 | static void cros_ec_spi_dt_probe(struct cros_ec_spi *ec_spi, struct device *dev) |
327 | { | |
328 | struct device_node *np = dev->of_node; | |
329 | u32 val; | |
330 | int ret; | |
331 | ||
332 | ret = of_property_read_u32(np, "google,cros-ec-spi-msg-delay", &val); | |
333 | if (!ret) | |
334 | ec_spi->end_of_msg_delay = val; | |
335 | } | |
336 | ||
9922b412 | 337 | static int cros_ec_spi_probe(struct spi_device *spi) |
a17d94f0 SG |
338 | { |
339 | struct device *dev = &spi->dev; | |
340 | struct cros_ec_device *ec_dev; | |
341 | struct cros_ec_spi *ec_spi; | |
342 | int err; | |
343 | ||
344 | spi->bits_per_word = 8; | |
345 | spi->mode = SPI_MODE_0; | |
346 | err = spi_setup(spi); | |
347 | if (err < 0) | |
348 | return err; | |
349 | ||
350 | ec_spi = devm_kzalloc(dev, sizeof(*ec_spi), GFP_KERNEL); | |
351 | if (ec_spi == NULL) | |
352 | return -ENOMEM; | |
353 | ec_spi->spi = spi; | |
362196e5 | 354 | mutex_init(&ec_spi->lock); |
a17d94f0 SG |
355 | ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL); |
356 | if (!ec_dev) | |
357 | return -ENOMEM; | |
358 | ||
01e73c89 RK |
359 | /* Check for any DT properties */ |
360 | cros_ec_spi_dt_probe(ec_spi, dev); | |
361 | ||
a17d94f0 SG |
362 | spi_set_drvdata(spi, ec_dev); |
363 | ec_dev->name = "SPI"; | |
364 | ec_dev->dev = dev; | |
365 | ec_dev->priv = ec_spi; | |
366 | ec_dev->irq = spi->irq; | |
367 | ec_dev->command_xfer = cros_ec_command_spi_xfer; | |
368 | ec_dev->ec_name = ec_spi->spi->modalias; | |
369 | ec_dev->phys_name = dev_name(&ec_spi->spi->dev); | |
370 | ec_dev->parent = &ec_spi->spi->dev; | |
371 | ec_dev->din_size = EC_MSG_BYTES + EC_MSG_PREAMBLE_COUNT; | |
372 | ec_dev->dout_size = EC_MSG_BYTES; | |
373 | ||
374 | err = cros_ec_register(ec_dev); | |
375 | if (err) { | |
376 | dev_err(dev, "cannot register EC\n"); | |
377 | return err; | |
378 | } | |
379 | ||
380 | return 0; | |
381 | } | |
382 | ||
9922b412 | 383 | static int cros_ec_spi_remove(struct spi_device *spi) |
a17d94f0 SG |
384 | { |
385 | struct cros_ec_device *ec_dev; | |
386 | ||
387 | ec_dev = spi_get_drvdata(spi); | |
388 | cros_ec_remove(ec_dev); | |
389 | ||
390 | return 0; | |
391 | } | |
392 | ||
393 | #ifdef CONFIG_PM_SLEEP | |
394 | static int cros_ec_spi_suspend(struct device *dev) | |
395 | { | |
396 | struct cros_ec_device *ec_dev = dev_get_drvdata(dev); | |
397 | ||
398 | return cros_ec_suspend(ec_dev); | |
399 | } | |
400 | ||
401 | static int cros_ec_spi_resume(struct device *dev) | |
402 | { | |
403 | struct cros_ec_device *ec_dev = dev_get_drvdata(dev); | |
404 | ||
405 | return cros_ec_resume(ec_dev); | |
406 | } | |
407 | #endif | |
408 | ||
409 | static SIMPLE_DEV_PM_OPS(cros_ec_spi_pm_ops, cros_ec_spi_suspend, | |
410 | cros_ec_spi_resume); | |
411 | ||
412 | static const struct spi_device_id cros_ec_spi_id[] = { | |
413 | { "cros-ec-spi", 0 }, | |
414 | { } | |
415 | }; | |
416 | MODULE_DEVICE_TABLE(spi, cros_ec_spi_id); | |
417 | ||
418 | static struct spi_driver cros_ec_driver_spi = { | |
419 | .driver = { | |
420 | .name = "cros-ec-spi", | |
421 | .owner = THIS_MODULE, | |
422 | .pm = &cros_ec_spi_pm_ops, | |
423 | }, | |
9922b412 TR |
424 | .probe = cros_ec_spi_probe, |
425 | .remove = cros_ec_spi_remove, | |
a17d94f0 SG |
426 | .id_table = cros_ec_spi_id, |
427 | }; | |
428 | ||
429 | module_spi_driver(cros_ec_driver_spi); | |
430 | ||
ea0f8b0b | 431 | MODULE_LICENSE("GPL v2"); |
a17d94f0 | 432 | MODULE_DESCRIPTION("ChromeOS EC multi function device (SPI)"); |