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a17d94f0 SG |
1 | /* |
2 | * ChromeOS EC multi-function device (SPI) | |
3 | * | |
4 | * Copyright (C) 2012 Google, Inc | |
5 | * | |
6 | * This software is licensed under the terms of the GNU General Public | |
7 | * License version 2, as published by the Free Software Foundation, and | |
8 | * may be copied, distributed, and modified under those terms. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | */ | |
15 | ||
16 | #include <linux/delay.h> | |
17 | #include <linux/kernel.h> | |
18 | #include <linux/module.h> | |
19 | #include <linux/mfd/cros_ec.h> | |
20 | #include <linux/mfd/cros_ec_commands.h> | |
21 | #include <linux/platform_device.h> | |
22 | #include <linux/slab.h> | |
23 | #include <linux/spi/spi.h> | |
24 | ||
25 | ||
26 | /* The header byte, which follows the preamble */ | |
27 | #define EC_MSG_HEADER 0xec | |
28 | ||
29 | /* | |
30 | * Number of EC preamble bytes we read at a time. Since it takes | |
31 | * about 400-500us for the EC to respond there is not a lot of | |
32 | * point in tuning this. If the EC could respond faster then | |
33 | * we could increase this so that might expect the preamble and | |
34 | * message to occur in a single transaction. However, the maximum | |
35 | * SPI transfer size is 256 bytes, so at 5MHz we need a response | |
36 | * time of perhaps <320us (200 bytes / 1600 bits). | |
37 | */ | |
38 | #define EC_MSG_PREAMBLE_COUNT 32 | |
39 | ||
40 | /* | |
41 | * We must get a response from the EC in 5ms. This is a very long | |
42 | * time, but the flash write command can take 2-3ms. The EC command | |
43 | * processing is currently not very fast (about 500us). We could | |
44 | * look at speeding this up and making the flash write command a | |
45 | * 'slow' command, requiring a GET_STATUS wait loop, like flash | |
46 | * erase. | |
47 | */ | |
48 | #define EC_MSG_DEADLINE_MS 5 | |
49 | ||
50 | /* | |
51 | * Time between raising the SPI chip select (for the end of a | |
52 | * transaction) and dropping it again (for the next transaction). | |
49f91ac3 DB |
53 | * If we go too fast, the EC will miss the transaction. We know that we |
54 | * need at least 70 us with the 16 MHz STM32 EC, so go with 200 us to be | |
55 | * safe. | |
a17d94f0 | 56 | */ |
49f91ac3 | 57 | #define EC_SPI_RECOVERY_TIME_NS (200 * 1000) |
a17d94f0 SG |
58 | |
59 | /** | |
60 | * struct cros_ec_spi - information about a SPI-connected EC | |
61 | * | |
62 | * @spi: SPI device we are connected to | |
63 | * @last_transfer_ns: time that we last finished a transfer, or 0 if there | |
64 | * if no record | |
65 | */ | |
66 | struct cros_ec_spi { | |
67 | struct spi_device *spi; | |
68 | s64 last_transfer_ns; | |
69 | }; | |
70 | ||
71 | static void debug_packet(struct device *dev, const char *name, u8 *ptr, | |
72 | int len) | |
73 | { | |
74 | #ifdef DEBUG | |
75 | int i; | |
76 | ||
77 | dev_dbg(dev, "%s: ", name); | |
78 | for (i = 0; i < len; i++) | |
9e146f43 TR |
79 | pr_cont(" %02x", ptr[i]); |
80 | ||
81 | pr_cont("\n"); | |
a17d94f0 SG |
82 | #endif |
83 | } | |
84 | ||
85 | /** | |
86 | * cros_ec_spi_receive_response - Receive a response from the EC. | |
87 | * | |
88 | * This function has two phases: reading the preamble bytes (since if we read | |
89 | * data from the EC before it is ready to send, we just get preamble) and | |
90 | * reading the actual message. | |
91 | * | |
92 | * The received data is placed into ec_dev->din. | |
93 | * | |
94 | * @ec_dev: ChromeOS EC device | |
95 | * @need_len: Number of message bytes we need to read | |
96 | */ | |
97 | static int cros_ec_spi_receive_response(struct cros_ec_device *ec_dev, | |
98 | int need_len) | |
99 | { | |
100 | struct cros_ec_spi *ec_spi = ec_dev->priv; | |
101 | struct spi_transfer trans; | |
102 | struct spi_message msg; | |
103 | u8 *ptr, *end; | |
104 | int ret; | |
105 | unsigned long deadline; | |
106 | int todo; | |
107 | ||
108 | /* Receive data until we see the header byte */ | |
109 | deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS); | |
110 | do { | |
111 | memset(&trans, '\0', sizeof(trans)); | |
112 | trans.cs_change = 1; | |
113 | trans.rx_buf = ptr = ec_dev->din; | |
114 | trans.len = EC_MSG_PREAMBLE_COUNT; | |
115 | ||
116 | spi_message_init(&msg); | |
117 | spi_message_add_tail(&trans, &msg); | |
118 | ret = spi_sync(ec_spi->spi, &msg); | |
119 | if (ret < 0) { | |
120 | dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); | |
121 | return ret; | |
122 | } | |
123 | ||
124 | for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) { | |
125 | if (*ptr == EC_MSG_HEADER) { | |
c34924b9 | 126 | dev_dbg(ec_dev->dev, "msg found at %zd\n", |
a17d94f0 SG |
127 | ptr - ec_dev->din); |
128 | break; | |
129 | } | |
130 | } | |
131 | ||
132 | if (time_after(jiffies, deadline)) { | |
133 | dev_warn(ec_dev->dev, "EC failed to respond in time\n"); | |
134 | return -ETIMEDOUT; | |
135 | } | |
136 | } while (ptr == end); | |
137 | ||
138 | /* | |
139 | * ptr now points to the header byte. Copy any valid data to the | |
140 | * start of our buffer | |
141 | */ | |
142 | todo = end - ++ptr; | |
143 | BUG_ON(todo < 0 || todo > ec_dev->din_size); | |
144 | todo = min(todo, need_len); | |
145 | memmove(ec_dev->din, ptr, todo); | |
146 | ptr = ec_dev->din + todo; | |
147 | dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n", | |
148 | need_len, todo); | |
149 | need_len -= todo; | |
150 | ||
151 | /* Receive data until we have it all */ | |
152 | while (need_len > 0) { | |
153 | /* | |
154 | * We can't support transfers larger than the SPI FIFO size | |
155 | * unless we have DMA. We don't have DMA on the ISP SPI ports | |
156 | * for Exynos. We need a way of asking SPI driver for | |
157 | * maximum-supported transfer size. | |
158 | */ | |
159 | todo = min(need_len, 256); | |
c34924b9 | 160 | dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n", |
a17d94f0 SG |
161 | todo, need_len, ptr - ec_dev->din); |
162 | ||
163 | memset(&trans, '\0', sizeof(trans)); | |
164 | trans.cs_change = 1; | |
165 | trans.rx_buf = ptr; | |
166 | trans.len = todo; | |
167 | spi_message_init(&msg); | |
168 | spi_message_add_tail(&trans, &msg); | |
169 | ||
170 | /* send command to EC and read answer */ | |
171 | BUG_ON((u8 *)trans.rx_buf - ec_dev->din + todo > | |
172 | ec_dev->din_size); | |
173 | ret = spi_sync(ec_spi->spi, &msg); | |
174 | if (ret < 0) { | |
175 | dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); | |
176 | return ret; | |
177 | } | |
178 | ||
179 | debug_packet(ec_dev->dev, "interim", ptr, todo); | |
180 | ptr += todo; | |
181 | need_len -= todo; | |
182 | } | |
183 | ||
c34924b9 | 184 | dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din); |
a17d94f0 SG |
185 | |
186 | return 0; | |
187 | } | |
188 | ||
189 | /** | |
190 | * cros_ec_command_spi_xfer - Transfer a message over SPI and receive the reply | |
191 | * | |
192 | * @ec_dev: ChromeOS EC device | |
193 | * @ec_msg: Message to transfer | |
194 | */ | |
195 | static int cros_ec_command_spi_xfer(struct cros_ec_device *ec_dev, | |
196 | struct cros_ec_msg *ec_msg) | |
197 | { | |
198 | struct cros_ec_spi *ec_spi = ec_dev->priv; | |
199 | struct spi_transfer trans; | |
200 | struct spi_message msg; | |
201 | int i, len; | |
202 | u8 *ptr; | |
203 | int sum; | |
204 | int ret = 0, final_ret; | |
205 | struct timespec ts; | |
206 | ||
207 | len = cros_ec_prepare_tx(ec_dev, ec_msg); | |
208 | dev_dbg(ec_dev->dev, "prepared, len=%d\n", len); | |
209 | ||
210 | /* If it's too soon to do another transaction, wait */ | |
211 | if (ec_spi->last_transfer_ns) { | |
212 | struct timespec ts; | |
213 | unsigned long delay; /* The delay completed so far */ | |
214 | ||
215 | ktime_get_ts(&ts); | |
216 | delay = timespec_to_ns(&ts) - ec_spi->last_transfer_ns; | |
217 | if (delay < EC_SPI_RECOVERY_TIME_NS) | |
218 | ndelay(delay); | |
219 | } | |
220 | ||
221 | /* Transmit phase - send our message */ | |
222 | debug_packet(ec_dev->dev, "out", ec_dev->dout, len); | |
223 | memset(&trans, '\0', sizeof(trans)); | |
224 | trans.tx_buf = ec_dev->dout; | |
225 | trans.len = len; | |
226 | trans.cs_change = 1; | |
227 | spi_message_init(&msg); | |
228 | spi_message_add_tail(&trans, &msg); | |
229 | ret = spi_sync(ec_spi->spi, &msg); | |
230 | ||
231 | /* Get the response */ | |
232 | if (!ret) { | |
233 | ret = cros_ec_spi_receive_response(ec_dev, | |
234 | ec_msg->in_len + EC_MSG_TX_PROTO_BYTES); | |
235 | } else { | |
236 | dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); | |
237 | } | |
238 | ||
239 | /* turn off CS */ | |
240 | spi_message_init(&msg); | |
241 | final_ret = spi_sync(ec_spi->spi, &msg); | |
242 | ktime_get_ts(&ts); | |
243 | ec_spi->last_transfer_ns = timespec_to_ns(&ts); | |
244 | if (!ret) | |
245 | ret = final_ret; | |
246 | if (ret < 0) { | |
247 | dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); | |
248 | return ret; | |
249 | } | |
250 | ||
251 | /* check response error code */ | |
252 | ptr = ec_dev->din; | |
253 | if (ptr[0]) { | |
254 | dev_warn(ec_dev->dev, "command 0x%02x returned an error %d\n", | |
255 | ec_msg->cmd, ptr[0]); | |
256 | debug_packet(ec_dev->dev, "in_err", ptr, len); | |
257 | return -EINVAL; | |
258 | } | |
259 | len = ptr[1]; | |
260 | sum = ptr[0] + ptr[1]; | |
261 | if (len > ec_msg->in_len) { | |
262 | dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)", | |
263 | len, ec_msg->in_len); | |
264 | return -ENOSPC; | |
265 | } | |
266 | ||
267 | /* copy response packet payload and compute checksum */ | |
268 | for (i = 0; i < len; i++) { | |
269 | sum += ptr[i + 2]; | |
270 | if (ec_msg->in_len) | |
271 | ec_msg->in_buf[i] = ptr[i + 2]; | |
272 | } | |
273 | sum &= 0xff; | |
274 | ||
275 | debug_packet(ec_dev->dev, "in", ptr, len + 3); | |
276 | ||
277 | if (sum != ptr[len + 2]) { | |
278 | dev_err(ec_dev->dev, | |
279 | "bad packet checksum, expected %02x, got %02x\n", | |
280 | sum, ptr[len + 2]); | |
281 | return -EBADMSG; | |
282 | } | |
283 | ||
284 | return 0; | |
285 | } | |
286 | ||
287 | static int cros_ec_probe_spi(struct spi_device *spi) | |
288 | { | |
289 | struct device *dev = &spi->dev; | |
290 | struct cros_ec_device *ec_dev; | |
291 | struct cros_ec_spi *ec_spi; | |
292 | int err; | |
293 | ||
294 | spi->bits_per_word = 8; | |
295 | spi->mode = SPI_MODE_0; | |
296 | err = spi_setup(spi); | |
297 | if (err < 0) | |
298 | return err; | |
299 | ||
300 | ec_spi = devm_kzalloc(dev, sizeof(*ec_spi), GFP_KERNEL); | |
301 | if (ec_spi == NULL) | |
302 | return -ENOMEM; | |
303 | ec_spi->spi = spi; | |
304 | ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL); | |
305 | if (!ec_dev) | |
306 | return -ENOMEM; | |
307 | ||
308 | spi_set_drvdata(spi, ec_dev); | |
309 | ec_dev->name = "SPI"; | |
310 | ec_dev->dev = dev; | |
311 | ec_dev->priv = ec_spi; | |
312 | ec_dev->irq = spi->irq; | |
313 | ec_dev->command_xfer = cros_ec_command_spi_xfer; | |
314 | ec_dev->ec_name = ec_spi->spi->modalias; | |
315 | ec_dev->phys_name = dev_name(&ec_spi->spi->dev); | |
316 | ec_dev->parent = &ec_spi->spi->dev; | |
317 | ec_dev->din_size = EC_MSG_BYTES + EC_MSG_PREAMBLE_COUNT; | |
318 | ec_dev->dout_size = EC_MSG_BYTES; | |
319 | ||
320 | err = cros_ec_register(ec_dev); | |
321 | if (err) { | |
322 | dev_err(dev, "cannot register EC\n"); | |
323 | return err; | |
324 | } | |
325 | ||
326 | return 0; | |
327 | } | |
328 | ||
329 | static int cros_ec_remove_spi(struct spi_device *spi) | |
330 | { | |
331 | struct cros_ec_device *ec_dev; | |
332 | ||
333 | ec_dev = spi_get_drvdata(spi); | |
334 | cros_ec_remove(ec_dev); | |
335 | ||
336 | return 0; | |
337 | } | |
338 | ||
339 | #ifdef CONFIG_PM_SLEEP | |
340 | static int cros_ec_spi_suspend(struct device *dev) | |
341 | { | |
342 | struct cros_ec_device *ec_dev = dev_get_drvdata(dev); | |
343 | ||
344 | return cros_ec_suspend(ec_dev); | |
345 | } | |
346 | ||
347 | static int cros_ec_spi_resume(struct device *dev) | |
348 | { | |
349 | struct cros_ec_device *ec_dev = dev_get_drvdata(dev); | |
350 | ||
351 | return cros_ec_resume(ec_dev); | |
352 | } | |
353 | #endif | |
354 | ||
355 | static SIMPLE_DEV_PM_OPS(cros_ec_spi_pm_ops, cros_ec_spi_suspend, | |
356 | cros_ec_spi_resume); | |
357 | ||
358 | static const struct spi_device_id cros_ec_spi_id[] = { | |
359 | { "cros-ec-spi", 0 }, | |
360 | { } | |
361 | }; | |
362 | MODULE_DEVICE_TABLE(spi, cros_ec_spi_id); | |
363 | ||
364 | static struct spi_driver cros_ec_driver_spi = { | |
365 | .driver = { | |
366 | .name = "cros-ec-spi", | |
367 | .owner = THIS_MODULE, | |
368 | .pm = &cros_ec_spi_pm_ops, | |
369 | }, | |
370 | .probe = cros_ec_probe_spi, | |
371 | .remove = cros_ec_remove_spi, | |
372 | .id_table = cros_ec_spi_id, | |
373 | }; | |
374 | ||
375 | module_spi_driver(cros_ec_driver_spi); | |
376 | ||
377 | MODULE_LICENSE("GPL"); | |
378 | MODULE_DESCRIPTION("ChromeOS EC multi function device (SPI)"); |