[mirror_ubuntu-bionic-kernel.git] / drivers / mfd / lpc_sch.c

/*
 *  lpc_sch.c - LPC interface for Intel Poulsbo SCH
 *
 *  LPC bridge function of the Intel SCH contains many other
 *  functional units, such as Interrupt controllers, Timers,
 *  Power Management, System Management, GPIO, RTC, and LPC
 *  Configuration Registers.
 *
 *  Copyright (c) 2010 CompuLab Ltd
 *  Author: Denis Turischev <denis@compulab.co.il>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License 2 as published
 *  by the Free Software Foundation.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; see the file COPYING.  If not, write to
 *  the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/errno.h>
#include <linux/acpi.h>
#include <linux/pci.h>
#include <linux/mfd/core.h>

#define SMBASE		0x40
#define SMBUS_IO_SIZE	64

#define GPIOBASE	0x44
#define GPIO_IO_SIZE	64
#define GPIO_IO_SIZE_CENTERTON	128

#define WDTBASE		0x84
#define WDT_IO_SIZE	64

static struct resource smbus_sch_resource = {
		.flags = IORESOURCE_IO,
};

static struct resource gpio_sch_resource = {
		.flags = IORESOURCE_IO,
};

static struct resource wdt_sch_resource = {
		.flags = IORESOURCE_IO,
};

static struct mfd_cell lpc_sch_cells[3];

static struct mfd_cell isch_smbus_cell = {
	.name = "isch_smbus",
	.num_resources = 1,
	.resources = &smbus_sch_resource,
	.ignore_resource_conflicts = true,
};

static struct mfd_cell sch_gpio_cell = {
	.name = "sch_gpio",
	.num_resources = 1,
	.resources = &gpio_sch_resource,
	.ignore_resource_conflicts = true,
};

static struct mfd_cell wdt_sch_cell = {
	.name = "ie6xx_wdt",
	.num_resources = 1,
	.resources = &wdt_sch_resource,
	.ignore_resource_conflicts = true,
};

static const struct pci_device_id lpc_sch_ids[] = {
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SCH_LPC) },
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ITC_LPC) },
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CENTERTON_ILB) },
	{ 0, }
};
MODULE_DEVICE_TABLE(pci, lpc_sch_ids);

static int lpc_sch_probe(struct pci_dev *dev,
				const struct pci_device_id *id)
{
	unsigned int base_addr_cfg;
	unsigned short base_addr;
	int i, cells = 0;
	int ret;

	pci_read_config_dword(dev, SMBASE, &base_addr_cfg);
	base_addr = 0;
	if (!(base_addr_cfg & (1 << 31)))
		dev_warn(&dev->dev, "Decode of the SMBus I/O range disabled\n");
	else
		base_addr = (unsigned short)base_addr_cfg;

	if (base_addr == 0) {
		dev_warn(&dev->dev, "I/O space for SMBus uninitialized\n");
	} else {
		lpc_sch_cells[cells++] = isch_smbus_cell;
		smbus_sch_resource.start = base_addr;
		smbus_sch_resource.end = base_addr + SMBUS_IO_SIZE - 1;
	}

	pci_read_config_dword(dev, GPIOBASE, &base_addr_cfg);
	base_addr = 0;
	if (!(base_addr_cfg & (1 << 31)))
		dev_warn(&dev->dev, "Decode of the GPIO I/O range disabled\n");
	else
		base_addr = (unsigned short)base_addr_cfg;

	if (base_addr == 0) {
		dev_warn(&dev->dev, "I/O space for GPIO uninitialized\n");
	} else {
		lpc_sch_cells[cells++] = sch_gpio_cell;
		gpio_sch_resource.start = base_addr;
		if (id->device == PCI_DEVICE_ID_INTEL_CENTERTON_ILB)
			gpio_sch_resource.end = base_addr + GPIO_IO_SIZE_CENTERTON - 1;
		else
			gpio_sch_resource.end = base_addr + GPIO_IO_SIZE - 1;
	}

	if (id->device == PCI_DEVICE_ID_INTEL_ITC_LPC
	    || id->device == PCI_DEVICE_ID_INTEL_CENTERTON_ILB) {
		pci_read_config_dword(dev, WDTBASE, &base_addr_cfg);
		base_addr = 0;
		if (!(base_addr_cfg & (1 << 31)))
			dev_warn(&dev->dev, "Decode of the WDT I/O range disabled\n");
		else
			base_addr = (unsigned short)base_addr_cfg;
		if (base_addr == 0)
			dev_warn(&dev->dev, "I/O space for WDT uninitialized\n");
		else {
			lpc_sch_cells[cells++] = wdt_sch_cell;
			wdt_sch_resource.start = base_addr;
			wdt_sch_resource.end = base_addr + WDT_IO_SIZE - 1;
		}
	}

	if (WARN_ON(cells > ARRAY_SIZE(lpc_sch_cells))) {
		dev_err(&dev->dev, "Cell count exceeds array size");
		return -ENODEV;
	}

	if (cells == 0) {
		dev_err(&dev->dev, "All decode registers disabled.\n");
		return -ENODEV;
	}

	for (i = 0; i < cells; i++)
		lpc_sch_cells[i].id = id->device;

	ret = mfd_add_devices(&dev->dev, 0, lpc_sch_cells, cells, NULL, 0, NULL);
	if (ret)
		mfd_remove_devices(&dev->dev);

	return ret;
}

static void lpc_sch_remove(struct pci_dev *dev)
{
	mfd_remove_devices(&dev->dev);
}

static struct pci_driver lpc_sch_driver = {
	.name		= "lpc_sch",
	.id_table	= lpc_sch_ids,
	.probe		= lpc_sch_probe,
	.remove		= lpc_sch_remove,
};

module_pci_driver(lpc_sch_driver);

MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>");
MODULE_DESCRIPTION("LPC interface for Intel Poulsbo SCH");
MODULE_LICENSE("GPL");
Commit	Line	Data
e82c60ae DT	1	/*
	2	* lpc_sch.c - LPC interface for Intel Poulsbo SCH
	3	*
	4	* LPC bridge function of the Intel SCH contains many other
	5	* functional units, such as Interrupt controllers, Timers,
	6	* Power Management, System Management, GPIO, RTC, and LPC
	7	* Configuration Registers.
	8	*
	9	* Copyright (c) 2010 CompuLab Ltd
	10	* Author: Denis Turischev <denis@compulab.co.il>
	11	*
	12	* This program is free software; you can redistribute it and/or modify
	13	* it under the terms of the GNU General Public License 2 as published
	14	* by the Free Software Foundation.
	15	*
	16	* This program is distributed in the hope that it will be useful,
	17	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	* GNU General Public License for more details.
	20	*
	21	* You should have received a copy of the GNU General Public License
	22	* along with this program; see the file COPYING. If not, write to
	23	* the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
	24	*/
	25
	26	#include <linux/init.h>
	27	#include <linux/kernel.h>
	28	#include <linux/module.h>
	29	#include <linux/errno.h>
	30	#include <linux/acpi.h>
	31	#include <linux/pci.h>
	32	#include <linux/mfd/core.h>
	33
	34	#define SMBASE 0x40
	35	#define SMBUS_IO_SIZE 64
	36
	37	#define GPIOBASE 0x44
	38	#define GPIO_IO_SIZE 64
8ee3c2a7	39	#define GPIO_IO_SIZE_CENTERTON 128
e82c60ae	40
19921ef6 AS	41	#define WDTBASE 0x84
	42	#define WDT_IO_SIZE 64
	43
e82c60ae DT	44	static struct resource smbus_sch_resource = {
	45	.flags = IORESOURCE_IO,
	46	};
	47
e82c60ae DT	48	static struct resource gpio_sch_resource = {
	49	.flags = IORESOURCE_IO,
	50	};
	51
19921ef6 AS	52	static struct resource wdt_sch_resource = {
	53	.flags = IORESOURCE_IO,
	54	};
	55
5829e9b6 DH	56	static struct mfd_cell lpc_sch_cells[3];
	57
	58	static struct mfd_cell isch_smbus_cell = {
	59	.name = "isch_smbus",
	60	.num_resources = 1,
	61	.resources = &smbus_sch_resource,
6bfd1e63	62	.ignore_resource_conflicts = true,
5829e9b6 DH	63	};
	64
	65	static struct mfd_cell sch_gpio_cell = {
	66	.name = "sch_gpio",
	67	.num_resources = 1,
	68	.resources = &gpio_sch_resource,
6bfd1e63	69	.ignore_resource_conflicts = true,
5829e9b6 DH	70	};
	71
	72	static struct mfd_cell wdt_sch_cell = {
	73	.name = "ie6xx_wdt",
	74	.num_resources = 1,
	75	.resources = &wdt_sch_resource,
6bfd1e63	76	.ignore_resource_conflicts = true,
19921ef6 AS	77	};
19921ef6 AS	78
36fcd06c	79	static const struct pci_device_id lpc_sch_ids[] = {
e82c60ae	80	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SCH_LPC) },
e967f77d	81	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ITC_LPC) },
8ee3c2a7	82	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CENTERTON_ILB) },
e82c60ae DT	83	{ 0, }
	84	};
	85	MODULE_DEVICE_TABLE(pci, lpc_sch_ids);
	86
f791be49	87	static int lpc_sch_probe(struct pci_dev *dev,
e82c60ae DT	88	const struct pci_device_id *id)
	89	{
	90	unsigned int base_addr_cfg;
	91	unsigned short base_addr;
5829e9b6	92	int i, cells = 0;
19921ef6	93	int ret;
e82c60ae DT	94
e82c60ae DT	95	pci_read_config_dword(dev, SMBASE, &base_addr_cfg);
5829e9b6 DH	96	base_addr = 0;
	97	if (!(base_addr_cfg & (1 << 31)))
	98	dev_warn(&dev->dev, "Decode of the SMBus I/O range disabled\n");
	99	else
	100	base_addr = (unsigned short)base_addr_cfg;
e82c60ae	101
e82c60ae	102	if (base_addr == 0) {
5829e9b6 DH	103	dev_warn(&dev->dev, "I/O space for SMBus uninitialized\n");
	104	} else {
	105	lpc_sch_cells[cells++] = isch_smbus_cell;
	106	smbus_sch_resource.start = base_addr;
	107	smbus_sch_resource.end = base_addr + SMBUS_IO_SIZE - 1;
e82c60ae DT	108	}
e82c60ae DT	109
5829e9b6 DH	110	pci_read_config_dword(dev, GPIOBASE, &base_addr_cfg);
	111	base_addr = 0;
	112	if (!(base_addr_cfg & (1 << 31)))
	113	dev_warn(&dev->dev, "Decode of the GPIO I/O range disabled\n");
8ee3c2a7	114	else
5829e9b6	115	base_addr = (unsigned short)base_addr_cfg;
e967f77d	116
5829e9b6 DH	117	if (base_addr == 0) {
	118	dev_warn(&dev->dev, "I/O space for GPIO uninitialized\n");
	119	} else {
	120	lpc_sch_cells[cells++] = sch_gpio_cell;
	121	gpio_sch_resource.start = base_addr;
	122	if (id->device == PCI_DEVICE_ID_INTEL_CENTERTON_ILB)
	123	gpio_sch_resource.end = base_addr + GPIO_IO_SIZE_CENTERTON - 1;
	124	else
	125	gpio_sch_resource.end = base_addr + GPIO_IO_SIZE - 1;
	126	}
19921ef6	127
8ee3c2a7	128	if (id->device == PCI_DEVICE_ID_INTEL_ITC_LPC
5829e9b6	129	\|\| id->device == PCI_DEVICE_ID_INTEL_CENTERTON_ILB) {
19921ef6	130	pci_read_config_dword(dev, WDTBASE, &base_addr_cfg);
5829e9b6 DH	131	base_addr = 0;
	132	if (!(base_addr_cfg & (1 << 31)))
	133	dev_warn(&dev->dev, "Decode of the WDT I/O range disabled\n");
	134	else
	135	base_addr = (unsigned short)base_addr_cfg;
	136	if (base_addr == 0)
	137	dev_warn(&dev->dev, "I/O space for WDT uninitialized\n");
	138	else {
	139	lpc_sch_cells[cells++] = wdt_sch_cell;
	140	wdt_sch_resource.start = base_addr;
	141	wdt_sch_resource.end = base_addr + WDT_IO_SIZE - 1;
19921ef6	142	}
5829e9b6	143	}
19921ef6	144
5829e9b6 DH	145	if (WARN_ON(cells > ARRAY_SIZE(lpc_sch_cells))) {
	146	dev_err(&dev->dev, "Cell count exceeds array size");
	147	return -ENODEV;
	148	}
19921ef6	149
5829e9b6 DH	150	if (cells == 0) {
	151	dev_err(&dev->dev, "All decode registers disabled.\n");
	152	return -ENODEV;
19921ef6 AS	153	}
19921ef6 AS	154
5829e9b6 DH	155	for (i = 0; i < cells; i++)
	156	lpc_sch_cells[i].id = id->device;
	157
	158	ret = mfd_add_devices(&dev->dev, 0, lpc_sch_cells, cells, NULL, 0, NULL);
	159	if (ret)
	160	mfd_remove_devices(&dev->dev);
	161
19921ef6	162	return ret;
e82c60ae DT	163	}
e82c60ae DT	164
4740f73f	165	static void lpc_sch_remove(struct pci_dev *dev)
e82c60ae DT	166	{
	167	mfd_remove_devices(&dev->dev);
	168	}
	169
	170	static struct pci_driver lpc_sch_driver = {
	171	.name = "lpc_sch",
	172	.id_table = lpc_sch_ids,
	173	.probe = lpc_sch_probe,
84449216	174	.remove = lpc_sch_remove,
e82c60ae DT	175	};
e82c60ae DT	176
38a36f5a	177	module_pci_driver(lpc_sch_driver);
e82c60ae DT	178
	179	MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>");
	180	MODULE_DESCRIPTION("LPC interface for Intel Poulsbo SCH");
	181	MODULE_LICENSE("GPL");