[mirror_ubuntu-zesty-kernel.git] / drivers / mfd / lpc_sch.c

/*
 *  lpc_sch.c - LPC interface for Intel Poulsbo SCH
 *
 *  LPC bridge function of the Intel SCH contains many other
 *  functional units, such as Interrupt controllers, Timers,
 *  Power Management, System Management, GPIO, RTC, and LPC
 *  Configuration Registers.
 *
 *  Copyright (c) 2010 CompuLab Ltd
 *  Author: Denis Turischev <denis@compulab.co.il>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License 2 as published
 *  by the Free Software Foundation.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; see the file COPYING.  If not, write to
 *  the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/errno.h>
#include <linux/acpi.h>
#include <linux/pci.h>
#include <linux/mfd/core.h>

#define SMBASE		0x40
#define SMBUS_IO_SIZE	64

#define GPIOBASE	0x44
#define GPIO_IO_SIZE	64
#define GPIO_IO_SIZE_CENTERTON	128

/* Intel Quark X1000 GPIO IRQ Number */
#define GPIO_IRQ_QUARK_X1000	9

#define WDTBASE		0x84
#define WDT_IO_SIZE	64

enum sch_chipsets {
	LPC_SCH = 0,		/* Intel Poulsbo SCH */
	LPC_ITC,		/* Intel Tunnel Creek */
	LPC_CENTERTON,		/* Intel Centerton */
	LPC_QUARK_X1000,	/* Intel Quark X1000 */
};

struct lpc_sch_info {
	unsigned int io_size_smbus;
	unsigned int io_size_gpio;
	unsigned int io_size_wdt;
	int irq_gpio;
};

static struct lpc_sch_info sch_chipset_info[] = {
	[LPC_SCH] = {
		.io_size_smbus = SMBUS_IO_SIZE,
		.io_size_gpio = GPIO_IO_SIZE,
		.irq_gpio = -1,
	},
	[LPC_ITC] = {
		.io_size_smbus = SMBUS_IO_SIZE,
		.io_size_gpio = GPIO_IO_SIZE,
		.io_size_wdt = WDT_IO_SIZE,
		.irq_gpio = -1,
	},
	[LPC_CENTERTON] = {
		.io_size_smbus = SMBUS_IO_SIZE,
		.io_size_gpio = GPIO_IO_SIZE_CENTERTON,
		.io_size_wdt = WDT_IO_SIZE,
		.irq_gpio = -1,
	},
	[LPC_QUARK_X1000] = {
		.io_size_gpio = GPIO_IO_SIZE,
		.irq_gpio = GPIO_IRQ_QUARK_X1000,
	},
};

static const struct pci_device_id lpc_sch_ids[] = {
	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SCH_LPC), LPC_SCH },
	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ITC_LPC), LPC_ITC },
	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CENTERTON_ILB), LPC_CENTERTON },
	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_QUARK_X1000_ILB), LPC_QUARK_X1000 },
	{ 0, }
};
MODULE_DEVICE_TABLE(pci, lpc_sch_ids);

#define LPC_NO_RESOURCE		1
#define LPC_SKIP_RESOURCE	2

static int lpc_sch_get_io(struct pci_dev *pdev, int where, const char *name,
			  struct resource *res, int size)
{
	unsigned int base_addr_cfg;
	unsigned short base_addr;

	if (size == 0)
		return LPC_NO_RESOURCE;

	pci_read_config_dword(pdev, where, &base_addr_cfg);
	base_addr = 0;
	if (!(base_addr_cfg & (1 << 31)))
		dev_warn(&pdev->dev, "Decode of the %s I/O range disabled\n",
			 name);
	else
		base_addr = (unsigned short)base_addr_cfg;

	if (base_addr == 0) {
		dev_warn(&pdev->dev, "I/O space for %s uninitialized\n", name);
		return LPC_SKIP_RESOURCE;
	}

	res->start = base_addr;
	res->end = base_addr + size - 1;
	res->flags = IORESOURCE_IO;

	return 0;
}

static int lpc_sch_populate_cell(struct pci_dev *pdev, int where,
				 const char *name, int size, int irq,
				 int id, struct mfd_cell *cell)
{
	struct resource *res;
	int ret;

	res = devm_kcalloc(&pdev->dev, 2, sizeof(*res), GFP_KERNEL);
	if (!res)
		return -ENOMEM;

	ret = lpc_sch_get_io(pdev, where, name, res, size);
	if (ret)
		return ret;

	memset(cell, 0, sizeof(*cell));

	cell->name = name;
	cell->resources = res;
	cell->num_resources = 1;
	cell->ignore_resource_conflicts = true;
	cell->id = id;

	/* Check if we need to add an IRQ resource */
	if (irq < 0)
		return 0;

	res++;

	res->start = irq;
	res->end = irq;
	res->flags = IORESOURCE_IRQ;

	cell->num_resources++;

	return 0;
}

static int lpc_sch_probe(struct pci_dev *dev, const struct pci_device_id *id)
{
	struct mfd_cell lpc_sch_cells[3];
	struct lpc_sch_info *info = &sch_chipset_info[id->driver_data];
	unsigned int cells = 0;
	int ret;

	ret = lpc_sch_populate_cell(dev, SMBASE, "isch_smbus",
				    info->io_size_smbus, -1,
				    id->device, &lpc_sch_cells[cells]);
	if (ret < 0)
		return ret;
	if (ret == 0)
		cells++;

	ret = lpc_sch_populate_cell(dev, GPIOBASE, "sch_gpio",
				    info->io_size_gpio, info->irq_gpio,
				    id->device, &lpc_sch_cells[cells]);
	if (ret < 0)
		return ret;
	if (ret == 0)
		cells++;

	ret = lpc_sch_populate_cell(dev, WDTBASE, "ie6xx_wdt",
				    info->io_size_wdt, -1,
				    id->device, &lpc_sch_cells[cells]);
	if (ret < 0)
		return ret;
	if (ret == 0)
		cells++;

	if (cells == 0) {
		dev_err(&dev->dev, "All decode registers disabled.\n");
		return -ENODEV;
	}

	ret = mfd_add_devices(&dev->dev, 0, lpc_sch_cells, cells, NULL, 0, NULL);
	if (ret)
		mfd_remove_devices(&dev->dev);

	return ret;
}

static void lpc_sch_remove(struct pci_dev *dev)
{
	mfd_remove_devices(&dev->dev);
}

static struct pci_driver lpc_sch_driver = {
	.name		= "lpc_sch",
	.id_table	= lpc_sch_ids,
	.probe		= lpc_sch_probe,
	.remove		= lpc_sch_remove,
};

module_pci_driver(lpc_sch_driver);

MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>");
MODULE_DESCRIPTION("LPC interface for Intel Poulsbo SCH");
MODULE_LICENSE("GPL");
Commit	Line	Data
e82c60ae DT	1	/*
	2	* lpc_sch.c - LPC interface for Intel Poulsbo SCH
	3	*
	4	* LPC bridge function of the Intel SCH contains many other
	5	* functional units, such as Interrupt controllers, Timers,
	6	* Power Management, System Management, GPIO, RTC, and LPC
	7	* Configuration Registers.
	8	*
	9	* Copyright (c) 2010 CompuLab Ltd
	10	* Author: Denis Turischev <denis@compulab.co.il>
	11	*
	12	* This program is free software; you can redistribute it and/or modify
	13	* it under the terms of the GNU General Public License 2 as published
	14	* by the Free Software Foundation.
	15	*
	16	* This program is distributed in the hope that it will be useful,
	17	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	* GNU General Public License for more details.
	20	*
	21	* You should have received a copy of the GNU General Public License
	22	* along with this program; see the file COPYING. If not, write to
	23	* the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
	24	*/
	25
e82c60ae DT	26	#include <linux/kernel.h>
	27	#include <linux/module.h>
	28	#include <linux/errno.h>
	29	#include <linux/acpi.h>
	30	#include <linux/pci.h>
	31	#include <linux/mfd/core.h>
	32
	33	#define SMBASE 0x40
	34	#define SMBUS_IO_SIZE 64
	35
	36	#define GPIOBASE 0x44
	37	#define GPIO_IO_SIZE 64
8ee3c2a7	38	#define GPIO_IO_SIZE_CENTERTON 128
e82c60ae	39
ec689a8a AS	40	/* Intel Quark X1000 GPIO IRQ Number */
	41	#define GPIO_IRQ_QUARK_X1000 9
	42
19921ef6 AS	43	#define WDTBASE 0x84
	44	#define WDT_IO_SIZE 64
	45
b24512c8 AS	46	enum sch_chipsets {
	47	LPC_SCH = 0, /* Intel Poulsbo SCH */
	48	LPC_ITC, /* Intel Tunnel Creek */
	49	LPC_CENTERTON, /* Intel Centerton */
ec689a8a	50	LPC_QUARK_X1000, /* Intel Quark X1000 */
e82c60ae DT	51	};
e82c60ae DT	52
b24512c8 AS	53	struct lpc_sch_info {
	54	unsigned int io_size_smbus;
	55	unsigned int io_size_gpio;
	56	unsigned int io_size_wdt;
ec689a8a	57	int irq_gpio;
e82c60ae DT	58	};
e82c60ae DT	59
b24512c8 AS	60	static struct lpc_sch_info sch_chipset_info[] = {
	61	[LPC_SCH] = {
	62	.io_size_smbus = SMBUS_IO_SIZE,
	63	.io_size_gpio = GPIO_IO_SIZE,
ec689a8a	64	.irq_gpio = -1,
b24512c8 AS	65	},
	66	[LPC_ITC] = {
	67	.io_size_smbus = SMBUS_IO_SIZE,
	68	.io_size_gpio = GPIO_IO_SIZE,
	69	.io_size_wdt = WDT_IO_SIZE,
ec689a8a	70	.irq_gpio = -1,
b24512c8 AS	71	},
	72	[LPC_CENTERTON] = {
	73	.io_size_smbus = SMBUS_IO_SIZE,
	74	.io_size_gpio = GPIO_IO_SIZE_CENTERTON,
	75	.io_size_wdt = WDT_IO_SIZE,
ec689a8a AS	76	.irq_gpio = -1,
	77	},
	78	[LPC_QUARK_X1000] = {
	79	.io_size_gpio = GPIO_IO_SIZE,
	80	.irq_gpio = GPIO_IRQ_QUARK_X1000,
b24512c8	81	},
19921ef6 AS	82	};
19921ef6 AS	83
36fcd06c	84	static const struct pci_device_id lpc_sch_ids[] = {
b24512c8 AS	85	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SCH_LPC), LPC_SCH },
	86	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ITC_LPC), LPC_ITC },
	87	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CENTERTON_ILB), LPC_CENTERTON },
ec689a8a	88	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_QUARK_X1000_ILB), LPC_QUARK_X1000 },
e82c60ae DT	89	{ 0, }
	90	};
	91	MODULE_DEVICE_TABLE(pci, lpc_sch_ids);
	92
b24512c8 AS	93	#define LPC_NO_RESOURCE 1
	94	#define LPC_SKIP_RESOURCE 2
	95
	96	static int lpc_sch_get_io(struct pci_dev pdev, int where, const char name,
	97	struct resource *res, int size)
e82c60ae DT	98	{
	99	unsigned int base_addr_cfg;
	100	unsigned short base_addr;
	101
b24512c8 AS	102	if (size == 0)
	103	return LPC_NO_RESOURCE;
	104
	105	pci_read_config_dword(pdev, where, &base_addr_cfg);
5829e9b6 DH	106	base_addr = 0;
5829e9b6 DH	107	if (!(base_addr_cfg & (1 << 31)))
b24512c8 AS	108	dev_warn(&pdev->dev, "Decode of the %s I/O range disabled\n",
b24512c8 AS	109	name);
5829e9b6 DH	110	else
5829e9b6 DH	111	base_addr = (unsigned short)base_addr_cfg;
e82c60ae	112
e82c60ae	113	if (base_addr == 0) {
b24512c8 AS	114	dev_warn(&pdev->dev, "I/O space for %s uninitialized\n", name);
b24512c8 AS	115	return LPC_SKIP_RESOURCE;
e82c60ae DT	116	}
e82c60ae DT	117
b24512c8 AS	118	res->start = base_addr;
	119	res->end = base_addr + size - 1;
	120	res->flags = IORESOURCE_IO;
e967f77d	121
b24512c8 AS	122	return 0;
b24512c8 AS	123	}
19921ef6	124
b24512c8	125	static int lpc_sch_populate_cell(struct pci_dev *pdev, int where,
ec689a8a AS	126	const char *name, int size, int irq,
ec689a8a AS	127	int id, struct mfd_cell *cell)
b24512c8 AS	128	{
	129	struct resource *res;
	130	int ret;
19921ef6	131
ec689a8a	132	res = devm_kcalloc(&pdev->dev, 2, sizeof(*res), GFP_KERNEL);
b24512c8 AS	133	if (!res)
	134	return -ENOMEM;
	135
	136	ret = lpc_sch_get_io(pdev, where, name, res, size);
	137	if (ret)
	138	return ret;
	139
	140	memset(cell, 0, sizeof(*cell));
	141
	142	cell->name = name;
	143	cell->resources = res;
	144	cell->num_resources = 1;
	145	cell->ignore_resource_conflicts = true;
	146	cell->id = id;
	147
ec689a8a AS	148	/* Check if we need to add an IRQ resource */
	149	if (irq < 0)
	150	return 0;
	151
	152	res++;
	153
	154	res->start = irq;
	155	res->end = irq;
	156	res->flags = IORESOURCE_IRQ;
	157
	158	cell->num_resources++;
	159
b24512c8 AS	160	return 0;
	161	}
	162
	163	static int lpc_sch_probe(struct pci_dev dev, const struct pci_device_id id)
	164	{
	165	struct mfd_cell lpc_sch_cells[3];
	166	struct lpc_sch_info *info = &sch_chipset_info[id->driver_data];
	167	unsigned int cells = 0;
	168	int ret;
	169
	170	ret = lpc_sch_populate_cell(dev, SMBASE, "isch_smbus",
ec689a8a	171	info->io_size_smbus, -1,
b24512c8 AS	172	id->device, &lpc_sch_cells[cells]);
	173	if (ret < 0)
	174	return ret;
	175	if (ret == 0)
	176	cells++;
	177
	178	ret = lpc_sch_populate_cell(dev, GPIOBASE, "sch_gpio",
ec689a8a	179	info->io_size_gpio, info->irq_gpio,
b24512c8 AS	180	id->device, &lpc_sch_cells[cells]);
	181	if (ret < 0)
	182	return ret;
	183	if (ret == 0)
	184	cells++;
	185
	186	ret = lpc_sch_populate_cell(dev, WDTBASE, "ie6xx_wdt",
ec689a8a	187	info->io_size_wdt, -1,
b24512c8 AS	188	id->device, &lpc_sch_cells[cells]);
	189	if (ret < 0)
	190	return ret;
	191	if (ret == 0)
	192	cells++;
19921ef6	193
5829e9b6 DH	194	if (cells == 0) {
	195	dev_err(&dev->dev, "All decode registers disabled.\n");
	196	return -ENODEV;
19921ef6 AS	197	}
19921ef6 AS	198
5829e9b6 DH	199	ret = mfd_add_devices(&dev->dev, 0, lpc_sch_cells, cells, NULL, 0, NULL);
	200	if (ret)
	201	mfd_remove_devices(&dev->dev);
	202
19921ef6	203	return ret;
e82c60ae DT	204	}
e82c60ae DT	205
4740f73f	206	static void lpc_sch_remove(struct pci_dev *dev)
e82c60ae DT	207	{
	208	mfd_remove_devices(&dev->dev);
	209	}
	210
	211	static struct pci_driver lpc_sch_driver = {
	212	.name = "lpc_sch",
	213	.id_table = lpc_sch_ids,
	214	.probe = lpc_sch_probe,
84449216	215	.remove = lpc_sch_remove,
e82c60ae DT	216	};
e82c60ae DT	217
38a36f5a	218	module_pci_driver(lpc_sch_driver);
e82c60ae DT	219
	220	MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>");
	221	MODULE_DESCRIPTION("LPC interface for Intel Poulsbo SCH");
	222	MODULE_LICENSE("GPL");