[mirror_ubuntu-jammy-kernel.git] / drivers / mfd / mcp-sa11x0.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 *  linux/drivers/mfd/mcp-sa11x0.c
 *
 *  Copyright (C) 2001-2005 Russell King
 *
 *  SA11x0 MCP (Multimedia Communications Port) driver.
 *
 *  MCP read/write timeouts from Jordi Colomer, rehacked by rmk.
 */
#include <linux/module.h>
#include <linux/io.h>
#include <linux/errno.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/spinlock.h>
#include <linux/platform_device.h>
#include <linux/pm.h>
#include <linux/mfd/mcp.h>

#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <linux/platform_data/mfd-mcp-sa11x0.h>

#define DRIVER_NAME "sa11x0-mcp"

struct mcp_sa11x0 {
	void __iomem	*base0;
	void __iomem	*base1;
	u32		mccr0;
	u32		mccr1;
};

/* Register offsets */
#define MCCR0(m)	((m)->base0 + 0x00)
#define MCDR0(m)	((m)->base0 + 0x08)
#define MCDR1(m)	((m)->base0 + 0x0c)
#define MCDR2(m)	((m)->base0 + 0x10)
#define MCSR(m)		((m)->base0 + 0x18)
#define MCCR1(m)	((m)->base1 + 0x00)

#define priv(mcp)	((struct mcp_sa11x0 *)mcp_priv(mcp))

static void
mcp_sa11x0_set_telecom_divisor(struct mcp *mcp, unsigned int divisor)
{
	struct mcp_sa11x0 *m = priv(mcp);

	divisor /= 32;

	m->mccr0 &= ~0x00007f00;
	m->mccr0 |= divisor << 8;
	writel_relaxed(m->mccr0, MCCR0(m));
}

static void
mcp_sa11x0_set_audio_divisor(struct mcp *mcp, unsigned int divisor)
{
	struct mcp_sa11x0 *m = priv(mcp);

	divisor /= 32;

	m->mccr0 &= ~0x0000007f;
	m->mccr0 |= divisor;
	writel_relaxed(m->mccr0, MCCR0(m));
}

/*
 * Write data to the device.  The bit should be set after 3 subframe
 * times (each frame is 64 clocks).  We wait a maximum of 6 subframes.
 * We really should try doing something more productive while we
 * wait.
 */
static void
mcp_sa11x0_write(struct mcp *mcp, unsigned int reg, unsigned int val)
{
	struct mcp_sa11x0 *m = priv(mcp);
	int ret = -ETIME;
	int i;

	writel_relaxed(reg << 17 | MCDR2_Wr | (val & 0xffff), MCDR2(m));

	for (i = 0; i < 2; i++) {
		udelay(mcp->rw_timeout);
		if (readl_relaxed(MCSR(m)) & MCSR_CWC) {
			ret = 0;
			break;
		}
	}

	if (ret < 0)
		printk(KERN_WARNING "mcp: write timed out\n");
}

/*
 * Read data from the device.  The bit should be set after 3 subframe
 * times (each frame is 64 clocks).  We wait a maximum of 6 subframes.
 * We really should try doing something more productive while we
 * wait.
 */
static unsigned int
mcp_sa11x0_read(struct mcp *mcp, unsigned int reg)
{
	struct mcp_sa11x0 *m = priv(mcp);
	int ret = -ETIME;
	int i;

	writel_relaxed(reg << 17 | MCDR2_Rd, MCDR2(m));

	for (i = 0; i < 2; i++) {
		udelay(mcp->rw_timeout);
		if (readl_relaxed(MCSR(m)) & MCSR_CRC) {
			ret = readl_relaxed(MCDR2(m)) & 0xffff;
			break;
		}
	}

	if (ret < 0)
		printk(KERN_WARNING "mcp: read timed out\n");

	return ret;
}

static void mcp_sa11x0_enable(struct mcp *mcp)
{
	struct mcp_sa11x0 *m = priv(mcp);

	writel(-1, MCSR(m));
	m->mccr0 |= MCCR0_MCE;
	writel_relaxed(m->mccr0, MCCR0(m));
}

static void mcp_sa11x0_disable(struct mcp *mcp)
{
	struct mcp_sa11x0 *m = priv(mcp);

	m->mccr0 &= ~MCCR0_MCE;
	writel_relaxed(m->mccr0, MCCR0(m));
}

/*
 * Our methods.
 */
static struct mcp_ops mcp_sa11x0 = {
	.set_telecom_divisor	= mcp_sa11x0_set_telecom_divisor,
	.set_audio_divisor	= mcp_sa11x0_set_audio_divisor,
	.reg_write		= mcp_sa11x0_write,
	.reg_read		= mcp_sa11x0_read,
	.enable			= mcp_sa11x0_enable,
	.disable		= mcp_sa11x0_disable,
};

static int mcp_sa11x0_probe(struct platform_device *dev)
{
	struct mcp_plat_data *data = dev_get_platdata(&dev->dev);
	struct resource *mem0, *mem1;
	struct mcp_sa11x0 *m;
	struct mcp *mcp;
	int ret;

	if (!data)
		return -ENODEV;

	mem0 = platform_get_resource(dev, IORESOURCE_MEM, 0);
	mem1 = platform_get_resource(dev, IORESOURCE_MEM, 1);
	if (!mem0 || !mem1)
		return -ENXIO;

	if (!request_mem_region(mem0->start, resource_size(mem0),
				DRIVER_NAME)) {
		ret = -EBUSY;
		goto err_mem0;
	}

	if (!request_mem_region(mem1->start, resource_size(mem1),
				DRIVER_NAME)) {
		ret = -EBUSY;
		goto err_mem1;
	}

	mcp = mcp_host_alloc(&dev->dev, sizeof(struct mcp_sa11x0));
	if (!mcp) {
		ret = -ENOMEM;
		goto err_alloc;
	}

	mcp->owner		= THIS_MODULE;
	mcp->ops		= &mcp_sa11x0;
	mcp->sclk_rate		= data->sclk_rate;

	m = priv(mcp);
	m->mccr0 = data->mccr0 | 0x7f7f;
	m->mccr1 = data->mccr1;

	m->base0 = ioremap(mem0->start, resource_size(mem0));
	m->base1 = ioremap(mem1->start, resource_size(mem1));
	if (!m->base0 || !m->base1) {
		ret = -ENOMEM;
		goto err_ioremap;
	}

	platform_set_drvdata(dev, mcp);

	/*
	 * Initialise device.  Note that we initially
	 * set the sampling rate to minimum.
	 */
	writel_relaxed(-1, MCSR(m));
	writel_relaxed(m->mccr1, MCCR1(m));
	writel_relaxed(m->mccr0, MCCR0(m));

	/*
	 * Calculate the read/write timeout (us) from the bit clock
	 * rate.  This is the period for 3 64-bit frames.  Always
	 * round this time up.
	 */
	mcp->rw_timeout = (64 * 3 * 1000000 + mcp->sclk_rate - 1) /
			  mcp->sclk_rate;

	ret = mcp_host_add(mcp, data->codec_pdata);
	if (ret == 0)
		return 0;

 err_ioremap:
	iounmap(m->base1);
	iounmap(m->base0);
	mcp_host_free(mcp);
 err_alloc:
	release_mem_region(mem1->start, resource_size(mem1));
 err_mem1:
	release_mem_region(mem0->start, resource_size(mem0));
 err_mem0:
	return ret;
}

static int mcp_sa11x0_remove(struct platform_device *dev)
{
	struct mcp *mcp = platform_get_drvdata(dev);
	struct mcp_sa11x0 *m = priv(mcp);
	struct resource *mem0, *mem1;

	if (m->mccr0 & MCCR0_MCE)
		dev_warn(&dev->dev,
			 "device left active (missing disable call?)\n");

	mem0 = platform_get_resource(dev, IORESOURCE_MEM, 0);
	mem1 = platform_get_resource(dev, IORESOURCE_MEM, 1);

	mcp_host_del(mcp);
	iounmap(m->base1);
	iounmap(m->base0);
	mcp_host_free(mcp);
	release_mem_region(mem1->start, resource_size(mem1));
	release_mem_region(mem0->start, resource_size(mem0));

	return 0;
}

#ifdef CONFIG_PM_SLEEP
static int mcp_sa11x0_suspend(struct device *dev)
{
	struct mcp_sa11x0 *m = priv(dev_get_drvdata(dev));

	if (m->mccr0 & MCCR0_MCE)
		dev_warn(dev, "device left active (missing disable call?)\n");

	writel(m->mccr0 & ~MCCR0_MCE, MCCR0(m));

	return 0;
}

static int mcp_sa11x0_resume(struct device *dev)
{
	struct mcp_sa11x0 *m = priv(dev_get_drvdata(dev));

	writel_relaxed(m->mccr1, MCCR1(m));
	writel_relaxed(m->mccr0, MCCR0(m));

	return 0;
}
#endif

static const struct dev_pm_ops mcp_sa11x0_pm_ops = {
#ifdef CONFIG_PM_SLEEP
	.suspend = mcp_sa11x0_suspend,
	.freeze = mcp_sa11x0_suspend,
	.poweroff = mcp_sa11x0_suspend,
	.resume_noirq = mcp_sa11x0_resume,
	.thaw_noirq = mcp_sa11x0_resume,
	.restore_noirq = mcp_sa11x0_resume,
#endif
};

static struct platform_driver mcp_sa11x0_driver = {
	.probe		= mcp_sa11x0_probe,
	.remove		= mcp_sa11x0_remove,
	.driver		= {
		.name	= DRIVER_NAME,
		.pm	= &mcp_sa11x0_pm_ops,
	},
};

/*
 * This needs re-working
 */
module_platform_driver(mcp_sa11x0_driver);

MODULE_ALIAS("platform:" DRIVER_NAME);
MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
MODULE_DESCRIPTION("SA11x0 multimedia communications port driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
84a14ae8	1	// SPDX-License-Identifier: GPL-2.0-only
5e742ad6 RK	2	/*
	3	* linux/drivers/mfd/mcp-sa11x0.c
	4	*
	5	* Copyright (C) 2001-2005 Russell King
	6	*
5e742ad6 RK	7	* SA11x0 MCP (Multimedia Communications Port) driver.
	8	*
	9	* MCP read/write timeouts from Jordi Colomer, rehacked by rmk.
	10	*/
	11	#include <linux/module.h>
45c7f75f	12	#include <linux/io.h>
5e742ad6 RK	13	#include <linux/errno.h>
	14	#include <linux/kernel.h>
	15	#include <linux/delay.h>
	16	#include <linux/spinlock.h>
d052d1be	17	#include <linux/platform_device.h>
2796e397	18	#include <linux/pm.h>
c8602edf	19	#include <linux/mfd/mcp.h>
5e742ad6	20
a09e64fb	21	#include <mach/hardware.h>
5e742ad6	22	#include <asm/mach-types.h>
a1fd844c	23	#include <linux/platform_data/mfd-mcp-sa11x0.h>
5e742ad6	24
c4592ce4	25	#define DRIVER_NAME "sa11x0-mcp"
5e742ad6 RK	26
5e742ad6 RK	27	struct mcp_sa11x0 {
45c7f75f RK	28	void __iomem *base0;
	29	void __iomem *base1;
	30	u32 mccr0;
	31	u32 mccr1;
5e742ad6 RK	32	};
5e742ad6 RK	33
45c7f75f RK	34	/* Register offsets */
	35	#define MCCR0(m) ((m)->base0 + 0x00)
	36	#define MCDR0(m) ((m)->base0 + 0x08)
	37	#define MCDR1(m) ((m)->base0 + 0x0c)
	38	#define MCDR2(m) ((m)->base0 + 0x10)
	39	#define MCSR(m) ((m)->base0 + 0x18)
	40	#define MCCR1(m) ((m)->base1 + 0x00)
	41
5e742ad6 RK	42	#define priv(mcp) ((struct mcp_sa11x0 *)mcp_priv(mcp))
	43
	44	static void
	45	mcp_sa11x0_set_telecom_divisor(struct mcp *mcp, unsigned int divisor)
	46	{
45c7f75f	47	struct mcp_sa11x0 *m = priv(mcp);
5e742ad6 RK	48
	49	divisor /= 32;
	50
45c7f75f RK	51	m->mccr0 &= ~0x00007f00;
	52	m->mccr0 \|= divisor << 8;
	53	writel_relaxed(m->mccr0, MCCR0(m));
5e742ad6 RK	54	}
	55
	56	static void
	57	mcp_sa11x0_set_audio_divisor(struct mcp *mcp, unsigned int divisor)
	58	{
45c7f75f	59	struct mcp_sa11x0 *m = priv(mcp);
5e742ad6 RK	60
	61	divisor /= 32;
	62
45c7f75f RK	63	m->mccr0 &= ~0x0000007f;
	64	m->mccr0 \|= divisor;
	65	writel_relaxed(m->mccr0, MCCR0(m));
5e742ad6 RK	66	}
	67
	68	/*
	69	* Write data to the device. The bit should be set after 3 subframe
	70	* times (each frame is 64 clocks). We wait a maximum of 6 subframes.
	71	* We really should try doing something more productive while we
	72	* wait.
	73	*/
	74	static void
	75	mcp_sa11x0_write(struct mcp *mcp, unsigned int reg, unsigned int val)
	76	{
45c7f75f	77	struct mcp_sa11x0 *m = priv(mcp);
5e742ad6 RK	78	int ret = -ETIME;
	79	int i;
	80
45c7f75f	81	writel_relaxed(reg << 17 \| MCDR2_Wr \| (val & 0xffff), MCDR2(m));
5e742ad6 RK	82
	83	for (i = 0; i < 2; i++) {
	84	udelay(mcp->rw_timeout);
45c7f75f	85	if (readl_relaxed(MCSR(m)) & MCSR_CWC) {
5e742ad6 RK	86	ret = 0;
	87	break;
	88	}
	89	}
	90
	91	if (ret < 0)
	92	printk(KERN_WARNING "mcp: write timed out\n");
	93	}
	94
	95	/*
	96	* Read data from the device. The bit should be set after 3 subframe
	97	* times (each frame is 64 clocks). We wait a maximum of 6 subframes.
	98	* We really should try doing something more productive while we
	99	* wait.
	100	*/
	101	static unsigned int
	102	mcp_sa11x0_read(struct mcp *mcp, unsigned int reg)
	103	{
45c7f75f	104	struct mcp_sa11x0 *m = priv(mcp);
5e742ad6 RK	105	int ret = -ETIME;
	106	int i;
	107
45c7f75f	108	writel_relaxed(reg << 17 \| MCDR2_Rd, MCDR2(m));
5e742ad6 RK	109
	110	for (i = 0; i < 2; i++) {
	111	udelay(mcp->rw_timeout);
45c7f75f RK	112	if (readl_relaxed(MCSR(m)) & MCSR_CRC) {
45c7f75f RK	113	ret = readl_relaxed(MCDR2(m)) & 0xffff;
5e742ad6 RK	114	break;
	115	}
	116	}
	117
	118	if (ret < 0)
	119	printk(KERN_WARNING "mcp: read timed out\n");
	120
	121	return ret;
	122	}
	123
	124	static void mcp_sa11x0_enable(struct mcp *mcp)
	125	{
45c7f75f RK	126	struct mcp_sa11x0 *m = priv(mcp);
	127
	128	writel(-1, MCSR(m));
	129	m->mccr0 \|= MCCR0_MCE;
	130	writel_relaxed(m->mccr0, MCCR0(m));
5e742ad6 RK	131	}
	132
	133	static void mcp_sa11x0_disable(struct mcp *mcp)
	134	{
45c7f75f RK	135	struct mcp_sa11x0 *m = priv(mcp);
	136
	137	m->mccr0 &= ~MCCR0_MCE;
	138	writel_relaxed(m->mccr0, MCCR0(m));
5e742ad6 RK	139	}
	140
	141	/*
	142	* Our methods.
	143	*/
	144	static struct mcp_ops mcp_sa11x0 = {
	145	.set_telecom_divisor = mcp_sa11x0_set_telecom_divisor,
	146	.set_audio_divisor = mcp_sa11x0_set_audio_divisor,
	147	.reg_write = mcp_sa11x0_write,
	148	.reg_read = mcp_sa11x0_read,
	149	.enable = mcp_sa11x0_enable,
	150	.disable = mcp_sa11x0_disable,
	151	};
	152
45c7f75f	153	static int mcp_sa11x0_probe(struct platform_device *dev)
5e742ad6	154	{
334a41ce	155	struct mcp_plat_data *data = dev_get_platdata(&dev->dev);
45c7f75f RK	156	struct resource mem0, mem1;
45c7f75f RK	157	struct mcp_sa11x0 *m;
5e742ad6 RK	158	struct mcp *mcp;
	159	int ret;
	160
323cdfc1	161	if (!data)
5e742ad6 RK	162	return -ENODEV;
5e742ad6 RK	163
45c7f75f RK	164	mem0 = platform_get_resource(dev, IORESOURCE_MEM, 0);
	165	mem1 = platform_get_resource(dev, IORESOURCE_MEM, 1);
	166	if (!mem0 \|\| !mem1)
	167	return -ENXIO;
	168
	169	if (!request_mem_region(mem0->start, resource_size(mem0),
	170	DRIVER_NAME)) {
	171	ret = -EBUSY;
	172	goto err_mem0;
	173	}
5e742ad6	174
45c7f75f RK	175	if (!request_mem_region(mem1->start, resource_size(mem1),
	176	DRIVER_NAME)) {
	177	ret = -EBUSY;
	178	goto err_mem1;
	179	}
	180
	181	mcp = mcp_host_alloc(&dev->dev, sizeof(struct mcp_sa11x0));
5e742ad6 RK	182	if (!mcp) {
5e742ad6 RK	183	ret = -ENOMEM;
45c7f75f	184	goto err_alloc;
5e742ad6 RK	185	}
	186
	187	mcp->owner = THIS_MODULE;
	188	mcp->ops = &mcp_sa11x0;
323cdfc1	189	mcp->sclk_rate = data->sclk_rate;
5e742ad6	190
45c7f75f RK	191	m = priv(mcp);
	192	m->mccr0 = data->mccr0 \| 0x7f7f;
	193	m->mccr1 = data->mccr1;
	194
	195	m->base0 = ioremap(mem0->start, resource_size(mem0));
	196	m->base1 = ioremap(mem1->start, resource_size(mem1));
	197	if (!m->base0 \|\| !m->base1) {
	198	ret = -ENOMEM;
	199	goto err_ioremap;
	200	}
	201
	202	platform_set_drvdata(dev, mcp);
5e742ad6	203
323cdfc1 RK	204	/*
	205	* Initialise device. Note that we initially
	206	* set the sampling rate to minimum.
	207	*/
45c7f75f RK	208	writel_relaxed(-1, MCSR(m));
	209	writel_relaxed(m->mccr1, MCCR1(m));
	210	writel_relaxed(m->mccr0, MCCR0(m));
5e742ad6 RK	211
	212	/*
	213	* Calculate the read/write timeout (us) from the bit clock
	214	* rate. This is the period for 3 64-bit frames. Always
	215	* round this time up.
	216	*/
	217	mcp->rw_timeout = (64 * 3 * 1000000 + mcp->sclk_rate - 1) /
	218	mcp->sclk_rate;
	219
abe06082	220	ret = mcp_host_add(mcp, data->codec_pdata);
5e742ad6	221	if (ret == 0)
45c7f75f	222	return 0;
5e742ad6	223
45c7f75f RK	224	err_ioremap:
	225	iounmap(m->base1);
	226	iounmap(m->base0);
	227	mcp_host_free(mcp);
	228	err_alloc:
	229	release_mem_region(mem1->start, resource_size(mem1));
	230	err_mem1:
	231	release_mem_region(mem0->start, resource_size(mem0));
	232	err_mem0:
5e742ad6 RK	233	return ret;
	234	}
	235
216f63c4	236	static int mcp_sa11x0_remove(struct platform_device *dev)
5e742ad6	237	{
216f63c4	238	struct mcp *mcp = platform_get_drvdata(dev);
45c7f75f RK	239	struct mcp_sa11x0 *m = priv(mcp);
	240	struct resource mem0, mem1;
	241
a4b54acf RK	242	if (m->mccr0 & MCCR0_MCE)
	243	dev_warn(&dev->dev,
	244	"device left active (missing disable call?)\n");
	245
45c7f75f RK	246	mem0 = platform_get_resource(dev, IORESOURCE_MEM, 0);
45c7f75f RK	247	mem1 = platform_get_resource(dev, IORESOURCE_MEM, 1);
5e742ad6	248
30816ac0	249	mcp_host_del(mcp);
45c7f75f RK	250	iounmap(m->base1);
45c7f75f RK	251	iounmap(m->base0);
30816ac0	252	mcp_host_free(mcp);
45c7f75f RK	253	release_mem_region(mem1->start, resource_size(mem1));
45c7f75f RK	254	release_mem_region(mem0->start, resource_size(mem0));
5e742ad6 RK	255
	256	return 0;
	257	}
	258
2796e397 RK	259	#ifdef CONFIG_PM_SLEEP
2796e397 RK	260	static int mcp_sa11x0_suspend(struct device *dev)
5e742ad6	261	{
2796e397	262	struct mcp_sa11x0 *m = priv(dev_get_drvdata(dev));
5e742ad6	263
a4b54acf RK	264	if (m->mccr0 & MCCR0_MCE)
	265	dev_warn(dev, "device left active (missing disable call?)\n");
	266
45c7f75f	267	writel(m->mccr0 & ~MCCR0_MCE, MCCR0(m));
9480e307	268
5e742ad6 RK	269	return 0;
	270	}
	271
2796e397	272	static int mcp_sa11x0_resume(struct device *dev)
5e742ad6	273	{
2796e397	274	struct mcp_sa11x0 *m = priv(dev_get_drvdata(dev));
5e742ad6	275
45c7f75f RK	276	writel_relaxed(m->mccr1, MCCR1(m));
45c7f75f RK	277	writel_relaxed(m->mccr0, MCCR0(m));
9480e307	278
5e742ad6 RK	279	return 0;
5e742ad6 RK	280	}
2796e397 RK	281	#endif
	282
	283	static const struct dev_pm_ops mcp_sa11x0_pm_ops = {
a6aecae2 RK	284	#ifdef CONFIG_PM_SLEEP
	285	.suspend = mcp_sa11x0_suspend,
	286	.freeze = mcp_sa11x0_suspend,
	287	.poweroff = mcp_sa11x0_suspend,
	288	.resume_noirq = mcp_sa11x0_resume,
	289	.thaw_noirq = mcp_sa11x0_resume,
	290	.restore_noirq = mcp_sa11x0_resume,
	291	#endif
2796e397	292	};
5e742ad6	293
3ae5eaec	294	static struct platform_driver mcp_sa11x0_driver = {
5e742ad6 RK	295	.probe = mcp_sa11x0_probe,
5e742ad6 RK	296	.remove = mcp_sa11x0_remove,
3ae5eaec	297	.driver = {
c4592ce4	298	.name = DRIVER_NAME,
2796e397	299	.pm = &mcp_sa11x0_pm_ops,
3ae5eaec	300	},
5e742ad6 RK	301	};
	302
	303	/*
	304	* This needs re-working
	305	*/
65349d60	306	module_platform_driver(mcp_sa11x0_driver);
5e742ad6	307
c4592ce4	308	MODULE_ALIAS("platform:" DRIVER_NAME);
5e742ad6 RK	309	MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
	310	MODULE_DESCRIPTION("SA11x0 multimedia communications port driver");
	311	MODULE_LICENSE("GPL");