[mirror_ubuntu-bionic-kernel.git] / drivers / mfd / omap-usb-tll.c

/**
 * omap-usb-tll.c - The USB TLL driver for OMAP EHCI & OHCI
 *
 * Copyright (C) 2012-2013 Texas Instruments Incorporated - http://www.ti.com
 * Author: Keshava Munegowda <keshava_mgowda@ti.com>
 * Author: Roger Quadros <rogerq@ti.com>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2  of
 * the License as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <linux/platform_device.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/err.h>
#include <linux/pm_runtime.h>
#include <linux/platform_data/usb-omap.h>
#include <linux/of.h>

#include "omap-usb.h"

#define USBTLL_DRIVER_NAME	"usbhs_tll"

/* TLL Register Set */
#define	OMAP_USBTLL_REVISION				(0x00)
#define	OMAP_USBTLL_SYSCONFIG				(0x10)
#define	OMAP_USBTLL_SYSCONFIG_CACTIVITY			(1 << 8)
#define	OMAP_USBTLL_SYSCONFIG_SIDLEMODE			(1 << 3)
#define	OMAP_USBTLL_SYSCONFIG_ENAWAKEUP			(1 << 2)
#define	OMAP_USBTLL_SYSCONFIG_SOFTRESET			(1 << 1)
#define	OMAP_USBTLL_SYSCONFIG_AUTOIDLE			(1 << 0)

#define	OMAP_USBTLL_SYSSTATUS				(0x14)
#define	OMAP_USBTLL_SYSSTATUS_RESETDONE			(1 << 0)

#define	OMAP_USBTLL_IRQSTATUS				(0x18)
#define	OMAP_USBTLL_IRQENABLE				(0x1C)

#define	OMAP_TLL_SHARED_CONF				(0x30)
#define	OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN		(1 << 6)
#define	OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN		(1 << 5)
#define	OMAP_TLL_SHARED_CONF_USB_DIVRATION		(1 << 2)
#define	OMAP_TLL_SHARED_CONF_FCLK_REQ			(1 << 1)
#define	OMAP_TLL_SHARED_CONF_FCLK_IS_ON			(1 << 0)

#define	OMAP_TLL_CHANNEL_CONF(num)			(0x040 + 0x004 * num)
#define OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT		24
#define OMAP_TLL_CHANNEL_CONF_DRVVBUS			(1 << 16)
#define OMAP_TLL_CHANNEL_CONF_CHRGVBUS			(1 << 15)
#define	OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF		(1 << 11)
#define	OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE		(1 << 10)
#define	OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE		(1 << 9)
#define	OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE		(1 << 8)
#define OMAP_TLL_CHANNEL_CONF_MODE_TRANSPARENT_UTMI	(2 << 1)
#define OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS		(1 << 1)
#define	OMAP_TLL_CHANNEL_CONF_CHANEN			(1 << 0)

#define OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0		0x0
#define OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM		0x1
#define OMAP_TLL_FSLSMODE_3PIN_PHY			0x2
#define OMAP_TLL_FSLSMODE_4PIN_PHY			0x3
#define OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0		0x4
#define OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM		0x5
#define OMAP_TLL_FSLSMODE_3PIN_TLL			0x6
#define OMAP_TLL_FSLSMODE_4PIN_TLL			0x7
#define OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0		0xA
#define OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM		0xB

#define	OMAP_TLL_ULPI_FUNCTION_CTRL(num)		(0x804 + 0x100 * num)
#define	OMAP_TLL_ULPI_INTERFACE_CTRL(num)		(0x807 + 0x100 * num)
#define	OMAP_TLL_ULPI_OTG_CTRL(num)			(0x80A + 0x100 * num)
#define	OMAP_TLL_ULPI_INT_EN_RISE(num)			(0x80D + 0x100 * num)
#define	OMAP_TLL_ULPI_INT_EN_FALL(num)			(0x810 + 0x100 * num)
#define	OMAP_TLL_ULPI_INT_STATUS(num)			(0x813 + 0x100 * num)
#define	OMAP_TLL_ULPI_INT_LATCH(num)			(0x814 + 0x100 * num)
#define	OMAP_TLL_ULPI_DEBUG(num)			(0x815 + 0x100 * num)
#define	OMAP_TLL_ULPI_SCRATCH_REGISTER(num)		(0x816 + 0x100 * num)

#define OMAP_REV2_TLL_CHANNEL_COUNT			2
#define OMAP_TLL_CHANNEL_COUNT				3
#define OMAP_TLL_CHANNEL_1_EN_MASK			(1 << 0)
#define OMAP_TLL_CHANNEL_2_EN_MASK			(1 << 1)
#define OMAP_TLL_CHANNEL_3_EN_MASK			(1 << 2)

/* Values of USBTLL_REVISION - Note: these are not given in the TRM */
#define OMAP_USBTLL_REV1		0x00000015	/* OMAP3 */
#define OMAP_USBTLL_REV2		0x00000018	/* OMAP 3630 */
#define OMAP_USBTLL_REV3		0x00000004	/* OMAP4 */
#define OMAP_USBTLL_REV4		0x00000006	/* OMAP5 */

#define is_ehci_tll_mode(x)	(x == OMAP_EHCI_PORT_MODE_TLL)

/* only PHY and UNUSED modes don't need TLL */
#define omap_usb_mode_needs_tll(x)	((x) != OMAP_USBHS_PORT_MODE_UNUSED &&\
					 (x) != OMAP_EHCI_PORT_MODE_PHY)

struct usbtll_omap {
	int					nch;	/* num. of channels */
	struct clk				**ch_clk;
	void __iomem				*base;
};

/*-------------------------------------------------------------------------*/

static const char usbtll_driver_name[] = USBTLL_DRIVER_NAME;
static struct device	*tll_dev;
static DEFINE_SPINLOCK(tll_lock);	/* serialize access to tll_dev */

/*-------------------------------------------------------------------------*/

static inline void usbtll_write(void __iomem *base, u32 reg, u32 val)
{
	writel_relaxed(val, base + reg);
}

static inline u32 usbtll_read(void __iomem *base, u32 reg)
{
	return readl_relaxed(base + reg);
}

static inline void usbtll_writeb(void __iomem *base, u32 reg, u8 val)
{
	writeb_relaxed(val, base + reg);
}

static inline u8 usbtll_readb(void __iomem *base, u32 reg)
{
	return readb_relaxed(base + reg);
}

/*-------------------------------------------------------------------------*/

static bool is_ohci_port(enum usbhs_omap_port_mode pmode)
{
	switch (pmode) {
	case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
	case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
	case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
	case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
	case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
	case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
	case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
	case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
	case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
	case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
		return true;

	default:
		return false;
	}
}

/*
 * convert the port-mode enum to a value we can use in the FSLSMODE
 * field of USBTLL_CHANNEL_CONF
 */
static unsigned ohci_omap3_fslsmode(enum usbhs_omap_port_mode mode)
{
	switch (mode) {
	case OMAP_USBHS_PORT_MODE_UNUSED:
	case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
		return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;

	case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
		return OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM;

	case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
		return OMAP_TLL_FSLSMODE_3PIN_PHY;

	case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
		return OMAP_TLL_FSLSMODE_4PIN_PHY;

	case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
		return OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0;

	case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
		return OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM;

	case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
		return OMAP_TLL_FSLSMODE_3PIN_TLL;

	case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
		return OMAP_TLL_FSLSMODE_4PIN_TLL;

	case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
		return OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0;

	case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
		return OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM;
	default:
		pr_warn("Invalid port mode, using default\n");
		return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;
	}
}

/**
 * usbtll_omap_probe - initialize TI-based HCDs
 *
 * Allocates basic resources for this USB host controller.
 */
static int usbtll_omap_probe(struct platform_device *pdev)
{
	struct device				*dev =  &pdev->dev;
	struct resource				*res;
	struct usbtll_omap			*tll;
	int					ret = 0;
	int					i, ver;

	dev_dbg(dev, "starting TI HSUSB TLL Controller\n");

	tll = devm_kzalloc(dev, sizeof(struct usbtll_omap), GFP_KERNEL);
	if (!tll) {
		dev_err(dev, "Memory allocation failed\n");
		return -ENOMEM;
	}

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	tll->base = devm_ioremap_resource(dev, res);
	if (IS_ERR(tll->base))
		return PTR_ERR(tll->base);

	platform_set_drvdata(pdev, tll);
	pm_runtime_enable(dev);
	pm_runtime_get_sync(dev);

	ver =  usbtll_read(tll->base, OMAP_USBTLL_REVISION);
	switch (ver) {
	case OMAP_USBTLL_REV1:
	case OMAP_USBTLL_REV4:
		tll->nch = OMAP_TLL_CHANNEL_COUNT;
		break;
	case OMAP_USBTLL_REV2:
	case OMAP_USBTLL_REV3:
		tll->nch = OMAP_REV2_TLL_CHANNEL_COUNT;
		break;
	default:
		tll->nch = OMAP_TLL_CHANNEL_COUNT;
		dev_dbg(dev,
		 "USB TLL Rev : 0x%x not recognized, assuming %d channels\n",
			ver, tll->nch);
		break;
	}

	tll->ch_clk = devm_kzalloc(dev, sizeof(struct clk *) * tll->nch,
						GFP_KERNEL);
	if (!tll->ch_clk) {
		ret = -ENOMEM;
		dev_err(dev, "Couldn't allocate memory for channel clocks\n");
		goto err_clk_alloc;
	}

	for (i = 0; i < tll->nch; i++) {
		char clkname[] = "usb_tll_hs_usb_chx_clk";

		snprintf(clkname, sizeof(clkname),
					"usb_tll_hs_usb_ch%d_clk", i);
		tll->ch_clk[i] = clk_get(dev, clkname);

		if (IS_ERR(tll->ch_clk[i]))
			dev_dbg(dev, "can't get clock : %s\n", clkname);
		else
			clk_prepare(tll->ch_clk[i]);
	}

	pm_runtime_put_sync(dev);
	/* only after this can omap_tll_enable/disable work */
	spin_lock(&tll_lock);
	tll_dev = dev;
	spin_unlock(&tll_lock);

	return 0;

err_clk_alloc:
	pm_runtime_put_sync(dev);
	pm_runtime_disable(dev);

	return ret;
}

/**
 * usbtll_omap_remove - shutdown processing for UHH & TLL HCDs
 * @pdev: USB Host Controller being removed
 *
 * Reverses the effect of usbtll_omap_probe().
 */
static int usbtll_omap_remove(struct platform_device *pdev)
{
	struct usbtll_omap *tll = platform_get_drvdata(pdev);
	int i;

	spin_lock(&tll_lock);
	tll_dev = NULL;
	spin_unlock(&tll_lock);

	for (i = 0; i < tll->nch; i++) {
		if (!IS_ERR(tll->ch_clk[i])) {
			clk_unprepare(tll->ch_clk[i]);
			clk_put(tll->ch_clk[i]);
		}
	}

	pm_runtime_disable(&pdev->dev);
	return 0;
}

static const struct of_device_id usbtll_omap_dt_ids[] = {
	{ .compatible = "ti,usbhs-tll" },
	{ }
};

MODULE_DEVICE_TABLE(of, usbtll_omap_dt_ids);

static struct platform_driver usbtll_omap_driver = {
	.driver = {
		.name		= (char *)usbtll_driver_name,
		.of_match_table = usbtll_omap_dt_ids,
	},
	.probe		= usbtll_omap_probe,
	.remove		= usbtll_omap_remove,
};

int omap_tll_init(struct usbhs_omap_platform_data *pdata)
{
	int i;
	bool needs_tll;
	unsigned reg;
	struct usbtll_omap *tll;

	if (!tll_dev)
		return -ENODEV;

	pm_runtime_get_sync(tll_dev);

	spin_lock(&tll_lock);
	tll = dev_get_drvdata(tll_dev);
	needs_tll = false;
	for (i = 0; i < tll->nch; i++)
		needs_tll |= omap_usb_mode_needs_tll(pdata->port_mode[i]);

	if (needs_tll) {
		void __iomem *base = tll->base;

		/* Program Common TLL register */
		reg = usbtll_read(base, OMAP_TLL_SHARED_CONF);
		reg |= (OMAP_TLL_SHARED_CONF_FCLK_IS_ON
			| OMAP_TLL_SHARED_CONF_USB_DIVRATION);
		reg &= ~OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN;
		reg &= ~OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN;

		usbtll_write(base, OMAP_TLL_SHARED_CONF, reg);

		/* Enable channels now */
		for (i = 0; i < tll->nch; i++) {
			reg = usbtll_read(base,	OMAP_TLL_CHANNEL_CONF(i));

			if (is_ohci_port(pdata->port_mode[i])) {
				reg |= ohci_omap3_fslsmode(pdata->port_mode[i])
				<< OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT;
				reg |= OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS;
			} else if (pdata->port_mode[i] ==
					OMAP_EHCI_PORT_MODE_TLL) {
				/*
				 * Disable UTMI AutoIdle, BitStuffing
				 * and use SDR Mode. Enable ULPI AutoIdle.
				 */
				reg &= ~(OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE
					| OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE);
				reg |= OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF;
				reg |= OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE;
			} else if (pdata->port_mode[i] ==
					OMAP_EHCI_PORT_MODE_HSIC) {
				/*
				 * HSIC Mode requires UTMI port configurations
				 */
				reg |= OMAP_TLL_CHANNEL_CONF_DRVVBUS
				 | OMAP_TLL_CHANNEL_CONF_CHRGVBUS
				 | OMAP_TLL_CHANNEL_CONF_MODE_TRANSPARENT_UTMI
				 | OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF;
			} else {
				continue;
			}
			reg |= OMAP_TLL_CHANNEL_CONF_CHANEN;
			usbtll_write(base, OMAP_TLL_CHANNEL_CONF(i), reg);

			usbtll_writeb(base,
				      OMAP_TLL_ULPI_SCRATCH_REGISTER(i),
				      0xbe);
		}
	}

	spin_unlock(&tll_lock);
	pm_runtime_put_sync(tll_dev);

	return 0;
}
EXPORT_SYMBOL_GPL(omap_tll_init);

int omap_tll_enable(struct usbhs_omap_platform_data *pdata)
{
	int i;
	struct usbtll_omap *tll;

	if (!tll_dev)
		return -ENODEV;

	pm_runtime_get_sync(tll_dev);

	spin_lock(&tll_lock);
	tll = dev_get_drvdata(tll_dev);

	for (i = 0; i < tll->nch; i++) {
		if (omap_usb_mode_needs_tll(pdata->port_mode[i])) {
			int r;

			if (IS_ERR(tll->ch_clk[i]))
				continue;

			r = clk_enable(tll->ch_clk[i]);
			if (r) {
				dev_err(tll_dev,
				 "Error enabling ch %d clock: %d\n", i, r);
			}
		}
	}

	spin_unlock(&tll_lock);

	return 0;
}
EXPORT_SYMBOL_GPL(omap_tll_enable);

int omap_tll_disable(struct usbhs_omap_platform_data *pdata)
{
	int i;
	struct usbtll_omap *tll;

	if (!tll_dev)
		return -ENODEV;

	spin_lock(&tll_lock);
	tll = dev_get_drvdata(tll_dev);

	for (i = 0; i < tll->nch; i++) {
		if (omap_usb_mode_needs_tll(pdata->port_mode[i])) {
			if (!IS_ERR(tll->ch_clk[i]))
				clk_disable(tll->ch_clk[i]);
		}
	}

	spin_unlock(&tll_lock);
	pm_runtime_put_sync(tll_dev);

	return 0;
}
EXPORT_SYMBOL_GPL(omap_tll_disable);

MODULE_AUTHOR("Keshava Munegowda <keshava_mgowda@ti.com>");
MODULE_AUTHOR("Roger Quadros <rogerq@ti.com>");
MODULE_ALIAS("platform:" USBHS_DRIVER_NAME);
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("usb tll driver for TI OMAP EHCI and OHCI controllers");

static int __init omap_usbtll_drvinit(void)
{
	return platform_driver_register(&usbtll_omap_driver);
}

/*
 * init before usbhs core driver;
 * The usbtll driver should be initialized before
 * the usbhs core driver probe function is called.
 */
fs_initcall(omap_usbtll_drvinit);

static void __exit omap_usbtll_drvexit(void)
{
	platform_driver_unregister(&usbtll_omap_driver);
}
module_exit(omap_usbtll_drvexit);
Commit	Line	Data
16fa3dc7 KM	1	/**
	2	* omap-usb-tll.c - The USB TLL driver for OMAP EHCI & OHCI
	3	*
9f4a3ece	4	* Copyright (C) 2012-2013 Texas Instruments Incorporated - http://www.ti.com
16fa3dc7	5	* Author: Keshava Munegowda <keshava_mgowda@ti.com>
9f4a3ece	6	* Author: Roger Quadros <rogerq@ti.com>
16fa3dc7 KM	7	*
	8	* This program is free software: you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 of
	10	* the License as published by the Free Software Foundation.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	19	*/
	20	#include <linux/kernel.h>
	21	#include <linux/module.h>
	22	#include <linux/types.h>
	23	#include <linux/slab.h>
	24	#include <linux/spinlock.h>
	25	#include <linux/platform_device.h>
	26	#include <linux/clk.h>
	27	#include <linux/io.h>
	28	#include <linux/err.h>
16fa3dc7	29	#include <linux/pm_runtime.h>
e8c4a7ac	30	#include <linux/platform_data/usb-omap.h>
48130b8f	31	#include <linux/of.h>
16fa3dc7	32
17ed4d22 BD	33	#include "omap-usb.h"
17ed4d22 BD	34
16fa3dc7 KM	35	#define USBTLL_DRIVER_NAME "usbhs_tll"
	36
	37	/* TLL Register Set */
	38	#define OMAP_USBTLL_REVISION (0x00)
	39	#define OMAP_USBTLL_SYSCONFIG (0x10)
	40	#define OMAP_USBTLL_SYSCONFIG_CACTIVITY (1 << 8)
	41	#define OMAP_USBTLL_SYSCONFIG_SIDLEMODE (1 << 3)
	42	#define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP (1 << 2)
	43	#define OMAP_USBTLL_SYSCONFIG_SOFTRESET (1 << 1)
	44	#define OMAP_USBTLL_SYSCONFIG_AUTOIDLE (1 << 0)
	45
	46	#define OMAP_USBTLL_SYSSTATUS (0x14)
	47	#define OMAP_USBTLL_SYSSTATUS_RESETDONE (1 << 0)
	48
	49	#define OMAP_USBTLL_IRQSTATUS (0x18)
	50	#define OMAP_USBTLL_IRQENABLE (0x1C)
	51
	52	#define OMAP_TLL_SHARED_CONF (0x30)
	53	#define OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN (1 << 6)
	54	#define OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN (1 << 5)
	55	#define OMAP_TLL_SHARED_CONF_USB_DIVRATION (1 << 2)
	56	#define OMAP_TLL_SHARED_CONF_FCLK_REQ (1 << 1)
	57	#define OMAP_TLL_SHARED_CONF_FCLK_IS_ON (1 << 0)
	58
	59	#define OMAP_TLL_CHANNEL_CONF(num) (0x040 + 0x004 * num)
	60	#define OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT 24
300c2f8f RQ	61	#define OMAP_TLL_CHANNEL_CONF_DRVVBUS (1 << 16)
300c2f8f RQ	62	#define OMAP_TLL_CHANNEL_CONF_CHRGVBUS (1 << 15)
16fa3dc7 KM	63	#define OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF (1 << 11)
	64	#define OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE (1 << 10)
	65	#define OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE (1 << 9)
	66	#define OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE (1 << 8)
300c2f8f	67	#define OMAP_TLL_CHANNEL_CONF_MODE_TRANSPARENT_UTMI (2 << 1)
16fa3dc7 KM	68	#define OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS (1 << 1)
	69	#define OMAP_TLL_CHANNEL_CONF_CHANEN (1 << 0)
	70
	71	#define OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0 0x0
	72	#define OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM 0x1
	73	#define OMAP_TLL_FSLSMODE_3PIN_PHY 0x2
	74	#define OMAP_TLL_FSLSMODE_4PIN_PHY 0x3
	75	#define OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0 0x4
	76	#define OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM 0x5
	77	#define OMAP_TLL_FSLSMODE_3PIN_TLL 0x6
	78	#define OMAP_TLL_FSLSMODE_4PIN_TLL 0x7
	79	#define OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0 0xA
	80	#define OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM 0xB
	81
	82	#define OMAP_TLL_ULPI_FUNCTION_CTRL(num) (0x804 + 0x100 * num)
	83	#define OMAP_TLL_ULPI_INTERFACE_CTRL(num) (0x807 + 0x100 * num)
	84	#define OMAP_TLL_ULPI_OTG_CTRL(num) (0x80A + 0x100 * num)
	85	#define OMAP_TLL_ULPI_INT_EN_RISE(num) (0x80D + 0x100 * num)
	86	#define OMAP_TLL_ULPI_INT_EN_FALL(num) (0x810 + 0x100 * num)
	87	#define OMAP_TLL_ULPI_INT_STATUS(num) (0x813 + 0x100 * num)
	88	#define OMAP_TLL_ULPI_INT_LATCH(num) (0x814 + 0x100 * num)
	89	#define OMAP_TLL_ULPI_DEBUG(num) (0x815 + 0x100 * num)
	90	#define OMAP_TLL_ULPI_SCRATCH_REGISTER(num) (0x816 + 0x100 * num)
	91
	92	#define OMAP_REV2_TLL_CHANNEL_COUNT 2
	93	#define OMAP_TLL_CHANNEL_COUNT 3
	94	#define OMAP_TLL_CHANNEL_1_EN_MASK (1 << 0)
	95	#define OMAP_TLL_CHANNEL_2_EN_MASK (1 << 1)
	96	#define OMAP_TLL_CHANNEL_3_EN_MASK (1 << 2)
	97
	98	/* Values of USBTLL_REVISION - Note: these are not given in the TRM */
	99	#define OMAP_USBTLL_REV1 0x00000015 /* OMAP3 */
	100	#define OMAP_USBTLL_REV2 0x00000018 /* OMAP 3630 */
	101	#define OMAP_USBTLL_REV3 0x00000004 /* OMAP4 */
300c2f8f	102	#define OMAP_USBTLL_REV4 0x00000006 /* OMAP5 */
16fa3dc7 KM	103
	104	#define is_ehci_tll_mode(x) (x == OMAP_EHCI_PORT_MODE_TLL)
	105
32a51f2a RQ	106	/* only PHY and UNUSED modes don't need TLL */
	107	#define omap_usb_mode_needs_tll(x) ((x) != OMAP_USBHS_PORT_MODE_UNUSED &&\
	108	(x) != OMAP_EHCI_PORT_MODE_PHY)
	109
16fa3dc7	110	struct usbtll_omap {
7e0ff103	111	int nch; /* num. of channels */
0bde3e9f	112	struct clk **ch_clk;
9f4a3ece	113	void __iomem *base;
16fa3dc7 KM	114	};
	115
	116	/-------------------------------------------------------------------------/
	117
7ed86191 RQ	118	static const char usbtll_driver_name[] = USBTLL_DRIVER_NAME;
7ed86191 RQ	119	static struct device *tll_dev;
66751446	120	static DEFINE_SPINLOCK(tll_lock); /* serialize access to tll_dev */
16fa3dc7 KM	121
	122	/-------------------------------------------------------------------------/
	123
	124	static inline void usbtll_write(void __iomem *base, u32 reg, u32 val)
	125	{
dd6eb26f	126	writel_relaxed(val, base + reg);
16fa3dc7 KM	127	}
	128
	129	static inline u32 usbtll_read(void __iomem *base, u32 reg)
	130	{
dd6eb26f	131	return readl_relaxed(base + reg);
16fa3dc7 KM	132	}
16fa3dc7 KM	133
993dc737	134	static inline void usbtll_writeb(void __iomem *base, u32 reg, u8 val)
16fa3dc7	135	{
dd6eb26f	136	writeb_relaxed(val, base + reg);
16fa3dc7 KM	137	}
16fa3dc7 KM	138
993dc737	139	static inline u8 usbtll_readb(void __iomem *base, u32 reg)
16fa3dc7	140	{
dd6eb26f	141	return readb_relaxed(base + reg);
16fa3dc7 KM	142	}
	143
	144	/-------------------------------------------------------------------------/
	145
	146	static bool is_ohci_port(enum usbhs_omap_port_mode pmode)
	147	{
	148	switch (pmode) {
	149	case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
	150	case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
	151	case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
	152	case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
	153	case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
	154	case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
	155	case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
	156	case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
	157	case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
	158	case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
	159	return true;
	160
	161	default:
	162	return false;
	163	}
	164	}
	165
	166	/*
	167	* convert the port-mode enum to a value we can use in the FSLSMODE
	168	* field of USBTLL_CHANNEL_CONF
	169	*/
	170	static unsigned ohci_omap3_fslsmode(enum usbhs_omap_port_mode mode)
	171	{
	172	switch (mode) {
	173	case OMAP_USBHS_PORT_MODE_UNUSED:
	174	case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
	175	return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;
	176
	177	case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
	178	return OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM;
	179
	180	case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
	181	return OMAP_TLL_FSLSMODE_3PIN_PHY;
	182
	183	case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
	184	return OMAP_TLL_FSLSMODE_4PIN_PHY;
	185
	186	case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
	187	return OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0;
	188
	189	case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
	190	return OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM;
	191
	192	case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
	193	return OMAP_TLL_FSLSMODE_3PIN_TLL;
	194
	195	case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
	196	return OMAP_TLL_FSLSMODE_4PIN_TLL;
	197
	198	case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
	199	return OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0;
	200
	201	case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
	202	return OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM;
	203	default:
	204	pr_warn("Invalid port mode, using default\n");
	205	return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;
206	}
207	}
208
209	/**
210	* usbtll_omap_probe - initialize TI-based HCDs
211	*
212	* Allocates basic resources for this USB host controller.
213	*/
f791be49	214	static int usbtll_omap_probe(struct platform_device *pdev)
16fa3dc7 KM	215	{
16fa3dc7 KM	216	struct device *dev = &pdev->dev;
16fa3dc7 KM	217	struct resource *res;
16fa3dc7 KM	218	struct usbtll_omap *tll;
16fa3dc7	219	int ret = 0;
7e0ff103	220	int i, ver;
16fa3dc7 KM	221
	222	dev_dbg(dev, "starting TI HSUSB TLL Controller\n");
	223
1a7a8d70	224	tll = devm_kzalloc(dev, sizeof(struct usbtll_omap), GFP_KERNEL);
16fa3dc7 KM	225	if (!tll) {
16fa3dc7 KM	226	dev_err(dev, "Memory allocation failed\n");
1a7a8d70	227	return -ENOMEM;
16fa3dc7 KM	228	}
16fa3dc7 KM	229
16fa3dc7	230	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
651da3d4 SK	231	tll->base = devm_ioremap_resource(dev, res);
	232	if (IS_ERR(tll->base))
	233	return PTR_ERR(tll->base);
16fa3dc7 KM	234
	235	platform_set_drvdata(pdev, tll);
	236	pm_runtime_enable(dev);
	237	pm_runtime_get_sync(dev);
	238
9f4a3ece	239	ver = usbtll_read(tll->base, OMAP_USBTLL_REVISION);
16fa3dc7 KM	240	switch (ver) {
16fa3dc7 KM	241	case OMAP_USBTLL_REV1:
300c2f8f	242	case OMAP_USBTLL_REV4:
7e0ff103	243	tll->nch = OMAP_TLL_CHANNEL_COUNT;
16fa3dc7	244	break;
7e0ff103	245	case OMAP_USBTLL_REV2:
16fa3dc7	246	case OMAP_USBTLL_REV3:
7e0ff103	247	tll->nch = OMAP_REV2_TLL_CHANNEL_COUNT;
16fa3dc7 KM	248	break;
16fa3dc7 KM	249	default:
7e0ff103 RQ	250	tll->nch = OMAP_TLL_CHANNEL_COUNT;
	251	dev_dbg(dev,
	252	"USB TLL Rev : 0x%x not recognized, assuming %d channels\n",
	253	ver, tll->nch);
	254	break;
16fa3dc7 KM	255	}
16fa3dc7 KM	256
39a85bcb	257	tll->ch_clk = devm_kzalloc(dev, sizeof(struct clk ) tll->nch,
0bde3e9f RQ	258	GFP_KERNEL);
	259	if (!tll->ch_clk) {
	260	ret = -ENOMEM;
	261	dev_err(dev, "Couldn't allocate memory for channel clocks\n");
	262	goto err_clk_alloc;
	263	}
	264
	265	for (i = 0; i < tll->nch; i++) {
	266	char clkname[] = "usb_tll_hs_usb_chx_clk";
	267
	268	snprintf(clkname, sizeof(clkname),
	269	"usb_tll_hs_usb_ch%d_clk", i);
	270	tll->ch_clk[i] = clk_get(dev, clkname);
	271
	272	if (IS_ERR(tll->ch_clk[i]))
	273	dev_dbg(dev, "can't get clock : %s\n", clkname);
b49b927f RQ	274	else
b49b927f RQ	275	clk_prepare(tll->ch_clk[i]);
0bde3e9f RQ	276	}
0bde3e9f RQ	277
9f4a3ece RQ	278	pm_runtime_put_sync(dev);
	279	/* only after this can omap_tll_enable/disable work */
	280	spin_lock(&tll_lock);
	281	tll_dev = dev;
	282	spin_unlock(&tll_lock);
	283
	284	return 0;
	285
	286	err_clk_alloc:
	287	pm_runtime_put_sync(dev);
	288	pm_runtime_disable(dev);
	289
	290	return ret;
	291	}
	292
	293	/**
	294	* usbtll_omap_remove - shutdown processing for UHH & TLL HCDs
	295	* @pdev: USB Host Controller being removed
	296	*
	297	* Reverses the effect of usbtll_omap_probe().
	298	*/
	299	static int usbtll_omap_remove(struct platform_device *pdev)
	300	{
	301	struct usbtll_omap *tll = platform_get_drvdata(pdev);
	302	int i;
	303
	304	spin_lock(&tll_lock);
	305	tll_dev = NULL;
	306	spin_unlock(&tll_lock);
	307
b49b927f RQ	308	for (i = 0; i < tll->nch; i++) {
	309	if (!IS_ERR(tll->ch_clk[i])) {
	310	clk_unprepare(tll->ch_clk[i]);
9f4a3ece	311	clk_put(tll->ch_clk[i]);
b49b927f RQ	312	}
b49b927f RQ	313	}
9f4a3ece RQ	314
	315	pm_runtime_disable(&pdev->dev);
	316	return 0;
	317	}
	318
48130b8f RQ	319	static const struct of_device_id usbtll_omap_dt_ids[] = {
	320	{ .compatible = "ti,usbhs-tll" },
	321	{ }
	322	};
	323
	324	MODULE_DEVICE_TABLE(of, usbtll_omap_dt_ids);
	325
9f4a3ece RQ	326	static struct platform_driver usbtll_omap_driver = {
	327	.driver = {
	328	.name = (char *)usbtll_driver_name,
0f54e1e1	329	.of_match_table = usbtll_omap_dt_ids,
9f4a3ece RQ	330	},
	331	.probe = usbtll_omap_probe,
	332	.remove = usbtll_omap_remove,
	333	};
	334
	335	int omap_tll_init(struct usbhs_omap_platform_data *pdata)
	336	{
	337	int i;
	338	bool needs_tll;
	339	unsigned reg;
	340	struct usbtll_omap *tll;
	341
76a0775d	342	if (!tll_dev)
9f4a3ece	343	return -ENODEV;
9f4a3ece	344
76a0775d	345	pm_runtime_get_sync(tll_dev);
9f4a3ece	346
76a0775d RQ	347	spin_lock(&tll_lock);
76a0775d RQ	348	tll = dev_get_drvdata(tll_dev);
32a51f2a RQ	349	needs_tll = false;
	350	for (i = 0; i < tll->nch; i++)
	351	needs_tll \|= omap_usb_mode_needs_tll(pdata->port_mode[i]);
	352
	353	if (needs_tll) {
9f4a3ece	354	void __iomem *base = tll->base;
16fa3dc7 KM	355
	356	/* Program Common TLL register */
	357	reg = usbtll_read(base, OMAP_TLL_SHARED_CONF);
	358	reg \|= (OMAP_TLL_SHARED_CONF_FCLK_IS_ON
	359	\| OMAP_TLL_SHARED_CONF_USB_DIVRATION);
	360	reg &= ~OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN;
	361	reg &= ~OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN;
	362
	363	usbtll_write(base, OMAP_TLL_SHARED_CONF, reg);
	364
	365	/* Enable channels now */
7e0ff103	366	for (i = 0; i < tll->nch; i++) {
16fa3dc7 KM	367	reg = usbtll_read(base, OMAP_TLL_CHANNEL_CONF(i));
	368
	369	if (is_ohci_port(pdata->port_mode[i])) {
	370	reg \|= ohci_omap3_fslsmode(pdata->port_mode[i])
	371	<< OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT;
	372	reg \|= OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS;
	373	} else if (pdata->port_mode[i] ==
	374	OMAP_EHCI_PORT_MODE_TLL) {
	375	/*
76d3341b TL	376	* Disable UTMI AutoIdle, BitStuffing
76d3341b TL	377	* and use SDR Mode. Enable ULPI AutoIdle.
16fa3dc7 KM	378	*/
16fa3dc7 KM	379	reg &= ~(OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE
16fa3dc7	380	\| OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE);
8b8a84c5	381	reg \|= OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF;
76d3341b	382	reg \|= OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE;
300c2f8f RQ	383	} else if (pdata->port_mode[i] ==
	384	OMAP_EHCI_PORT_MODE_HSIC) {
	385	/*
	386	* HSIC Mode requires UTMI port configurations
	387	*/
	388	reg \|= OMAP_TLL_CHANNEL_CONF_DRVVBUS
	389	\| OMAP_TLL_CHANNEL_CONF_CHRGVBUS
	390	\| OMAP_TLL_CHANNEL_CONF_MODE_TRANSPARENT_UTMI
	391	\| OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF;
16fa3dc7 KM	392	} else {
	393	continue;
	394	}
	395	reg \|= OMAP_TLL_CHANNEL_CONF_CHANEN;
	396	usbtll_write(base, OMAP_TLL_CHANNEL_CONF(i), reg);
	397
	398	usbtll_writeb(base,
	399	OMAP_TLL_ULPI_SCRATCH_REGISTER(i),
	400	0xbe);
	401	}
	402	}
	403
66751446	404	spin_unlock(&tll_lock);
76a0775d	405	pm_runtime_put_sync(tll_dev);
16fa3dc7	406
1a7a8d70	407	return 0;
16fa3dc7	408	}
9f4a3ece	409	EXPORT_SYMBOL_GPL(omap_tll_init);
16fa3dc7	410
9f4a3ece	411	int omap_tll_enable(struct usbhs_omap_platform_data *pdata)
16fa3dc7	412	{
0bde3e9f	413	int i;
9f4a3ece	414	struct usbtll_omap *tll;
0bde3e9f	415
76a0775d	416	if (!tll_dev)
9f4a3ece	417	return -ENODEV;
16fa3dc7	418
9f4a3ece	419	pm_runtime_get_sync(tll_dev);
16fa3dc7	420
76a0775d RQ	421	spin_lock(&tll_lock);
	422	tll = dev_get_drvdata(tll_dev);
	423
0bde3e9f	424	for (i = 0; i < tll->nch; i++) {
32a51f2a	425	if (omap_usb_mode_needs_tll(pdata->port_mode[i])) {
0bde3e9f	426	int r;
16fa3dc7	427
0bde3e9f RQ	428	if (IS_ERR(tll->ch_clk[i]))
	429	continue;
	430
b49b927f	431	r = clk_enable(tll->ch_clk[i]);
0bde3e9f	432	if (r) {
9f4a3ece	433	dev_err(tll_dev,
0bde3e9f RQ	434	"Error enabling ch %d clock: %d\n", i, r);
	435	}
	436	}
	437	}
16fa3dc7	438
9f4a3ece RQ	439	spin_unlock(&tll_lock);
9f4a3ece RQ	440
16fa3dc7 KM	441	return 0;
16fa3dc7 KM	442	}
9f4a3ece	443	EXPORT_SYMBOL_GPL(omap_tll_enable);
16fa3dc7	444
9f4a3ece	445	int omap_tll_disable(struct usbhs_omap_platform_data *pdata)
16fa3dc7	446	{
0bde3e9f	447	int i;
9f4a3ece RQ	448	struct usbtll_omap *tll;
9f4a3ece RQ	449
76a0775d	450	if (!tll_dev)
9f4a3ece	451	return -ENODEV;
16fa3dc7	452
76a0775d	453	spin_lock(&tll_lock);
9f4a3ece	454	tll = dev_get_drvdata(tll_dev);
16fa3dc7	455
0bde3e9f	456	for (i = 0; i < tll->nch; i++) {
32a51f2a	457	if (omap_usb_mode_needs_tll(pdata->port_mode[i])) {
0bde3e9f	458	if (!IS_ERR(tll->ch_clk[i]))
b49b927f	459	clk_disable(tll->ch_clk[i]);
0bde3e9f RQ	460	}
0bde3e9f RQ	461	}
16fa3dc7	462
66751446	463	spin_unlock(&tll_lock);
76a0775d	464	pm_runtime_put_sync(tll_dev);
66751446	465
9f4a3ece	466	return 0;
16fa3dc7 KM	467	}
	468	EXPORT_SYMBOL_GPL(omap_tll_disable);
	469
	470	MODULE_AUTHOR("Keshava Munegowda <keshava_mgowda@ti.com>");
48130b8f	471	MODULE_AUTHOR("Roger Quadros <rogerq@ti.com>");
16fa3dc7 KM	472	MODULE_ALIAS("platform:" USBHS_DRIVER_NAME);
	473	MODULE_LICENSE("GPL v2");
	474	MODULE_DESCRIPTION("usb tll driver for TI OMAP EHCI and OHCI controllers");
	475
	476	static int __init omap_usbtll_drvinit(void)
	477	{
	478	return platform_driver_register(&usbtll_omap_driver);
	479	}
	480
	481	/*
	482	* init before usbhs core driver;
	483	* The usbtll driver should be initialized before
	484	* the usbhs core driver probe function is called.
	485	*/
	486	fs_initcall(omap_usbtll_drvinit);
	487
	488	static void __exit omap_usbtll_drvexit(void)
	489	{
	490	platform_driver_unregister(&usbtll_omap_driver);
	491	}
	492	module_exit(omap_usbtll_drvexit);