]>
Commit | Line | Data |
---|---|---|
2945fbc2 GG |
1 | /* |
2 | * TI Palmas MFD Driver | |
3 | * | |
4 | * Copyright 2011-2012 Texas Instruments Inc. | |
5 | * | |
6 | * Author: Graeme Gregory <gg@slimlogic.co.uk> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License as published by the | |
10 | * Free Software Foundation; either version 2 of the License, or (at your | |
11 | * option) any later version. | |
12 | * | |
13 | */ | |
14 | ||
15 | #include <linux/module.h> | |
16 | #include <linux/moduleparam.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/slab.h> | |
19 | #include <linux/i2c.h> | |
20 | #include <linux/interrupt.h> | |
21 | #include <linux/irq.h> | |
22 | #include <linux/regmap.h> | |
23 | #include <linux/err.h> | |
24 | #include <linux/mfd/core.h> | |
25 | #include <linux/mfd/palmas.h> | |
1ffb0be3 | 26 | #include <linux/of_device.h> |
2945fbc2 | 27 | |
2945fbc2 GG |
28 | static const struct regmap_config palmas_regmap_config[PALMAS_NUM_CLIENTS] = { |
29 | { | |
30 | .reg_bits = 8, | |
31 | .val_bits = 8, | |
32 | .max_register = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE, | |
33 | PALMAS_PRIMARY_SECONDARY_PAD3), | |
34 | }, | |
35 | { | |
36 | .reg_bits = 8, | |
37 | .val_bits = 8, | |
38 | .max_register = PALMAS_BASE_TO_REG(PALMAS_GPADC_BASE, | |
39 | PALMAS_GPADC_SMPS_VSEL_MONITORING), | |
40 | }, | |
41 | { | |
42 | .reg_bits = 8, | |
43 | .val_bits = 8, | |
44 | .max_register = PALMAS_BASE_TO_REG(PALMAS_TRIM_GPADC_BASE, | |
45 | PALMAS_GPADC_TRIM16), | |
46 | }, | |
47 | }; | |
48 | ||
49 | static const struct regmap_irq palmas_irqs[] = { | |
50 | /* INT1 IRQs */ | |
51 | [PALMAS_CHARG_DET_N_VBUS_OVV_IRQ] = { | |
52 | .mask = PALMAS_INT1_STATUS_CHARG_DET_N_VBUS_OVV, | |
53 | }, | |
54 | [PALMAS_PWRON_IRQ] = { | |
55 | .mask = PALMAS_INT1_STATUS_PWRON, | |
56 | }, | |
57 | [PALMAS_LONG_PRESS_KEY_IRQ] = { | |
58 | .mask = PALMAS_INT1_STATUS_LONG_PRESS_KEY, | |
59 | }, | |
60 | [PALMAS_RPWRON_IRQ] = { | |
61 | .mask = PALMAS_INT1_STATUS_RPWRON, | |
62 | }, | |
63 | [PALMAS_PWRDOWN_IRQ] = { | |
64 | .mask = PALMAS_INT1_STATUS_PWRDOWN, | |
65 | }, | |
66 | [PALMAS_HOTDIE_IRQ] = { | |
67 | .mask = PALMAS_INT1_STATUS_HOTDIE, | |
68 | }, | |
69 | [PALMAS_VSYS_MON_IRQ] = { | |
70 | .mask = PALMAS_INT1_STATUS_VSYS_MON, | |
71 | }, | |
72 | [PALMAS_VBAT_MON_IRQ] = { | |
73 | .mask = PALMAS_INT1_STATUS_VBAT_MON, | |
74 | }, | |
75 | /* INT2 IRQs*/ | |
76 | [PALMAS_RTC_ALARM_IRQ] = { | |
77 | .mask = PALMAS_INT2_STATUS_RTC_ALARM, | |
78 | .reg_offset = 1, | |
79 | }, | |
80 | [PALMAS_RTC_TIMER_IRQ] = { | |
81 | .mask = PALMAS_INT2_STATUS_RTC_TIMER, | |
82 | .reg_offset = 1, | |
83 | }, | |
84 | [PALMAS_WDT_IRQ] = { | |
85 | .mask = PALMAS_INT2_STATUS_WDT, | |
86 | .reg_offset = 1, | |
87 | }, | |
88 | [PALMAS_BATREMOVAL_IRQ] = { | |
89 | .mask = PALMAS_INT2_STATUS_BATREMOVAL, | |
90 | .reg_offset = 1, | |
91 | }, | |
92 | [PALMAS_RESET_IN_IRQ] = { | |
93 | .mask = PALMAS_INT2_STATUS_RESET_IN, | |
94 | .reg_offset = 1, | |
95 | }, | |
96 | [PALMAS_FBI_BB_IRQ] = { | |
97 | .mask = PALMAS_INT2_STATUS_FBI_BB, | |
98 | .reg_offset = 1, | |
99 | }, | |
100 | [PALMAS_SHORT_IRQ] = { | |
101 | .mask = PALMAS_INT2_STATUS_SHORT, | |
102 | .reg_offset = 1, | |
103 | }, | |
104 | [PALMAS_VAC_ACOK_IRQ] = { | |
105 | .mask = PALMAS_INT2_STATUS_VAC_ACOK, | |
106 | .reg_offset = 1, | |
107 | }, | |
108 | /* INT3 IRQs */ | |
109 | [PALMAS_GPADC_AUTO_0_IRQ] = { | |
110 | .mask = PALMAS_INT3_STATUS_GPADC_AUTO_0, | |
111 | .reg_offset = 2, | |
112 | }, | |
113 | [PALMAS_GPADC_AUTO_1_IRQ] = { | |
114 | .mask = PALMAS_INT3_STATUS_GPADC_AUTO_1, | |
115 | .reg_offset = 2, | |
116 | }, | |
117 | [PALMAS_GPADC_EOC_SW_IRQ] = { | |
118 | .mask = PALMAS_INT3_STATUS_GPADC_EOC_SW, | |
119 | .reg_offset = 2, | |
120 | }, | |
121 | [PALMAS_GPADC_EOC_RT_IRQ] = { | |
122 | .mask = PALMAS_INT3_STATUS_GPADC_EOC_RT, | |
123 | .reg_offset = 2, | |
124 | }, | |
125 | [PALMAS_ID_OTG_IRQ] = { | |
126 | .mask = PALMAS_INT3_STATUS_ID_OTG, | |
127 | .reg_offset = 2, | |
128 | }, | |
129 | [PALMAS_ID_IRQ] = { | |
130 | .mask = PALMAS_INT3_STATUS_ID, | |
131 | .reg_offset = 2, | |
132 | }, | |
133 | [PALMAS_VBUS_OTG_IRQ] = { | |
134 | .mask = PALMAS_INT3_STATUS_VBUS_OTG, | |
135 | .reg_offset = 2, | |
136 | }, | |
137 | [PALMAS_VBUS_IRQ] = { | |
138 | .mask = PALMAS_INT3_STATUS_VBUS, | |
139 | .reg_offset = 2, | |
140 | }, | |
141 | /* INT4 IRQs */ | |
142 | [PALMAS_GPIO_0_IRQ] = { | |
143 | .mask = PALMAS_INT4_STATUS_GPIO_0, | |
144 | .reg_offset = 3, | |
145 | }, | |
146 | [PALMAS_GPIO_1_IRQ] = { | |
147 | .mask = PALMAS_INT4_STATUS_GPIO_1, | |
148 | .reg_offset = 3, | |
149 | }, | |
150 | [PALMAS_GPIO_2_IRQ] = { | |
151 | .mask = PALMAS_INT4_STATUS_GPIO_2, | |
152 | .reg_offset = 3, | |
153 | }, | |
154 | [PALMAS_GPIO_3_IRQ] = { | |
155 | .mask = PALMAS_INT4_STATUS_GPIO_3, | |
156 | .reg_offset = 3, | |
157 | }, | |
158 | [PALMAS_GPIO_4_IRQ] = { | |
159 | .mask = PALMAS_INT4_STATUS_GPIO_4, | |
160 | .reg_offset = 3, | |
161 | }, | |
162 | [PALMAS_GPIO_5_IRQ] = { | |
163 | .mask = PALMAS_INT4_STATUS_GPIO_5, | |
164 | .reg_offset = 3, | |
165 | }, | |
166 | [PALMAS_GPIO_6_IRQ] = { | |
167 | .mask = PALMAS_INT4_STATUS_GPIO_6, | |
168 | .reg_offset = 3, | |
169 | }, | |
170 | [PALMAS_GPIO_7_IRQ] = { | |
171 | .mask = PALMAS_INT4_STATUS_GPIO_7, | |
172 | .reg_offset = 3, | |
173 | }, | |
174 | }; | |
175 | ||
176 | static struct regmap_irq_chip palmas_irq_chip = { | |
177 | .name = "palmas", | |
178 | .irqs = palmas_irqs, | |
179 | .num_irqs = ARRAY_SIZE(palmas_irqs), | |
180 | ||
181 | .num_regs = 4, | |
182 | .irq_reg_stride = 5, | |
183 | .status_base = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE, | |
184 | PALMAS_INT1_STATUS), | |
185 | .mask_base = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE, | |
186 | PALMAS_INT1_MASK), | |
187 | }; | |
188 | ||
df545d1c | 189 | static int palmas_set_pdata_irq_flag(struct i2c_client *i2c, |
9c14ac33 GG |
190 | struct palmas_platform_data *pdata) |
191 | { | |
df545d1c LD |
192 | struct irq_data *irq_data = irq_get_irq_data(i2c->irq); |
193 | if (!irq_data) { | |
194 | dev_err(&i2c->dev, "Invalid IRQ: %d\n", i2c->irq); | |
195 | return -EINVAL; | |
196 | } | |
197 | ||
198 | pdata->irq_flags = irqd_get_trigger_type(irq_data); | |
199 | dev_info(&i2c->dev, "Irq flag is 0x%08x\n", pdata->irq_flags); | |
200 | return 0; | |
201 | } | |
202 | ||
203 | static void palmas_dt_to_pdata(struct i2c_client *i2c, | |
204 | struct palmas_platform_data *pdata) | |
205 | { | |
206 | struct device_node *node = i2c->dev.of_node; | |
9c14ac33 GG |
207 | int ret; |
208 | u32 prop; | |
209 | ||
2154a2b3 | 210 | ret = of_property_read_u32(node, "ti,mux-pad1", &prop); |
9c14ac33 GG |
211 | if (!ret) { |
212 | pdata->mux_from_pdata = 1; | |
213 | pdata->pad1 = prop; | |
214 | } | |
215 | ||
2154a2b3 | 216 | ret = of_property_read_u32(node, "ti,mux-pad2", &prop); |
9c14ac33 GG |
217 | if (!ret) { |
218 | pdata->mux_from_pdata = 1; | |
219 | pdata->pad2 = prop; | |
220 | } | |
221 | ||
222 | /* The default for this register is all masked */ | |
2154a2b3 | 223 | ret = of_property_read_u32(node, "ti,power-ctrl", &prop); |
9c14ac33 GG |
224 | if (!ret) |
225 | pdata->power_ctrl = prop; | |
226 | else | |
227 | pdata->power_ctrl = PALMAS_POWER_CTRL_NSLEEP_MASK | | |
228 | PALMAS_POWER_CTRL_ENABLE1_MASK | | |
229 | PALMAS_POWER_CTRL_ENABLE2_MASK; | |
df545d1c LD |
230 | if (i2c->irq) |
231 | palmas_set_pdata_irq_flag(i2c, pdata); | |
9c14ac33 GG |
232 | } |
233 | ||
1ffb0be3 | 234 | static unsigned int palmas_features = PALMAS_PMIC_FEATURE_SMPS10_BOOST; |
4124e6e2 | 235 | static unsigned int tps659038_features; |
1ffb0be3 K |
236 | |
237 | static const struct of_device_id of_palmas_match_tbl[] = { | |
238 | { | |
239 | .compatible = "ti,palmas", | |
240 | .data = &palmas_features, | |
241 | }, | |
4124e6e2 K |
242 | { |
243 | .compatible = "ti,tps659038", | |
244 | .data = &tps659038_features, | |
245 | }, | |
1ffb0be3 K |
246 | { }, |
247 | }; | |
248 | ||
f791be49 | 249 | static int palmas_i2c_probe(struct i2c_client *i2c, |
2945fbc2 GG |
250 | const struct i2c_device_id *id) |
251 | { | |
252 | struct palmas *palmas; | |
253 | struct palmas_platform_data *pdata; | |
9c14ac33 | 254 | struct device_node *node = i2c->dev.of_node; |
2945fbc2 | 255 | int ret = 0, i; |
1ffb0be3 | 256 | unsigned int reg, addr, *features; |
2945fbc2 | 257 | int slave; |
1ffb0be3 | 258 | const struct of_device_id *match; |
2945fbc2 GG |
259 | |
260 | pdata = dev_get_platdata(&i2c->dev); | |
9c14ac33 GG |
261 | |
262 | if (node && !pdata) { | |
263 | pdata = devm_kzalloc(&i2c->dev, sizeof(*pdata), GFP_KERNEL); | |
264 | ||
265 | if (!pdata) | |
266 | return -ENOMEM; | |
267 | ||
df545d1c | 268 | palmas_dt_to_pdata(i2c, pdata); |
9c14ac33 GG |
269 | } |
270 | ||
2945fbc2 GG |
271 | if (!pdata) |
272 | return -EINVAL; | |
273 | ||
274 | palmas = devm_kzalloc(&i2c->dev, sizeof(struct palmas), GFP_KERNEL); | |
275 | if (palmas == NULL) | |
276 | return -ENOMEM; | |
277 | ||
278 | i2c_set_clientdata(i2c, palmas); | |
279 | palmas->dev = &i2c->dev; | |
2945fbc2 GG |
280 | palmas->irq = i2c->irq; |
281 | ||
1ffb0be3 K |
282 | match = of_match_device(of_match_ptr(of_palmas_match_tbl), &i2c->dev); |
283 | ||
284 | if (!match) | |
285 | return -ENODATA; | |
286 | ||
287 | features = (unsigned int *)match->data; | |
288 | palmas->features = *features; | |
289 | ||
2945fbc2 GG |
290 | for (i = 0; i < PALMAS_NUM_CLIENTS; i++) { |
291 | if (i == 0) | |
292 | palmas->i2c_clients[i] = i2c; | |
293 | else { | |
294 | palmas->i2c_clients[i] = | |
295 | i2c_new_dummy(i2c->adapter, | |
296 | i2c->addr + i); | |
297 | if (!palmas->i2c_clients[i]) { | |
298 | dev_err(palmas->dev, | |
299 | "can't attach client %d\n", i); | |
300 | ret = -ENOMEM; | |
301 | goto err; | |
302 | } | |
c4fbec3c | 303 | palmas->i2c_clients[i]->dev.of_node = of_node_get(node); |
2945fbc2 GG |
304 | } |
305 | palmas->regmap[i] = devm_regmap_init_i2c(palmas->i2c_clients[i], | |
306 | &palmas_regmap_config[i]); | |
307 | if (IS_ERR(palmas->regmap[i])) { | |
308 | ret = PTR_ERR(palmas->regmap[i]); | |
309 | dev_err(palmas->dev, | |
310 | "Failed to allocate regmap %d, err: %d\n", | |
311 | i, ret); | |
312 | goto err; | |
313 | } | |
314 | } | |
315 | ||
ad522f4e K |
316 | if (!palmas->irq) { |
317 | dev_warn(palmas->dev, "IRQ missing: skipping irq request\n"); | |
318 | goto no_irq; | |
319 | } | |
320 | ||
df545d1c LD |
321 | /* Change interrupt line output polarity */ |
322 | if (pdata->irq_flags & IRQ_TYPE_LEVEL_HIGH) | |
323 | reg = PALMAS_POLARITY_CTRL_INT_POLARITY; | |
324 | else | |
325 | reg = 0; | |
326 | ret = palmas_update_bits(palmas, PALMAS_PU_PD_OD_BASE, | |
327 | PALMAS_POLARITY_CTRL, PALMAS_POLARITY_CTRL_INT_POLARITY, | |
328 | reg); | |
329 | if (ret < 0) { | |
330 | dev_err(palmas->dev, "POLARITY_CTRL updat failed: %d\n", ret); | |
331 | goto err; | |
332 | } | |
333 | ||
b330f85d GG |
334 | /* Change IRQ into clear on read mode for efficiency */ |
335 | slave = PALMAS_BASE_TO_SLAVE(PALMAS_INTERRUPT_BASE); | |
336 | addr = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE, PALMAS_INT_CTRL); | |
337 | reg = PALMAS_INT_CTRL_INT_CLEAR; | |
338 | ||
339 | regmap_write(palmas->regmap[slave], addr, reg); | |
340 | ||
341 | ret = regmap_add_irq_chip(palmas->regmap[slave], palmas->irq, | |
df545d1c | 342 | IRQF_ONESHOT | pdata->irq_flags, 0, &palmas_irq_chip, |
2945fbc2 GG |
343 | &palmas->irq_data); |
344 | if (ret < 0) | |
345 | goto err; | |
346 | ||
ad522f4e | 347 | no_irq: |
2945fbc2 GG |
348 | slave = PALMAS_BASE_TO_SLAVE(PALMAS_PU_PD_OD_BASE); |
349 | addr = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE, | |
350 | PALMAS_PRIMARY_SECONDARY_PAD1); | |
351 | ||
352 | if (pdata->mux_from_pdata) { | |
353 | reg = pdata->pad1; | |
354 | ret = regmap_write(palmas->regmap[slave], addr, reg); | |
355 | if (ret) | |
3f78decc | 356 | goto err_irq; |
2945fbc2 GG |
357 | } else { |
358 | ret = regmap_read(palmas->regmap[slave], addr, ®); | |
359 | if (ret) | |
3f78decc | 360 | goto err_irq; |
2945fbc2 GG |
361 | } |
362 | ||
363 | if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_0)) | |
364 | palmas->gpio_muxed |= PALMAS_GPIO_0_MUXED; | |
365 | if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK)) | |
366 | palmas->gpio_muxed |= PALMAS_GPIO_1_MUXED; | |
367 | else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK) == | |
368 | (2 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_SHIFT)) | |
369 | palmas->led_muxed |= PALMAS_LED1_MUXED; | |
370 | else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK) == | |
371 | (3 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_SHIFT)) | |
372 | palmas->pwm_muxed |= PALMAS_PWM1_MUXED; | |
373 | if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK)) | |
374 | palmas->gpio_muxed |= PALMAS_GPIO_2_MUXED; | |
375 | else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK) == | |
376 | (2 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_SHIFT)) | |
377 | palmas->led_muxed |= PALMAS_LED2_MUXED; | |
378 | else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK) == | |
379 | (3 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_SHIFT)) | |
380 | palmas->pwm_muxed |= PALMAS_PWM2_MUXED; | |
381 | if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_3)) | |
382 | palmas->gpio_muxed |= PALMAS_GPIO_3_MUXED; | |
383 | ||
384 | addr = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE, | |
385 | PALMAS_PRIMARY_SECONDARY_PAD2); | |
386 | ||
387 | if (pdata->mux_from_pdata) { | |
388 | reg = pdata->pad2; | |
389 | ret = regmap_write(palmas->regmap[slave], addr, reg); | |
390 | if (ret) | |
3f78decc | 391 | goto err_irq; |
2945fbc2 GG |
392 | } else { |
393 | ret = regmap_read(palmas->regmap[slave], addr, ®); | |
394 | if (ret) | |
3f78decc | 395 | goto err_irq; |
2945fbc2 GG |
396 | } |
397 | ||
398 | if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_4)) | |
399 | palmas->gpio_muxed |= PALMAS_GPIO_4_MUXED; | |
400 | if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_5_MASK)) | |
401 | palmas->gpio_muxed |= PALMAS_GPIO_5_MUXED; | |
402 | if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_6)) | |
403 | palmas->gpio_muxed |= PALMAS_GPIO_6_MUXED; | |
404 | if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_7_MASK)) | |
405 | palmas->gpio_muxed |= PALMAS_GPIO_7_MUXED; | |
406 | ||
407 | dev_info(palmas->dev, "Muxing GPIO %x, PWM %x, LED %x\n", | |
408 | palmas->gpio_muxed, palmas->pwm_muxed, | |
409 | palmas->led_muxed); | |
410 | ||
411 | reg = pdata->power_ctrl; | |
412 | ||
413 | slave = PALMAS_BASE_TO_SLAVE(PALMAS_PMU_CONTROL_BASE); | |
414 | addr = PALMAS_BASE_TO_REG(PALMAS_PMU_CONTROL_BASE, PALMAS_POWER_CTRL); | |
415 | ||
416 | ret = regmap_write(palmas->regmap[slave], addr, reg); | |
417 | if (ret) | |
3f78decc | 418 | goto err_irq; |
2945fbc2 | 419 | |
9c14ac33 GG |
420 | /* |
421 | * If we are probing with DT do this the DT way and return here | |
422 | * otherwise continue and add devices using mfd helpers. | |
423 | */ | |
424 | if (node) { | |
425 | ret = of_platform_populate(node, NULL, NULL, &i2c->dev); | |
426 | if (ret < 0) | |
427 | goto err_irq; | |
428 | else | |
429 | return ret; | |
430 | } | |
431 | ||
2945fbc2 GG |
432 | return ret; |
433 | ||
3f78decc GG |
434 | err_irq: |
435 | regmap_del_irq_chip(palmas->irq, palmas->irq_data); | |
436 | err: | |
2945fbc2 GG |
437 | return ret; |
438 | } | |
439 | ||
440 | static int palmas_i2c_remove(struct i2c_client *i2c) | |
441 | { | |
442 | struct palmas *palmas = i2c_get_clientdata(i2c); | |
443 | ||
444 | mfd_remove_devices(palmas->dev); | |
445 | regmap_del_irq_chip(palmas->irq, palmas->irq_data); | |
446 | ||
447 | return 0; | |
448 | } | |
449 | ||
450 | static const struct i2c_device_id palmas_i2c_id[] = { | |
451 | { "palmas", }, | |
452 | { "twl6035", }, | |
453 | { "twl6037", }, | |
454 | { "tps65913", }, | |
00ba81c1 | 455 | { /* end */ } |
2945fbc2 GG |
456 | }; |
457 | MODULE_DEVICE_TABLE(i2c, palmas_i2c_id); | |
458 | ||
2945fbc2 GG |
459 | static struct i2c_driver palmas_i2c_driver = { |
460 | .driver = { | |
461 | .name = "palmas", | |
462 | .of_match_table = of_palmas_match_tbl, | |
463 | .owner = THIS_MODULE, | |
464 | }, | |
465 | .probe = palmas_i2c_probe, | |
466 | .remove = palmas_i2c_remove, | |
467 | .id_table = palmas_i2c_id, | |
468 | }; | |
469 | ||
470 | static int __init palmas_i2c_init(void) | |
471 | { | |
472 | return i2c_add_driver(&palmas_i2c_driver); | |
473 | } | |
474 | /* init early so consumer devices can complete system boot */ | |
475 | subsys_initcall(palmas_i2c_init); | |
476 | ||
477 | static void __exit palmas_i2c_exit(void) | |
478 | { | |
479 | i2c_del_driver(&palmas_i2c_driver); | |
480 | } | |
481 | module_exit(palmas_i2c_exit); | |
482 | ||
483 | MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>"); | |
484 | MODULE_DESCRIPTION("Palmas chip family multi-function driver"); | |
485 | MODULE_LICENSE("GPL"); |