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Commit | Line | Data |
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27e34995 | 1 | /* |
1a6e4b74 VK |
2 | * ST Microelectronics MFD: stmpe's driver |
3 | * | |
27e34995 RV |
4 | * Copyright (C) ST-Ericsson SA 2010 |
5 | * | |
6 | * License Terms: GNU General Public License, version 2 | |
7 | * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson | |
8 | */ | |
9 | ||
ac713cc9 | 10 | #include <linux/err.h> |
73de16db | 11 | #include <linux/gpio.h> |
dba61c8f | 12 | #include <linux/export.h> |
27e34995 | 13 | #include <linux/kernel.h> |
27e34995 RV |
14 | #include <linux/interrupt.h> |
15 | #include <linux/irq.h> | |
76f93992 | 16 | #include <linux/irqdomain.h> |
20d5c7de | 17 | #include <linux/of.h> |
ac713cc9 | 18 | #include <linux/of_gpio.h> |
1a6e4b74 | 19 | #include <linux/pm.h> |
27e34995 | 20 | #include <linux/slab.h> |
27e34995 | 21 | #include <linux/mfd/core.h> |
27e34995 RV |
22 | #include "stmpe.h" |
23 | ||
24 | static int __stmpe_enable(struct stmpe *stmpe, unsigned int blocks) | |
25 | { | |
26 | return stmpe->variant->enable(stmpe, blocks, true); | |
27 | } | |
28 | ||
29 | static int __stmpe_disable(struct stmpe *stmpe, unsigned int blocks) | |
30 | { | |
31 | return stmpe->variant->enable(stmpe, blocks, false); | |
32 | } | |
33 | ||
34 | static int __stmpe_reg_read(struct stmpe *stmpe, u8 reg) | |
35 | { | |
36 | int ret; | |
37 | ||
1a6e4b74 | 38 | ret = stmpe->ci->read_byte(stmpe, reg); |
27e34995 | 39 | if (ret < 0) |
1a6e4b74 | 40 | dev_err(stmpe->dev, "failed to read reg %#x: %d\n", reg, ret); |
27e34995 RV |
41 | |
42 | dev_vdbg(stmpe->dev, "rd: reg %#x => data %#x\n", reg, ret); | |
43 | ||
44 | return ret; | |
45 | } | |
46 | ||
47 | static int __stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val) | |
48 | { | |
49 | int ret; | |
50 | ||
51 | dev_vdbg(stmpe->dev, "wr: reg %#x <= %#x\n", reg, val); | |
52 | ||
1a6e4b74 | 53 | ret = stmpe->ci->write_byte(stmpe, reg, val); |
27e34995 | 54 | if (ret < 0) |
1a6e4b74 | 55 | dev_err(stmpe->dev, "failed to write reg %#x: %d\n", reg, ret); |
27e34995 RV |
56 | |
57 | return ret; | |
58 | } | |
59 | ||
60 | static int __stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val) | |
61 | { | |
62 | int ret; | |
63 | ||
64 | ret = __stmpe_reg_read(stmpe, reg); | |
65 | if (ret < 0) | |
66 | return ret; | |
67 | ||
68 | ret &= ~mask; | |
69 | ret |= val; | |
70 | ||
71 | return __stmpe_reg_write(stmpe, reg, ret); | |
72 | } | |
73 | ||
74 | static int __stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length, | |
75 | u8 *values) | |
76 | { | |
77 | int ret; | |
78 | ||
1a6e4b74 | 79 | ret = stmpe->ci->read_block(stmpe, reg, length, values); |
27e34995 | 80 | if (ret < 0) |
1a6e4b74 | 81 | dev_err(stmpe->dev, "failed to read regs %#x: %d\n", reg, ret); |
27e34995 RV |
82 | |
83 | dev_vdbg(stmpe->dev, "rd: reg %#x (%d) => ret %#x\n", reg, length, ret); | |
84 | stmpe_dump_bytes("stmpe rd: ", values, length); | |
85 | ||
86 | return ret; | |
87 | } | |
88 | ||
89 | static int __stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length, | |
90 | const u8 *values) | |
91 | { | |
92 | int ret; | |
93 | ||
94 | dev_vdbg(stmpe->dev, "wr: regs %#x (%d)\n", reg, length); | |
95 | stmpe_dump_bytes("stmpe wr: ", values, length); | |
96 | ||
1a6e4b74 | 97 | ret = stmpe->ci->write_block(stmpe, reg, length, values); |
27e34995 | 98 | if (ret < 0) |
1a6e4b74 | 99 | dev_err(stmpe->dev, "failed to write regs %#x: %d\n", reg, ret); |
27e34995 RV |
100 | |
101 | return ret; | |
102 | } | |
103 | ||
104 | /** | |
105 | * stmpe_enable - enable blocks on an STMPE device | |
106 | * @stmpe: Device to work on | |
107 | * @blocks: Mask of blocks (enum stmpe_block values) to enable | |
108 | */ | |
109 | int stmpe_enable(struct stmpe *stmpe, unsigned int blocks) | |
110 | { | |
111 | int ret; | |
112 | ||
113 | mutex_lock(&stmpe->lock); | |
114 | ret = __stmpe_enable(stmpe, blocks); | |
115 | mutex_unlock(&stmpe->lock); | |
116 | ||
117 | return ret; | |
118 | } | |
119 | EXPORT_SYMBOL_GPL(stmpe_enable); | |
120 | ||
121 | /** | |
122 | * stmpe_disable - disable blocks on an STMPE device | |
123 | * @stmpe: Device to work on | |
124 | * @blocks: Mask of blocks (enum stmpe_block values) to enable | |
125 | */ | |
126 | int stmpe_disable(struct stmpe *stmpe, unsigned int blocks) | |
127 | { | |
128 | int ret; | |
129 | ||
130 | mutex_lock(&stmpe->lock); | |
131 | ret = __stmpe_disable(stmpe, blocks); | |
132 | mutex_unlock(&stmpe->lock); | |
133 | ||
134 | return ret; | |
135 | } | |
136 | EXPORT_SYMBOL_GPL(stmpe_disable); | |
137 | ||
138 | /** | |
139 | * stmpe_reg_read() - read a single STMPE register | |
140 | * @stmpe: Device to read from | |
141 | * @reg: Register to read | |
142 | */ | |
143 | int stmpe_reg_read(struct stmpe *stmpe, u8 reg) | |
144 | { | |
145 | int ret; | |
146 | ||
147 | mutex_lock(&stmpe->lock); | |
148 | ret = __stmpe_reg_read(stmpe, reg); | |
149 | mutex_unlock(&stmpe->lock); | |
150 | ||
151 | return ret; | |
152 | } | |
153 | EXPORT_SYMBOL_GPL(stmpe_reg_read); | |
154 | ||
155 | /** | |
156 | * stmpe_reg_write() - write a single STMPE register | |
157 | * @stmpe: Device to write to | |
158 | * @reg: Register to write | |
159 | * @val: Value to write | |
160 | */ | |
161 | int stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val) | |
162 | { | |
163 | int ret; | |
164 | ||
165 | mutex_lock(&stmpe->lock); | |
166 | ret = __stmpe_reg_write(stmpe, reg, val); | |
167 | mutex_unlock(&stmpe->lock); | |
168 | ||
169 | return ret; | |
170 | } | |
171 | EXPORT_SYMBOL_GPL(stmpe_reg_write); | |
172 | ||
173 | /** | |
174 | * stmpe_set_bits() - set the value of a bitfield in a STMPE register | |
175 | * @stmpe: Device to write to | |
176 | * @reg: Register to write | |
177 | * @mask: Mask of bits to set | |
178 | * @val: Value to set | |
179 | */ | |
180 | int stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val) | |
181 | { | |
182 | int ret; | |
183 | ||
184 | mutex_lock(&stmpe->lock); | |
185 | ret = __stmpe_set_bits(stmpe, reg, mask, val); | |
186 | mutex_unlock(&stmpe->lock); | |
187 | ||
188 | return ret; | |
189 | } | |
190 | EXPORT_SYMBOL_GPL(stmpe_set_bits); | |
191 | ||
192 | /** | |
193 | * stmpe_block_read() - read multiple STMPE registers | |
194 | * @stmpe: Device to read from | |
195 | * @reg: First register | |
196 | * @length: Number of registers | |
197 | * @values: Buffer to write to | |
198 | */ | |
199 | int stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length, u8 *values) | |
200 | { | |
201 | int ret; | |
202 | ||
203 | mutex_lock(&stmpe->lock); | |
204 | ret = __stmpe_block_read(stmpe, reg, length, values); | |
205 | mutex_unlock(&stmpe->lock); | |
206 | ||
207 | return ret; | |
208 | } | |
209 | EXPORT_SYMBOL_GPL(stmpe_block_read); | |
210 | ||
211 | /** | |
212 | * stmpe_block_write() - write multiple STMPE registers | |
213 | * @stmpe: Device to write to | |
214 | * @reg: First register | |
215 | * @length: Number of registers | |
216 | * @values: Values to write | |
217 | */ | |
218 | int stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length, | |
219 | const u8 *values) | |
220 | { | |
221 | int ret; | |
222 | ||
223 | mutex_lock(&stmpe->lock); | |
224 | ret = __stmpe_block_write(stmpe, reg, length, values); | |
225 | mutex_unlock(&stmpe->lock); | |
226 | ||
227 | return ret; | |
228 | } | |
229 | EXPORT_SYMBOL_GPL(stmpe_block_write); | |
230 | ||
231 | /** | |
4dcaa6b6 | 232 | * stmpe_set_altfunc()- set the alternate function for STMPE pins |
27e34995 RV |
233 | * @stmpe: Device to configure |
234 | * @pins: Bitmask of pins to affect | |
235 | * @block: block to enable alternate functions for | |
236 | * | |
237 | * @pins is assumed to have a bit set for each of the bits whose alternate | |
238 | * function is to be changed, numbered according to the GPIOXY numbers. | |
239 | * | |
240 | * If the GPIO module is not enabled, this function automatically enables it in | |
241 | * order to perform the change. | |
242 | */ | |
243 | int stmpe_set_altfunc(struct stmpe *stmpe, u32 pins, enum stmpe_block block) | |
244 | { | |
245 | struct stmpe_variant_info *variant = stmpe->variant; | |
246 | u8 regaddr = stmpe->regs[STMPE_IDX_GPAFR_U_MSB]; | |
247 | int af_bits = variant->af_bits; | |
248 | int numregs = DIV_ROUND_UP(stmpe->num_gpios * af_bits, 8); | |
27e34995 RV |
249 | int mask = (1 << af_bits) - 1; |
250 | u8 regs[numregs]; | |
7f7f4ea1 VK |
251 | int af, afperreg, ret; |
252 | ||
253 | if (!variant->get_altfunc) | |
254 | return 0; | |
27e34995 | 255 | |
7f7f4ea1 | 256 | afperreg = 8 / af_bits; |
27e34995 RV |
257 | mutex_lock(&stmpe->lock); |
258 | ||
259 | ret = __stmpe_enable(stmpe, STMPE_BLOCK_GPIO); | |
260 | if (ret < 0) | |
261 | goto out; | |
262 | ||
263 | ret = __stmpe_block_read(stmpe, regaddr, numregs, regs); | |
264 | if (ret < 0) | |
265 | goto out; | |
266 | ||
267 | af = variant->get_altfunc(stmpe, block); | |
268 | ||
269 | while (pins) { | |
270 | int pin = __ffs(pins); | |
271 | int regoffset = numregs - (pin / afperreg) - 1; | |
272 | int pos = (pin % afperreg) * (8 / afperreg); | |
273 | ||
274 | regs[regoffset] &= ~(mask << pos); | |
275 | regs[regoffset] |= af << pos; | |
276 | ||
277 | pins &= ~(1 << pin); | |
278 | } | |
279 | ||
280 | ret = __stmpe_block_write(stmpe, regaddr, numregs, regs); | |
281 | ||
282 | out: | |
283 | mutex_unlock(&stmpe->lock); | |
284 | return ret; | |
285 | } | |
286 | EXPORT_SYMBOL_GPL(stmpe_set_altfunc); | |
287 | ||
288 | /* | |
289 | * GPIO (all variants) | |
290 | */ | |
291 | ||
292 | static struct resource stmpe_gpio_resources[] = { | |
293 | /* Start and end filled dynamically */ | |
294 | { | |
295 | .flags = IORESOURCE_IRQ, | |
296 | }, | |
297 | }; | |
298 | ||
299 | static struct mfd_cell stmpe_gpio_cell = { | |
300 | .name = "stmpe-gpio", | |
86605cfe | 301 | .of_compatible = "st,stmpe-gpio", |
27e34995 RV |
302 | .resources = stmpe_gpio_resources, |
303 | .num_resources = ARRAY_SIZE(stmpe_gpio_resources), | |
304 | }; | |
305 | ||
e31f9b82 CB |
306 | static struct mfd_cell stmpe_gpio_cell_noirq = { |
307 | .name = "stmpe-gpio", | |
86605cfe | 308 | .of_compatible = "st,stmpe-gpio", |
e31f9b82 CB |
309 | /* gpio cell resources consist of an irq only so no resources here */ |
310 | }; | |
311 | ||
27e34995 RV |
312 | /* |
313 | * Keypad (1601, 2401, 2403) | |
314 | */ | |
315 | ||
316 | static struct resource stmpe_keypad_resources[] = { | |
317 | { | |
318 | .name = "KEYPAD", | |
27e34995 RV |
319 | .flags = IORESOURCE_IRQ, |
320 | }, | |
321 | { | |
322 | .name = "KEYPAD_OVER", | |
27e34995 RV |
323 | .flags = IORESOURCE_IRQ, |
324 | }, | |
325 | }; | |
326 | ||
327 | static struct mfd_cell stmpe_keypad_cell = { | |
328 | .name = "stmpe-keypad", | |
6ea32387 | 329 | .of_compatible = "st,stmpe-keypad", |
27e34995 RV |
330 | .resources = stmpe_keypad_resources, |
331 | .num_resources = ARRAY_SIZE(stmpe_keypad_resources), | |
332 | }; | |
333 | ||
7f7f4ea1 VK |
334 | /* |
335 | * STMPE801 | |
336 | */ | |
337 | static const u8 stmpe801_regs[] = { | |
338 | [STMPE_IDX_CHIP_ID] = STMPE801_REG_CHIP_ID, | |
339 | [STMPE_IDX_ICR_LSB] = STMPE801_REG_SYS_CTRL, | |
340 | [STMPE_IDX_GPMR_LSB] = STMPE801_REG_GPIO_MP_STA, | |
341 | [STMPE_IDX_GPSR_LSB] = STMPE801_REG_GPIO_SET_PIN, | |
342 | [STMPE_IDX_GPCR_LSB] = STMPE801_REG_GPIO_SET_PIN, | |
343 | [STMPE_IDX_GPDR_LSB] = STMPE801_REG_GPIO_DIR, | |
344 | [STMPE_IDX_IEGPIOR_LSB] = STMPE801_REG_GPIO_INT_EN, | |
345 | [STMPE_IDX_ISGPIOR_MSB] = STMPE801_REG_GPIO_INT_STA, | |
346 | ||
347 | }; | |
348 | ||
349 | static struct stmpe_variant_block stmpe801_blocks[] = { | |
350 | { | |
351 | .cell = &stmpe_gpio_cell, | |
352 | .irq = 0, | |
353 | .block = STMPE_BLOCK_GPIO, | |
354 | }, | |
355 | }; | |
356 | ||
e31f9b82 CB |
357 | static struct stmpe_variant_block stmpe801_blocks_noirq[] = { |
358 | { | |
359 | .cell = &stmpe_gpio_cell_noirq, | |
360 | .block = STMPE_BLOCK_GPIO, | |
361 | }, | |
362 | }; | |
363 | ||
7f7f4ea1 VK |
364 | static int stmpe801_enable(struct stmpe *stmpe, unsigned int blocks, |
365 | bool enable) | |
366 | { | |
367 | if (blocks & STMPE_BLOCK_GPIO) | |
368 | return 0; | |
369 | else | |
370 | return -EINVAL; | |
371 | } | |
372 | ||
373 | static struct stmpe_variant_info stmpe801 = { | |
374 | .name = "stmpe801", | |
375 | .id_val = STMPE801_ID, | |
376 | .id_mask = 0xffff, | |
377 | .num_gpios = 8, | |
378 | .regs = stmpe801_regs, | |
379 | .blocks = stmpe801_blocks, | |
380 | .num_blocks = ARRAY_SIZE(stmpe801_blocks), | |
381 | .num_irqs = STMPE801_NR_INTERNAL_IRQS, | |
382 | .enable = stmpe801_enable, | |
383 | }; | |
384 | ||
e31f9b82 CB |
385 | static struct stmpe_variant_info stmpe801_noirq = { |
386 | .name = "stmpe801", | |
387 | .id_val = STMPE801_ID, | |
388 | .id_mask = 0xffff, | |
389 | .num_gpios = 8, | |
390 | .regs = stmpe801_regs, | |
391 | .blocks = stmpe801_blocks_noirq, | |
392 | .num_blocks = ARRAY_SIZE(stmpe801_blocks_noirq), | |
393 | .enable = stmpe801_enable, | |
394 | }; | |
395 | ||
27e34995 | 396 | /* |
1cda2394 | 397 | * Touchscreen (STMPE811 or STMPE610) |
27e34995 RV |
398 | */ |
399 | ||
400 | static struct resource stmpe_ts_resources[] = { | |
401 | { | |
402 | .name = "TOUCH_DET", | |
27e34995 RV |
403 | .flags = IORESOURCE_IRQ, |
404 | }, | |
405 | { | |
406 | .name = "FIFO_TH", | |
27e34995 RV |
407 | .flags = IORESOURCE_IRQ, |
408 | }, | |
409 | }; | |
410 | ||
411 | static struct mfd_cell stmpe_ts_cell = { | |
412 | .name = "stmpe-ts", | |
037db524 | 413 | .of_compatible = "st,stmpe-ts", |
27e34995 RV |
414 | .resources = stmpe_ts_resources, |
415 | .num_resources = ARRAY_SIZE(stmpe_ts_resources), | |
416 | }; | |
417 | ||
418 | /* | |
1cda2394 | 419 | * STMPE811 or STMPE610 |
27e34995 RV |
420 | */ |
421 | ||
422 | static const u8 stmpe811_regs[] = { | |
423 | [STMPE_IDX_CHIP_ID] = STMPE811_REG_CHIP_ID, | |
424 | [STMPE_IDX_ICR_LSB] = STMPE811_REG_INT_CTRL, | |
425 | [STMPE_IDX_IER_LSB] = STMPE811_REG_INT_EN, | |
426 | [STMPE_IDX_ISR_MSB] = STMPE811_REG_INT_STA, | |
427 | [STMPE_IDX_GPMR_LSB] = STMPE811_REG_GPIO_MP_STA, | |
428 | [STMPE_IDX_GPSR_LSB] = STMPE811_REG_GPIO_SET_PIN, | |
429 | [STMPE_IDX_GPCR_LSB] = STMPE811_REG_GPIO_CLR_PIN, | |
430 | [STMPE_IDX_GPDR_LSB] = STMPE811_REG_GPIO_DIR, | |
431 | [STMPE_IDX_GPRER_LSB] = STMPE811_REG_GPIO_RE, | |
432 | [STMPE_IDX_GPFER_LSB] = STMPE811_REG_GPIO_FE, | |
433 | [STMPE_IDX_GPAFR_U_MSB] = STMPE811_REG_GPIO_AF, | |
434 | [STMPE_IDX_IEGPIOR_LSB] = STMPE811_REG_GPIO_INT_EN, | |
435 | [STMPE_IDX_ISGPIOR_MSB] = STMPE811_REG_GPIO_INT_STA, | |
436 | [STMPE_IDX_GPEDR_MSB] = STMPE811_REG_GPIO_ED, | |
437 | }; | |
438 | ||
439 | static struct stmpe_variant_block stmpe811_blocks[] = { | |
440 | { | |
441 | .cell = &stmpe_gpio_cell, | |
442 | .irq = STMPE811_IRQ_GPIOC, | |
443 | .block = STMPE_BLOCK_GPIO, | |
444 | }, | |
445 | { | |
446 | .cell = &stmpe_ts_cell, | |
447 | .irq = STMPE811_IRQ_TOUCH_DET, | |
448 | .block = STMPE_BLOCK_TOUCHSCREEN, | |
449 | }, | |
450 | }; | |
451 | ||
452 | static int stmpe811_enable(struct stmpe *stmpe, unsigned int blocks, | |
453 | bool enable) | |
454 | { | |
455 | unsigned int mask = 0; | |
456 | ||
457 | if (blocks & STMPE_BLOCK_GPIO) | |
458 | mask |= STMPE811_SYS_CTRL2_GPIO_OFF; | |
459 | ||
460 | if (blocks & STMPE_BLOCK_ADC) | |
461 | mask |= STMPE811_SYS_CTRL2_ADC_OFF; | |
462 | ||
463 | if (blocks & STMPE_BLOCK_TOUCHSCREEN) | |
464 | mask |= STMPE811_SYS_CTRL2_TSC_OFF; | |
465 | ||
466 | return __stmpe_set_bits(stmpe, STMPE811_REG_SYS_CTRL2, mask, | |
467 | enable ? 0 : mask); | |
468 | } | |
469 | ||
470 | static int stmpe811_get_altfunc(struct stmpe *stmpe, enum stmpe_block block) | |
471 | { | |
472 | /* 0 for touchscreen, 1 for GPIO */ | |
473 | return block != STMPE_BLOCK_TOUCHSCREEN; | |
474 | } | |
475 | ||
476 | static struct stmpe_variant_info stmpe811 = { | |
477 | .name = "stmpe811", | |
478 | .id_val = 0x0811, | |
479 | .id_mask = 0xffff, | |
480 | .num_gpios = 8, | |
481 | .af_bits = 1, | |
482 | .regs = stmpe811_regs, | |
483 | .blocks = stmpe811_blocks, | |
484 | .num_blocks = ARRAY_SIZE(stmpe811_blocks), | |
485 | .num_irqs = STMPE811_NR_INTERNAL_IRQS, | |
486 | .enable = stmpe811_enable, | |
487 | .get_altfunc = stmpe811_get_altfunc, | |
488 | }; | |
489 | ||
1cda2394 VK |
490 | /* Similar to 811, except number of gpios */ |
491 | static struct stmpe_variant_info stmpe610 = { | |
492 | .name = "stmpe610", | |
493 | .id_val = 0x0811, | |
494 | .id_mask = 0xffff, | |
495 | .num_gpios = 6, | |
496 | .af_bits = 1, | |
497 | .regs = stmpe811_regs, | |
498 | .blocks = stmpe811_blocks, | |
499 | .num_blocks = ARRAY_SIZE(stmpe811_blocks), | |
500 | .num_irqs = STMPE811_NR_INTERNAL_IRQS, | |
501 | .enable = stmpe811_enable, | |
502 | .get_altfunc = stmpe811_get_altfunc, | |
503 | }; | |
504 | ||
27e34995 RV |
505 | /* |
506 | * STMPE1601 | |
507 | */ | |
508 | ||
509 | static const u8 stmpe1601_regs[] = { | |
510 | [STMPE_IDX_CHIP_ID] = STMPE1601_REG_CHIP_ID, | |
511 | [STMPE_IDX_ICR_LSB] = STMPE1601_REG_ICR_LSB, | |
512 | [STMPE_IDX_IER_LSB] = STMPE1601_REG_IER_LSB, | |
513 | [STMPE_IDX_ISR_MSB] = STMPE1601_REG_ISR_MSB, | |
514 | [STMPE_IDX_GPMR_LSB] = STMPE1601_REG_GPIO_MP_LSB, | |
515 | [STMPE_IDX_GPSR_LSB] = STMPE1601_REG_GPIO_SET_LSB, | |
516 | [STMPE_IDX_GPCR_LSB] = STMPE1601_REG_GPIO_CLR_LSB, | |
517 | [STMPE_IDX_GPDR_LSB] = STMPE1601_REG_GPIO_SET_DIR_LSB, | |
518 | [STMPE_IDX_GPRER_LSB] = STMPE1601_REG_GPIO_RE_LSB, | |
519 | [STMPE_IDX_GPFER_LSB] = STMPE1601_REG_GPIO_FE_LSB, | |
520 | [STMPE_IDX_GPAFR_U_MSB] = STMPE1601_REG_GPIO_AF_U_MSB, | |
521 | [STMPE_IDX_IEGPIOR_LSB] = STMPE1601_REG_INT_EN_GPIO_MASK_LSB, | |
522 | [STMPE_IDX_ISGPIOR_MSB] = STMPE1601_REG_INT_STA_GPIO_MSB, | |
523 | [STMPE_IDX_GPEDR_MSB] = STMPE1601_REG_GPIO_ED_MSB, | |
524 | }; | |
525 | ||
526 | static struct stmpe_variant_block stmpe1601_blocks[] = { | |
527 | { | |
528 | .cell = &stmpe_gpio_cell, | |
5204e51d | 529 | .irq = STMPE1601_IRQ_GPIOC, |
27e34995 RV |
530 | .block = STMPE_BLOCK_GPIO, |
531 | }, | |
532 | { | |
533 | .cell = &stmpe_keypad_cell, | |
5204e51d | 534 | .irq = STMPE1601_IRQ_KEYPAD, |
27e34995 RV |
535 | .block = STMPE_BLOCK_KEYPAD, |
536 | }, | |
537 | }; | |
538 | ||
5981f4e6 SI |
539 | /* supported autosleep timeout delay (in msecs) */ |
540 | static const int stmpe_autosleep_delay[] = { | |
541 | 4, 16, 32, 64, 128, 256, 512, 1024, | |
542 | }; | |
543 | ||
544 | static int stmpe_round_timeout(int timeout) | |
545 | { | |
546 | int i; | |
547 | ||
548 | for (i = 0; i < ARRAY_SIZE(stmpe_autosleep_delay); i++) { | |
549 | if (stmpe_autosleep_delay[i] >= timeout) | |
550 | return i; | |
551 | } | |
552 | ||
553 | /* | |
554 | * requests for delays longer than supported should not return the | |
555 | * longest supported delay | |
556 | */ | |
557 | return -EINVAL; | |
558 | } | |
559 | ||
560 | static int stmpe_autosleep(struct stmpe *stmpe, int autosleep_timeout) | |
561 | { | |
562 | int ret; | |
563 | ||
564 | if (!stmpe->variant->enable_autosleep) | |
565 | return -ENOSYS; | |
566 | ||
567 | mutex_lock(&stmpe->lock); | |
568 | ret = stmpe->variant->enable_autosleep(stmpe, autosleep_timeout); | |
569 | mutex_unlock(&stmpe->lock); | |
570 | ||
571 | return ret; | |
572 | } | |
573 | ||
574 | /* | |
575 | * Both stmpe 1601/2403 support same layout for autosleep | |
576 | */ | |
577 | static int stmpe1601_autosleep(struct stmpe *stmpe, | |
578 | int autosleep_timeout) | |
579 | { | |
580 | int ret, timeout; | |
581 | ||
582 | /* choose the best available timeout */ | |
583 | timeout = stmpe_round_timeout(autosleep_timeout); | |
584 | if (timeout < 0) { | |
585 | dev_err(stmpe->dev, "invalid timeout\n"); | |
586 | return timeout; | |
587 | } | |
588 | ||
589 | ret = __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2, | |
590 | STMPE1601_AUTOSLEEP_TIMEOUT_MASK, | |
591 | timeout); | |
592 | if (ret < 0) | |
593 | return ret; | |
594 | ||
595 | return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2, | |
596 | STPME1601_AUTOSLEEP_ENABLE, | |
597 | STPME1601_AUTOSLEEP_ENABLE); | |
598 | } | |
599 | ||
27e34995 RV |
600 | static int stmpe1601_enable(struct stmpe *stmpe, unsigned int blocks, |
601 | bool enable) | |
602 | { | |
603 | unsigned int mask = 0; | |
604 | ||
605 | if (blocks & STMPE_BLOCK_GPIO) | |
606 | mask |= STMPE1601_SYS_CTRL_ENABLE_GPIO; | |
607 | ||
608 | if (blocks & STMPE_BLOCK_KEYPAD) | |
609 | mask |= STMPE1601_SYS_CTRL_ENABLE_KPC; | |
610 | ||
611 | return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL, mask, | |
612 | enable ? mask : 0); | |
613 | } | |
614 | ||
615 | static int stmpe1601_get_altfunc(struct stmpe *stmpe, enum stmpe_block block) | |
616 | { | |
617 | switch (block) { | |
618 | case STMPE_BLOCK_PWM: | |
619 | return 2; | |
620 | ||
621 | case STMPE_BLOCK_KEYPAD: | |
622 | return 1; | |
623 | ||
624 | case STMPE_BLOCK_GPIO: | |
625 | default: | |
626 | return 0; | |
627 | } | |
628 | } | |
629 | ||
630 | static struct stmpe_variant_info stmpe1601 = { | |
631 | .name = "stmpe1601", | |
632 | .id_val = 0x0210, | |
633 | .id_mask = 0xfff0, /* at least 0x0210 and 0x0212 */ | |
634 | .num_gpios = 16, | |
635 | .af_bits = 2, | |
636 | .regs = stmpe1601_regs, | |
637 | .blocks = stmpe1601_blocks, | |
638 | .num_blocks = ARRAY_SIZE(stmpe1601_blocks), | |
639 | .num_irqs = STMPE1601_NR_INTERNAL_IRQS, | |
640 | .enable = stmpe1601_enable, | |
641 | .get_altfunc = stmpe1601_get_altfunc, | |
5981f4e6 | 642 | .enable_autosleep = stmpe1601_autosleep, |
27e34995 RV |
643 | }; |
644 | ||
645 | /* | |
646 | * STMPE24XX | |
647 | */ | |
648 | ||
649 | static const u8 stmpe24xx_regs[] = { | |
650 | [STMPE_IDX_CHIP_ID] = STMPE24XX_REG_CHIP_ID, | |
651 | [STMPE_IDX_ICR_LSB] = STMPE24XX_REG_ICR_LSB, | |
652 | [STMPE_IDX_IER_LSB] = STMPE24XX_REG_IER_LSB, | |
653 | [STMPE_IDX_ISR_MSB] = STMPE24XX_REG_ISR_MSB, | |
654 | [STMPE_IDX_GPMR_LSB] = STMPE24XX_REG_GPMR_LSB, | |
655 | [STMPE_IDX_GPSR_LSB] = STMPE24XX_REG_GPSR_LSB, | |
656 | [STMPE_IDX_GPCR_LSB] = STMPE24XX_REG_GPCR_LSB, | |
657 | [STMPE_IDX_GPDR_LSB] = STMPE24XX_REG_GPDR_LSB, | |
658 | [STMPE_IDX_GPRER_LSB] = STMPE24XX_REG_GPRER_LSB, | |
659 | [STMPE_IDX_GPFER_LSB] = STMPE24XX_REG_GPFER_LSB, | |
660 | [STMPE_IDX_GPAFR_U_MSB] = STMPE24XX_REG_GPAFR_U_MSB, | |
661 | [STMPE_IDX_IEGPIOR_LSB] = STMPE24XX_REG_IEGPIOR_LSB, | |
662 | [STMPE_IDX_ISGPIOR_MSB] = STMPE24XX_REG_ISGPIOR_MSB, | |
663 | [STMPE_IDX_GPEDR_MSB] = STMPE24XX_REG_GPEDR_MSB, | |
664 | }; | |
665 | ||
666 | static struct stmpe_variant_block stmpe24xx_blocks[] = { | |
667 | { | |
668 | .cell = &stmpe_gpio_cell, | |
669 | .irq = STMPE24XX_IRQ_GPIOC, | |
670 | .block = STMPE_BLOCK_GPIO, | |
671 | }, | |
672 | { | |
673 | .cell = &stmpe_keypad_cell, | |
674 | .irq = STMPE24XX_IRQ_KEYPAD, | |
675 | .block = STMPE_BLOCK_KEYPAD, | |
676 | }, | |
677 | }; | |
678 | ||
679 | static int stmpe24xx_enable(struct stmpe *stmpe, unsigned int blocks, | |
680 | bool enable) | |
681 | { | |
682 | unsigned int mask = 0; | |
683 | ||
684 | if (blocks & STMPE_BLOCK_GPIO) | |
685 | mask |= STMPE24XX_SYS_CTRL_ENABLE_GPIO; | |
686 | ||
687 | if (blocks & STMPE_BLOCK_KEYPAD) | |
688 | mask |= STMPE24XX_SYS_CTRL_ENABLE_KPC; | |
689 | ||
690 | return __stmpe_set_bits(stmpe, STMPE24XX_REG_SYS_CTRL, mask, | |
691 | enable ? mask : 0); | |
692 | } | |
693 | ||
694 | static int stmpe24xx_get_altfunc(struct stmpe *stmpe, enum stmpe_block block) | |
695 | { | |
696 | switch (block) { | |
697 | case STMPE_BLOCK_ROTATOR: | |
698 | return 2; | |
699 | ||
700 | case STMPE_BLOCK_KEYPAD: | |
701 | return 1; | |
702 | ||
703 | case STMPE_BLOCK_GPIO: | |
704 | default: | |
705 | return 0; | |
706 | } | |
707 | } | |
708 | ||
709 | static struct stmpe_variant_info stmpe2401 = { | |
710 | .name = "stmpe2401", | |
711 | .id_val = 0x0101, | |
712 | .id_mask = 0xffff, | |
713 | .num_gpios = 24, | |
714 | .af_bits = 2, | |
715 | .regs = stmpe24xx_regs, | |
716 | .blocks = stmpe24xx_blocks, | |
717 | .num_blocks = ARRAY_SIZE(stmpe24xx_blocks), | |
718 | .num_irqs = STMPE24XX_NR_INTERNAL_IRQS, | |
719 | .enable = stmpe24xx_enable, | |
720 | .get_altfunc = stmpe24xx_get_altfunc, | |
721 | }; | |
722 | ||
723 | static struct stmpe_variant_info stmpe2403 = { | |
724 | .name = "stmpe2403", | |
725 | .id_val = 0x0120, | |
726 | .id_mask = 0xffff, | |
727 | .num_gpios = 24, | |
728 | .af_bits = 2, | |
729 | .regs = stmpe24xx_regs, | |
730 | .blocks = stmpe24xx_blocks, | |
731 | .num_blocks = ARRAY_SIZE(stmpe24xx_blocks), | |
732 | .num_irqs = STMPE24XX_NR_INTERNAL_IRQS, | |
733 | .enable = stmpe24xx_enable, | |
734 | .get_altfunc = stmpe24xx_get_altfunc, | |
5981f4e6 | 735 | .enable_autosleep = stmpe1601_autosleep, /* same as stmpe1601 */ |
27e34995 RV |
736 | }; |
737 | ||
e31f9b82 | 738 | static struct stmpe_variant_info *stmpe_variant_info[STMPE_NBR_PARTS] = { |
1cda2394 | 739 | [STMPE610] = &stmpe610, |
7f7f4ea1 | 740 | [STMPE801] = &stmpe801, |
27e34995 RV |
741 | [STMPE811] = &stmpe811, |
742 | [STMPE1601] = &stmpe1601, | |
743 | [STMPE2401] = &stmpe2401, | |
744 | [STMPE2403] = &stmpe2403, | |
745 | }; | |
746 | ||
e31f9b82 CB |
747 | /* |
748 | * These devices can be connected in a 'no-irq' configuration - the irq pin | |
749 | * is not used and the device cannot interrupt the CPU. Here we only list | |
750 | * devices which support this configuration - the driver will fail probing | |
751 | * for any devices not listed here which are configured in this way. | |
752 | */ | |
753 | static struct stmpe_variant_info *stmpe_noirq_variant_info[STMPE_NBR_PARTS] = { | |
754 | [STMPE801] = &stmpe801_noirq, | |
755 | }; | |
756 | ||
27e34995 RV |
757 | static irqreturn_t stmpe_irq(int irq, void *data) |
758 | { | |
759 | struct stmpe *stmpe = data; | |
760 | struct stmpe_variant_info *variant = stmpe->variant; | |
761 | int num = DIV_ROUND_UP(variant->num_irqs, 8); | |
762 | u8 israddr = stmpe->regs[STMPE_IDX_ISR_MSB]; | |
763 | u8 isr[num]; | |
764 | int ret; | |
765 | int i; | |
766 | ||
7f7f4ea1 | 767 | if (variant->id_val == STMPE801_ID) { |
76f93992 LJ |
768 | int base = irq_create_mapping(stmpe->domain, 0); |
769 | ||
770 | handle_nested_irq(base); | |
7f7f4ea1 VK |
771 | return IRQ_HANDLED; |
772 | } | |
773 | ||
27e34995 RV |
774 | ret = stmpe_block_read(stmpe, israddr, num, isr); |
775 | if (ret < 0) | |
776 | return IRQ_NONE; | |
777 | ||
778 | for (i = 0; i < num; i++) { | |
779 | int bank = num - i - 1; | |
780 | u8 status = isr[i]; | |
781 | u8 clear; | |
782 | ||
783 | status &= stmpe->ier[bank]; | |
784 | if (!status) | |
785 | continue; | |
786 | ||
787 | clear = status; | |
788 | while (status) { | |
789 | int bit = __ffs(status); | |
790 | int line = bank * 8 + bit; | |
76f93992 | 791 | int nestedirq = irq_create_mapping(stmpe->domain, line); |
27e34995 | 792 | |
76f93992 | 793 | handle_nested_irq(nestedirq); |
27e34995 RV |
794 | status &= ~(1 << bit); |
795 | } | |
796 | ||
797 | stmpe_reg_write(stmpe, israddr + i, clear); | |
798 | } | |
799 | ||
800 | return IRQ_HANDLED; | |
801 | } | |
802 | ||
43b8c084 | 803 | static void stmpe_irq_lock(struct irq_data *data) |
27e34995 | 804 | { |
43b8c084 | 805 | struct stmpe *stmpe = irq_data_get_irq_chip_data(data); |
27e34995 RV |
806 | |
807 | mutex_lock(&stmpe->irq_lock); | |
808 | } | |
809 | ||
43b8c084 | 810 | static void stmpe_irq_sync_unlock(struct irq_data *data) |
27e34995 | 811 | { |
43b8c084 | 812 | struct stmpe *stmpe = irq_data_get_irq_chip_data(data); |
27e34995 RV |
813 | struct stmpe_variant_info *variant = stmpe->variant; |
814 | int num = DIV_ROUND_UP(variant->num_irqs, 8); | |
815 | int i; | |
816 | ||
817 | for (i = 0; i < num; i++) { | |
818 | u8 new = stmpe->ier[i]; | |
819 | u8 old = stmpe->oldier[i]; | |
820 | ||
821 | if (new == old) | |
822 | continue; | |
823 | ||
824 | stmpe->oldier[i] = new; | |
825 | stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_IER_LSB] - i, new); | |
826 | } | |
827 | ||
828 | mutex_unlock(&stmpe->irq_lock); | |
829 | } | |
830 | ||
43b8c084 | 831 | static void stmpe_irq_mask(struct irq_data *data) |
27e34995 | 832 | { |
43b8c084 | 833 | struct stmpe *stmpe = irq_data_get_irq_chip_data(data); |
76f93992 | 834 | int offset = data->hwirq; |
27e34995 RV |
835 | int regoffset = offset / 8; |
836 | int mask = 1 << (offset % 8); | |
837 | ||
838 | stmpe->ier[regoffset] &= ~mask; | |
839 | } | |
840 | ||
43b8c084 | 841 | static void stmpe_irq_unmask(struct irq_data *data) |
27e34995 | 842 | { |
43b8c084 | 843 | struct stmpe *stmpe = irq_data_get_irq_chip_data(data); |
76f93992 | 844 | int offset = data->hwirq; |
27e34995 RV |
845 | int regoffset = offset / 8; |
846 | int mask = 1 << (offset % 8); | |
847 | ||
848 | stmpe->ier[regoffset] |= mask; | |
849 | } | |
850 | ||
851 | static struct irq_chip stmpe_irq_chip = { | |
852 | .name = "stmpe", | |
43b8c084 MB |
853 | .irq_bus_lock = stmpe_irq_lock, |
854 | .irq_bus_sync_unlock = stmpe_irq_sync_unlock, | |
855 | .irq_mask = stmpe_irq_mask, | |
856 | .irq_unmask = stmpe_irq_unmask, | |
27e34995 RV |
857 | }; |
858 | ||
76f93992 LJ |
859 | static int stmpe_irq_map(struct irq_domain *d, unsigned int virq, |
860 | irq_hw_number_t hwirq) | |
27e34995 | 861 | { |
76f93992 | 862 | struct stmpe *stmpe = d->host_data; |
7f7f4ea1 | 863 | struct irq_chip *chip = NULL; |
27e34995 | 864 | |
7f7f4ea1 VK |
865 | if (stmpe->variant->id_val != STMPE801_ID) |
866 | chip = &stmpe_irq_chip; | |
867 | ||
76f93992 LJ |
868 | irq_set_chip_data(virq, stmpe); |
869 | irq_set_chip_and_handler(virq, chip, handle_edge_irq); | |
870 | irq_set_nested_thread(virq, 1); | |
27e34995 | 871 | #ifdef CONFIG_ARM |
76f93992 | 872 | set_irq_flags(virq, IRQF_VALID); |
27e34995 | 873 | #else |
76f93992 | 874 | irq_set_noprobe(virq); |
27e34995 | 875 | #endif |
27e34995 RV |
876 | |
877 | return 0; | |
878 | } | |
879 | ||
76f93992 | 880 | static void stmpe_irq_unmap(struct irq_domain *d, unsigned int virq) |
27e34995 | 881 | { |
27e34995 | 882 | #ifdef CONFIG_ARM |
76f93992 | 883 | set_irq_flags(virq, 0); |
27e34995 | 884 | #endif |
76f93992 LJ |
885 | irq_set_chip_and_handler(virq, NULL, NULL); |
886 | irq_set_chip_data(virq, NULL); | |
887 | } | |
888 | ||
889 | static struct irq_domain_ops stmpe_irq_ops = { | |
890 | .map = stmpe_irq_map, | |
891 | .unmap = stmpe_irq_unmap, | |
892 | .xlate = irq_domain_xlate_twocell, | |
893 | }; | |
894 | ||
612b95cd | 895 | static int stmpe_irq_init(struct stmpe *stmpe, struct device_node *np) |
76f93992 | 896 | { |
b20a4371 | 897 | int base = 0; |
76f93992 LJ |
898 | int num_irqs = stmpe->variant->num_irqs; |
899 | ||
b20a4371 LJ |
900 | if (!np) |
901 | base = stmpe->irq_base; | |
76f93992 | 902 | |
b20a4371 LJ |
903 | stmpe->domain = irq_domain_add_simple(np, num_irqs, base, |
904 | &stmpe_irq_ops, stmpe); | |
76f93992 LJ |
905 | if (!stmpe->domain) { |
906 | dev_err(stmpe->dev, "Failed to create irqdomain\n"); | |
907 | return -ENOSYS; | |
27e34995 | 908 | } |
76f93992 LJ |
909 | |
910 | return 0; | |
27e34995 RV |
911 | } |
912 | ||
612b95cd | 913 | static int stmpe_chip_init(struct stmpe *stmpe) |
27e34995 RV |
914 | { |
915 | unsigned int irq_trigger = stmpe->pdata->irq_trigger; | |
5981f4e6 | 916 | int autosleep_timeout = stmpe->pdata->autosleep_timeout; |
27e34995 | 917 | struct stmpe_variant_info *variant = stmpe->variant; |
e31f9b82 | 918 | u8 icr = 0; |
27e34995 RV |
919 | unsigned int id; |
920 | u8 data[2]; | |
921 | int ret; | |
922 | ||
923 | ret = stmpe_block_read(stmpe, stmpe->regs[STMPE_IDX_CHIP_ID], | |
924 | ARRAY_SIZE(data), data); | |
925 | if (ret < 0) | |
926 | return ret; | |
927 | ||
928 | id = (data[0] << 8) | data[1]; | |
929 | if ((id & variant->id_mask) != variant->id_val) { | |
930 | dev_err(stmpe->dev, "unknown chip id: %#x\n", id); | |
931 | return -EINVAL; | |
932 | } | |
933 | ||
934 | dev_info(stmpe->dev, "%s detected, chip id: %#x\n", variant->name, id); | |
935 | ||
936 | /* Disable all modules -- subdrivers should enable what they need. */ | |
937 | ret = stmpe_disable(stmpe, ~0); | |
938 | if (ret) | |
939 | return ret; | |
940 | ||
e31f9b82 | 941 | if (stmpe->irq >= 0) { |
7f7f4ea1 | 942 | if (id == STMPE801_ID) |
e31f9b82 | 943 | icr = STMPE801_REG_SYS_CTRL_INT_EN; |
7f7f4ea1 | 944 | else |
e31f9b82 | 945 | icr = STMPE_ICR_LSB_GIM; |
27e34995 | 946 | |
e31f9b82 CB |
947 | /* STMPE801 doesn't support Edge interrupts */ |
948 | if (id != STMPE801_ID) { | |
949 | if (irq_trigger == IRQF_TRIGGER_FALLING || | |
950 | irq_trigger == IRQF_TRIGGER_RISING) | |
951 | icr |= STMPE_ICR_LSB_EDGE; | |
952 | } | |
953 | ||
954 | if (irq_trigger == IRQF_TRIGGER_RISING || | |
955 | irq_trigger == IRQF_TRIGGER_HIGH) { | |
956 | if (id == STMPE801_ID) | |
957 | icr |= STMPE801_REG_SYS_CTRL_INT_HI; | |
958 | else | |
959 | icr |= STMPE_ICR_LSB_HIGH; | |
960 | } | |
7f7f4ea1 | 961 | } |
27e34995 | 962 | |
5981f4e6 SI |
963 | if (stmpe->pdata->autosleep) { |
964 | ret = stmpe_autosleep(stmpe, autosleep_timeout); | |
965 | if (ret) | |
966 | return ret; | |
967 | } | |
968 | ||
27e34995 RV |
969 | return stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_ICR_LSB], icr); |
970 | } | |
971 | ||
612b95cd | 972 | static int stmpe_add_device(struct stmpe *stmpe, struct mfd_cell *cell) |
27e34995 RV |
973 | { |
974 | return mfd_add_devices(stmpe->dev, stmpe->pdata->id, cell, 1, | |
76f93992 | 975 | NULL, stmpe->irq_base, stmpe->domain); |
27e34995 RV |
976 | } |
977 | ||
612b95cd | 978 | static int stmpe_devices_init(struct stmpe *stmpe) |
27e34995 RV |
979 | { |
980 | struct stmpe_variant_info *variant = stmpe->variant; | |
981 | unsigned int platform_blocks = stmpe->pdata->blocks; | |
982 | int ret = -EINVAL; | |
7da0cbfc | 983 | int i, j; |
27e34995 RV |
984 | |
985 | for (i = 0; i < variant->num_blocks; i++) { | |
986 | struct stmpe_variant_block *block = &variant->blocks[i]; | |
987 | ||
988 | if (!(platform_blocks & block->block)) | |
989 | continue; | |
990 | ||
7da0cbfc LJ |
991 | for (j = 0; j < block->cell->num_resources; j++) { |
992 | struct resource *res = | |
993 | (struct resource *) &block->cell->resources[j]; | |
994 | ||
995 | /* Dynamically fill in a variant's IRQ. */ | |
996 | if (res->flags & IORESOURCE_IRQ) | |
997 | res->start = res->end = block->irq + j; | |
998 | } | |
999 | ||
27e34995 | 1000 | platform_blocks &= ~block->block; |
7da0cbfc | 1001 | ret = stmpe_add_device(stmpe, block->cell); |
27e34995 RV |
1002 | if (ret) |
1003 | return ret; | |
1004 | } | |
1005 | ||
1006 | if (platform_blocks) | |
1007 | dev_warn(stmpe->dev, | |
1008 | "platform wants blocks (%#x) not present on variant", | |
1009 | platform_blocks); | |
1010 | ||
1011 | return ret; | |
1012 | } | |
1013 | ||
612b95cd | 1014 | void stmpe_of_probe(struct stmpe_platform_data *pdata, struct device_node *np) |
909582ca LJ |
1015 | { |
1016 | struct device_node *child; | |
1017 | ||
408a3fa8 GF |
1018 | pdata->id = of_alias_get_id(np, "stmpe-i2c"); |
1019 | if (pdata->id < 0) | |
1020 | pdata->id = -1; | |
1021 | ||
ac713cc9 VKS |
1022 | pdata->irq_trigger = IRQF_TRIGGER_NONE; |
1023 | ||
909582ca LJ |
1024 | of_property_read_u32(np, "st,autosleep-timeout", |
1025 | &pdata->autosleep_timeout); | |
1026 | ||
1027 | pdata->autosleep = (pdata->autosleep_timeout) ? true : false; | |
1028 | ||
1029 | for_each_child_of_node(np, child) { | |
1030 | if (!strcmp(child->name, "stmpe_gpio")) { | |
1031 | pdata->blocks |= STMPE_BLOCK_GPIO; | |
ac713cc9 | 1032 | } else if (!strcmp(child->name, "stmpe_keypad")) { |
909582ca | 1033 | pdata->blocks |= STMPE_BLOCK_KEYPAD; |
ac713cc9 | 1034 | } else if (!strcmp(child->name, "stmpe_touchscreen")) { |
909582ca | 1035 | pdata->blocks |= STMPE_BLOCK_TOUCHSCREEN; |
ac713cc9 | 1036 | } else if (!strcmp(child->name, "stmpe_adc")) { |
909582ca | 1037 | pdata->blocks |= STMPE_BLOCK_ADC; |
ac713cc9 VKS |
1038 | } else if (!strcmp(child->name, "stmpe_pwm")) { |
1039 | pdata->blocks |= STMPE_BLOCK_PWM; | |
1040 | } else if (!strcmp(child->name, "stmpe_rotator")) { | |
1041 | pdata->blocks |= STMPE_BLOCK_ROTATOR; | |
909582ca LJ |
1042 | } |
1043 | } | |
1044 | } | |
1045 | ||
1a6e4b74 | 1046 | /* Called from client specific probe routines */ |
612b95cd | 1047 | int stmpe_probe(struct stmpe_client_info *ci, int partnum) |
208c4343 | 1048 | { |
1a6e4b74 | 1049 | struct stmpe_platform_data *pdata = dev_get_platdata(ci->dev); |
909582ca | 1050 | struct device_node *np = ci->dev->of_node; |
27e34995 RV |
1051 | struct stmpe *stmpe; |
1052 | int ret; | |
1053 | ||
909582ca | 1054 | if (!pdata) { |
cb5faba9 | 1055 | if (!np) |
909582ca | 1056 | return -EINVAL; |
cb5faba9 VK |
1057 | |
1058 | pdata = devm_kzalloc(ci->dev, sizeof(*pdata), GFP_KERNEL); | |
1059 | if (!pdata) | |
1060 | return -ENOMEM; | |
1061 | ||
1062 | stmpe_of_probe(pdata, np); | |
a200e320 GF |
1063 | |
1064 | if (of_find_property(np, "interrupts", NULL) == NULL) | |
1065 | ci->irq = -1; | |
909582ca | 1066 | } |
27e34995 | 1067 | |
cb5faba9 | 1068 | stmpe = devm_kzalloc(ci->dev, sizeof(struct stmpe), GFP_KERNEL); |
27e34995 RV |
1069 | if (!stmpe) |
1070 | return -ENOMEM; | |
1071 | ||
1072 | mutex_init(&stmpe->irq_lock); | |
1073 | mutex_init(&stmpe->lock); | |
1074 | ||
1a6e4b74 VK |
1075 | stmpe->dev = ci->dev; |
1076 | stmpe->client = ci->client; | |
27e34995 RV |
1077 | stmpe->pdata = pdata; |
1078 | stmpe->irq_base = pdata->irq_base; | |
1a6e4b74 VK |
1079 | stmpe->ci = ci; |
1080 | stmpe->partnum = partnum; | |
1081 | stmpe->variant = stmpe_variant_info[partnum]; | |
27e34995 RV |
1082 | stmpe->regs = stmpe->variant->regs; |
1083 | stmpe->num_gpios = stmpe->variant->num_gpios; | |
1a6e4b74 | 1084 | dev_set_drvdata(stmpe->dev, stmpe); |
27e34995 | 1085 | |
1a6e4b74 VK |
1086 | if (ci->init) |
1087 | ci->init(stmpe); | |
27e34995 | 1088 | |
73de16db | 1089 | if (pdata->irq_over_gpio) { |
cb5faba9 VK |
1090 | ret = devm_gpio_request_one(ci->dev, pdata->irq_gpio, |
1091 | GPIOF_DIR_IN, "stmpe"); | |
73de16db VK |
1092 | if (ret) { |
1093 | dev_err(stmpe->dev, "failed to request IRQ GPIO: %d\n", | |
1094 | ret); | |
cb5faba9 | 1095 | return ret; |
73de16db VK |
1096 | } |
1097 | ||
1098 | stmpe->irq = gpio_to_irq(pdata->irq_gpio); | |
1099 | } else { | |
1a6e4b74 | 1100 | stmpe->irq = ci->irq; |
73de16db VK |
1101 | } |
1102 | ||
e31f9b82 CB |
1103 | if (stmpe->irq < 0) { |
1104 | /* use alternate variant info for no-irq mode, if supported */ | |
1105 | dev_info(stmpe->dev, | |
1106 | "%s configured in no-irq mode by platform data\n", | |
1107 | stmpe->variant->name); | |
1108 | if (!stmpe_noirq_variant_info[stmpe->partnum]) { | |
1109 | dev_err(stmpe->dev, | |
1110 | "%s does not support no-irq mode!\n", | |
1111 | stmpe->variant->name); | |
cb5faba9 | 1112 | return -ENODEV; |
e31f9b82 CB |
1113 | } |
1114 | stmpe->variant = stmpe_noirq_variant_info[stmpe->partnum]; | |
ac713cc9 VKS |
1115 | } else if (pdata->irq_trigger == IRQF_TRIGGER_NONE) { |
1116 | pdata->irq_trigger = | |
1117 | irqd_get_trigger_type(irq_get_irq_data(stmpe->irq)); | |
e31f9b82 CB |
1118 | } |
1119 | ||
27e34995 RV |
1120 | ret = stmpe_chip_init(stmpe); |
1121 | if (ret) | |
cb5faba9 | 1122 | return ret; |
27e34995 | 1123 | |
e31f9b82 | 1124 | if (stmpe->irq >= 0) { |
909582ca | 1125 | ret = stmpe_irq_init(stmpe, np); |
e31f9b82 | 1126 | if (ret) |
cb5faba9 | 1127 | return ret; |
27e34995 | 1128 | |
cb5faba9 VK |
1129 | ret = devm_request_threaded_irq(ci->dev, stmpe->irq, NULL, |
1130 | stmpe_irq, pdata->irq_trigger | IRQF_ONESHOT, | |
e31f9b82 CB |
1131 | "stmpe", stmpe); |
1132 | if (ret) { | |
1133 | dev_err(stmpe->dev, "failed to request IRQ: %d\n", | |
1134 | ret); | |
cb5faba9 | 1135 | return ret; |
e31f9b82 | 1136 | } |
27e34995 RV |
1137 | } |
1138 | ||
1139 | ret = stmpe_devices_init(stmpe); | |
cb5faba9 VK |
1140 | if (!ret) |
1141 | return 0; | |
27e34995 | 1142 | |
cb5faba9 | 1143 | dev_err(stmpe->dev, "failed to add children\n"); |
27e34995 | 1144 | mfd_remove_devices(stmpe->dev); |
cb5faba9 | 1145 | |
27e34995 RV |
1146 | return ret; |
1147 | } | |
1148 | ||
1a6e4b74 | 1149 | int stmpe_remove(struct stmpe *stmpe) |
27e34995 | 1150 | { |
27e34995 RV |
1151 | mfd_remove_devices(stmpe->dev); |
1152 | ||
27e34995 RV |
1153 | return 0; |
1154 | } | |
1155 | ||
208c4343 | 1156 | #ifdef CONFIG_PM |
1a6e4b74 VK |
1157 | static int stmpe_suspend(struct device *dev) |
1158 | { | |
1159 | struct stmpe *stmpe = dev_get_drvdata(dev); | |
208c4343 | 1160 | |
e31f9b82 | 1161 | if (stmpe->irq >= 0 && device_may_wakeup(dev)) |
1a6e4b74 | 1162 | enable_irq_wake(stmpe->irq); |
27e34995 | 1163 | |
1a6e4b74 | 1164 | return 0; |
27e34995 | 1165 | } |
27e34995 | 1166 | |
1a6e4b74 | 1167 | static int stmpe_resume(struct device *dev) |
27e34995 | 1168 | { |
1a6e4b74 VK |
1169 | struct stmpe *stmpe = dev_get_drvdata(dev); |
1170 | ||
e31f9b82 | 1171 | if (stmpe->irq >= 0 && device_may_wakeup(dev)) |
1a6e4b74 VK |
1172 | disable_irq_wake(stmpe->irq); |
1173 | ||
1174 | return 0; | |
27e34995 | 1175 | } |
27e34995 | 1176 | |
1a6e4b74 VK |
1177 | const struct dev_pm_ops stmpe_dev_pm_ops = { |
1178 | .suspend = stmpe_suspend, | |
1179 | .resume = stmpe_resume, | |
1180 | }; | |
1181 | #endif |