[mirror_ubuntu-hirsute-kernel.git] / drivers / mfd / stpmic1.c

// SPDX-License-Identifier: GPL-2.0
// Copyright (C) STMicroelectronics 2018
// Author: Pascal Paillet <p.paillet@st.com>

#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/mfd/core.h>
#include <linux/mfd/stpmic1.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <linux/pm_wakeirq.h>
#include <linux/regmap.h>

#include <dt-bindings/mfd/st,stpmic1.h>

#define STPMIC1_MAIN_IRQ 0

static const struct regmap_range stpmic1_readable_ranges[] = {
	regmap_reg_range(TURN_ON_SR, VERSION_SR),
	regmap_reg_range(SWOFF_PWRCTRL_CR, LDO6_STDBY_CR),
	regmap_reg_range(BST_SW_CR, BST_SW_CR),
	regmap_reg_range(INT_PENDING_R1, INT_PENDING_R4),
	regmap_reg_range(INT_CLEAR_R1, INT_CLEAR_R4),
	regmap_reg_range(INT_MASK_R1, INT_MASK_R4),
	regmap_reg_range(INT_SET_MASK_R1, INT_SET_MASK_R4),
	regmap_reg_range(INT_CLEAR_MASK_R1, INT_CLEAR_MASK_R4),
	regmap_reg_range(INT_SRC_R1, INT_SRC_R1),
};

static const struct regmap_range stpmic1_writeable_ranges[] = {
	regmap_reg_range(SWOFF_PWRCTRL_CR, LDO6_STDBY_CR),
	regmap_reg_range(BST_SW_CR, BST_SW_CR),
	regmap_reg_range(INT_CLEAR_R1, INT_CLEAR_R4),
	regmap_reg_range(INT_SET_MASK_R1, INT_SET_MASK_R4),
	regmap_reg_range(INT_CLEAR_MASK_R1, INT_CLEAR_MASK_R4),
};

static const struct regmap_range stpmic1_volatile_ranges[] = {
	regmap_reg_range(TURN_ON_SR, VERSION_SR),
	regmap_reg_range(WCHDG_CR, WCHDG_CR),
	regmap_reg_range(INT_PENDING_R1, INT_PENDING_R4),
	regmap_reg_range(INT_SRC_R1, INT_SRC_R4),
};

static const struct regmap_access_table stpmic1_readable_table = {
	.yes_ranges = stpmic1_readable_ranges,
	.n_yes_ranges = ARRAY_SIZE(stpmic1_readable_ranges),
};

static const struct regmap_access_table stpmic1_writeable_table = {
	.yes_ranges = stpmic1_writeable_ranges,
	.n_yes_ranges = ARRAY_SIZE(stpmic1_writeable_ranges),
};

static const struct regmap_access_table stpmic1_volatile_table = {
	.yes_ranges = stpmic1_volatile_ranges,
	.n_yes_ranges = ARRAY_SIZE(stpmic1_volatile_ranges),
};

static const struct regmap_config stpmic1_regmap_config = {
	.reg_bits = 8,
	.val_bits = 8,
	.cache_type = REGCACHE_RBTREE,
	.max_register = PMIC_MAX_REGISTER_ADDRESS,
	.rd_table = &stpmic1_readable_table,
	.wr_table = &stpmic1_writeable_table,
	.volatile_table = &stpmic1_volatile_table,
};

static const struct regmap_irq stpmic1_irqs[] = {
	REGMAP_IRQ_REG(IT_PONKEY_F, 0, 0x01),
	REGMAP_IRQ_REG(IT_PONKEY_R, 0, 0x02),
	REGMAP_IRQ_REG(IT_WAKEUP_F, 0, 0x04),
	REGMAP_IRQ_REG(IT_WAKEUP_R, 0, 0x08),
	REGMAP_IRQ_REG(IT_VBUS_OTG_F, 0, 0x10),
	REGMAP_IRQ_REG(IT_VBUS_OTG_R, 0, 0x20),
	REGMAP_IRQ_REG(IT_SWOUT_F, 0, 0x40),
	REGMAP_IRQ_REG(IT_SWOUT_R, 0, 0x80),

	REGMAP_IRQ_REG(IT_CURLIM_BUCK1, 1, 0x01),
	REGMAP_IRQ_REG(IT_CURLIM_BUCK2, 1, 0x02),
	REGMAP_IRQ_REG(IT_CURLIM_BUCK3, 1, 0x04),
	REGMAP_IRQ_REG(IT_CURLIM_BUCK4, 1, 0x08),
	REGMAP_IRQ_REG(IT_OCP_OTG, 1, 0x10),
	REGMAP_IRQ_REG(IT_OCP_SWOUT, 1, 0x20),
	REGMAP_IRQ_REG(IT_OCP_BOOST, 1, 0x40),
	REGMAP_IRQ_REG(IT_OVP_BOOST, 1, 0x80),

	REGMAP_IRQ_REG(IT_CURLIM_LDO1, 2, 0x01),
	REGMAP_IRQ_REG(IT_CURLIM_LDO2, 2, 0x02),
	REGMAP_IRQ_REG(IT_CURLIM_LDO3, 2, 0x04),
	REGMAP_IRQ_REG(IT_CURLIM_LDO4, 2, 0x08),
	REGMAP_IRQ_REG(IT_CURLIM_LDO5, 2, 0x10),
	REGMAP_IRQ_REG(IT_CURLIM_LDO6, 2, 0x20),
	REGMAP_IRQ_REG(IT_SHORT_SWOTG, 2, 0x40),
	REGMAP_IRQ_REG(IT_SHORT_SWOUT, 2, 0x80),

	REGMAP_IRQ_REG(IT_TWARN_F, 3, 0x01),
	REGMAP_IRQ_REG(IT_TWARN_R, 3, 0x02),
	REGMAP_IRQ_REG(IT_VINLOW_F, 3, 0x04),
	REGMAP_IRQ_REG(IT_VINLOW_R, 3, 0x08),
	REGMAP_IRQ_REG(IT_SWIN_F, 3, 0x40),
	REGMAP_IRQ_REG(IT_SWIN_R, 3, 0x80),
};

static const struct regmap_irq_chip stpmic1_regmap_irq_chip = {
	.name = "pmic_irq",
	.status_base = INT_PENDING_R1,
	.mask_base = INT_CLEAR_MASK_R1,
	.unmask_base = INT_SET_MASK_R1,
	.ack_base = INT_CLEAR_R1,
	.num_regs = STPMIC1_PMIC_NUM_IRQ_REGS,
	.irqs = stpmic1_irqs,
	.num_irqs = ARRAY_SIZE(stpmic1_irqs),
};

static int stpmic1_probe(struct i2c_client *i2c,
			 const struct i2c_device_id *id)
{
	struct stpmic1 *ddata;
	struct device *dev = &i2c->dev;
	int ret;
	struct device_node *np = dev->of_node;
	u32 reg;

	ddata = devm_kzalloc(dev, sizeof(struct stpmic1), GFP_KERNEL);
	if (!ddata)
		return -ENOMEM;

	i2c_set_clientdata(i2c, ddata);
	ddata->dev = dev;

	ddata->regmap = devm_regmap_init_i2c(i2c, &stpmic1_regmap_config);
	if (IS_ERR(ddata->regmap))
		return PTR_ERR(ddata->regmap);

	ddata->irq = of_irq_get(np, STPMIC1_MAIN_IRQ);
	if (ddata->irq < 0) {
		dev_err(dev, "Failed to get main IRQ: %d\n", ddata->irq);
		return ddata->irq;
	}

	ret = regmap_read(ddata->regmap, VERSION_SR, &reg);
	if (ret) {
		dev_err(dev, "Unable to read PMIC version\n");
		return ret;
	}
	dev_info(dev, "PMIC Chip Version: 0x%x\n", reg);

	/* Initialize PMIC IRQ Chip & associated IRQ domains */
	ret = devm_regmap_add_irq_chip(dev, ddata->regmap, ddata->irq,
				       IRQF_ONESHOT | IRQF_SHARED,
				       0, &stpmic1_regmap_irq_chip,
				       &ddata->irq_data);
	if (ret) {
		dev_err(dev, "IRQ Chip registration failed: %d\n", ret);
		return ret;
	}

	return devm_of_platform_populate(dev);
}

#ifdef CONFIG_PM_SLEEP
static int stpmic1_suspend(struct device *dev)
{
	struct i2c_client *i2c = to_i2c_client(dev);
	struct stpmic1 *pmic_dev = i2c_get_clientdata(i2c);

	disable_irq(pmic_dev->irq);

	return 0;
}

static int stpmic1_resume(struct device *dev)
{
	struct i2c_client *i2c = to_i2c_client(dev);
	struct stpmic1 *pmic_dev = i2c_get_clientdata(i2c);
	int ret;

	ret = regcache_sync(pmic_dev->regmap);
	if (ret)
		return ret;

	enable_irq(pmic_dev->irq);

	return 0;
}
#endif

static SIMPLE_DEV_PM_OPS(stpmic1_pm, stpmic1_suspend, stpmic1_resume);

static const struct of_device_id stpmic1_of_match[] = {
	{ .compatible = "st,stpmic1", },
	{},
};
MODULE_DEVICE_TABLE(of, stpmic1_of_match);

static struct i2c_driver stpmic1_driver = {
	.driver = {
		.name = "stpmic1",
		.of_match_table = of_match_ptr(stpmic1_of_match),
		.pm = &stpmic1_pm,
	},
	.probe = stpmic1_probe,
};

module_i2c_driver(stpmic1_driver);

MODULE_DESCRIPTION("STPMIC1 PMIC Driver");
MODULE_AUTHOR("Pascal Paillet <p.paillet@st.com>");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
51908d2e PPL	1	// SPDX-License-Identifier: GPL-2.0
	2	// Copyright (C) STMicroelectronics 2018
	3	// Author: Pascal Paillet <p.paillet@st.com>
	4
	5	#include <linux/i2c.h>
	6	#include <linux/interrupt.h>
	7	#include <linux/mfd/core.h>
	8	#include <linux/mfd/stpmic1.h>
	9	#include <linux/module.h>
	10	#include <linux/of.h>
	11	#include <linux/of_irq.h>
	12	#include <linux/of_platform.h>
	13	#include <linux/pm_wakeirq.h>
	14	#include <linux/regmap.h>
	15
	16	#include <dt-bindings/mfd/st,stpmic1.h>
	17
	18	#define STPMIC1_MAIN_IRQ 0
	19
	20	static const struct regmap_range stpmic1_readable_ranges[] = {
	21	regmap_reg_range(TURN_ON_SR, VERSION_SR),
	22	regmap_reg_range(SWOFF_PWRCTRL_CR, LDO6_STDBY_CR),
	23	regmap_reg_range(BST_SW_CR, BST_SW_CR),
	24	regmap_reg_range(INT_PENDING_R1, INT_PENDING_R4),
	25	regmap_reg_range(INT_CLEAR_R1, INT_CLEAR_R4),
	26	regmap_reg_range(INT_MASK_R1, INT_MASK_R4),
	27	regmap_reg_range(INT_SET_MASK_R1, INT_SET_MASK_R4),
	28	regmap_reg_range(INT_CLEAR_MASK_R1, INT_CLEAR_MASK_R4),
	29	regmap_reg_range(INT_SRC_R1, INT_SRC_R1),
	30	};
	31
	32	static const struct regmap_range stpmic1_writeable_ranges[] = {
	33	regmap_reg_range(SWOFF_PWRCTRL_CR, LDO6_STDBY_CR),
	34	regmap_reg_range(BST_SW_CR, BST_SW_CR),
	35	regmap_reg_range(INT_CLEAR_R1, INT_CLEAR_R4),
	36	regmap_reg_range(INT_SET_MASK_R1, INT_SET_MASK_R4),
	37	regmap_reg_range(INT_CLEAR_MASK_R1, INT_CLEAR_MASK_R4),
	38	};
	39
	40	static const struct regmap_range stpmic1_volatile_ranges[] = {
	41	regmap_reg_range(TURN_ON_SR, VERSION_SR),
	42	regmap_reg_range(WCHDG_CR, WCHDG_CR),
	43	regmap_reg_range(INT_PENDING_R1, INT_PENDING_R4),
	44	regmap_reg_range(INT_SRC_R1, INT_SRC_R4),
	45	};
	46
	47	static const struct regmap_access_table stpmic1_readable_table = {
	48	.yes_ranges = stpmic1_readable_ranges,
	49	.n_yes_ranges = ARRAY_SIZE(stpmic1_readable_ranges),
	50	};
	51
	52	static const struct regmap_access_table stpmic1_writeable_table = {
	53	.yes_ranges = stpmic1_writeable_ranges,
	54	.n_yes_ranges = ARRAY_SIZE(stpmic1_writeable_ranges),
	55	};
	56
	57	static const struct regmap_access_table stpmic1_volatile_table = {
	58	.yes_ranges = stpmic1_volatile_ranges,
	59	.n_yes_ranges = ARRAY_SIZE(stpmic1_volatile_ranges),
	60	};
	61
0c09e712	62	static const struct regmap_config stpmic1_regmap_config = {
51908d2e PPL	63	.reg_bits = 8,
	64	.val_bits = 8,
	65	.cache_type = REGCACHE_RBTREE,
	66	.max_register = PMIC_MAX_REGISTER_ADDRESS,
	67	.rd_table = &stpmic1_readable_table,
	68	.wr_table = &stpmic1_writeable_table,
	69	.volatile_table = &stpmic1_volatile_table,
	70	};
	71
	72	static const struct regmap_irq stpmic1_irqs[] = {
	73	REGMAP_IRQ_REG(IT_PONKEY_F, 0, 0x01),
	74	REGMAP_IRQ_REG(IT_PONKEY_R, 0, 0x02),
	75	REGMAP_IRQ_REG(IT_WAKEUP_F, 0, 0x04),
	76	REGMAP_IRQ_REG(IT_WAKEUP_R, 0, 0x08),
	77	REGMAP_IRQ_REG(IT_VBUS_OTG_F, 0, 0x10),
	78	REGMAP_IRQ_REG(IT_VBUS_OTG_R, 0, 0x20),
	79	REGMAP_IRQ_REG(IT_SWOUT_F, 0, 0x40),
	80	REGMAP_IRQ_REG(IT_SWOUT_R, 0, 0x80),
	81
	82	REGMAP_IRQ_REG(IT_CURLIM_BUCK1, 1, 0x01),
	83	REGMAP_IRQ_REG(IT_CURLIM_BUCK2, 1, 0x02),
	84	REGMAP_IRQ_REG(IT_CURLIM_BUCK3, 1, 0x04),
	85	REGMAP_IRQ_REG(IT_CURLIM_BUCK4, 1, 0x08),
	86	REGMAP_IRQ_REG(IT_OCP_OTG, 1, 0x10),
	87	REGMAP_IRQ_REG(IT_OCP_SWOUT, 1, 0x20),
	88	REGMAP_IRQ_REG(IT_OCP_BOOST, 1, 0x40),
	89	REGMAP_IRQ_REG(IT_OVP_BOOST, 1, 0x80),
	90
	91	REGMAP_IRQ_REG(IT_CURLIM_LDO1, 2, 0x01),
	92	REGMAP_IRQ_REG(IT_CURLIM_LDO2, 2, 0x02),
	93	REGMAP_IRQ_REG(IT_CURLIM_LDO3, 2, 0x04),
	94	REGMAP_IRQ_REG(IT_CURLIM_LDO4, 2, 0x08),
	95	REGMAP_IRQ_REG(IT_CURLIM_LDO5, 2, 0x10),
	96	REGMAP_IRQ_REG(IT_CURLIM_LDO6, 2, 0x20),
	97	REGMAP_IRQ_REG(IT_SHORT_SWOTG, 2, 0x40),
	98	REGMAP_IRQ_REG(IT_SHORT_SWOUT, 2, 0x80),
	99
	100	REGMAP_IRQ_REG(IT_TWARN_F, 3, 0x01),
	101	REGMAP_IRQ_REG(IT_TWARN_R, 3, 0x02),
	102	REGMAP_IRQ_REG(IT_VINLOW_F, 3, 0x04),
	103	REGMAP_IRQ_REG(IT_VINLOW_R, 3, 0x08),
	104	REGMAP_IRQ_REG(IT_SWIN_F, 3, 0x40),
	105	REGMAP_IRQ_REG(IT_SWIN_R, 3, 0x80),
	106	};
	107
	108	static const struct regmap_irq_chip stpmic1_regmap_irq_chip = {
	109	.name = "pmic_irq",
	110	.status_base = INT_PENDING_R1,
	111	.mask_base = INT_CLEAR_MASK_R1,
	112	.unmask_base = INT_SET_MASK_R1,
	113	.ack_base = INT_CLEAR_R1,
	114	.num_regs = STPMIC1_PMIC_NUM_IRQ_REGS,
	115	.irqs = stpmic1_irqs,
	116	.num_irqs = ARRAY_SIZE(stpmic1_irqs),
	117	};
	118
	119	static int stpmic1_probe(struct i2c_client *i2c,
	120	const struct i2c_device_id *id)
	121	{
	122	struct stpmic1 *ddata;
	123	struct device *dev = &i2c->dev;
	124	int ret;
	125	struct device_node *np = dev->of_node;
	126	u32 reg;
127
128	ddata = devm_kzalloc(dev, sizeof(struct stpmic1), GFP_KERNEL);
129	if (!ddata)
130	return -ENOMEM;
131
132	i2c_set_clientdata(i2c, ddata);
133	ddata->dev = dev;
134
135	ddata->regmap = devm_regmap_init_i2c(i2c, &stpmic1_regmap_config);
136	if (IS_ERR(ddata->regmap))
137	return PTR_ERR(ddata->regmap);
138
139	ddata->irq = of_irq_get(np, STPMIC1_MAIN_IRQ);
140	if (ddata->irq < 0) {
141	dev_err(dev, "Failed to get main IRQ: %d\n", ddata->irq);
142	return ddata->irq;
143	}
144
145	ret = regmap_read(ddata->regmap, VERSION_SR, &reg);
146	if (ret) {
147	dev_err(dev, "Unable to read PMIC version\n");
148	return ret;
149	}
150	dev_info(dev, "PMIC Chip Version: 0x%x\n", reg);
151
152	/* Initialize PMIC IRQ Chip & associated IRQ domains */
153	ret = devm_regmap_add_irq_chip(dev, ddata->regmap, ddata->irq,
154	IRQF_ONESHOT \| IRQF_SHARED,
155	0, &stpmic1_regmap_irq_chip,
156	&ddata->irq_data);
157	if (ret) {
158	dev_err(dev, "IRQ Chip registration failed: %d\n", ret);
159	return ret;
160	}
161
162	return devm_of_platform_populate(dev);
163	}
164
165	#ifdef CONFIG_PM_SLEEP
166	static int stpmic1_suspend(struct device *dev)
167	{
168	struct i2c_client *i2c = to_i2c_client(dev);
169	struct stpmic1 *pmic_dev = i2c_get_clientdata(i2c);
170
171	disable_irq(pmic_dev->irq);
172
173	return 0;
174	}
175
176	static int stpmic1_resume(struct device *dev)
177	{
178	struct i2c_client *i2c = to_i2c_client(dev);
179	struct stpmic1 *pmic_dev = i2c_get_clientdata(i2c);
180	int ret;
181
182	ret = regcache_sync(pmic_dev->regmap);
183	if (ret)
184	return ret;
185
186	enable_irq(pmic_dev->irq);
187
188	return 0;
189	}
190	#endif
191
192	static SIMPLE_DEV_PM_OPS(stpmic1_pm, stpmic1_suspend, stpmic1_resume);
193
194	static const struct of_device_id stpmic1_of_match[] = {
195	{ .compatible = "st,stpmic1", },
196	{},
197	};
198	MODULE_DEVICE_TABLE(of, stpmic1_of_match);
199
200	static struct i2c_driver stpmic1_driver = {
201	.driver = {
202	.name = "stpmic1",
203	.of_match_table = of_match_ptr(stpmic1_of_match),
204	.pm = &stpmic1_pm,
205	},
206	.probe = stpmic1_probe,
207	};
208
209	module_i2c_driver(stpmic1_driver);
210
211	MODULE_DESCRIPTION("STPMIC1 PMIC Driver");
212	MODULE_AUTHOR("Pascal Paillet <p.paillet@st.com>");
213	MODULE_LICENSE("GPL v2");