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[mirror_ubuntu-zesty-kernel.git] / drivers / mfd / twl6040.c
CommitLineData
f19b2823
MLC		 1/*
2 * MFD driver for TWL6040 audio device
3 *
4 * Authors: Misael Lopez Cruz <misael.lopez@ti.com>
5 * Jorge Eduardo Candelaria <jorge.candelaria@ti.com>
6 * Peter Ujfalusi <peter.ujfalusi@ti.com>
7 *
8 * Copyright: (C) 2011 Texas Instruments, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
22 * 02110-1301 USA
23 *
24 */
25
26#include <linux/module.h>
27#include <linux/types.h>
28#include <linux/slab.h>
29#include <linux/kernel.h>
5af7df6b 30#include <linux/err.h>
f19b2823 31#include <linux/platform_device.h>
37e13cec
PU		 32#include <linux/of.h>
33#include <linux/of_irq.h>
34#include <linux/of_gpio.h>
35#include <linux/of_platform.h>
f19b2823
MLC		 36#include <linux/gpio.h>
37#include <linux/delay.h>
8eaeb939
PU		 38#include <linux/i2c.h>
39#include <linux/regmap.h>
f19b2823
MLC		 40#include <linux/mfd/core.h>
41#include <linux/mfd/twl6040.h>
5af7df6b 42#include <linux/regulator/consumer.h>
f19b2823 43
31b402e3 44#define VIBRACTRL_MEMBER(reg) ((reg == TWL6040_REG_VIBCTLL) ? 0 : 1)
5af7df6b 45#define TWL6040_NUM_SUPPLIES (2)
31b402e3 46
de1e23f8 47static const struct reg_default twl6040_defaults[] = {
c7f9129d
PU		 48 { 0x01, 0x4B }, /* REG_ASICID (ro) */
49 { 0x02, 0x00 }, /* REG_ASICREV (ro) */
50 { 0x03, 0x00 }, /* REG_INTID */
51 { 0x04, 0x00 }, /* REG_INTMR */
52 { 0x05, 0x00 }, /* REG_NCPCTRL */
53 { 0x06, 0x00 }, /* REG_LDOCTL */
54 { 0x07, 0x60 }, /* REG_HPPLLCTL */
55 { 0x08, 0x00 }, /* REG_LPPLLCTL */
56 { 0x09, 0x4A }, /* REG_LPPLLDIV */
57 { 0x0A, 0x00 }, /* REG_AMICBCTL */
58 { 0x0B, 0x00 }, /* REG_DMICBCTL */
59 { 0x0C, 0x00 }, /* REG_MICLCTL */
60 { 0x0D, 0x00 }, /* REG_MICRCTL */
61 { 0x0E, 0x00 }, /* REG_MICGAIN */
62 { 0x0F, 0x1B }, /* REG_LINEGAIN */
63 { 0x10, 0x00 }, /* REG_HSLCTL */
64 { 0x11, 0x00 }, /* REG_HSRCTL */
65 { 0x12, 0x00 }, /* REG_HSGAIN */
66 { 0x13, 0x00 }, /* REG_EARCTL */
67 { 0x14, 0x00 }, /* REG_HFLCTL */
68 { 0x15, 0x00 }, /* REG_HFLGAIN */
69 { 0x16, 0x00 }, /* REG_HFRCTL */
70 { 0x17, 0x00 }, /* REG_HFRGAIN */
71 { 0x18, 0x00 }, /* REG_VIBCTLL */
72 { 0x19, 0x00 }, /* REG_VIBDATL */
73 { 0x1A, 0x00 }, /* REG_VIBCTLR */
74 { 0x1B, 0x00 }, /* REG_VIBDATR */
75 { 0x1C, 0x00 }, /* REG_HKCTL1 */
76 { 0x1D, 0x00 }, /* REG_HKCTL2 */
77 { 0x1E, 0x00 }, /* REG_GPOCTL */
78 { 0x1F, 0x00 }, /* REG_ALB */
79 { 0x20, 0x00 }, /* REG_DLB */
80 /* 0x28, REG_TRIM1 */
81 /* 0x29, REG_TRIM2 */
82 /* 0x2A, REG_TRIM3 */
83 /* 0x2B, REG_HSOTRIM */
84 /* 0x2C, REG_HFOTRIM */
85 { 0x2D, 0x08 }, /* REG_ACCCTL */
86 { 0x2E, 0x00 }, /* REG_STATUS (ro) */
87};
88
8019ff6c 89static struct reg_sequence twl6040_patch[] = {
11e38e11
PU		 90 /*
91 * Select I2C bus access to dual access registers
92 * Interrupt register is cleared on read
93 * Select fast mode for i2c (400KHz)
94 */
95 { TWL6040_REG_ACCCTL,
96 TWL6040_I2CSEL | TWL6040_INTCLRMODE | TWL6040_I2CMODE(1) },
c7f9129d
PU		 97};
98
99
df04b624 100static bool twl6040_has_vibra(struct device_node *node)
ca2cad6a 101{
ca2cad6a
SO		 102#ifdef CONFIG_OF
103 if (of_find_node_by_name(node, "vibra"))
104 return true;
105#endif
ca2cad6a
SO		 106 return false;
107}
108
f19b2823
MLC		 109int twl6040_reg_read(struct twl6040 *twl6040, unsigned int reg)
110{
111 int ret;
8eaeb939 112 unsigned int val;
f19b2823 113
c6f39257
MB		 114 ret = regmap_read(twl6040->regmap, reg, &val);
115 if (ret < 0)
116 return ret;
f19b2823
MLC		 117
118 return val;
119}
120EXPORT_SYMBOL(twl6040_reg_read);
121
122int twl6040_reg_write(struct twl6040 *twl6040, unsigned int reg, u8 val)
123{
124 int ret;
125
8eaeb939 126 ret = regmap_write(twl6040->regmap, reg, val);
f19b2823
MLC		 127
128 return ret;
129}
130EXPORT_SYMBOL(twl6040_reg_write);
131
132int twl6040_set_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask)
133{
c600040f 134 return regmap_update_bits(twl6040->regmap, reg, mask, mask);
f19b2823
MLC		 135}
136EXPORT_SYMBOL(twl6040_set_bits);
137
138int twl6040_clear_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask)
139{
c600040f 140 return regmap_update_bits(twl6040->regmap, reg, mask, 0);
f19b2823
MLC		 141}
142EXPORT_SYMBOL(twl6040_clear_bits);
143
144/* twl6040 codec manual power-up sequence */
f9be1343 145static int twl6040_power_up_manual(struct twl6040 *twl6040)
f19b2823
MLC		 146{
147 u8 ldoctl, ncpctl, lppllctl;
148 int ret;
149
150 /* enable high-side LDO, reference system and internal oscillator */
151 ldoctl = TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA;
152 ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
153 if (ret)
154 return ret;
155 usleep_range(10000, 10500);
156
157 /* enable negative charge pump */
158 ncpctl = TWL6040_NCPENA;
159 ret = twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
160 if (ret)
161 goto ncp_err;
162 usleep_range(1000, 1500);
163
164 /* enable low-side LDO */
165 ldoctl |= TWL6040_LSLDOENA;
166 ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
167 if (ret)
168 goto lsldo_err;
169 usleep_range(1000, 1500);
170
171 /* enable low-power PLL */
172 lppllctl = TWL6040_LPLLENA;
173 ret = twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
174 if (ret)
175 goto lppll_err;
176 usleep_range(5000, 5500);
177
178 /* disable internal oscillator */
179 ldoctl &= ~TWL6040_OSCENA;
180 ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
181 if (ret)
182 goto osc_err;
183
184 return 0;
185
186osc_err:
187 lppllctl &= ~TWL6040_LPLLENA;
188 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
189lppll_err:
190 ldoctl &= ~TWL6040_LSLDOENA;
191 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
192lsldo_err:
193 ncpctl &= ~TWL6040_NCPENA;
194 twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
195ncp_err:
196 ldoctl &= ~(TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA);
197 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
198
f9be1343 199 dev_err(twl6040->dev, "manual power-up failed\n");
f19b2823
MLC		 200 return ret;
201}
202
203/* twl6040 manual power-down sequence */
f9be1343 204static void twl6040_power_down_manual(struct twl6040 *twl6040)
f19b2823
MLC		 205{
206 u8 ncpctl, ldoctl, lppllctl;
207
208 ncpctl = twl6040_reg_read(twl6040, TWL6040_REG_NCPCTL);
209 ldoctl = twl6040_reg_read(twl6040, TWL6040_REG_LDOCTL);
210 lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL);
211
212 /* enable internal oscillator */
213 ldoctl |= TWL6040_OSCENA;
214 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
215 usleep_range(1000, 1500);
216
217 /* disable low-power PLL */
218 lppllctl &= ~TWL6040_LPLLENA;
219 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
220
221 /* disable low-side LDO */
222 ldoctl &= ~TWL6040_LSLDOENA;
223 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
224
225 /* disable negative charge pump */
226 ncpctl &= ~TWL6040_NCPENA;
227 twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
228
229 /* disable high-side LDO, reference system and internal oscillator */
230 ldoctl &= ~(TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA);
231 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
232}
233
1ac96265 234static irqreturn_t twl6040_readyint_handler(int irq, void *data)
f19b2823
MLC		 235{
236 struct twl6040 *twl6040 = data;
f19b2823 237
1ac96265 238 complete(&twl6040->ready);
f19b2823 239
1ac96265
PU		 240 return IRQ_HANDLED;
241}
f19b2823 242
1ac96265
PU		 243static irqreturn_t twl6040_thint_handler(int irq, void *data)
244{
245 struct twl6040 *twl6040 = data;
246 u8 status;
247
248 status = twl6040_reg_read(twl6040, TWL6040_REG_STATUS);
249 if (status & TWL6040_TSHUTDET) {
250 dev_warn(twl6040->dev, "Thermal shutdown, powering-off");
251 twl6040_power(twl6040, 0);
252 } else {
253 dev_warn(twl6040->dev, "Leaving thermal shutdown, powering-on");
254 twl6040_power(twl6040, 1);
f19b2823
MLC		 255 }
256
257 return IRQ_HANDLED;
258}
259
f9be1343 260static int twl6040_power_up_automatic(struct twl6040 *twl6040)
f19b2823
MLC		 261{
262 int time_left;
f9be1343
PU		 263
264 gpio_set_value(twl6040->audpwron, 1);
f19b2823
MLC		 265
266 time_left = wait_for_completion_timeout(&twl6040->ready,
267 msecs_to_jiffies(144));
268 if (!time_left) {
f9be1343
PU		 269 u8 intid;
270
271 dev_warn(twl6040->dev, "timeout waiting for READYINT\n");
f19b2823
MLC		 272 intid = twl6040_reg_read(twl6040, TWL6040_REG_INTID);
273 if (!(intid & TWL6040_READYINT)) {
f9be1343
PU		 274 dev_err(twl6040->dev, "automatic power-up failed\n");
275 gpio_set_value(twl6040->audpwron, 0);
f19b2823
MLC		 276 return -ETIMEDOUT;
277 }
278 }
279
280 return 0;
281}
282
283int twl6040_power(struct twl6040 *twl6040, int on)
284{
f19b2823
MLC		 285 int ret = 0;
286
287 mutex_lock(&twl6040->mutex);
288
289 if (on) {
290 /* already powered-up */
291 if (twl6040->power_count++)
292 goto out;
293
32852bca
JMC		 294 ret = clk_prepare_enable(twl6040->clk32k);
295 if (ret) {
296 twl6040->power_count = 0;
297 goto out;
298 }
68bab866 299
c7f9129d
PU		 300 /* Allow writes to the chip */
301 regcache_cache_only(twl6040->regmap, false);
302
f9be1343
PU		 303 if (gpio_is_valid(twl6040->audpwron)) {
304 /* use automatic power-up sequence */
305 ret = twl6040_power_up_automatic(twl6040);
f19b2823 306 if (ret) {
d6441dc5 307 clk_disable_unprepare(twl6040->clk32k);
f19b2823
MLC		 308 twl6040->power_count = 0;
309 goto out;
310 }
311 } else {
312 /* use manual power-up sequence */
f9be1343 313 ret = twl6040_power_up_manual(twl6040);
f19b2823 314 if (ret) {
d6441dc5 315 clk_disable_unprepare(twl6040->clk32k);
f19b2823
MLC		 316 twl6040->power_count = 0;
317 goto out;
318 }
319 }
c7f9129d
PU		 320
321 /* Sync with the HW */
322 regcache_sync(twl6040->regmap);
323
cfb7a33b
PU		 324 /* Default PLL configuration after power up */
325 twl6040->pll = TWL6040_SYSCLK_SEL_LPPLL;
0a58da1e 326 twl6040->sysclk_rate = 19200000;
f19b2823
MLC		 327 } else {
328 /* already powered-down */
329 if (!twl6040->power_count) {
2d7c957e 330 dev_err(twl6040->dev,
f19b2823
MLC		 331 "device is already powered-off\n");
332 ret = -EPERM;
333 goto out;
334 }
335
336 if (--twl6040->power_count)
337 goto out;
338
f9be1343 339 if (gpio_is_valid(twl6040->audpwron)) {
f19b2823 340 /* use AUDPWRON line */
f9be1343 341 gpio_set_value(twl6040->audpwron, 0);
f19b2823
MLC		 342
343 /* power-down sequence latency */
344 usleep_range(500, 700);
345 } else {
346 /* use manual power-down sequence */
f9be1343 347 twl6040_power_down_manual(twl6040);
f19b2823 348 }
c7f9129d
PU		 349
350 /* Set regmap to cache only and mark it as dirty */
351 regcache_cache_only(twl6040->regmap, true);
352 regcache_mark_dirty(twl6040->regmap);
353
0a58da1e
PU		 354 twl6040->sysclk_rate = 0;
355
356 if (twl6040->pll == TWL6040_SYSCLK_SEL_HPPLL) {
357 clk_disable_unprepare(twl6040->mclk);
358 twl6040->mclk_rate = 0;
359 }
68bab866
PU		 360
361 clk_disable_unprepare(twl6040->clk32k);
f19b2823
MLC		 362 }
363
364out:
365 mutex_unlock(&twl6040->mutex);
366 return ret;
367}
368EXPORT_SYMBOL(twl6040_power);
369
cfb7a33b 370int twl6040_set_pll(struct twl6040 *twl6040, int pll_id,
f19b2823
MLC		 371 unsigned int freq_in, unsigned int freq_out)
372{
373 u8 hppllctl, lppllctl;
374 int ret = 0;
375
376 mutex_lock(&twl6040->mutex);
377
378 hppllctl = twl6040_reg_read(twl6040, TWL6040_REG_HPPLLCTL);
379 lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL);
380
2bd05db7
PU		 381 /* Force full reconfiguration when switching between PLL */
382 if (pll_id != twl6040->pll) {
0a58da1e
PU		 383 twl6040->sysclk_rate = 0;
384 twl6040->mclk_rate = 0;
2bd05db7
PU		 385 }
386
cfb7a33b
PU		 387 switch (pll_id) {
388 case TWL6040_SYSCLK_SEL_LPPLL:
f19b2823 389 /* low-power PLL divider */
2bd05db7 390 /* Change the sysclk configuration only if it has been canged */
0a58da1e 391 if (twl6040->sysclk_rate != freq_out) {
2bd05db7
PU		 392 switch (freq_out) {
393 case 17640000:
394 lppllctl |= TWL6040_LPLLFIN;
395 break;
396 case 19200000:
397 lppllctl &= ~TWL6040_LPLLFIN;
398 break;
399 default:
400 dev_err(twl6040->dev,
401 "freq_out %d not supported\n",
402 freq_out);
403 ret = -EINVAL;
404 goto pll_out;
405 }
406 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
407 lppllctl);
f19b2823 408 }
2bd05db7
PU		 409
410 /* The PLL in use has not been change, we can exit */
411 if (twl6040->pll == pll_id)
412 break;
f19b2823
MLC		 413
414 switch (freq_in) {
415 case 32768:
416 lppllctl |= TWL6040_LPLLENA;
417 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
418 lppllctl);
419 mdelay(5);
420 lppllctl &= ~TWL6040_HPLLSEL;
421 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
422 lppllctl);
423 hppllctl &= ~TWL6040_HPLLENA;
424 twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL,
425 hppllctl);
426 break;
427 default:
2d7c957e 428 dev_err(twl6040->dev,
f19b2823
MLC		 429 "freq_in %d not supported\n", freq_in);
430 ret = -EINVAL;
431 goto pll_out;
432 }
0a58da1e
PU		 433
434 clk_disable_unprepare(twl6040->mclk);
f19b2823 435 break;
cfb7a33b 436 case TWL6040_SYSCLK_SEL_HPPLL:
f19b2823
MLC		 437 /* high-performance PLL can provide only 19.2 MHz */
438 if (freq_out != 19200000) {
2d7c957e 439 dev_err(twl6040->dev,
f19b2823
MLC		 440 "freq_out %d not supported\n", freq_out);
441 ret = -EINVAL;
442 goto pll_out;
443 }
444
0a58da1e 445 if (twl6040->mclk_rate != freq_in) {
2bd05db7
PU		 446 hppllctl &= ~TWL6040_MCLK_MSK;
447
448 switch (freq_in) {
449 case 12000000:
450 /* PLL enabled, active mode */
451 hppllctl |= TWL6040_MCLK_12000KHZ |
452 TWL6040_HPLLENA;
453 break;
454 case 19200000:
ac8320c4
PU		 455 /* PLL enabled, bypass mode */
456 hppllctl |= TWL6040_MCLK_19200KHZ |
457 TWL6040_HPLLBP | TWL6040_HPLLENA;
2bd05db7
PU		 458 break;
459 case 26000000:
460 /* PLL enabled, active mode */
461 hppllctl |= TWL6040_MCLK_26000KHZ |
462 TWL6040_HPLLENA;
463 break;
464 case 38400000:
ac8320c4 465 /* PLL enabled, bypass mode */
2bd05db7 466 hppllctl |= TWL6040_MCLK_38400KHZ |
ac8320c4 467 TWL6040_HPLLBP | TWL6040_HPLLENA;
2bd05db7
PU		 468 break;
469 default:
470 dev_err(twl6040->dev,
471 "freq_in %d not supported\n", freq_in);
472 ret = -EINVAL;
473 goto pll_out;
474 }
f19b2823 475
0a58da1e
PU		 476 /* When switching to HPPLL, enable the mclk first */
477 if (pll_id != twl6040->pll)
478 clk_prepare_enable(twl6040->mclk);
f19b2823 479 /*
2bd05db7
PU		 480 * enable clock slicer to ensure input waveform is
481 * square
f19b2823 482 */
2bd05db7 483 hppllctl |= TWL6040_HPLLSQRENA;
f19b2823 484
2bd05db7
PU		 485 twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL,
486 hppllctl);
487 usleep_range(500, 700);
488 lppllctl |= TWL6040_HPLLSEL;
489 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
490 lppllctl);
491 lppllctl &= ~TWL6040_LPLLENA;
492 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
493 lppllctl);
0a58da1e
PU		 494
495 twl6040->mclk_rate = freq_in;
2bd05db7 496 }
f19b2823
MLC		 497 break;
498 default:
2d7c957e 499 dev_err(twl6040->dev, "unknown pll id %d\n", pll_id);
f19b2823
MLC		 500 ret = -EINVAL;
501 goto pll_out;
502 }
503
0a58da1e 504 twl6040->sysclk_rate = freq_out;
cfb7a33b 505 twl6040->pll = pll_id;
f19b2823
MLC		 506
507pll_out:
508 mutex_unlock(&twl6040->mutex);
509 return ret;
510}
511EXPORT_SYMBOL(twl6040_set_pll);
512
cfb7a33b 513int twl6040_get_pll(struct twl6040 *twl6040)
f19b2823 514{
cfb7a33b
PU		 515 if (twl6040->power_count)
516 return twl6040->pll;
517 else
518 return -ENODEV;
f19b2823
MLC		 519}
520EXPORT_SYMBOL(twl6040_get_pll);
521
522unsigned int twl6040_get_sysclk(struct twl6040 *twl6040)
523{
0a58da1e 524 return twl6040->sysclk_rate;
f19b2823
MLC		 525}
526EXPORT_SYMBOL(twl6040_get_sysclk);
527
70601ec1
PU		 528/* Get the combined status of the vibra control register */
529int twl6040_get_vibralr_status(struct twl6040 *twl6040)
530{
c6f39257
MB		 531 unsigned int reg;
532 int ret;
70601ec1
PU		 533 u8 status;
534
c6f39257
MB		 535 ret = regmap_read(twl6040->regmap, TWL6040_REG_VIBCTLL, &reg);
536 if (ret != 0)
537 return ret;
538 status = reg;
539
540 ret = regmap_read(twl6040->regmap, TWL6040_REG_VIBCTLR, &reg);
541 if (ret != 0)
542 return ret;
543 status |= reg;
544
70601ec1
PU		 545 status &= (TWL6040_VIBENA | TWL6040_VIBSEL);
546
547 return status;
548}
549EXPORT_SYMBOL(twl6040_get_vibralr_status);
550
0f962ae2
PU		 551static struct resource twl6040_vibra_rsrc[] = {
552 {
553 .flags = IORESOURCE_IRQ,
554 },
555};
556
557static struct resource twl6040_codec_rsrc[] = {
558 {
559 .flags = IORESOURCE_IRQ,
560 },
561};
562
8eaeb939 563static bool twl6040_readable_reg(struct device *dev, unsigned int reg)
f19b2823 564{
8eaeb939
PU		 565 /* Register 0 is not readable */
566 if (!reg)
567 return false;
568 return true;
569}
570
c6f39257
MB		 571static bool twl6040_volatile_reg(struct device *dev, unsigned int reg)
572{
573 switch (reg) {
c7f9129d
PU		 574 case TWL6040_REG_ASICID:
575 case TWL6040_REG_ASICREV:
576 case TWL6040_REG_INTID:
577 case TWL6040_REG_LPPLLCTL:
578 case TWL6040_REG_HPPLLCTL:
579 case TWL6040_REG_STATUS:
580 return true;
581 default:
582 return false;
583 }
584}
585
586static bool twl6040_writeable_reg(struct device *dev, unsigned int reg)
587{
588 switch (reg) {
589 case TWL6040_REG_ASICID:
590 case TWL6040_REG_ASICREV:
591 case TWL6040_REG_STATUS:
c6f39257
MB		 592 return false;
593 default:
594 return true;
595 }
596}
597
de1e23f8 598static const struct regmap_config twl6040_regmap_config = {
8eaeb939
PU		 599 .reg_bits = 8,
600 .val_bits = 8,
c7f9129d
PU		 601
602 .reg_defaults = twl6040_defaults,
603 .num_reg_defaults = ARRAY_SIZE(twl6040_defaults),
604
8eaeb939
PU		 605 .max_register = TWL6040_REG_STATUS, /* 0x2e */
606
607 .readable_reg = twl6040_readable_reg,
c6f39257 608 .volatile_reg = twl6040_volatile_reg,
c7f9129d 609 .writeable_reg = twl6040_writeable_reg,
c6f39257
MB		 610
611 .cache_type = REGCACHE_RBTREE,
c78cb178 612 .use_single_rw = true,
8eaeb939
PU		 613};
614
ab7edb14
PU		 615static const struct regmap_irq twl6040_irqs[] = {
616 { .reg_offset = 0, .mask = TWL6040_THINT, },
617 { .reg_offset = 0, .mask = TWL6040_PLUGINT | TWL6040_UNPLUGINT, },
618 { .reg_offset = 0, .mask = TWL6040_HOOKINT, },
619 { .reg_offset = 0, .mask = TWL6040_HFINT, },
620 { .reg_offset = 0, .mask = TWL6040_VIBINT, },
621 { .reg_offset = 0, .mask = TWL6040_READYINT, },
622};
623
624static struct regmap_irq_chip twl6040_irq_chip = {
625 .name = "twl6040",
626 .irqs = twl6040_irqs,
627 .num_irqs = ARRAY_SIZE(twl6040_irqs),
628
629 .num_regs = 1,
630 .status_base = TWL6040_REG_INTID,
631 .mask_base = TWL6040_REG_INTMR,
632};
633
612b95cd
GKH		 634static int twl6040_probe(struct i2c_client *client,
635 const struct i2c_device_id *id)
8eaeb939 636{
37e13cec 637 struct device_node *node = client->dev.of_node;
f19b2823
MLC		 638 struct twl6040 *twl6040;
639 struct mfd_cell *cell = NULL;
1f01d60e 640 int irq, ret, children = 0;
f19b2823 641
df04b624
PU		 642 if (!node) {
643 dev_err(&client->dev, "of node is missing\n");
f19b2823
MLC		 644 return -EINVAL;
645 }
646
d20e1d21 647 /* In order to operate correctly we need valid interrupt config */
6712419d 648 if (!client->irq) {
8eaeb939 649 dev_err(&client->dev, "Invalid IRQ configuration\n");
d20e1d21
PU		 650 return -EINVAL;
651 }
652
8eaeb939
PU		 653 twl6040 = devm_kzalloc(&client->dev, sizeof(struct twl6040),
654 GFP_KERNEL);
ecc8fa1c
PU		 655 if (!twl6040)
656 return -ENOMEM;
8eaeb939 657
bbf6adc1 658 twl6040->regmap = devm_regmap_init_i2c(client, &twl6040_regmap_config);
ecc8fa1c
PU		 659 if (IS_ERR(twl6040->regmap))
660 return PTR_ERR(twl6040->regmap);
f19b2823 661
8eaeb939 662 i2c_set_clientdata(client, twl6040);
f19b2823 663
68bab866
PU		 664 twl6040->clk32k = devm_clk_get(&client->dev, "clk32k");
665 if (IS_ERR(twl6040->clk32k)) {
75c08f17
TL		 666 if (PTR_ERR(twl6040->clk32k) == -EPROBE_DEFER)
667 return -EPROBE_DEFER;
0a58da1e 668 dev_dbg(&client->dev, "clk32k is not handled\n");
68bab866
PU		 669 twl6040->clk32k = NULL;
670 }
671
0a58da1e
PU		 672 twl6040->mclk = devm_clk_get(&client->dev, "mclk");
673 if (IS_ERR(twl6040->mclk)) {
674 if (PTR_ERR(twl6040->mclk) == -EPROBE_DEFER)
675 return -EPROBE_DEFER;
676 dev_dbg(&client->dev, "mclk is not handled\n");
677 twl6040->mclk = NULL;
678 }
679
5af7df6b
PU		 680 twl6040->supplies[0].supply = "vio";
681 twl6040->supplies[1].supply = "v2v1";
990810b0 682 ret = devm_regulator_bulk_get(&client->dev, TWL6040_NUM_SUPPLIES,
37aefe9f 683 twl6040->supplies);
5af7df6b
PU		 684 if (ret != 0) {
685 dev_err(&client->dev, "Failed to get supplies: %d\n", ret);
501d609a 686 return ret;
5af7df6b
PU		 687 }
688
689 ret = regulator_bulk_enable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
690 if (ret != 0) {
691 dev_err(&client->dev, "Failed to enable supplies: %d\n", ret);
501d609a 692 return ret;
5af7df6b
PU		 693 }
694
8eaeb939
PU		 695 twl6040->dev = &client->dev;
696 twl6040->irq = client->irq;
f19b2823
MLC		 697
698 mutex_init(&twl6040->mutex);
f19b2823
MLC		 699 init_completion(&twl6040->ready);
700
006cea3a
PU		 701 regmap_register_patch(twl6040->regmap, twl6040_patch,
702 ARRAY_SIZE(twl6040_patch));
703
f19b2823 704 twl6040->rev = twl6040_reg_read(twl6040, TWL6040_REG_ASICREV);
89d68998
FV		 705 if (twl6040->rev < 0) {
706 dev_err(&client->dev, "Failed to read revision register: %d\n",
707 twl6040->rev);
f2b86781 708 ret = twl6040->rev;
89d68998
FV		 709 goto gpio_err;
710 }
f19b2823 711
77f63e06 712 /* ERRATA: Automatic power-up is not possible in ES1.0 */
df04b624
PU		 713 if (twl6040_get_revid(twl6040) > TWL6040_REV_ES1_0)
714 twl6040->audpwron = of_get_named_gpio(node,
715 "ti,audpwron-gpio", 0);
716 else
77f63e06
PU		 717 twl6040->audpwron = -EINVAL;
718
f19b2823 719 if (gpio_is_valid(twl6040->audpwron)) {
990810b0 720 ret = devm_gpio_request_one(&client->dev, twl6040->audpwron,
37aefe9f 721 GPIOF_OUT_INIT_LOW, "audpwron");
f19b2823 722 if (ret)
5af7df6b 723 goto gpio_err;
02d02728
PU		 724
725 /* Clear any pending interrupt */
726 twl6040_reg_read(twl6040, TWL6040_REG_INTID);
f19b2823
MLC		 727 }
728
37aefe9f 729 ret = regmap_add_irq_chip(twl6040->regmap, twl6040->irq, IRQF_ONESHOT,
c06f308a 730 0, &twl6040_irq_chip, &twl6040->irq_data);
ab7edb14 731 if (ret < 0)
990810b0 732 goto gpio_err;
d20e1d21 733
ab7edb14 734 twl6040->irq_ready = regmap_irq_get_virq(twl6040->irq_data,
37aefe9f 735 TWL6040_IRQ_READY);
ab7edb14 736 twl6040->irq_th = regmap_irq_get_virq(twl6040->irq_data,
37aefe9f 737 TWL6040_IRQ_TH);
ab7edb14 738
990810b0 739 ret = devm_request_threaded_irq(twl6040->dev, twl6040->irq_ready, NULL,
37aefe9f
PU		 740 twl6040_readyint_handler, IRQF_ONESHOT,
741 "twl6040_irq_ready", twl6040);
d20e1d21 742 if (ret) {
1ac96265
PU		 743 dev_err(twl6040->dev, "READY IRQ request failed: %d\n", ret);
744 goto readyirq_err;
745 }
746
990810b0 747 ret = devm_request_threaded_irq(twl6040->dev, twl6040->irq_th, NULL,
37aefe9f
PU		 748 twl6040_thint_handler, IRQF_ONESHOT,
749 "twl6040_irq_th", twl6040);
1ac96265
PU		 750 if (ret) {
751 dev_err(twl6040->dev, "Thermal IRQ request failed: %d\n", ret);
fc5ee96f 752 goto readyirq_err;
f19b2823
MLC		 753 }
754
1f01d60e
PU		 755 /*
756 * The main functionality of twl6040 to provide audio on OMAP4+ systems.
757 * We can add the ASoC codec child whenever this driver has been loaded.
1f01d60e 758 */
ab7edb14 759 irq = regmap_irq_get_virq(twl6040->irq_data, TWL6040_IRQ_PLUG);
1f01d60e
PU		 760 cell = &twl6040->cells[children];
761 cell->name = "twl6040-codec";
762 twl6040_codec_rsrc[0].start = irq;
763 twl6040_codec_rsrc[0].end = irq;
764 cell->resources = twl6040_codec_rsrc;
765 cell->num_resources = ARRAY_SIZE(twl6040_codec_rsrc);
1f01d60e 766 children++;
f19b2823 767
df04b624
PU		 768 /* Vibra input driver support */
769 if (twl6040_has_vibra(node)) {
ab7edb14 770 irq = regmap_irq_get_virq(twl6040->irq_data, TWL6040_IRQ_VIB);
0f962ae2 771
f19b2823
MLC		 772 cell = &twl6040->cells[children];
773 cell->name = "twl6040-vibra";
0f962ae2
PU		 774 twl6040_vibra_rsrc[0].start = irq;
775 twl6040_vibra_rsrc[0].end = irq;
776 cell->resources = twl6040_vibra_rsrc;
777 cell->num_resources = ARRAY_SIZE(twl6040_vibra_rsrc);
f19b2823
MLC		 778 children++;
779 }
780
df04b624
PU		 781 /* GPO support */
782 cell = &twl6040->cells[children];
783 cell->name = "twl6040-gpo";
784 children++;
5cbe786a 785
0133d323
PU		 786 /* PDM clock support */
787 cell = &twl6040->cells[children];
788 cell->name = "twl6040-pdmclk";
789 children++;
790
c7f9129d
PU		 791 /* The chip is powered down so mark regmap to cache only and dirty */
792 regcache_cache_only(twl6040->regmap, true);
793 regcache_mark_dirty(twl6040->regmap);
794
1f01d60e 795 ret = mfd_add_devices(&client->dev, -1, twl6040->cells, children,
55692af5 796 NULL, 0, NULL);
1f01d60e 797 if (ret)
fc5ee96f 798 goto readyirq_err;
f19b2823
MLC		 799
800 return 0;
801
1ac96265 802readyirq_err:
ab7edb14 803 regmap_del_irq_chip(twl6040->irq, twl6040->irq_data);
5af7df6b
PU		 804gpio_err:
805 regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
f19b2823
MLC		 806 return ret;
807}
808
612b95cd 809static int twl6040_remove(struct i2c_client *client)
f19b2823 810{
8eaeb939 811 struct twl6040 *twl6040 = i2c_get_clientdata(client);
f19b2823
MLC		 812
813 if (twl6040->power_count)
814 twl6040_power(twl6040, 0);
815
ab7edb14 816 regmap_del_irq_chip(twl6040->irq, twl6040->irq_data);
f19b2823 817
8eaeb939 818 mfd_remove_devices(&client->dev);
f19b2823 819
5af7df6b 820 regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
5af7df6b 821
f19b2823
MLC		 822 return 0;
823}
824
8eaeb939
PU		 825static const struct i2c_device_id twl6040_i2c_id[] = {
826 { "twl6040", 0, },
1fc74aef 827 { "twl6041", 0, },
8eaeb939
PU		 828 { },
829};
830MODULE_DEVICE_TABLE(i2c, twl6040_i2c_id);
831
832static struct i2c_driver twl6040_driver = {
833 .driver = {
834 .name = "twl6040",
8eaeb939 835 },
f19b2823 836 .probe = twl6040_probe,
612b95cd 837 .remove = twl6040_remove,
8eaeb939 838 .id_table = twl6040_i2c_id,
f19b2823
MLC		 839};
840
8eaeb939 841module_i2c_driver(twl6040_driver);
f19b2823
MLC		 842
843MODULE_DESCRIPTION("TWL6040 MFD");
844MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>");
845MODULE_AUTHOR("Jorge Eduardo Candelaria <jorge.candelaria@ti.com>");
846MODULE_LICENSE("GPL");
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