[mirror_ubuntu-bionic-kernel.git] / drivers / misc / cxl / fault.c

/*
 * Copyright 2014 IBM Corp.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

#include <linux/workqueue.h>
#include <linux/sched.h>
#include <linux/pid.h>
#include <linux/mm.h>
#include <linux/moduleparam.h>

#undef MODULE_PARAM_PREFIX
#define MODULE_PARAM_PREFIX "cxl" "."
#include <asm/current.h>
#include <asm/copro.h>
#include <asm/mmu.h>

#include "cxl.h"
#include "trace.h"

static bool sste_matches(struct cxl_sste *sste, struct copro_slb *slb)
{
	return ((sste->vsid_data == cpu_to_be64(slb->vsid)) &&
		(sste->esid_data == cpu_to_be64(slb->esid)));
}

/*
 * This finds a free SSTE for the given SLB, or returns NULL if it's already in
 * the segment table.
 */
static struct cxl_sste* find_free_sste(struct cxl_context *ctx,
				       struct copro_slb *slb)
{
	struct cxl_sste *primary, *sste, *ret = NULL;
	unsigned int mask = (ctx->sst_size >> 7) - 1; /* SSTP0[SegTableSize] */
	unsigned int entry;
	unsigned int hash;

	if (slb->vsid & SLB_VSID_B_1T)
		hash = (slb->esid >> SID_SHIFT_1T) & mask;
	else /* 256M */
		hash = (slb->esid >> SID_SHIFT) & mask;

	primary = ctx->sstp + (hash << 3);

	for (entry = 0, sste = primary; entry < 8; entry++, sste++) {
		if (!ret && !(be64_to_cpu(sste->esid_data) & SLB_ESID_V))
			ret = sste;
		if (sste_matches(sste, slb))
			return NULL;
	}
	if (ret)
		return ret;

	/* Nothing free, select an entry to cast out */
	ret = primary + ctx->sst_lru;
	ctx->sst_lru = (ctx->sst_lru + 1) & 0x7;

	return ret;
}

static void cxl_load_segment(struct cxl_context *ctx, struct copro_slb *slb)
{
	/* mask is the group index, we search primary and secondary here. */
	struct cxl_sste *sste;
	unsigned long flags;

	spin_lock_irqsave(&ctx->sste_lock, flags);
	sste = find_free_sste(ctx, slb);
	if (!sste)
		goto out_unlock;

	pr_devel("CXL Populating SST[%li]: %#llx %#llx\n",
			sste - ctx->sstp, slb->vsid, slb->esid);
	trace_cxl_ste_write(ctx, sste - ctx->sstp, slb->esid, slb->vsid);

	sste->vsid_data = cpu_to_be64(slb->vsid);
	sste->esid_data = cpu_to_be64(slb->esid);
out_unlock:
	spin_unlock_irqrestore(&ctx->sste_lock, flags);
}

static int cxl_fault_segment(struct cxl_context *ctx, struct mm_struct *mm,
			     u64 ea)
{
	struct copro_slb slb = {0,0};
	int rc;

	if (!(rc = copro_calculate_slb(mm, ea, &slb))) {
		cxl_load_segment(ctx, &slb);
	}

	return rc;
}

static void cxl_ack_ae(struct cxl_context *ctx)
{
	unsigned long flags;

	cxl_ops->ack_irq(ctx, CXL_PSL_TFC_An_AE, 0);

	spin_lock_irqsave(&ctx->lock, flags);
	ctx->pending_fault = true;
	ctx->fault_addr = ctx->dar;
	ctx->fault_dsisr = ctx->dsisr;
	spin_unlock_irqrestore(&ctx->lock, flags);

	wake_up_all(&ctx->wq);
}

static int cxl_handle_segment_miss(struct cxl_context *ctx,
				   struct mm_struct *mm, u64 ea)
{
	int rc;

	pr_devel("CXL interrupt: Segment fault pe: %i ea: %#llx\n", ctx->pe, ea);
	trace_cxl_ste_miss(ctx, ea);

	if ((rc = cxl_fault_segment(ctx, mm, ea)))
		cxl_ack_ae(ctx);
	else {

		mb(); /* Order seg table write to TFC MMIO write */
		cxl_ops->ack_irq(ctx, CXL_PSL_TFC_An_R, 0);
	}

	return IRQ_HANDLED;
}

static void cxl_handle_page_fault(struct cxl_context *ctx,
				  struct mm_struct *mm, u64 dsisr, u64 dar)
{
	unsigned flt = 0;
	int result;
	unsigned long access, flags, inv_flags = 0;

	trace_cxl_pte_miss(ctx, dsisr, dar);

	if ((result = copro_handle_mm_fault(mm, dar, dsisr, &flt))) {
		pr_devel("copro_handle_mm_fault failed: %#x\n", result);
		return cxl_ack_ae(ctx);
	}

	/*
	 * update_mmu_cache() will not have loaded the hash since current->trap
	 * is not a 0x400 or 0x300, so just call hash_page_mm() here.
	 */
	access = _PAGE_PRESENT | _PAGE_READ;
	if (dsisr & CXL_PSL_DSISR_An_S)
		access |= _PAGE_WRITE;

	access |= _PAGE_PRIVILEGED;
	if ((!ctx->kernel) || (REGION_ID(dar) == USER_REGION_ID))
		access &= ~_PAGE_PRIVILEGED;

	if (dsisr & DSISR_NOHPTE)
		inv_flags |= HPTE_NOHPTE_UPDATE;

	local_irq_save(flags);
	hash_page_mm(mm, dar, access, 0x300, inv_flags);
	local_irq_restore(flags);

	pr_devel("Page fault successfully handled for pe: %i!\n", ctx->pe);
	cxl_ops->ack_irq(ctx, CXL_PSL_TFC_An_R, 0);
}

/*
 * Returns the mm_struct corresponding to the context ctx via ctx->pid
 * In case the task has exited we use the task group leader accessible
 * via ctx->glpid to find the next task in the thread group that has a
 * valid  mm_struct associated with it. If a task with valid mm_struct
 * is found the ctx->pid is updated to use the task struct for subsequent
 * translations. In case no valid mm_struct is found in the task group to
 * service the fault a NULL is returned.
 */
static struct mm_struct *get_mem_context(struct cxl_context *ctx)
{
	struct task_struct *task = NULL;
	struct mm_struct *mm = NULL;
	struct pid *old_pid = ctx->pid;

	if (old_pid == NULL) {
		pr_warn("%s: Invalid context for pe=%d\n",
			 __func__, ctx->pe);
		return NULL;
	}

	task = get_pid_task(old_pid, PIDTYPE_PID);

	/*
	 * pid_alive may look racy but this saves us from costly
	 * get_task_mm when the task is a zombie. In worst case
	 * we may think a task is alive, which is about to die
	 * but get_task_mm will return NULL.
	 */
	if (task != NULL && pid_alive(task))
		mm = get_task_mm(task);

	/* release the task struct that was taken earlier */
	if (task)
		put_task_struct(task);
	else
		pr_devel("%s: Context owning pid=%i for pe=%i dead\n",
			__func__, pid_nr(old_pid), ctx->pe);

	/*
	 * If we couldn't find the mm context then use the group
	 * leader to iterate over the task group and find a task
	 * that gives us mm_struct.
	 */
	if (unlikely(mm == NULL && ctx->glpid != NULL)) {

		rcu_read_lock();
		task = pid_task(ctx->glpid, PIDTYPE_PID);
		if (task)
			do {
				mm = get_task_mm(task);
				if (mm) {
					ctx->pid = get_task_pid(task,
								PIDTYPE_PID);
					break;
				}
				task = next_thread(task);
			} while (task && !thread_group_leader(task));
		rcu_read_unlock();

		/* check if we switched pid */
		if (ctx->pid != old_pid) {
			if (mm)
				pr_devel("%s:pe=%i switch pid %i->%i\n",
					 __func__, ctx->pe, pid_nr(old_pid),
					 pid_nr(ctx->pid));
			else
				pr_devel("%s:Cannot find mm for pid=%i\n",
					 __func__, pid_nr(old_pid));

			/* drop the reference to older pid */
			put_pid(old_pid);
		}
	}

	return mm;
}


void cxl_handle_fault(struct work_struct *fault_work)
{
	struct cxl_context *ctx =
		container_of(fault_work, struct cxl_context, fault_work);
	u64 dsisr = ctx->dsisr;
	u64 dar = ctx->dar;
	struct mm_struct *mm = NULL;

	if (cpu_has_feature(CPU_FTR_HVMODE)) {
		if (cxl_p2n_read(ctx->afu, CXL_PSL_DSISR_An) != dsisr ||
		    cxl_p2n_read(ctx->afu, CXL_PSL_DAR_An) != dar ||
		    cxl_p2n_read(ctx->afu, CXL_PSL_PEHandle_An) != ctx->pe) {
			/* Most likely explanation is harmless - a dedicated
			 * process has detached and these were cleared by the
			 * PSL purge, but warn about it just in case
			 */
			dev_notice(&ctx->afu->dev, "cxl_handle_fault: Translation fault regs changed\n");
			return;
		}
	}

	/* Early return if the context is being / has been detached */
	if (ctx->status == CLOSED) {
		cxl_ack_ae(ctx);
		return;
	}

	pr_devel("CXL BOTTOM HALF handling fault for afu pe: %i. "
		"DSISR: %#llx DAR: %#llx\n", ctx->pe, dsisr, dar);

	if (!ctx->kernel) {

		mm = get_mem_context(ctx);
		/* indicates all the thread in task group have exited */
		if (mm == NULL) {
			pr_devel("%s: unable to get mm for pe=%d pid=%i\n",
				 __func__, ctx->pe, pid_nr(ctx->pid));
			cxl_ack_ae(ctx);
			return;
		} else {
			pr_devel("Handling page fault for pe=%d pid=%i\n",
				 ctx->pe, pid_nr(ctx->pid));
		}
	}

	if (dsisr & CXL_PSL_DSISR_An_DS)
		cxl_handle_segment_miss(ctx, mm, dar);
	else if (dsisr & CXL_PSL_DSISR_An_DM)
		cxl_handle_page_fault(ctx, mm, dsisr, dar);
	else
		WARN(1, "cxl_handle_fault has nothing to handle\n");

	if (mm)
		mmput(mm);
}

static void cxl_prefault_one(struct cxl_context *ctx, u64 ea)
{
	struct mm_struct *mm;

	mm = get_mem_context(ctx);
	if (mm == NULL) {
		pr_devel("cxl_prefault_one unable to get mm %i\n",
			 pid_nr(ctx->pid));
		return;
	}

	cxl_fault_segment(ctx, mm, ea);

	mmput(mm);
}

static u64 next_segment(u64 ea, u64 vsid)
{
	if (vsid & SLB_VSID_B_1T)
		ea |= (1ULL << 40) - 1;
	else
		ea |= (1ULL << 28) - 1;

	return ea + 1;
}

static void cxl_prefault_vma(struct cxl_context *ctx)
{
	u64 ea, last_esid = 0;
	struct copro_slb slb;
	struct vm_area_struct *vma;
	int rc;
	struct mm_struct *mm;

	mm = get_mem_context(ctx);
	if (mm == NULL) {
		pr_devel("cxl_prefault_vm unable to get mm %i\n",
			 pid_nr(ctx->pid));
		return;
	}

	down_read(&mm->mmap_sem);
	for (vma = mm->mmap; vma; vma = vma->vm_next) {
		for (ea = vma->vm_start; ea < vma->vm_end;
				ea = next_segment(ea, slb.vsid)) {
			rc = copro_calculate_slb(mm, ea, &slb);
			if (rc)
				continue;

			if (last_esid == slb.esid)
				continue;

			cxl_load_segment(ctx, &slb);
			last_esid = slb.esid;
		}
	}
	up_read(&mm->mmap_sem);

	mmput(mm);
}

void cxl_prefault(struct cxl_context *ctx, u64 wed)
{
	switch (ctx->afu->prefault_mode) {
	case CXL_PREFAULT_WED:
		cxl_prefault_one(ctx, wed);
		break;
	case CXL_PREFAULT_ALL:
		cxl_prefault_vma(ctx);
		break;
	default:
		break;
	}
}
Commit	Line	Data
f204e0b8 IM	1	/*
	2	* Copyright 2014 IBM Corp.
	3	*
	4	* This program is free software; you can redistribute it and/or
	5	* modify it under the terms of the GNU General Public License
	6	* as published by the Free Software Foundation; either version
	7	* 2 of the License, or (at your option) any later version.
	8	*/
	9
	10	#include <linux/workqueue.h>
	11	#include <linux/sched.h>
	12	#include <linux/pid.h>
	13	#include <linux/mm.h>
	14	#include <linux/moduleparam.h>
	15
	16	#undef MODULE_PARAM_PREFIX
	17	#define MODULE_PARAM_PREFIX "cxl" "."
	18	#include <asm/current.h>
	19	#include <asm/copro.h>
	20	#include <asm/mmu.h>
	21
	22	#include "cxl.h"
9bcf28cd	23	#include "trace.h"
f204e0b8	24
eb01d4c2 IM	25	static bool sste_matches(struct cxl_sste sste, struct copro_slb slb)
	26	{
	27	return ((sste->vsid_data == cpu_to_be64(slb->vsid)) &&
	28	(sste->esid_data == cpu_to_be64(slb->esid)));
	29	}
	30
	31	/*
	32	* This finds a free SSTE for the given SLB, or returns NULL if it's already in
	33	* the segment table.
	34	*/
b03a7f57 IM	35	static struct cxl_sste* find_free_sste(struct cxl_context *ctx,
b03a7f57 IM	36	struct copro_slb *slb)
f204e0b8	37	{
eb01d4c2	38	struct cxl_sste primary, sste, *ret = NULL;
b03a7f57	39	unsigned int mask = (ctx->sst_size >> 7) - 1; /* SSTP0[SegTableSize] */
5100a9d6	40	unsigned int entry;
b03a7f57 IM	41	unsigned int hash;
	42
	43	if (slb->vsid & SLB_VSID_B_1T)
	44	hash = (slb->esid >> SID_SHIFT_1T) & mask;
	45	else /* 256M */
	46	hash = (slb->esid >> SID_SHIFT) & mask;
f204e0b8	47
b03a7f57 IM	48	primary = ctx->sstp + (hash << 3);
	49
	50	for (entry = 0, sste = primary; entry < 8; entry++, sste++) {
eb01d4c2 IM	51	if (!ret && !(be64_to_cpu(sste->esid_data) & SLB_ESID_V))
	52	ret = sste;
	53	if (sste_matches(sste, slb))
	54	return NULL;
f204e0b8	55	}
eb01d4c2 IM	56	if (ret)
eb01d4c2 IM	57	return ret;
b03a7f57	58
f204e0b8	59	/* Nothing free, select an entry to cast out */
eb01d4c2	60	ret = primary + ctx->sst_lru;
b03a7f57	61	ctx->sst_lru = (ctx->sst_lru + 1) & 0x7;
f204e0b8	62
eb01d4c2	63	return ret;
f204e0b8 IM	64	}
	65
	66	static void cxl_load_segment(struct cxl_context ctx, struct copro_slb slb)
	67	{
	68	/* mask is the group index, we search primary and secondary here. */
f204e0b8	69	struct cxl_sste *sste;
f204e0b8 IM	70	unsigned long flags;
f204e0b8 IM	71
f204e0b8	72	spin_lock_irqsave(&ctx->sste_lock, flags);
b03a7f57	73	sste = find_free_sste(ctx, slb);
eb01d4c2 IM	74	if (!sste)
eb01d4c2 IM	75	goto out_unlock;
f204e0b8 IM	76
	77	pr_devel("CXL Populating SST[%li]: %#llx %#llx\n",
	78	sste - ctx->sstp, slb->vsid, slb->esid);
9bcf28cd	79	trace_cxl_ste_write(ctx, sste - ctx->sstp, slb->esid, slb->vsid);
f204e0b8 IM	80
	81	sste->vsid_data = cpu_to_be64(slb->vsid);
	82	sste->esid_data = cpu_to_be64(slb->esid);
eb01d4c2	83	out_unlock:
f204e0b8 IM	84	spin_unlock_irqrestore(&ctx->sste_lock, flags);
	85	}
	86
	87	static int cxl_fault_segment(struct cxl_context ctx, struct mm_struct mm,
	88	u64 ea)
	89	{
	90	struct copro_slb slb = {0,0};
	91	int rc;
	92
	93	if (!(rc = copro_calculate_slb(mm, ea, &slb))) {
	94	cxl_load_segment(ctx, &slb);
	95	}
	96
	97	return rc;
	98	}
	99
	100	static void cxl_ack_ae(struct cxl_context *ctx)
	101	{
	102	unsigned long flags;
	103
5be587b1	104	cxl_ops->ack_irq(ctx, CXL_PSL_TFC_An_AE, 0);
f204e0b8 IM	105
	106	spin_lock_irqsave(&ctx->lock, flags);
	107	ctx->pending_fault = true;
	108	ctx->fault_addr = ctx->dar;
	109	ctx->fault_dsisr = ctx->dsisr;
	110	spin_unlock_irqrestore(&ctx->lock, flags);
	111
	112	wake_up_all(&ctx->wq);
	113	}
	114
	115	static int cxl_handle_segment_miss(struct cxl_context *ctx,
	116	struct mm_struct *mm, u64 ea)
	117	{
	118	int rc;
	119
	120	pr_devel("CXL interrupt: Segment fault pe: %i ea: %#llx\n", ctx->pe, ea);
9bcf28cd	121	trace_cxl_ste_miss(ctx, ea);
f204e0b8 IM	122
	123	if ((rc = cxl_fault_segment(ctx, mm, ea)))
	124	cxl_ack_ae(ctx);
	125	else {
	126
	127	mb(); /* Order seg table write to TFC MMIO write */
5be587b1	128	cxl_ops->ack_irq(ctx, CXL_PSL_TFC_An_R, 0);
f204e0b8 IM	129	}
	130
	131	return IRQ_HANDLED;
	132	}
	133
	134	static void cxl_handle_page_fault(struct cxl_context *ctx,
	135	struct mm_struct *mm, u64 dsisr, u64 dar)
	136	{
	137	unsigned flt = 0;
	138	int result;
aefa5688	139	unsigned long access, flags, inv_flags = 0;
f204e0b8	140
9bcf28cd IM	141	trace_cxl_pte_miss(ctx, dsisr, dar);
9bcf28cd IM	142
f204e0b8 IM	143	if ((result = copro_handle_mm_fault(mm, dar, dsisr, &flt))) {
	144	pr_devel("copro_handle_mm_fault failed: %#x\n", result);
	145	return cxl_ack_ae(ctx);
	146	}
	147
	148	/*
	149	* update_mmu_cache() will not have loaded the hash since current->trap
	150	* is not a 0x400 or 0x300, so just call hash_page_mm() here.
	151	*/
c7d54842	152	access = _PAGE_PRESENT \| _PAGE_READ;
f204e0b8	153	if (dsisr & CXL_PSL_DSISR_An_S)
c7d54842	154	access \|= _PAGE_WRITE;
ac29c640 AK	155
ac29c640 AK	156	access \|= _PAGE_PRIVILEGED;
3b1dbfa1	157	if ((!ctx->kernel) \|\| (REGION_ID(dar) == USER_REGION_ID))
ac29c640	158	access &= ~_PAGE_PRIVILEGED;
aefa5688 AK	159
	160	if (dsisr & DSISR_NOHPTE)
	161	inv_flags \|= HPTE_NOHPTE_UPDATE;
	162
f204e0b8	163	local_irq_save(flags);
aefa5688	164	hash_page_mm(mm, dar, access, 0x300, inv_flags);
f204e0b8 IM	165	local_irq_restore(flags);
	166
	167	pr_devel("Page fault successfully handled for pe: %i!\n", ctx->pe);
5be587b1	168	cxl_ops->ack_irq(ctx, CXL_PSL_TFC_An_R, 0);
f204e0b8 IM	169	}
f204e0b8 IM	170
7b8ad495 VJ	171	/*
	172	* Returns the mm_struct corresponding to the context ctx via ctx->pid
	173	* In case the task has exited we use the task group leader accessible
	174	* via ctx->glpid to find the next task in the thread group that has a
	175	* valid mm_struct associated with it. If a task with valid mm_struct
	176	* is found the ctx->pid is updated to use the task struct for subsequent
	177	* translations. In case no valid mm_struct is found in the task group to
	178	* service the fault a NULL is returned.
	179	*/
	180	static struct mm_struct get_mem_context(struct cxl_context ctx)
	181	{
	182	struct task_struct *task = NULL;
	183	struct mm_struct *mm = NULL;
	184	struct pid *old_pid = ctx->pid;
	185
	186	if (old_pid == NULL) {
	187	pr_warn("%s: Invalid context for pe=%d\n",
	188	__func__, ctx->pe);
	189	return NULL;
	190	}
	191
	192	task = get_pid_task(old_pid, PIDTYPE_PID);
	193
	194	/*
	195	* pid_alive may look racy but this saves us from costly
	196	* get_task_mm when the task is a zombie. In worst case
	197	* we may think a task is alive, which is about to die
	198	* but get_task_mm will return NULL.
	199	*/
	200	if (task != NULL && pid_alive(task))
	201	mm = get_task_mm(task);
	202
	203	/* release the task struct that was taken earlier */
	204	if (task)
	205	put_task_struct(task);
	206	else
	207	pr_devel("%s: Context owning pid=%i for pe=%i dead\n",
	208	__func__, pid_nr(old_pid), ctx->pe);
	209
	210	/*
	211	* If we couldn't find the mm context then use the group
	212	* leader to iterate over the task group and find a task
	213	* that gives us mm_struct.
	214	*/
	215	if (unlikely(mm == NULL && ctx->glpid != NULL)) {
	216
	217	rcu_read_lock();
	218	task = pid_task(ctx->glpid, PIDTYPE_PID);
	219	if (task)
	220	do {
	221	mm = get_task_mm(task);
	222	if (mm) {
	223	ctx->pid = get_task_pid(task,
	224	PIDTYPE_PID);
	225	break;
	226	}
	227	task = next_thread(task);
	228	} while (task && !thread_group_leader(task));
	229	rcu_read_unlock();
	230
	231	/* check if we switched pid */
	232	if (ctx->pid != old_pid) {
	233	if (mm)
	234	pr_devel("%s:pe=%i switch pid %i->%i\n",
235	__func__, ctx->pe, pid_nr(old_pid),
236	pid_nr(ctx->pid));
237	else
238	pr_devel("%s:Cannot find mm for pid=%i\n",
239	__func__, pid_nr(old_pid));
240
241	/* drop the reference to older pid */
242	put_pid(old_pid);
243	}
244	}
245
246	return mm;
247	}
248
249
250
f204e0b8 IM	251	void cxl_handle_fault(struct work_struct *fault_work)
	252	{
	253	struct cxl_context *ctx =
	254	container_of(fault_work, struct cxl_context, fault_work);
	255	u64 dsisr = ctx->dsisr;
	256	u64 dar = ctx->dar;
a6b07d82	257	struct mm_struct *mm = NULL;
f204e0b8	258
ea2d1f95 FB	259	if (cpu_has_feature(CPU_FTR_HVMODE)) {
	260	if (cxl_p2n_read(ctx->afu, CXL_PSL_DSISR_An) != dsisr \|\|
	261	cxl_p2n_read(ctx->afu, CXL_PSL_DAR_An) != dar \|\|
	262	cxl_p2n_read(ctx->afu, CXL_PSL_PEHandle_An) != ctx->pe) {
	263	/* Most likely explanation is harmless - a dedicated
	264	* process has detached and these were cleared by the
	265	* PSL purge, but warn about it just in case
	266	*/
	267	dev_notice(&ctx->afu->dev, "cxl_handle_fault: Translation fault regs changed\n");
	268	return;
	269	}
f204e0b8 IM	270	}
f204e0b8 IM	271
13da7046 IM	272	/* Early return if the context is being / has been detached */
	273	if (ctx->status == CLOSED) {
	274	cxl_ack_ae(ctx);
	275	return;
	276	}
	277
f204e0b8 IM	278	pr_devel("CXL BOTTOM HALF handling fault for afu pe: %i. "
	279	"DSISR: %#llx DAR: %#llx\n", ctx->pe, dsisr, dar);
	280
a6b07d82	281	if (!ctx->kernel) {
7b8ad495 VJ	282
	283	mm = get_mem_context(ctx);
	284	/* indicates all the thread in task group have exited */
	285	if (mm == NULL) {
	286	pr_devel("%s: unable to get mm for pe=%d pid=%i\n",
	287	__func__, ctx->pe, pid_nr(ctx->pid));
a6b07d82 MN	288	cxl_ack_ae(ctx);
a6b07d82 MN	289	return;
7b8ad495 VJ	290	} else {
	291	pr_devel("Handling page fault for pe=%d pid=%i\n",
	292	ctx->pe, pid_nr(ctx->pid));
a6b07d82	293	}
f204e0b8 IM	294	}
	295
	296	if (dsisr & CXL_PSL_DSISR_An_DS)
	297	cxl_handle_segment_miss(ctx, mm, dar);
	298	else if (dsisr & CXL_PSL_DSISR_An_DM)
	299	cxl_handle_page_fault(ctx, mm, dsisr, dar);
	300	else
	301	WARN(1, "cxl_handle_fault has nothing to handle\n");
	302
a6b07d82 MN	303	if (mm)
a6b07d82 MN	304	mmput(mm);
f204e0b8 IM	305	}
	306
	307	static void cxl_prefault_one(struct cxl_context *ctx, u64 ea)
	308	{
f204e0b8 IM	309	struct mm_struct *mm;
f204e0b8 IM	310
7b8ad495 VJ	311	mm = get_mem_context(ctx);
7b8ad495 VJ	312	if (mm == NULL) {
f204e0b8 IM	313	pr_devel("cxl_prefault_one unable to get mm %i\n",
f204e0b8 IM	314	pid_nr(ctx->pid));
f204e0b8 IM	315	return;
	316	}
	317
7b8ad495	318	cxl_fault_segment(ctx, mm, ea);
f204e0b8 IM	319
f204e0b8 IM	320	mmput(mm);
f204e0b8 IM	321	}
	322
	323	static u64 next_segment(u64 ea, u64 vsid)
	324	{
	325	if (vsid & SLB_VSID_B_1T)
	326	ea \|= (1ULL << 40) - 1;
	327	else
	328	ea \|= (1ULL << 28) - 1;
	329
	330	return ea + 1;
	331	}
	332
	333	static void cxl_prefault_vma(struct cxl_context *ctx)
	334	{
	335	u64 ea, last_esid = 0;
	336	struct copro_slb slb;
	337	struct vm_area_struct *vma;
	338	int rc;
f204e0b8 IM	339	struct mm_struct *mm;
f204e0b8 IM	340
7b8ad495 VJ	341	mm = get_mem_context(ctx);
7b8ad495 VJ	342	if (mm == NULL) {
f204e0b8 IM	343	pr_devel("cxl_prefault_vm unable to get mm %i\n",
f204e0b8 IM	344	pid_nr(ctx->pid));
7b8ad495	345	return;
f204e0b8 IM	346	}
	347
	348	down_read(&mm->mmap_sem);
	349	for (vma = mm->mmap; vma; vma = vma->vm_next) {
	350	for (ea = vma->vm_start; ea < vma->vm_end;
	351	ea = next_segment(ea, slb.vsid)) {
	352	rc = copro_calculate_slb(mm, ea, &slb);
	353	if (rc)
	354	continue;
	355
	356	if (last_esid == slb.esid)
	357	continue;
	358
	359	cxl_load_segment(ctx, &slb);
	360	last_esid = slb.esid;
	361	}
	362	}
	363	up_read(&mm->mmap_sem);
	364
	365	mmput(mm);
f204e0b8 IM	366	}
	367
	368	void cxl_prefault(struct cxl_context *ctx, u64 wed)
	369	{
	370	switch (ctx->afu->prefault_mode) {
	371	case CXL_PREFAULT_WED:
	372	cxl_prefault_one(ctx, wed);
	373	break;
	374	case CXL_PREFAULT_ALL:
	375	cxl_prefault_vma(ctx);
	376	break;
	377	default:
	378	break;
	379	}
	380	}