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14baf4d9 CL |
1 | /* |
2 | * Copyright 2015 IBM Corp. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or | |
5 | * modify it under the terms of the GNU General Public License | |
6 | * as published by the Free Software Foundation; either version | |
7 | * 2 of the License, or (at your option) any later version. | |
8 | */ | |
9 | ||
10 | #include <linux/spinlock.h> | |
11 | #include <linux/uaccess.h> | |
12 | #include <linux/delay.h> | |
13 | ||
14 | #include "cxl.h" | |
15 | #include "hcalls.h" | |
16 | #include "trace.h" | |
17 | ||
18 | ||
19 | static irqreturn_t guest_handle_psl_slice_error(struct cxl_context *ctx, u64 dsisr, | |
20 | u64 errstat) | |
21 | { | |
22 | pr_devel("in %s\n", __func__); | |
23 | dev_crit(&ctx->afu->dev, "PSL ERROR STATUS: 0x%.16llx\n", errstat); | |
24 | ||
25 | return cxl_ops->ack_irq(ctx, 0, errstat); | |
26 | } | |
27 | ||
28 | static ssize_t guest_collect_vpd(struct cxl *adapter, struct cxl_afu *afu, | |
29 | void *buf, size_t len) | |
30 | { | |
31 | unsigned int entries, mod; | |
32 | unsigned long **vpd_buf = NULL; | |
33 | struct sg_list *le; | |
34 | int rc = 0, i, tocopy; | |
35 | u64 out = 0; | |
36 | ||
37 | if (buf == NULL) | |
38 | return -EINVAL; | |
39 | ||
40 | /* number of entries in the list */ | |
41 | entries = len / SG_BUFFER_SIZE; | |
42 | mod = len % SG_BUFFER_SIZE; | |
43 | if (mod) | |
44 | entries++; | |
45 | ||
46 | if (entries > SG_MAX_ENTRIES) { | |
47 | entries = SG_MAX_ENTRIES; | |
48 | len = SG_MAX_ENTRIES * SG_BUFFER_SIZE; | |
49 | mod = 0; | |
50 | } | |
51 | ||
52 | vpd_buf = kzalloc(entries * sizeof(unsigned long *), GFP_KERNEL); | |
53 | if (!vpd_buf) | |
54 | return -ENOMEM; | |
55 | ||
56 | le = (struct sg_list *)get_zeroed_page(GFP_KERNEL); | |
57 | if (!le) { | |
58 | rc = -ENOMEM; | |
59 | goto err1; | |
60 | } | |
61 | ||
62 | for (i = 0; i < entries; i++) { | |
63 | vpd_buf[i] = (unsigned long *)get_zeroed_page(GFP_KERNEL); | |
64 | if (!vpd_buf[i]) { | |
65 | rc = -ENOMEM; | |
66 | goto err2; | |
67 | } | |
68 | le[i].phys_addr = cpu_to_be64(virt_to_phys(vpd_buf[i])); | |
69 | le[i].len = cpu_to_be64(SG_BUFFER_SIZE); | |
70 | if ((i == (entries - 1)) && mod) | |
71 | le[i].len = cpu_to_be64(mod); | |
72 | } | |
73 | ||
74 | if (adapter) | |
75 | rc = cxl_h_collect_vpd_adapter(adapter->guest->handle, | |
76 | virt_to_phys(le), entries, &out); | |
77 | else | |
78 | rc = cxl_h_collect_vpd(afu->guest->handle, 0, | |
79 | virt_to_phys(le), entries, &out); | |
80 | pr_devel("length of available (entries: %i), vpd: %#llx\n", | |
81 | entries, out); | |
82 | ||
83 | if (!rc) { | |
84 | /* | |
85 | * hcall returns in 'out' the size of available VPDs. | |
86 | * It fills the buffer with as much data as possible. | |
87 | */ | |
88 | if (out < len) | |
89 | len = out; | |
90 | rc = len; | |
91 | if (out) { | |
92 | for (i = 0; i < entries; i++) { | |
93 | if (len < SG_BUFFER_SIZE) | |
94 | tocopy = len; | |
95 | else | |
96 | tocopy = SG_BUFFER_SIZE; | |
97 | memcpy(buf, vpd_buf[i], tocopy); | |
98 | buf += tocopy; | |
99 | len -= tocopy; | |
100 | } | |
101 | } | |
102 | } | |
103 | err2: | |
104 | for (i = 0; i < entries; i++) { | |
105 | if (vpd_buf[i]) | |
106 | free_page((unsigned long) vpd_buf[i]); | |
107 | } | |
108 | free_page((unsigned long) le); | |
109 | err1: | |
110 | kfree(vpd_buf); | |
111 | return rc; | |
112 | } | |
113 | ||
114 | static int guest_get_irq_info(struct cxl_context *ctx, struct cxl_irq_info *info) | |
115 | { | |
116 | return cxl_h_collect_int_info(ctx->afu->guest->handle, ctx->process_token, info); | |
117 | } | |
118 | ||
119 | static irqreturn_t guest_psl_irq(int irq, void *data) | |
120 | { | |
121 | struct cxl_context *ctx = data; | |
122 | struct cxl_irq_info irq_info; | |
123 | int rc; | |
124 | ||
125 | pr_devel("%d: received PSL interrupt %i\n", ctx->pe, irq); | |
126 | rc = guest_get_irq_info(ctx, &irq_info); | |
127 | if (rc) { | |
128 | WARN(1, "Unable to get IRQ info: %i\n", rc); | |
129 | return IRQ_HANDLED; | |
130 | } | |
131 | ||
132 | rc = cxl_irq(irq, ctx, &irq_info); | |
133 | return rc; | |
134 | } | |
135 | ||
136 | static irqreturn_t guest_slice_irq_err(int irq, void *data) | |
137 | { | |
138 | struct cxl_afu *afu = data; | |
139 | int rc; | |
140 | u64 serr; | |
141 | ||
142 | WARN(irq, "CXL SLICE ERROR interrupt %i\n", irq); | |
143 | rc = cxl_h_get_fn_error_interrupt(afu->guest->handle, &serr); | |
144 | if (rc) { | |
145 | dev_crit(&afu->dev, "Couldn't read PSL_SERR_An: %d\n", rc); | |
146 | return IRQ_HANDLED; | |
147 | } | |
148 | dev_crit(&afu->dev, "PSL_SERR_An: 0x%.16llx\n", serr); | |
149 | ||
150 | rc = cxl_h_ack_fn_error_interrupt(afu->guest->handle, serr); | |
151 | if (rc) | |
152 | dev_crit(&afu->dev, "Couldn't ack slice error interrupt: %d\n", | |
153 | rc); | |
154 | ||
155 | return IRQ_HANDLED; | |
156 | } | |
157 | ||
158 | ||
159 | static int irq_alloc_range(struct cxl *adapter, int len, int *irq) | |
160 | { | |
161 | int i, n; | |
162 | struct irq_avail *cur; | |
163 | ||
164 | for (i = 0; i < adapter->guest->irq_nranges; i++) { | |
165 | cur = &adapter->guest->irq_avail[i]; | |
166 | n = bitmap_find_next_zero_area(cur->bitmap, cur->range, | |
167 | 0, len, 0); | |
168 | if (n < cur->range) { | |
169 | bitmap_set(cur->bitmap, n, len); | |
170 | *irq = cur->offset + n; | |
171 | pr_devel("guest: allocate IRQs %#x->%#x\n", | |
172 | *irq, *irq + len - 1); | |
173 | ||
174 | return 0; | |
175 | } | |
176 | } | |
177 | return -ENOSPC; | |
178 | } | |
179 | ||
180 | static int irq_free_range(struct cxl *adapter, int irq, int len) | |
181 | { | |
182 | int i, n; | |
183 | struct irq_avail *cur; | |
184 | ||
185 | if (len == 0) | |
186 | return -ENOENT; | |
187 | ||
188 | for (i = 0; i < adapter->guest->irq_nranges; i++) { | |
189 | cur = &adapter->guest->irq_avail[i]; | |
190 | if (irq >= cur->offset && | |
191 | (irq + len) <= (cur->offset + cur->range)) { | |
192 | n = irq - cur->offset; | |
193 | bitmap_clear(cur->bitmap, n, len); | |
194 | pr_devel("guest: release IRQs %#x->%#x\n", | |
195 | irq, irq + len - 1); | |
196 | return 0; | |
197 | } | |
198 | } | |
199 | return -ENOENT; | |
200 | } | |
201 | ||
202 | static int guest_reset(struct cxl *adapter) | |
203 | { | |
204 | int rc; | |
205 | ||
206 | pr_devel("Adapter reset request\n"); | |
207 | rc = cxl_h_reset_adapter(adapter->guest->handle); | |
208 | return rc; | |
209 | } | |
210 | ||
211 | static int guest_alloc_one_irq(struct cxl *adapter) | |
212 | { | |
213 | int irq; | |
214 | ||
215 | spin_lock(&adapter->guest->irq_alloc_lock); | |
216 | if (irq_alloc_range(adapter, 1, &irq)) | |
217 | irq = -ENOSPC; | |
218 | spin_unlock(&adapter->guest->irq_alloc_lock); | |
219 | return irq; | |
220 | } | |
221 | ||
222 | static void guest_release_one_irq(struct cxl *adapter, int irq) | |
223 | { | |
224 | spin_lock(&adapter->guest->irq_alloc_lock); | |
225 | irq_free_range(adapter, irq, 1); | |
226 | spin_unlock(&adapter->guest->irq_alloc_lock); | |
227 | } | |
228 | ||
229 | static int guest_alloc_irq_ranges(struct cxl_irq_ranges *irqs, | |
230 | struct cxl *adapter, unsigned int num) | |
231 | { | |
232 | int i, try, irq; | |
233 | ||
234 | memset(irqs, 0, sizeof(struct cxl_irq_ranges)); | |
235 | ||
236 | spin_lock(&adapter->guest->irq_alloc_lock); | |
237 | for (i = 0; i < CXL_IRQ_RANGES && num; i++) { | |
238 | try = num; | |
239 | while (try) { | |
240 | if (irq_alloc_range(adapter, try, &irq) == 0) | |
241 | break; | |
242 | try /= 2; | |
243 | } | |
244 | if (!try) | |
245 | goto error; | |
246 | irqs->offset[i] = irq; | |
247 | irqs->range[i] = try; | |
248 | num -= try; | |
249 | } | |
250 | if (num) | |
251 | goto error; | |
252 | spin_unlock(&adapter->guest->irq_alloc_lock); | |
253 | return 0; | |
254 | ||
255 | error: | |
256 | for (i = 0; i < CXL_IRQ_RANGES; i++) | |
257 | irq_free_range(adapter, irqs->offset[i], irqs->range[i]); | |
258 | spin_unlock(&adapter->guest->irq_alloc_lock); | |
259 | return -ENOSPC; | |
260 | } | |
261 | ||
262 | static void guest_release_irq_ranges(struct cxl_irq_ranges *irqs, | |
263 | struct cxl *adapter) | |
264 | { | |
265 | int i; | |
266 | ||
267 | spin_lock(&adapter->guest->irq_alloc_lock); | |
268 | for (i = 0; i < CXL_IRQ_RANGES; i++) | |
269 | irq_free_range(adapter, irqs->offset[i], irqs->range[i]); | |
270 | spin_unlock(&adapter->guest->irq_alloc_lock); | |
271 | } | |
272 | ||
273 | static int guest_register_serr_irq(struct cxl_afu *afu) | |
274 | { | |
275 | afu->err_irq_name = kasprintf(GFP_KERNEL, "cxl-%s-err", | |
276 | dev_name(&afu->dev)); | |
277 | if (!afu->err_irq_name) | |
278 | return -ENOMEM; | |
279 | ||
280 | if (!(afu->serr_virq = cxl_map_irq(afu->adapter, afu->serr_hwirq, | |
281 | guest_slice_irq_err, afu, afu->err_irq_name))) { | |
282 | kfree(afu->err_irq_name); | |
283 | afu->err_irq_name = NULL; | |
284 | return -ENOMEM; | |
285 | } | |
286 | ||
287 | return 0; | |
288 | } | |
289 | ||
290 | static void guest_release_serr_irq(struct cxl_afu *afu) | |
291 | { | |
292 | cxl_unmap_irq(afu->serr_virq, afu); | |
293 | cxl_ops->release_one_irq(afu->adapter, afu->serr_hwirq); | |
294 | kfree(afu->err_irq_name); | |
295 | } | |
296 | ||
297 | static int guest_ack_irq(struct cxl_context *ctx, u64 tfc, u64 psl_reset_mask) | |
298 | { | |
299 | return cxl_h_control_faults(ctx->afu->guest->handle, ctx->process_token, | |
300 | tfc >> 32, (psl_reset_mask != 0)); | |
301 | } | |
302 | ||
303 | static void disable_afu_irqs(struct cxl_context *ctx) | |
304 | { | |
305 | irq_hw_number_t hwirq; | |
306 | unsigned int virq; | |
307 | int r, i; | |
308 | ||
309 | pr_devel("Disabling AFU(%d) interrupts\n", ctx->afu->slice); | |
310 | for (r = 0; r < CXL_IRQ_RANGES; r++) { | |
311 | hwirq = ctx->irqs.offset[r]; | |
312 | for (i = 0; i < ctx->irqs.range[r]; hwirq++, i++) { | |
313 | virq = irq_find_mapping(NULL, hwirq); | |
314 | disable_irq(virq); | |
315 | } | |
316 | } | |
317 | } | |
318 | ||
319 | static void enable_afu_irqs(struct cxl_context *ctx) | |
320 | { | |
321 | irq_hw_number_t hwirq; | |
322 | unsigned int virq; | |
323 | int r, i; | |
324 | ||
325 | pr_devel("Enabling AFU(%d) interrupts\n", ctx->afu->slice); | |
326 | for (r = 0; r < CXL_IRQ_RANGES; r++) { | |
327 | hwirq = ctx->irqs.offset[r]; | |
328 | for (i = 0; i < ctx->irqs.range[r]; hwirq++, i++) { | |
329 | virq = irq_find_mapping(NULL, hwirq); | |
330 | enable_irq(virq); | |
331 | } | |
332 | } | |
333 | } | |
334 | ||
335 | static int _guest_afu_cr_readXX(int sz, struct cxl_afu *afu, int cr_idx, | |
336 | u64 offset, u64 *val) | |
337 | { | |
338 | unsigned long cr; | |
339 | char c; | |
340 | int rc = 0; | |
341 | ||
342 | if (afu->crs_len < sz) | |
343 | return -ENOENT; | |
344 | ||
345 | if (unlikely(offset >= afu->crs_len)) | |
346 | return -ERANGE; | |
347 | ||
348 | cr = get_zeroed_page(GFP_KERNEL); | |
349 | if (!cr) | |
350 | return -ENOMEM; | |
351 | ||
352 | rc = cxl_h_get_config(afu->guest->handle, cr_idx, offset, | |
353 | virt_to_phys((void *)cr), sz); | |
354 | if (rc) | |
355 | goto err; | |
356 | ||
357 | switch (sz) { | |
358 | case 1: | |
359 | c = *((char *) cr); | |
360 | *val = c; | |
361 | break; | |
362 | case 2: | |
363 | *val = in_le16((u16 *)cr); | |
364 | break; | |
365 | case 4: | |
366 | *val = in_le32((unsigned *)cr); | |
367 | break; | |
368 | case 8: | |
369 | *val = in_le64((u64 *)cr); | |
370 | break; | |
371 | default: | |
372 | WARN_ON(1); | |
373 | } | |
374 | err: | |
375 | free_page(cr); | |
376 | return rc; | |
377 | } | |
378 | ||
379 | static int guest_afu_cr_read32(struct cxl_afu *afu, int cr_idx, u64 offset, | |
380 | u32 *out) | |
381 | { | |
382 | int rc; | |
383 | u64 val; | |
384 | ||
385 | rc = _guest_afu_cr_readXX(4, afu, cr_idx, offset, &val); | |
386 | if (!rc) | |
387 | *out = (u32) val; | |
388 | return rc; | |
389 | } | |
390 | ||
391 | static int guest_afu_cr_read16(struct cxl_afu *afu, int cr_idx, u64 offset, | |
392 | u16 *out) | |
393 | { | |
394 | int rc; | |
395 | u64 val; | |
396 | ||
397 | rc = _guest_afu_cr_readXX(2, afu, cr_idx, offset, &val); | |
398 | if (!rc) | |
399 | *out = (u16) val; | |
400 | return rc; | |
401 | } | |
402 | ||
403 | static int guest_afu_cr_read8(struct cxl_afu *afu, int cr_idx, u64 offset, | |
404 | u8 *out) | |
405 | { | |
406 | int rc; | |
407 | u64 val; | |
408 | ||
409 | rc = _guest_afu_cr_readXX(1, afu, cr_idx, offset, &val); | |
410 | if (!rc) | |
411 | *out = (u8) val; | |
412 | return rc; | |
413 | } | |
414 | ||
415 | static int guest_afu_cr_read64(struct cxl_afu *afu, int cr_idx, u64 offset, | |
416 | u64 *out) | |
417 | { | |
418 | return _guest_afu_cr_readXX(8, afu, cr_idx, offset, out); | |
419 | } | |
420 | ||
d601ea91 FB |
421 | static int guest_afu_cr_write32(struct cxl_afu *afu, int cr, u64 off, u32 in) |
422 | { | |
423 | /* config record is not writable from guest */ | |
424 | return -EPERM; | |
425 | } | |
426 | ||
427 | static int guest_afu_cr_write16(struct cxl_afu *afu, int cr, u64 off, u16 in) | |
428 | { | |
429 | /* config record is not writable from guest */ | |
430 | return -EPERM; | |
431 | } | |
432 | ||
433 | static int guest_afu_cr_write8(struct cxl_afu *afu, int cr, u64 off, u8 in) | |
434 | { | |
435 | /* config record is not writable from guest */ | |
436 | return -EPERM; | |
437 | } | |
438 | ||
14baf4d9 CL |
439 | static int attach_afu_directed(struct cxl_context *ctx, u64 wed, u64 amr) |
440 | { | |
441 | struct cxl_process_element_hcall *elem; | |
442 | struct cxl *adapter = ctx->afu->adapter; | |
443 | const struct cred *cred; | |
444 | u32 pid, idx; | |
445 | int rc, r, i; | |
446 | u64 mmio_addr, mmio_size; | |
447 | __be64 flags = 0; | |
448 | ||
449 | /* Must be 8 byte aligned and cannot cross a 4096 byte boundary */ | |
450 | if (!(elem = (struct cxl_process_element_hcall *) | |
451 | get_zeroed_page(GFP_KERNEL))) | |
452 | return -ENOMEM; | |
453 | ||
454 | elem->version = cpu_to_be64(CXL_PROCESS_ELEMENT_VERSION); | |
455 | if (ctx->kernel) { | |
456 | pid = 0; | |
457 | flags |= CXL_PE_TRANSLATION_ENABLED; | |
458 | flags |= CXL_PE_PRIVILEGED_PROCESS; | |
459 | if (mfmsr() & MSR_SF) | |
460 | flags |= CXL_PE_64_BIT; | |
461 | } else { | |
462 | pid = current->pid; | |
463 | flags |= CXL_PE_PROBLEM_STATE; | |
464 | flags |= CXL_PE_TRANSLATION_ENABLED; | |
465 | if (!test_tsk_thread_flag(current, TIF_32BIT)) | |
466 | flags |= CXL_PE_64_BIT; | |
467 | cred = get_current_cred(); | |
468 | if (uid_eq(cred->euid, GLOBAL_ROOT_UID)) | |
469 | flags |= CXL_PE_PRIVILEGED_PROCESS; | |
470 | put_cred(cred); | |
471 | } | |
472 | elem->flags = cpu_to_be64(flags); | |
473 | elem->common.tid = cpu_to_be32(0); /* Unused */ | |
474 | elem->common.pid = cpu_to_be32(pid); | |
475 | elem->common.csrp = cpu_to_be64(0); /* disable */ | |
476 | elem->common.aurp0 = cpu_to_be64(0); /* disable */ | |
477 | elem->common.aurp1 = cpu_to_be64(0); /* disable */ | |
478 | ||
479 | cxl_prefault(ctx, wed); | |
480 | ||
481 | elem->common.sstp0 = cpu_to_be64(ctx->sstp0); | |
482 | elem->common.sstp1 = cpu_to_be64(ctx->sstp1); | |
483 | for (r = 0; r < CXL_IRQ_RANGES; r++) { | |
484 | for (i = 0; i < ctx->irqs.range[r]; i++) { | |
485 | if (r == 0 && i == 0) { | |
486 | elem->pslVirtualIsn = cpu_to_be32(ctx->irqs.offset[0]); | |
487 | } else { | |
488 | idx = ctx->irqs.offset[r] + i - adapter->guest->irq_base_offset; | |
489 | elem->applicationVirtualIsnBitmap[idx / 8] |= 0x80 >> (idx % 8); | |
490 | } | |
491 | } | |
492 | } | |
493 | elem->common.amr = cpu_to_be64(amr); | |
494 | elem->common.wed = cpu_to_be64(wed); | |
495 | ||
496 | disable_afu_irqs(ctx); | |
497 | ||
498 | rc = cxl_h_attach_process(ctx->afu->guest->handle, elem, | |
499 | &ctx->process_token, &mmio_addr, &mmio_size); | |
500 | if (rc == H_SUCCESS) { | |
501 | if (ctx->master || !ctx->afu->pp_psa) { | |
502 | ctx->psn_phys = ctx->afu->psn_phys; | |
503 | ctx->psn_size = ctx->afu->adapter->ps_size; | |
504 | } else { | |
505 | ctx->psn_phys = mmio_addr; | |
506 | ctx->psn_size = mmio_size; | |
507 | } | |
508 | if (ctx->afu->pp_psa && mmio_size && | |
509 | ctx->afu->pp_size == 0) { | |
510 | /* | |
511 | * There's no property in the device tree to read the | |
512 | * pp_size. We only find out at the 1st attach. | |
513 | * Compared to bare-metal, it is too late and we | |
514 | * should really lock here. However, on powerVM, | |
515 | * pp_size is really only used to display in /sys. | |
516 | * Being discussed with pHyp for their next release. | |
517 | */ | |
518 | ctx->afu->pp_size = mmio_size; | |
519 | } | |
520 | /* from PAPR: process element is bytes 4-7 of process token */ | |
521 | ctx->external_pe = ctx->process_token & 0xFFFFFFFF; | |
522 | pr_devel("CXL pe=%i is known as %i for pHyp, mmio_size=%#llx", | |
523 | ctx->pe, ctx->external_pe, ctx->psn_size); | |
524 | ctx->pe_inserted = true; | |
525 | enable_afu_irqs(ctx); | |
526 | } | |
527 | ||
528 | free_page((u64)elem); | |
529 | return rc; | |
530 | } | |
531 | ||
532 | static int guest_attach_process(struct cxl_context *ctx, bool kernel, u64 wed, u64 amr) | |
533 | { | |
534 | pr_devel("in %s\n", __func__); | |
535 | ||
536 | ctx->kernel = kernel; | |
537 | if (ctx->afu->current_mode == CXL_MODE_DIRECTED) | |
538 | return attach_afu_directed(ctx, wed, amr); | |
539 | ||
540 | /* dedicated mode not supported on FW840 */ | |
541 | ||
542 | return -EINVAL; | |
543 | } | |
544 | ||
545 | static int detach_afu_directed(struct cxl_context *ctx) | |
546 | { | |
547 | if (!ctx->pe_inserted) | |
548 | return 0; | |
549 | if (cxl_h_detach_process(ctx->afu->guest->handle, ctx->process_token)) | |
550 | return -1; | |
551 | return 0; | |
552 | } | |
553 | ||
554 | static int guest_detach_process(struct cxl_context *ctx) | |
555 | { | |
556 | pr_devel("in %s\n", __func__); | |
557 | trace_cxl_detach(ctx); | |
558 | ||
559 | if (!cxl_ops->link_ok(ctx->afu->adapter)) | |
560 | return -EIO; | |
561 | ||
562 | if (ctx->afu->current_mode == CXL_MODE_DIRECTED) | |
563 | return detach_afu_directed(ctx); | |
564 | ||
565 | return -EINVAL; | |
566 | } | |
567 | ||
568 | static void guest_release_afu(struct device *dev) | |
569 | { | |
570 | struct cxl_afu *afu = to_cxl_afu(dev); | |
571 | ||
572 | pr_devel("%s\n", __func__); | |
573 | ||
574 | idr_destroy(&afu->contexts_idr); | |
575 | ||
576 | kfree(afu->guest); | |
577 | kfree(afu); | |
578 | } | |
579 | ||
580 | ssize_t cxl_guest_read_afu_vpd(struct cxl_afu *afu, void *buf, size_t len) | |
581 | { | |
582 | return guest_collect_vpd(NULL, afu, buf, len); | |
583 | } | |
584 | ||
585 | #define ERR_BUFF_MAX_COPY_SIZE PAGE_SIZE | |
586 | static ssize_t guest_afu_read_err_buffer(struct cxl_afu *afu, char *buf, | |
587 | loff_t off, size_t count) | |
588 | { | |
589 | void *tbuf = NULL; | |
590 | int rc = 0; | |
591 | ||
592 | tbuf = (void *) get_zeroed_page(GFP_KERNEL); | |
593 | if (!tbuf) | |
594 | return -ENOMEM; | |
595 | ||
596 | rc = cxl_h_get_afu_err(afu->guest->handle, | |
597 | off & 0x7, | |
598 | virt_to_phys(tbuf), | |
599 | count); | |
600 | if (rc) | |
601 | goto err; | |
602 | ||
603 | if (count > ERR_BUFF_MAX_COPY_SIZE) | |
604 | count = ERR_BUFF_MAX_COPY_SIZE - (off & 0x7); | |
605 | memcpy(buf, tbuf, count); | |
606 | err: | |
607 | free_page((u64)tbuf); | |
608 | ||
609 | return rc; | |
610 | } | |
611 | ||
612 | static int guest_afu_check_and_enable(struct cxl_afu *afu) | |
613 | { | |
614 | return 0; | |
615 | } | |
616 | ||
4752876c CL |
617 | static bool guest_support_attributes(const char *attr_name, |
618 | enum cxl_attrs type) | |
619 | { | |
620 | switch (type) { | |
621 | case CXL_ADAPTER_ATTRS: | |
622 | if ((strcmp(attr_name, "base_image") == 0) || | |
623 | (strcmp(attr_name, "load_image_on_perst") == 0) || | |
624 | (strcmp(attr_name, "perst_reloads_same_image") == 0) || | |
625 | (strcmp(attr_name, "image_loaded") == 0)) | |
626 | return false; | |
627 | break; | |
628 | case CXL_AFU_MASTER_ATTRS: | |
629 | if ((strcmp(attr_name, "pp_mmio_off") == 0)) | |
630 | return false; | |
631 | break; | |
632 | case CXL_AFU_ATTRS: | |
633 | break; | |
634 | default: | |
635 | break; | |
636 | } | |
637 | ||
638 | return true; | |
639 | } | |
640 | ||
14baf4d9 CL |
641 | static int activate_afu_directed(struct cxl_afu *afu) |
642 | { | |
643 | int rc; | |
644 | ||
645 | dev_info(&afu->dev, "Activating AFU(%d) directed mode\n", afu->slice); | |
646 | ||
647 | afu->current_mode = CXL_MODE_DIRECTED; | |
648 | ||
649 | afu->num_procs = afu->max_procs_virtualised; | |
650 | ||
651 | if ((rc = cxl_chardev_m_afu_add(afu))) | |
652 | return rc; | |
653 | ||
654 | if ((rc = cxl_sysfs_afu_m_add(afu))) | |
655 | goto err; | |
656 | ||
657 | if ((rc = cxl_chardev_s_afu_add(afu))) | |
658 | goto err1; | |
659 | ||
660 | return 0; | |
661 | err1: | |
662 | cxl_sysfs_afu_m_remove(afu); | |
663 | err: | |
664 | cxl_chardev_afu_remove(afu); | |
665 | return rc; | |
666 | } | |
667 | ||
668 | static int guest_afu_activate_mode(struct cxl_afu *afu, int mode) | |
669 | { | |
670 | if (!mode) | |
671 | return 0; | |
672 | if (!(mode & afu->modes_supported)) | |
673 | return -EINVAL; | |
674 | ||
675 | if (mode == CXL_MODE_DIRECTED) | |
676 | return activate_afu_directed(afu); | |
677 | ||
678 | if (mode == CXL_MODE_DEDICATED) | |
679 | dev_err(&afu->dev, "Dedicated mode not supported\n"); | |
680 | ||
681 | return -EINVAL; | |
682 | } | |
683 | ||
684 | static int deactivate_afu_directed(struct cxl_afu *afu) | |
685 | { | |
686 | dev_info(&afu->dev, "Deactivating AFU(%d) directed mode\n", afu->slice); | |
687 | ||
688 | afu->current_mode = 0; | |
689 | afu->num_procs = 0; | |
690 | ||
691 | cxl_sysfs_afu_m_remove(afu); | |
692 | cxl_chardev_afu_remove(afu); | |
693 | ||
694 | cxl_ops->afu_reset(afu); | |
695 | ||
696 | return 0; | |
697 | } | |
698 | ||
699 | static int guest_afu_deactivate_mode(struct cxl_afu *afu, int mode) | |
700 | { | |
701 | if (!mode) | |
702 | return 0; | |
703 | if (!(mode & afu->modes_supported)) | |
704 | return -EINVAL; | |
705 | ||
706 | if (mode == CXL_MODE_DIRECTED) | |
707 | return deactivate_afu_directed(afu); | |
708 | return 0; | |
709 | } | |
710 | ||
711 | static int guest_afu_reset(struct cxl_afu *afu) | |
712 | { | |
713 | pr_devel("AFU(%d) reset request\n", afu->slice); | |
714 | return cxl_h_reset_afu(afu->guest->handle); | |
715 | } | |
716 | ||
717 | static int guest_map_slice_regs(struct cxl_afu *afu) | |
718 | { | |
719 | if (!(afu->p2n_mmio = ioremap(afu->guest->p2n_phys, afu->guest->p2n_size))) { | |
720 | dev_err(&afu->dev, "Error mapping AFU(%d) MMIO regions\n", | |
721 | afu->slice); | |
722 | return -ENOMEM; | |
723 | } | |
724 | return 0; | |
725 | } | |
726 | ||
727 | static void guest_unmap_slice_regs(struct cxl_afu *afu) | |
728 | { | |
729 | if (afu->p2n_mmio) | |
730 | iounmap(afu->p2n_mmio); | |
731 | } | |
732 | ||
733 | static bool guest_link_ok(struct cxl *cxl) | |
734 | { | |
735 | return true; | |
736 | } | |
737 | ||
738 | static int afu_properties_look_ok(struct cxl_afu *afu) | |
739 | { | |
740 | if (afu->pp_irqs < 0) { | |
741 | dev_err(&afu->dev, "Unexpected per-process minimum interrupt value\n"); | |
742 | return -EINVAL; | |
743 | } | |
744 | ||
745 | if (afu->max_procs_virtualised < 1) { | |
746 | dev_err(&afu->dev, "Unexpected max number of processes virtualised value\n"); | |
747 | return -EINVAL; | |
748 | } | |
749 | ||
750 | if (afu->crs_len < 0) { | |
751 | dev_err(&afu->dev, "Unexpected configuration record size value\n"); | |
752 | return -EINVAL; | |
753 | } | |
754 | ||
755 | return 0; | |
756 | } | |
757 | ||
758 | int cxl_guest_init_afu(struct cxl *adapter, int slice, struct device_node *afu_np) | |
759 | { | |
760 | struct cxl_afu *afu; | |
761 | bool free = true; | |
762 | int rc; | |
763 | ||
764 | pr_devel("in %s - AFU(%d)\n", __func__, slice); | |
765 | if (!(afu = cxl_alloc_afu(adapter, slice))) | |
766 | return -ENOMEM; | |
767 | ||
768 | if (!(afu->guest = kzalloc(sizeof(struct cxl_afu_guest), GFP_KERNEL))) { | |
769 | kfree(afu); | |
770 | return -ENOMEM; | |
771 | } | |
772 | ||
773 | if ((rc = dev_set_name(&afu->dev, "afu%i.%i", | |
774 | adapter->adapter_num, | |
775 | slice))) | |
776 | goto err1; | |
777 | ||
778 | adapter->slices++; | |
779 | ||
780 | if ((rc = cxl_of_read_afu_handle(afu, afu_np))) | |
781 | goto err1; | |
782 | ||
783 | if ((rc = cxl_ops->afu_reset(afu))) | |
784 | goto err1; | |
785 | ||
786 | if ((rc = cxl_of_read_afu_properties(afu, afu_np))) | |
787 | goto err1; | |
788 | ||
789 | if ((rc = afu_properties_look_ok(afu))) | |
790 | goto err1; | |
791 | ||
792 | if ((rc = guest_map_slice_regs(afu))) | |
793 | goto err1; | |
794 | ||
795 | if ((rc = guest_register_serr_irq(afu))) | |
796 | goto err2; | |
797 | ||
798 | /* | |
799 | * After we call this function we must not free the afu directly, even | |
800 | * if it returns an error! | |
801 | */ | |
802 | if ((rc = cxl_register_afu(afu))) | |
803 | goto err_put1; | |
804 | ||
805 | if ((rc = cxl_sysfs_afu_add(afu))) | |
806 | goto err_put1; | |
807 | ||
808 | /* | |
809 | * pHyp doesn't expose the programming models supported by the | |
810 | * AFU. pHyp currently only supports directed mode. If it adds | |
811 | * dedicated mode later, this version of cxl has no way to | |
812 | * detect it. So we'll initialize the driver, but the first | |
813 | * attach will fail. | |
814 | * Being discussed with pHyp to do better (likely new property) | |
815 | */ | |
816 | if (afu->max_procs_virtualised == 1) | |
817 | afu->modes_supported = CXL_MODE_DEDICATED; | |
818 | else | |
819 | afu->modes_supported = CXL_MODE_DIRECTED; | |
820 | ||
821 | if ((rc = cxl_afu_select_best_mode(afu))) | |
822 | goto err_put2; | |
823 | ||
824 | adapter->afu[afu->slice] = afu; | |
825 | ||
826 | afu->enabled = true; | |
827 | ||
d601ea91 FB |
828 | if ((rc = cxl_pci_vphb_add(afu))) |
829 | dev_info(&afu->dev, "Can't register vPHB\n"); | |
830 | ||
14baf4d9 CL |
831 | return 0; |
832 | ||
833 | err_put2: | |
834 | cxl_sysfs_afu_remove(afu); | |
835 | err_put1: | |
836 | device_unregister(&afu->dev); | |
837 | free = false; | |
838 | guest_release_serr_irq(afu); | |
839 | err2: | |
840 | guest_unmap_slice_regs(afu); | |
841 | err1: | |
842 | if (free) { | |
843 | kfree(afu->guest); | |
844 | kfree(afu); | |
845 | } | |
846 | return rc; | |
847 | } | |
848 | ||
849 | void cxl_guest_remove_afu(struct cxl_afu *afu) | |
850 | { | |
851 | pr_devel("in %s - AFU(%d)\n", __func__, afu->slice); | |
852 | ||
853 | if (!afu) | |
854 | return; | |
855 | ||
d601ea91 | 856 | cxl_pci_vphb_remove(afu); |
14baf4d9 CL |
857 | cxl_sysfs_afu_remove(afu); |
858 | ||
859 | spin_lock(&afu->adapter->afu_list_lock); | |
860 | afu->adapter->afu[afu->slice] = NULL; | |
861 | spin_unlock(&afu->adapter->afu_list_lock); | |
862 | ||
863 | cxl_context_detach_all(afu); | |
864 | cxl_ops->afu_deactivate_mode(afu, afu->current_mode); | |
865 | guest_release_serr_irq(afu); | |
866 | guest_unmap_slice_regs(afu); | |
867 | ||
868 | device_unregister(&afu->dev); | |
869 | } | |
870 | ||
871 | static void free_adapter(struct cxl *adapter) | |
872 | { | |
873 | struct irq_avail *cur; | |
874 | int i; | |
875 | ||
876 | if (adapter->guest->irq_avail) { | |
877 | for (i = 0; i < adapter->guest->irq_nranges; i++) { | |
878 | cur = &adapter->guest->irq_avail[i]; | |
879 | kfree(cur->bitmap); | |
880 | } | |
881 | kfree(adapter->guest->irq_avail); | |
882 | } | |
883 | kfree(adapter->guest->status); | |
884 | cxl_remove_adapter_nr(adapter); | |
885 | kfree(adapter->guest); | |
886 | kfree(adapter); | |
887 | } | |
888 | ||
889 | static int properties_look_ok(struct cxl *adapter) | |
890 | { | |
891 | /* The absence of this property means that the operational | |
892 | * status is unknown or okay | |
893 | */ | |
894 | if (strlen(adapter->guest->status) && | |
895 | strcmp(adapter->guest->status, "okay")) { | |
896 | pr_err("ABORTING:Bad operational status of the device\n"); | |
897 | return -EINVAL; | |
898 | } | |
899 | ||
900 | return 0; | |
901 | } | |
902 | ||
903 | ssize_t cxl_guest_read_adapter_vpd(struct cxl *adapter, void *buf, size_t len) | |
904 | { | |
905 | return guest_collect_vpd(adapter, NULL, buf, len); | |
906 | } | |
907 | ||
908 | void cxl_guest_remove_adapter(struct cxl *adapter) | |
909 | { | |
910 | pr_devel("in %s\n", __func__); | |
911 | ||
912 | cxl_sysfs_adapter_remove(adapter); | |
913 | ||
594ff7d0 | 914 | cxl_guest_remove_chardev(adapter); |
14baf4d9 CL |
915 | device_unregister(&adapter->dev); |
916 | } | |
917 | ||
918 | static void release_adapter(struct device *dev) | |
919 | { | |
920 | free_adapter(to_cxl_adapter(dev)); | |
921 | } | |
922 | ||
923 | struct cxl *cxl_guest_init_adapter(struct device_node *np, struct platform_device *pdev) | |
924 | { | |
925 | struct cxl *adapter; | |
926 | bool free = true; | |
927 | int rc; | |
928 | ||
929 | if (!(adapter = cxl_alloc_adapter())) | |
930 | return ERR_PTR(-ENOMEM); | |
931 | ||
932 | if (!(adapter->guest = kzalloc(sizeof(struct cxl_guest), GFP_KERNEL))) { | |
933 | free_adapter(adapter); | |
934 | return ERR_PTR(-ENOMEM); | |
935 | } | |
936 | ||
937 | adapter->slices = 0; | |
938 | adapter->guest->pdev = pdev; | |
939 | adapter->dev.parent = &pdev->dev; | |
940 | adapter->dev.release = release_adapter; | |
941 | dev_set_drvdata(&pdev->dev, adapter); | |
942 | ||
943 | if ((rc = cxl_of_read_adapter_handle(adapter, np))) | |
944 | goto err1; | |
945 | ||
946 | if ((rc = cxl_of_read_adapter_properties(adapter, np))) | |
947 | goto err1; | |
948 | ||
949 | if ((rc = properties_look_ok(adapter))) | |
950 | goto err1; | |
951 | ||
594ff7d0 CL |
952 | if ((rc = cxl_guest_add_chardev(adapter))) |
953 | goto err1; | |
954 | ||
14baf4d9 CL |
955 | /* |
956 | * After we call this function we must not free the adapter directly, | |
957 | * even if it returns an error! | |
958 | */ | |
959 | if ((rc = cxl_register_adapter(adapter))) | |
960 | goto err_put1; | |
961 | ||
962 | if ((rc = cxl_sysfs_adapter_add(adapter))) | |
963 | goto err_put1; | |
964 | ||
965 | return adapter; | |
966 | ||
967 | err_put1: | |
968 | device_unregister(&adapter->dev); | |
969 | free = false; | |
594ff7d0 | 970 | cxl_guest_remove_chardev(adapter); |
14baf4d9 CL |
971 | err1: |
972 | if (free) | |
973 | free_adapter(adapter); | |
974 | return ERR_PTR(rc); | |
975 | } | |
976 | ||
594ff7d0 CL |
977 | void cxl_guest_reload_module(struct cxl *adapter) |
978 | { | |
979 | struct platform_device *pdev; | |
980 | ||
981 | pdev = adapter->guest->pdev; | |
982 | cxl_guest_remove_adapter(adapter); | |
983 | ||
984 | cxl_of_probe(pdev); | |
985 | } | |
986 | ||
14baf4d9 CL |
987 | const struct cxl_backend_ops cxl_guest_ops = { |
988 | .module = THIS_MODULE, | |
989 | .adapter_reset = guest_reset, | |
990 | .alloc_one_irq = guest_alloc_one_irq, | |
991 | .release_one_irq = guest_release_one_irq, | |
992 | .alloc_irq_ranges = guest_alloc_irq_ranges, | |
993 | .release_irq_ranges = guest_release_irq_ranges, | |
994 | .setup_irq = NULL, | |
995 | .handle_psl_slice_error = guest_handle_psl_slice_error, | |
996 | .psl_interrupt = guest_psl_irq, | |
997 | .ack_irq = guest_ack_irq, | |
998 | .attach_process = guest_attach_process, | |
999 | .detach_process = guest_detach_process, | |
4752876c | 1000 | .support_attributes = guest_support_attributes, |
14baf4d9 CL |
1001 | .link_ok = guest_link_ok, |
1002 | .release_afu = guest_release_afu, | |
1003 | .afu_read_err_buffer = guest_afu_read_err_buffer, | |
1004 | .afu_check_and_enable = guest_afu_check_and_enable, | |
1005 | .afu_activate_mode = guest_afu_activate_mode, | |
1006 | .afu_deactivate_mode = guest_afu_deactivate_mode, | |
1007 | .afu_reset = guest_afu_reset, | |
1008 | .afu_cr_read8 = guest_afu_cr_read8, | |
1009 | .afu_cr_read16 = guest_afu_cr_read16, | |
1010 | .afu_cr_read32 = guest_afu_cr_read32, | |
1011 | .afu_cr_read64 = guest_afu_cr_read64, | |
d601ea91 FB |
1012 | .afu_cr_write8 = guest_afu_cr_write8, |
1013 | .afu_cr_write16 = guest_afu_cr_write16, | |
1014 | .afu_cr_write32 = guest_afu_cr_write32, | |
1015 | .read_adapter_vpd = cxl_guest_read_adapter_vpd, | |
14baf4d9 | 1016 | }; |