[mirror_ubuntu-hirsute-kernel.git] / drivers / misc / cxl / main.c

/*
 * Copyright 2014 IBM Corp.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

#include <linux/spinlock.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/device.h>
#include <linux/mutex.h>
#include <linux/init.h>
#include <linux/list.h>
#include <linux/mm.h>
#include <linux/of.h>
#include <linux/slab.h>
#include <linux/idr.h>
#include <linux/pci.h>
#include <asm/cputable.h>
#include <misc/cxl-base.h>

#include "cxl.h"
#include "trace.h"

static DEFINE_SPINLOCK(adapter_idr_lock);
static DEFINE_IDR(cxl_adapter_idr);

uint cxl_verbose;
module_param_named(verbose, cxl_verbose, uint, 0600);
MODULE_PARM_DESC(verbose, "Enable verbose dmesg output");

const struct cxl_backend_ops *cxl_ops;

int cxl_afu_slbia(struct cxl_afu *afu)
{
	unsigned long timeout = jiffies + (HZ * CXL_TIMEOUT);

	pr_devel("cxl_afu_slbia issuing SLBIA command\n");
	cxl_p2n_write(afu, CXL_SLBIA_An, CXL_TLB_SLB_IQ_ALL);
	while (cxl_p2n_read(afu, CXL_SLBIA_An) & CXL_TLB_SLB_P) {
		if (time_after_eq(jiffies, timeout)) {
			dev_warn(&afu->dev, "WARNING: CXL AFU SLBIA timed out!\n");
			return -EBUSY;
		}
		/* If the adapter has gone down, we can assume that we
		 * will PERST it and that will invalidate everything.
		 */
		if (!cxl_ops->link_ok(afu->adapter, afu))
			return -EIO;
		cpu_relax();
	}
	return 0;
}

static inline void _cxl_slbia(struct cxl_context *ctx, struct mm_struct *mm)
{
	struct task_struct *task;
	unsigned long flags;
	if (!(task = get_pid_task(ctx->pid, PIDTYPE_PID))) {
		pr_devel("%s unable to get task %i\n",
			 __func__, pid_nr(ctx->pid));
		return;
	}

	if (task->mm != mm)
		goto out_put;

	pr_devel("%s matched mm - card: %i afu: %i pe: %i\n", __func__,
		 ctx->afu->adapter->adapter_num, ctx->afu->slice, ctx->pe);

	spin_lock_irqsave(&ctx->sste_lock, flags);
	trace_cxl_slbia(ctx);
	memset(ctx->sstp, 0, ctx->sst_size);
	spin_unlock_irqrestore(&ctx->sste_lock, flags);
	mb();
	cxl_afu_slbia(ctx->afu);
out_put:
	put_task_struct(task);
}

static inline void cxl_slbia_core(struct mm_struct *mm)
{
	struct cxl *adapter;
	struct cxl_afu *afu;
	struct cxl_context *ctx;
	int card, slice, id;

	pr_devel("%s called\n", __func__);

	spin_lock(&adapter_idr_lock);
	idr_for_each_entry(&cxl_adapter_idr, adapter, card) {
		/* XXX: Make this lookup faster with link from mm to ctx */
		spin_lock(&adapter->afu_list_lock);
		for (slice = 0; slice < adapter->slices; slice++) {
			afu = adapter->afu[slice];
			if (!afu || !afu->enabled)
				continue;
			rcu_read_lock();
			idr_for_each_entry(&afu->contexts_idr, ctx, id)
				_cxl_slbia(ctx, mm);
			rcu_read_unlock();
		}
		spin_unlock(&adapter->afu_list_lock);
	}
	spin_unlock(&adapter_idr_lock);
}

static struct cxl_calls cxl_calls = {
	.cxl_slbia = cxl_slbia_core,
	.cxl_pci_associate_default_context = _cxl_pci_associate_default_context,
	.cxl_pci_disable_device = _cxl_pci_disable_device,
	.cxl_next_msi_hwirq = _cxl_next_msi_hwirq,
	.owner = THIS_MODULE,
};

int cxl_alloc_sst(struct cxl_context *ctx)
{
	unsigned long vsid;
	u64 ea_mask, size, sstp0, sstp1;

	sstp0 = 0;
	sstp1 = 0;

	ctx->sst_size = PAGE_SIZE;
	ctx->sst_lru = 0;
	ctx->sstp = (struct cxl_sste *)get_zeroed_page(GFP_KERNEL);
	if (!ctx->sstp) {
		pr_err("cxl_alloc_sst: Unable to allocate segment table\n");
		return -ENOMEM;
	}
	pr_devel("SSTP allocated at 0x%p\n", ctx->sstp);

	vsid  = get_kernel_vsid((u64)ctx->sstp, mmu_kernel_ssize) << 12;

	sstp0 |= (u64)mmu_kernel_ssize << CXL_SSTP0_An_B_SHIFT;
	sstp0 |= (SLB_VSID_KERNEL | mmu_psize_defs[mmu_linear_psize].sllp) << 50;

	size = (((u64)ctx->sst_size >> 8) - 1) << CXL_SSTP0_An_SegTableSize_SHIFT;
	if (unlikely(size & ~CXL_SSTP0_An_SegTableSize_MASK)) {
		WARN(1, "Impossible segment table size\n");
		return -EINVAL;
	}
	sstp0 |= size;

	if (mmu_kernel_ssize == MMU_SEGSIZE_256M)
		ea_mask = 0xfffff00ULL;
	else
		ea_mask = 0xffffffff00ULL;

	sstp0 |=  vsid >>     (50-14);  /*   Top 14 bits of VSID */
	sstp1 |= (vsid << (64-(50-14))) & ~ea_mask;
	sstp1 |= (u64)ctx->sstp & ea_mask;
	sstp1 |= CXL_SSTP1_An_V;

	pr_devel("Looked up %#llx: slbfee. %#llx (ssize: %x, vsid: %#lx), copied to SSTP0: %#llx, SSTP1: %#llx\n",
			(u64)ctx->sstp, (u64)ctx->sstp & ESID_MASK, mmu_kernel_ssize, vsid, sstp0, sstp1);

	/* Store calculated sstp hardware points for use later */
	ctx->sstp0 = sstp0;
	ctx->sstp1 = sstp1;

	return 0;
}

/* print buffer content as integers when debugging */
void cxl_dump_debug_buffer(void *buf, size_t buf_len)
{
#ifdef DEBUG
	int i, *ptr;

	/*
	 * We want to regroup up to 4 integers per line, which means they
	 * need to be in the same pr_devel() statement
	 */
	ptr = (int *) buf;
	for (i = 0; i * 4 < buf_len; i += 4) {
		if ((i + 3) * 4 < buf_len)
			pr_devel("%.8x %.8x %.8x %.8x\n", ptr[i], ptr[i + 1],
				ptr[i + 2], ptr[i + 3]);
		else if ((i + 2) * 4 < buf_len)
			pr_devel("%.8x %.8x %.8x\n", ptr[i], ptr[i + 1],
				ptr[i + 2]);
		else if ((i + 1) * 4 < buf_len)
			pr_devel("%.8x %.8x\n", ptr[i], ptr[i + 1]);
		else
			pr_devel("%.8x\n", ptr[i]);
	}
#endif /* DEBUG */
}

/* Find a CXL adapter by it's number and increase it's refcount */
struct cxl *get_cxl_adapter(int num)
{
	struct cxl *adapter;

	spin_lock(&adapter_idr_lock);
	if ((adapter = idr_find(&cxl_adapter_idr, num)))
		get_device(&adapter->dev);
	spin_unlock(&adapter_idr_lock);

	return adapter;
}

static int cxl_alloc_adapter_nr(struct cxl *adapter)
{
	int i;

	idr_preload(GFP_KERNEL);
	spin_lock(&adapter_idr_lock);
	i = idr_alloc(&cxl_adapter_idr, adapter, 0, 0, GFP_NOWAIT);
	spin_unlock(&adapter_idr_lock);
	idr_preload_end();
	if (i < 0)
		return i;

	adapter->adapter_num = i;

	return 0;
}

void cxl_remove_adapter_nr(struct cxl *adapter)
{
	idr_remove(&cxl_adapter_idr, adapter->adapter_num);
}

struct cxl *cxl_alloc_adapter(void)
{
	struct cxl *adapter;

	if (!(adapter = kzalloc(sizeof(struct cxl), GFP_KERNEL)))
		return NULL;

	spin_lock_init(&adapter->afu_list_lock);

	if (cxl_alloc_adapter_nr(adapter))
		goto err1;

	if (dev_set_name(&adapter->dev, "card%i", adapter->adapter_num))
		goto err2;

	return adapter;

err2:
	cxl_remove_adapter_nr(adapter);
err1:
	kfree(adapter);
	return NULL;
}

struct cxl_afu *cxl_alloc_afu(struct cxl *adapter, int slice)
{
	struct cxl_afu *afu;

	if (!(afu = kzalloc(sizeof(struct cxl_afu), GFP_KERNEL)))
		return NULL;

	afu->adapter = adapter;
	afu->dev.parent = &adapter->dev;
	afu->dev.release = cxl_ops->release_afu;
	afu->slice = slice;
	idr_init(&afu->contexts_idr);
	mutex_init(&afu->contexts_lock);
	spin_lock_init(&afu->afu_cntl_lock);

	afu->prefault_mode = CXL_PREFAULT_NONE;
	afu->irqs_max = afu->adapter->user_irqs;

	return afu;
}

int cxl_afu_select_best_mode(struct cxl_afu *afu)
{
	if (afu->modes_supported & CXL_MODE_DIRECTED)
		return cxl_ops->afu_activate_mode(afu, CXL_MODE_DIRECTED);

	if (afu->modes_supported & CXL_MODE_DEDICATED)
		return cxl_ops->afu_activate_mode(afu, CXL_MODE_DEDICATED);

	dev_warn(&afu->dev, "No supported programming modes available\n");
	/* We don't fail this so the user can inspect sysfs */
	return 0;
}

static int __init init_cxl(void)
{
	int rc = 0;

	if ((rc = cxl_file_init()))
		return rc;

	cxl_debugfs_init();

	if ((rc = register_cxl_calls(&cxl_calls)))
		goto err;

	if (cpu_has_feature(CPU_FTR_HVMODE)) {
		cxl_ops = &cxl_native_ops;
		rc = pci_register_driver(&cxl_pci_driver);
	}
#ifdef CONFIG_PPC_PSERIES
	else {
		cxl_ops = &cxl_guest_ops;
		rc = platform_driver_register(&cxl_of_driver);
	}
#endif
	if (rc)
		goto err1;

	return 0;
err1:
	unregister_cxl_calls(&cxl_calls);
err:
	cxl_debugfs_exit();
	cxl_file_exit();

	return rc;
}

static void exit_cxl(void)
{
	if (cpu_has_feature(CPU_FTR_HVMODE))
		pci_unregister_driver(&cxl_pci_driver);
#ifdef CONFIG_PPC_PSERIES
	else
		platform_driver_unregister(&cxl_of_driver);
#endif

	cxl_debugfs_exit();
	cxl_file_exit();
	unregister_cxl_calls(&cxl_calls);
	idr_destroy(&cxl_adapter_idr);
}

module_init(init_cxl);
module_exit(exit_cxl);

MODULE_DESCRIPTION("IBM Coherent Accelerator");
MODULE_AUTHOR("Ian Munsie <imunsie@au1.ibm.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
f204e0b8 IM	1	/*
	2	* Copyright 2014 IBM Corp.
	3	*
	4	* This program is free software; you can redistribute it and/or
	5	* modify it under the terms of the GNU General Public License
	6	* as published by the Free Software Foundation; either version
	7	* 2 of the License, or (at your option) any later version.
	8	*/
	9
	10	#include <linux/spinlock.h>
	11	#include <linux/kernel.h>
	12	#include <linux/module.h>
	13	#include <linux/device.h>
	14	#include <linux/mutex.h>
	15	#include <linux/init.h>
	16	#include <linux/list.h>
	17	#include <linux/mm.h>
	18	#include <linux/of.h>
	19	#include <linux/slab.h>
	20	#include <linux/idr.h>
	21	#include <linux/pci.h>
	22	#include <asm/cputable.h>
ec249dd8	23	#include <misc/cxl-base.h>
f204e0b8 IM	24
f204e0b8 IM	25	#include "cxl.h"
9bcf28cd	26	#include "trace.h"
f204e0b8 IM	27
	28	static DEFINE_SPINLOCK(adapter_idr_lock);
	29	static DEFINE_IDR(cxl_adapter_idr);
	30
	31	uint cxl_verbose;
	32	module_param_named(verbose, cxl_verbose, uint, 0600);
	33	MODULE_PARM_DESC(verbose, "Enable verbose dmesg output");
	34
5be587b1 FB	35	const struct cxl_backend_ops *cxl_ops;
5be587b1 FB	36
86331862 CL	37	int cxl_afu_slbia(struct cxl_afu *afu)
	38	{
	39	unsigned long timeout = jiffies + (HZ * CXL_TIMEOUT);
	40
	41	pr_devel("cxl_afu_slbia issuing SLBIA command\n");
	42	cxl_p2n_write(afu, CXL_SLBIA_An, CXL_TLB_SLB_IQ_ALL);
	43	while (cxl_p2n_read(afu, CXL_SLBIA_An) & CXL_TLB_SLB_P) {
	44	if (time_after_eq(jiffies, timeout)) {
	45	dev_warn(&afu->dev, "WARNING: CXL AFU SLBIA timed out!\n");
	46	return -EBUSY;
	47	}
	48	/* If the adapter has gone down, we can assume that we
	49	* will PERST it and that will invalidate everything.
	50	*/
0d400f77	51	if (!cxl_ops->link_ok(afu->adapter, afu))
86331862 CL	52	return -EIO;
	53	cpu_relax();
	54	}
	55	return 0;
	56	}
	57
f204e0b8 IM	58	static inline void _cxl_slbia(struct cxl_context ctx, struct mm_struct mm)
	59	{
	60	struct task_struct *task;
	61	unsigned long flags;
	62	if (!(task = get_pid_task(ctx->pid, PIDTYPE_PID))) {
	63	pr_devel("%s unable to get task %i\n",
	64	__func__, pid_nr(ctx->pid));
	65	return;
	66	}
	67
	68	if (task->mm != mm)
	69	goto out_put;
	70
	71	pr_devel("%s matched mm - card: %i afu: %i pe: %i\n", __func__,
	72	ctx->afu->adapter->adapter_num, ctx->afu->slice, ctx->pe);
	73
	74	spin_lock_irqsave(&ctx->sste_lock, flags);
9bcf28cd	75	trace_cxl_slbia(ctx);
f204e0b8 IM	76	memset(ctx->sstp, 0, ctx->sst_size);
	77	spin_unlock_irqrestore(&ctx->sste_lock, flags);
	78	mb();
	79	cxl_afu_slbia(ctx->afu);
	80	out_put:
	81	put_task_struct(task);
	82	}
	83
	84	static inline void cxl_slbia_core(struct mm_struct *mm)
	85	{
	86	struct cxl *adapter;
	87	struct cxl_afu *afu;
	88	struct cxl_context *ctx;
	89	int card, slice, id;
	90
	91	pr_devel("%s called\n", __func__);
	92
	93	spin_lock(&adapter_idr_lock);
	94	idr_for_each_entry(&cxl_adapter_idr, adapter, card) {
	95	/* XXX: Make this lookup faster with link from mm to ctx */
	96	spin_lock(&adapter->afu_list_lock);
	97	for (slice = 0; slice < adapter->slices; slice++) {
	98	afu = adapter->afu[slice];
2c069a11	99	if (!afu \|\| !afu->enabled)
f204e0b8 IM	100	continue;
	101	rcu_read_lock();
	102	idr_for_each_entry(&afu->contexts_idr, ctx, id)
	103	_cxl_slbia(ctx, mm);
	104	rcu_read_unlock();
	105	}
	106	spin_unlock(&adapter->afu_list_lock);
	107	}
	108	spin_unlock(&adapter_idr_lock);
	109	}
	110
	111	static struct cxl_calls cxl_calls = {
	112	.cxl_slbia = cxl_slbia_core,
a19bd79e IM	113	.cxl_pci_associate_default_context = _cxl_pci_associate_default_context,
a19bd79e IM	114	.cxl_pci_disable_device = _cxl_pci_disable_device,
cbce0917	115	.cxl_next_msi_hwirq = _cxl_next_msi_hwirq,
f204e0b8 IM	116	.owner = THIS_MODULE,
	117	};
	118
	119	int cxl_alloc_sst(struct cxl_context *ctx)
	120	{
	121	unsigned long vsid;
	122	u64 ea_mask, size, sstp0, sstp1;
	123
	124	sstp0 = 0;
	125	sstp1 = 0;
	126
	127	ctx->sst_size = PAGE_SIZE;
	128	ctx->sst_lru = 0;
	129	ctx->sstp = (struct cxl_sste *)get_zeroed_page(GFP_KERNEL);
	130	if (!ctx->sstp) {
	131	pr_err("cxl_alloc_sst: Unable to allocate segment table\n");
	132	return -ENOMEM;
	133	}
	134	pr_devel("SSTP allocated at 0x%p\n", ctx->sstp);
	135
	136	vsid = get_kernel_vsid((u64)ctx->sstp, mmu_kernel_ssize) << 12;
	137
	138	sstp0 \|= (u64)mmu_kernel_ssize << CXL_SSTP0_An_B_SHIFT;
	139	sstp0 \|= (SLB_VSID_KERNEL \| mmu_psize_defs[mmu_linear_psize].sllp) << 50;
	140
	141	size = (((u64)ctx->sst_size >> 8) - 1) << CXL_SSTP0_An_SegTableSize_SHIFT;
	142	if (unlikely(size & ~CXL_SSTP0_An_SegTableSize_MASK)) {
	143	WARN(1, "Impossible segment table size\n");
	144	return -EINVAL;
	145	}
	146	sstp0 \|= size;
	147
	148	if (mmu_kernel_ssize == MMU_SEGSIZE_256M)
	149	ea_mask = 0xfffff00ULL;
	150	else
	151	ea_mask = 0xffffffff00ULL;
	152
	153	sstp0 \|= vsid >> (50-14); /* Top 14 bits of VSID */
	154	sstp1 \|= (vsid << (64-(50-14))) & ~ea_mask;
	155	sstp1 \|= (u64)ctx->sstp & ea_mask;
	156	sstp1 \|= CXL_SSTP1_An_V;
	157
	158	pr_devel("Looked up %#llx: slbfee. %#llx (ssize: %x, vsid: %#lx), copied to SSTP0: %#llx, SSTP1: %#llx\n",
	159	(u64)ctx->sstp, (u64)ctx->sstp & ESID_MASK, mmu_kernel_ssize, vsid, sstp0, sstp1);
	160
	161	/* Store calculated sstp hardware points for use later */
	162	ctx->sstp0 = sstp0;
	163	ctx->sstp1 = sstp1;
	164
	165	return 0;
	166	}
	167
444c4ba4 CL	168	/* print buffer content as integers when debugging */
	169	void cxl_dump_debug_buffer(void *buf, size_t buf_len)
	170	{
	171	#ifdef DEBUG
	172	int i, *ptr;
	173
	174	/*
	175	* We want to regroup up to 4 integers per line, which means they
	176	* need to be in the same pr_devel() statement
	177	*/
	178	ptr = (int *) buf;
	179	for (i = 0; i * 4 < buf_len; i += 4) {
	180	if ((i + 3) * 4 < buf_len)
	181	pr_devel("%.8x %.8x %.8x %.8x\n", ptr[i], ptr[i + 1],
	182	ptr[i + 2], ptr[i + 3]);
	183	else if ((i + 2) * 4 < buf_len)
	184	pr_devel("%.8x %.8x %.8x\n", ptr[i], ptr[i + 1],
	185	ptr[i + 2]);
	186	else if ((i + 1) * 4 < buf_len)
	187	pr_devel("%.8x %.8x\n", ptr[i], ptr[i + 1]);
	188	else
	189	pr_devel("%.8x\n", ptr[i]);
	190	}
	191	#endif /* DEBUG */
	192	}
	193
f204e0b8 IM	194	/* Find a CXL adapter by it's number and increase it's refcount */
	195	struct cxl *get_cxl_adapter(int num)
	196	{
	197	struct cxl *adapter;
	198
	199	spin_lock(&adapter_idr_lock);
	200	if ((adapter = idr_find(&cxl_adapter_idr, num)))
	201	get_device(&adapter->dev);
	202	spin_unlock(&adapter_idr_lock);
	203
	204	return adapter;
	205	}
	206
d56d301b	207	static int cxl_alloc_adapter_nr(struct cxl *adapter)
f204e0b8 IM	208	{
	209	int i;
	210
	211	idr_preload(GFP_KERNEL);
	212	spin_lock(&adapter_idr_lock);
	213	i = idr_alloc(&cxl_adapter_idr, adapter, 0, 0, GFP_NOWAIT);
	214	spin_unlock(&adapter_idr_lock);
	215	idr_preload_end();
	216	if (i < 0)
	217	return i;
	218
	219	adapter->adapter_num = i;
	220
	221	return 0;
	222	}
	223
	224	void cxl_remove_adapter_nr(struct cxl *adapter)
	225	{
	226	idr_remove(&cxl_adapter_idr, adapter->adapter_num);
	227	}
	228
86331862 CL	229	struct cxl *cxl_alloc_adapter(void)
	230	{
	231	struct cxl *adapter;
	232
	233	if (!(adapter = kzalloc(sizeof(struct cxl), GFP_KERNEL)))
	234	return NULL;
	235
	236	spin_lock_init(&adapter->afu_list_lock);
	237
	238	if (cxl_alloc_adapter_nr(adapter))
	239	goto err1;
	240
	241	if (dev_set_name(&adapter->dev, "card%i", adapter->adapter_num))
	242	goto err2;
	243
	244	return adapter;
	245
	246	err2:
	247	cxl_remove_adapter_nr(adapter);
	248	err1:
	249	kfree(adapter);
	250	return NULL;
	251	}
	252
	253	struct cxl_afu cxl_alloc_afu(struct cxl adapter, int slice)
	254	{
	255	struct cxl_afu *afu;
	256
	257	if (!(afu = kzalloc(sizeof(struct cxl_afu), GFP_KERNEL)))
	258	return NULL;
	259
	260	afu->adapter = adapter;
	261	afu->dev.parent = &adapter->dev;
5be587b1	262	afu->dev.release = cxl_ops->release_afu;
86331862 CL	263	afu->slice = slice;
	264	idr_init(&afu->contexts_idr);
	265	mutex_init(&afu->contexts_lock);
	266	spin_lock_init(&afu->afu_cntl_lock);
86331862 CL	267
	268	afu->prefault_mode = CXL_PREFAULT_NONE;
	269	afu->irqs_max = afu->adapter->user_irqs;
	270
	271	return afu;
	272	}
	273
f204e0b8 IM	274	int cxl_afu_select_best_mode(struct cxl_afu *afu)
	275	{
	276	if (afu->modes_supported & CXL_MODE_DIRECTED)
5be587b1	277	return cxl_ops->afu_activate_mode(afu, CXL_MODE_DIRECTED);
f204e0b8 IM	278
f204e0b8 IM	279	if (afu->modes_supported & CXL_MODE_DEDICATED)
5be587b1	280	return cxl_ops->afu_activate_mode(afu, CXL_MODE_DEDICATED);
f204e0b8 IM	281
	282	dev_warn(&afu->dev, "No supported programming modes available\n");
	283	/* We don't fail this so the user can inspect sysfs */
	284	return 0;
	285	}
	286
	287	static int __init init_cxl(void)
	288	{
	289	int rc = 0;
	290
f204e0b8 IM	291	if ((rc = cxl_file_init()))
	292	return rc;
	293
	294	cxl_debugfs_init();
	295
	296	if ((rc = register_cxl_calls(&cxl_calls)))
	297	goto err;
	298
14baf4d9 CL	299	if (cpu_has_feature(CPU_FTR_HVMODE)) {
	300	cxl_ops = &cxl_native_ops;
	301	rc = pci_register_driver(&cxl_pci_driver);
	302	}
	303	#ifdef CONFIG_PPC_PSERIES
	304	else {
	305	cxl_ops = &cxl_guest_ops;
	306	rc = platform_driver_register(&cxl_of_driver);
	307	}
	308	#endif
	309	if (rc)
f204e0b8 IM	310	goto err1;
	311
	312	return 0;
	313	err1:
	314	unregister_cxl_calls(&cxl_calls);
	315	err:
	316	cxl_debugfs_exit();
	317	cxl_file_exit();
	318
	319	return rc;
	320	}
	321
	322	static void exit_cxl(void)
	323	{
14baf4d9 CL	324	if (cpu_has_feature(CPU_FTR_HVMODE))
	325	pci_unregister_driver(&cxl_pci_driver);
	326	#ifdef CONFIG_PPC_PSERIES
	327	else
	328	platform_driver_unregister(&cxl_of_driver);
	329	#endif
f204e0b8 IM	330
	331	cxl_debugfs_exit();
	332	cxl_file_exit();
	333	unregister_cxl_calls(&cxl_calls);
b2a02ac6	334	idr_destroy(&cxl_adapter_idr);
f204e0b8 IM	335	}
	336
	337	module_init(init_cxl);
	338	module_exit(exit_cxl);
	339
	340	MODULE_DESCRIPTION("IBM Coherent Accelerator");
	341	MODULE_AUTHOR("Ian Munsie <imunsie@au1.ibm.com>");
	342	MODULE_LICENSE("GPL");