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Commit | Line | Data |
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4ac0d3fb | 1 | // SPDX-License-Identifier: GPL-2.0+ |
2b7a5056 WS |
2 | /* |
3 | * at24.c - handle most I2C EEPROMs | |
4 | * | |
5 | * Copyright (C) 2005-2007 David Brownell | |
6 | * Copyright (C) 2008 Wolfram Sang, Pengutronix | |
2b7a5056 | 7 | */ |
4ac0d3fb | 8 | |
2b7a5056 WS |
9 | #include <linux/kernel.h> |
10 | #include <linux/init.h> | |
11 | #include <linux/module.h> | |
7f2a2f0d | 12 | #include <linux/of_device.h> |
2b7a5056 WS |
13 | #include <linux/slab.h> |
14 | #include <linux/delay.h> | |
15 | #include <linux/mutex.h> | |
2b7a5056 WS |
16 | #include <linux/mod_devicetable.h> |
17 | #include <linux/log2.h> | |
18 | #include <linux/bitops.h> | |
19 | #include <linux/jiffies.h> | |
dd905a61 | 20 | #include <linux/property.h> |
40d8edc9 | 21 | #include <linux/acpi.h> |
2b7a5056 | 22 | #include <linux/i2c.h> |
57d15550 | 23 | #include <linux/nvmem-provider.h> |
5c015258 | 24 | #include <linux/regmap.h> |
98e82010 | 25 | #include <linux/pm_runtime.h> |
6ce261e8 | 26 | #include <linux/gpio/consumer.h> |
2b7a5056 | 27 | |
4fa882c9 BG |
28 | /* Address pointer is 16 bit. */ |
29 | #define AT24_FLAG_ADDR16 BIT(7) | |
30 | /* sysfs-entry will be read-only. */ | |
31 | #define AT24_FLAG_READONLY BIT(6) | |
32 | /* sysfs-entry will be world-readable. */ | |
33 | #define AT24_FLAG_IRUGO BIT(5) | |
34 | /* Take always 8 addresses (24c00). */ | |
35 | #define AT24_FLAG_TAKE8ADDR BIT(4) | |
36 | /* Factory-programmed serial number. */ | |
37 | #define AT24_FLAG_SERIAL BIT(3) | |
38 | /* Factory-programmed mac address. */ | |
39 | #define AT24_FLAG_MAC BIT(2) | |
40 | /* Does not auto-rollover reads to the next slave address. */ | |
41 | #define AT24_FLAG_NO_RDROL BIT(1) | |
42 | ||
2b7a5056 WS |
43 | /* |
44 | * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable. | |
45 | * Differences between different vendor product lines (like Atmel AT24C or | |
46 | * MicroChip 24LC, etc) won't much matter for typical read/write access. | |
47 | * There are also I2C RAM chips, likewise interchangeable. One example | |
48 | * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes). | |
49 | * | |
50 | * However, misconfiguration can lose data. "Set 16-bit memory address" | |
51 | * to a part with 8-bit addressing will overwrite data. Writing with too | |
52 | * big a page size also loses data. And it's not safe to assume that the | |
53 | * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC | |
54 | * uses 0x51, for just one example. | |
55 | * | |
56 | * Accordingly, explicit board-specific configuration data should be used | |
57 | * in almost all cases. (One partial exception is an SMBus used to access | |
58 | * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.) | |
59 | * | |
60 | * So this driver uses "new style" I2C driver binding, expecting to be | |
61 | * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or | |
62 | * similar kernel-resident tables; or, configuration data coming from | |
63 | * a bootloader. | |
64 | * | |
65 | * Other than binding model, current differences from "eeprom" driver are | |
66 | * that this one handles write access and isn't restricted to 24c02 devices. | |
67 | * It also handles larger devices (32 kbit and up) with two-byte addresses, | |
68 | * which won't work on pure SMBus systems. | |
69 | */ | |
70 | ||
5c015258 HK |
71 | struct at24_client { |
72 | struct i2c_client *client; | |
73 | struct regmap *regmap; | |
74 | }; | |
75 | ||
2b7a5056 | 76 | struct at24_data { |
2b7a5056 WS |
77 | /* |
78 | * Lock protects against activities from other Linux tasks, | |
79 | * but not from changes by other I2C masters. | |
80 | */ | |
81 | struct mutex lock; | |
2b7a5056 | 82 | |
aa4ce228 BG |
83 | unsigned int write_max; |
84 | unsigned int num_addresses; | |
4bb5c13c | 85 | unsigned int offset_adj; |
2b7a5056 | 86 | |
7c280664 BG |
87 | u32 byte_len; |
88 | u16 page_size; | |
89 | u8 flags; | |
90 | ||
57d15550 AL |
91 | struct nvmem_device *nvmem; |
92 | ||
6ce261e8 BG |
93 | struct gpio_desc *wp_gpio; |
94 | ||
2b7a5056 WS |
95 | /* |
96 | * Some chips tie up multiple I2C addresses; dummy devices reserve | |
97 | * them for us, and we'll use them with SMBus calls. | |
98 | */ | |
5c015258 | 99 | struct at24_client client[]; |
2b7a5056 WS |
100 | }; |
101 | ||
102 | /* | |
103 | * This parameter is to help this driver avoid blocking other drivers out | |
104 | * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C | |
105 | * clock, one 256 byte read takes about 1/43 second which is excessive; | |
106 | * but the 1/170 second it takes at 400 kHz may be quite reasonable; and | |
107 | * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible. | |
108 | * | |
109 | * This value is forced to be a power of two so that writes align on pages. | |
110 | */ | |
ec3c2d51 BG |
111 | static unsigned int at24_io_limit = 128; |
112 | module_param_named(io_limit, at24_io_limit, uint, 0); | |
113 | MODULE_PARM_DESC(at24_io_limit, "Maximum bytes per I/O (default 128)"); | |
2b7a5056 WS |
114 | |
115 | /* | |
116 | * Specs often allow 5 msec for a page write, sometimes 20 msec; | |
117 | * it's important to recover from write timeouts. | |
118 | */ | |
ec3c2d51 BG |
119 | static unsigned int at24_write_timeout = 25; |
120 | module_param_named(write_timeout, at24_write_timeout, uint, 0); | |
121 | MODULE_PARM_DESC(at24_write_timeout, "Time (in ms) to try writes (default 25)"); | |
2b7a5056 | 122 | |
b680f4fa | 123 | struct at24_chip_data { |
b680f4fa SVA |
124 | u32 byte_len; |
125 | u8 flags; | |
126 | }; | |
127 | ||
128 | #define AT24_CHIP_DATA(_name, _len, _flags) \ | |
129 | static const struct at24_chip_data _name = { \ | |
130 | .byte_len = _len, .flags = _flags, \ | |
131 | } | |
132 | ||
133 | /* needs 8 addresses as A0-A2 are ignored */ | |
134 | AT24_CHIP_DATA(at24_data_24c00, 128 / 8, AT24_FLAG_TAKE8ADDR); | |
135 | /* old variants can't be handled with this generic entry! */ | |
136 | AT24_CHIP_DATA(at24_data_24c01, 1024 / 8, 0); | |
137 | AT24_CHIP_DATA(at24_data_24cs01, 16, | |
138 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); | |
139 | AT24_CHIP_DATA(at24_data_24c02, 2048 / 8, 0); | |
140 | AT24_CHIP_DATA(at24_data_24cs02, 16, | |
141 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); | |
142 | AT24_CHIP_DATA(at24_data_24mac402, 48 / 8, | |
143 | AT24_FLAG_MAC | AT24_FLAG_READONLY); | |
144 | AT24_CHIP_DATA(at24_data_24mac602, 64 / 8, | |
145 | AT24_FLAG_MAC | AT24_FLAG_READONLY); | |
146 | /* spd is a 24c02 in memory DIMMs */ | |
147 | AT24_CHIP_DATA(at24_data_spd, 2048 / 8, | |
148 | AT24_FLAG_READONLY | AT24_FLAG_IRUGO); | |
149 | AT24_CHIP_DATA(at24_data_24c04, 4096 / 8, 0); | |
150 | AT24_CHIP_DATA(at24_data_24cs04, 16, | |
151 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); | |
152 | /* 24rf08 quirk is handled at i2c-core */ | |
153 | AT24_CHIP_DATA(at24_data_24c08, 8192 / 8, 0); | |
154 | AT24_CHIP_DATA(at24_data_24cs08, 16, | |
155 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); | |
156 | AT24_CHIP_DATA(at24_data_24c16, 16384 / 8, 0); | |
157 | AT24_CHIP_DATA(at24_data_24cs16, 16, | |
158 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); | |
159 | AT24_CHIP_DATA(at24_data_24c32, 32768 / 8, AT24_FLAG_ADDR16); | |
160 | AT24_CHIP_DATA(at24_data_24cs32, 16, | |
161 | AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); | |
162 | AT24_CHIP_DATA(at24_data_24c64, 65536 / 8, AT24_FLAG_ADDR16); | |
163 | AT24_CHIP_DATA(at24_data_24cs64, 16, | |
164 | AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); | |
165 | AT24_CHIP_DATA(at24_data_24c128, 131072 / 8, AT24_FLAG_ADDR16); | |
166 | AT24_CHIP_DATA(at24_data_24c256, 262144 / 8, AT24_FLAG_ADDR16); | |
167 | AT24_CHIP_DATA(at24_data_24c512, 524288 / 8, AT24_FLAG_ADDR16); | |
168 | AT24_CHIP_DATA(at24_data_24c1024, 1048576 / 8, AT24_FLAG_ADDR16); | |
37cf28d3 | 169 | AT24_CHIP_DATA(at24_data_24c2048, 2097152 / 8, AT24_FLAG_ADDR16); |
b680f4fa SVA |
170 | /* identical to 24c08 ? */ |
171 | AT24_CHIP_DATA(at24_data_INT3499, 8192 / 8, 0); | |
172 | ||
2b7a5056 | 173 | static const struct i2c_device_id at24_ids[] = { |
b680f4fa SVA |
174 | { "24c00", (kernel_ulong_t)&at24_data_24c00 }, |
175 | { "24c01", (kernel_ulong_t)&at24_data_24c01 }, | |
176 | { "24cs01", (kernel_ulong_t)&at24_data_24cs01 }, | |
177 | { "24c02", (kernel_ulong_t)&at24_data_24c02 }, | |
178 | { "24cs02", (kernel_ulong_t)&at24_data_24cs02 }, | |
179 | { "24mac402", (kernel_ulong_t)&at24_data_24mac402 }, | |
180 | { "24mac602", (kernel_ulong_t)&at24_data_24mac602 }, | |
181 | { "spd", (kernel_ulong_t)&at24_data_spd }, | |
182 | { "24c04", (kernel_ulong_t)&at24_data_24c04 }, | |
183 | { "24cs04", (kernel_ulong_t)&at24_data_24cs04 }, | |
184 | { "24c08", (kernel_ulong_t)&at24_data_24c08 }, | |
185 | { "24cs08", (kernel_ulong_t)&at24_data_24cs08 }, | |
186 | { "24c16", (kernel_ulong_t)&at24_data_24c16 }, | |
187 | { "24cs16", (kernel_ulong_t)&at24_data_24cs16 }, | |
188 | { "24c32", (kernel_ulong_t)&at24_data_24c32 }, | |
189 | { "24cs32", (kernel_ulong_t)&at24_data_24cs32 }, | |
190 | { "24c64", (kernel_ulong_t)&at24_data_24c64 }, | |
191 | { "24cs64", (kernel_ulong_t)&at24_data_24cs64 }, | |
192 | { "24c128", (kernel_ulong_t)&at24_data_24c128 }, | |
193 | { "24c256", (kernel_ulong_t)&at24_data_24c256 }, | |
194 | { "24c512", (kernel_ulong_t)&at24_data_24c512 }, | |
195 | { "24c1024", (kernel_ulong_t)&at24_data_24c1024 }, | |
37cf28d3 | 196 | { "24c2048", (kernel_ulong_t)&at24_data_24c2048 }, |
b680f4fa | 197 | { "at24", 0 }, |
2b7a5056 WS |
198 | { /* END OF LIST */ } |
199 | }; | |
200 | MODULE_DEVICE_TABLE(i2c, at24_ids); | |
201 | ||
7f2a2f0d | 202 | static const struct of_device_id at24_of_match[] = { |
b680f4fa SVA |
203 | { .compatible = "atmel,24c00", .data = &at24_data_24c00 }, |
204 | { .compatible = "atmel,24c01", .data = &at24_data_24c01 }, | |
0f30aca7 | 205 | { .compatible = "atmel,24cs01", .data = &at24_data_24cs01 }, |
b680f4fa | 206 | { .compatible = "atmel,24c02", .data = &at24_data_24c02 }, |
0f30aca7 BG |
207 | { .compatible = "atmel,24cs02", .data = &at24_data_24cs02 }, |
208 | { .compatible = "atmel,24mac402", .data = &at24_data_24mac402 }, | |
209 | { .compatible = "atmel,24mac602", .data = &at24_data_24mac602 }, | |
b680f4fa SVA |
210 | { .compatible = "atmel,spd", .data = &at24_data_spd }, |
211 | { .compatible = "atmel,24c04", .data = &at24_data_24c04 }, | |
0f30aca7 | 212 | { .compatible = "atmel,24cs04", .data = &at24_data_24cs04 }, |
b680f4fa | 213 | { .compatible = "atmel,24c08", .data = &at24_data_24c08 }, |
0f30aca7 | 214 | { .compatible = "atmel,24cs08", .data = &at24_data_24cs08 }, |
b680f4fa | 215 | { .compatible = "atmel,24c16", .data = &at24_data_24c16 }, |
0f30aca7 | 216 | { .compatible = "atmel,24cs16", .data = &at24_data_24cs16 }, |
b680f4fa | 217 | { .compatible = "atmel,24c32", .data = &at24_data_24c32 }, |
0f30aca7 | 218 | { .compatible = "atmel,24cs32", .data = &at24_data_24cs32 }, |
b680f4fa | 219 | { .compatible = "atmel,24c64", .data = &at24_data_24c64 }, |
0f30aca7 | 220 | { .compatible = "atmel,24cs64", .data = &at24_data_24cs64 }, |
b680f4fa SVA |
221 | { .compatible = "atmel,24c128", .data = &at24_data_24c128 }, |
222 | { .compatible = "atmel,24c256", .data = &at24_data_24c256 }, | |
223 | { .compatible = "atmel,24c512", .data = &at24_data_24c512 }, | |
224 | { .compatible = "atmel,24c1024", .data = &at24_data_24c1024 }, | |
37cf28d3 | 225 | { .compatible = "atmel,24c2048", .data = &at24_data_24c2048 }, |
b680f4fa | 226 | { /* END OF LIST */ }, |
7f2a2f0d JMC |
227 | }; |
228 | MODULE_DEVICE_TABLE(of, at24_of_match); | |
229 | ||
40d8edc9 | 230 | static const struct acpi_device_id at24_acpi_ids[] = { |
b680f4fa SVA |
231 | { "INT3499", (kernel_ulong_t)&at24_data_INT3499 }, |
232 | { /* END OF LIST */ } | |
40d8edc9 AS |
233 | }; |
234 | MODULE_DEVICE_TABLE(acpi, at24_acpi_ids); | |
235 | ||
2b7a5056 WS |
236 | /* |
237 | * This routine supports chips which consume multiple I2C addresses. It | |
238 | * computes the addressing information to be used for a given r/w request. | |
239 | * Assumes that sanity checks for offset happened at sysfs-layer. | |
9afd6866 BG |
240 | * |
241 | * Slave address and byte offset derive from the offset. Always | |
242 | * set the byte address; on a multi-master board, another master | |
243 | * may have changed the chip's "current" address pointer. | |
2b7a5056 | 244 | */ |
46049486 HK |
245 | static struct at24_client *at24_translate_offset(struct at24_data *at24, |
246 | unsigned int *offset) | |
2b7a5056 | 247 | { |
aa4ce228 | 248 | unsigned int i; |
2b7a5056 | 249 | |
7c280664 | 250 | if (at24->flags & AT24_FLAG_ADDR16) { |
2b7a5056 WS |
251 | i = *offset >> 16; |
252 | *offset &= 0xffff; | |
253 | } else { | |
254 | i = *offset >> 8; | |
255 | *offset &= 0xff; | |
256 | } | |
257 | ||
46049486 | 258 | return &at24->client[i]; |
2b7a5056 WS |
259 | } |
260 | ||
f1a640c5 BG |
261 | static struct device *at24_base_client_dev(struct at24_data *at24) |
262 | { | |
263 | return &at24->client[0].client->dev; | |
264 | } | |
265 | ||
e32213fb SVA |
266 | static size_t at24_adjust_read_count(struct at24_data *at24, |
267 | unsigned int offset, size_t count) | |
268 | { | |
269 | unsigned int bits; | |
270 | size_t remainder; | |
271 | ||
272 | /* | |
273 | * In case of multi-address chips that don't rollover reads to | |
274 | * the next slave address: truncate the count to the slave boundary, | |
275 | * so that the read never straddles slaves. | |
276 | */ | |
7c280664 BG |
277 | if (at24->flags & AT24_FLAG_NO_RDROL) { |
278 | bits = (at24->flags & AT24_FLAG_ADDR16) ? 16 : 8; | |
e32213fb SVA |
279 | remainder = BIT(bits) - offset; |
280 | if (count > remainder) | |
281 | count = remainder; | |
282 | } | |
283 | ||
ec3c2d51 BG |
284 | if (count > at24_io_limit) |
285 | count = at24_io_limit; | |
e32213fb SVA |
286 | |
287 | return count; | |
288 | } | |
289 | ||
4bb5c13c HK |
290 | static ssize_t at24_regmap_read(struct at24_data *at24, char *buf, |
291 | unsigned int offset, size_t count) | |
292 | { | |
293 | unsigned long timeout, read_time; | |
294 | struct at24_client *at24_client; | |
295 | struct i2c_client *client; | |
296 | struct regmap *regmap; | |
297 | int ret; | |
298 | ||
299 | at24_client = at24_translate_offset(at24, &offset); | |
300 | regmap = at24_client->regmap; | |
301 | client = at24_client->client; | |
e32213fb | 302 | count = at24_adjust_read_count(at24, offset, count); |
4bb5c13c HK |
303 | |
304 | /* adjust offset for mac and serial read ops */ | |
305 | offset += at24->offset_adj; | |
306 | ||
9a9e295e WX |
307 | timeout = jiffies + msecs_to_jiffies(at24_write_timeout); |
308 | do { | |
309 | /* | |
310 | * The timestamp shall be taken before the actual operation | |
311 | * to avoid a premature timeout in case of high CPU load. | |
312 | */ | |
313 | read_time = jiffies; | |
314 | ||
4bb5c13c HK |
315 | ret = regmap_bulk_read(regmap, offset, buf, count); |
316 | dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n", | |
317 | count, offset, ret, jiffies); | |
318 | if (!ret) | |
319 | return count; | |
9a9e295e WX |
320 | |
321 | usleep_range(1000, 1500); | |
322 | } while (time_before(read_time, timeout)); | |
4bb5c13c HK |
323 | |
324 | return -ETIMEDOUT; | |
325 | } | |
326 | ||
2b7a5056 WS |
327 | /* |
328 | * Note that if the hardware write-protect pin is pulled high, the whole | |
329 | * chip is normally write protected. But there are plenty of product | |
330 | * variants here, including OTP fuses and partial chip protect. | |
331 | * | |
cd0c8615 BG |
332 | * We only use page mode writes; the alternative is sloooow. These routines |
333 | * write at most one page. | |
2b7a5056 | 334 | */ |
cd0c8615 BG |
335 | |
336 | static size_t at24_adjust_write_count(struct at24_data *at24, | |
337 | unsigned int offset, size_t count) | |
2b7a5056 | 338 | { |
aa4ce228 | 339 | unsigned int next_page; |
2b7a5056 | 340 | |
2b7a5056 WS |
341 | /* write_max is at most a page */ |
342 | if (count > at24->write_max) | |
343 | count = at24->write_max; | |
344 | ||
345 | /* Never roll over backwards, to the start of this page */ | |
7c280664 | 346 | next_page = roundup(offset + 1, at24->page_size); |
2b7a5056 WS |
347 | if (offset + count > next_page) |
348 | count = next_page - offset; | |
349 | ||
cd0c8615 BG |
350 | return count; |
351 | } | |
352 | ||
8e5888e1 HK |
353 | static ssize_t at24_regmap_write(struct at24_data *at24, const char *buf, |
354 | unsigned int offset, size_t count) | |
355 | { | |
356 | unsigned long timeout, write_time; | |
357 | struct at24_client *at24_client; | |
358 | struct i2c_client *client; | |
359 | struct regmap *regmap; | |
360 | int ret; | |
361 | ||
362 | at24_client = at24_translate_offset(at24, &offset); | |
363 | regmap = at24_client->regmap; | |
364 | client = at24_client->client; | |
365 | count = at24_adjust_write_count(at24, offset, count); | |
9a9e295e WX |
366 | timeout = jiffies + msecs_to_jiffies(at24_write_timeout); |
367 | ||
368 | do { | |
369 | /* | |
370 | * The timestamp shall be taken before the actual operation | |
371 | * to avoid a premature timeout in case of high CPU load. | |
372 | */ | |
373 | write_time = jiffies; | |
8e5888e1 | 374 | |
8e5888e1 HK |
375 | ret = regmap_bulk_write(regmap, offset, buf, count); |
376 | dev_dbg(&client->dev, "write %zu@%d --> %d (%ld)\n", | |
377 | count, offset, ret, jiffies); | |
378 | if (!ret) | |
379 | return count; | |
9a9e295e WX |
380 | |
381 | usleep_range(1000, 1500); | |
382 | } while (time_before(write_time, timeout)); | |
8e5888e1 HK |
383 | |
384 | return -ETIMEDOUT; | |
385 | } | |
386 | ||
d5bc0047 BG |
387 | static int at24_read(void *priv, unsigned int off, void *val, size_t count) |
388 | { | |
5ca2b5b7 BG |
389 | struct at24_data *at24; |
390 | struct device *dev; | |
d5bc0047 | 391 | char *buf = val; |
98e82010 | 392 | int ret; |
d5bc0047 | 393 | |
5ca2b5b7 | 394 | at24 = priv; |
f1a640c5 | 395 | dev = at24_base_client_dev(at24); |
5ca2b5b7 | 396 | |
d5bc0047 BG |
397 | if (unlikely(!count)) |
398 | return count; | |
399 | ||
7c280664 | 400 | if (off + count > at24->byte_len) |
d9bcd462 HK |
401 | return -EINVAL; |
402 | ||
f9ecc83f | 403 | ret = pm_runtime_get_sync(dev); |
98e82010 | 404 | if (ret < 0) { |
f9ecc83f | 405 | pm_runtime_put_noidle(dev); |
98e82010 DM |
406 | return ret; |
407 | } | |
408 | ||
d5bc0047 BG |
409 | /* |
410 | * Read data from chip, protecting against concurrent updates | |
411 | * from this host, but not from other I2C masters. | |
412 | */ | |
413 | mutex_lock(&at24->lock); | |
414 | ||
415 | while (count) { | |
eb27fde2 BG |
416 | ret = at24_regmap_read(at24, buf, off, count); |
417 | if (ret < 0) { | |
d5bc0047 | 418 | mutex_unlock(&at24->lock); |
f9ecc83f | 419 | pm_runtime_put(dev); |
eb27fde2 | 420 | return ret; |
d5bc0047 | 421 | } |
eb27fde2 BG |
422 | buf += ret; |
423 | off += ret; | |
424 | count -= ret; | |
d5bc0047 BG |
425 | } |
426 | ||
427 | mutex_unlock(&at24->lock); | |
428 | ||
f9ecc83f | 429 | pm_runtime_put(dev); |
98e82010 | 430 | |
d5bc0047 BG |
431 | return 0; |
432 | } | |
433 | ||
cf0361a2 | 434 | static int at24_write(void *priv, unsigned int off, void *val, size_t count) |
2b7a5056 | 435 | { |
5ca2b5b7 BG |
436 | struct at24_data *at24; |
437 | struct device *dev; | |
cf0361a2 | 438 | char *buf = val; |
98e82010 | 439 | int ret; |
2b7a5056 | 440 | |
5ca2b5b7 | 441 | at24 = priv; |
f1a640c5 | 442 | dev = at24_base_client_dev(at24); |
5ca2b5b7 | 443 | |
2b7a5056 | 444 | if (unlikely(!count)) |
cf0361a2 | 445 | return -EINVAL; |
2b7a5056 | 446 | |
7c280664 | 447 | if (off + count > at24->byte_len) |
d9bcd462 HK |
448 | return -EINVAL; |
449 | ||
f9ecc83f | 450 | ret = pm_runtime_get_sync(dev); |
98e82010 | 451 | if (ret < 0) { |
f9ecc83f | 452 | pm_runtime_put_noidle(dev); |
98e82010 DM |
453 | return ret; |
454 | } | |
455 | ||
2b7a5056 WS |
456 | /* |
457 | * Write data to chip, protecting against concurrent updates | |
458 | * from this host, but not from other I2C masters. | |
459 | */ | |
460 | mutex_lock(&at24->lock); | |
6ce261e8 | 461 | gpiod_set_value_cansleep(at24->wp_gpio, 0); |
2b7a5056 WS |
462 | |
463 | while (count) { | |
c4fee330 BG |
464 | ret = at24_regmap_write(at24, buf, off, count); |
465 | if (ret < 0) { | |
6ce261e8 | 466 | gpiod_set_value_cansleep(at24->wp_gpio, 1); |
cf0361a2 | 467 | mutex_unlock(&at24->lock); |
f9ecc83f | 468 | pm_runtime_put(dev); |
c4fee330 | 469 | return ret; |
2b7a5056 | 470 | } |
c4fee330 BG |
471 | buf += ret; |
472 | off += ret; | |
473 | count -= ret; | |
2b7a5056 WS |
474 | } |
475 | ||
6ce261e8 | 476 | gpiod_set_value_cansleep(at24->wp_gpio, 1); |
2b7a5056 WS |
477 | mutex_unlock(&at24->lock); |
478 | ||
f9ecc83f | 479 | pm_runtime_put(dev); |
98e82010 | 480 | |
57d15550 AL |
481 | return 0; |
482 | } | |
483 | ||
4fa882c9 | 484 | static const struct at24_chip_data *at24_get_chip_data(struct device *dev) |
feb2f19b BG |
485 | { |
486 | struct device_node *of_node = dev->of_node; | |
487 | const struct at24_chip_data *cdata; | |
488 | const struct i2c_device_id *id; | |
feb2f19b BG |
489 | |
490 | id = i2c_match_id(at24_ids, to_i2c_client(dev)); | |
491 | ||
492 | /* | |
493 | * The I2C core allows OF nodes compatibles to match against the | |
494 | * I2C device ID table as a fallback, so check not only if an OF | |
495 | * node is present but also if it matches an OF device ID entry. | |
496 | */ | |
497 | if (of_node && of_match_device(at24_of_match, dev)) | |
498 | cdata = of_device_get_match_data(dev); | |
499 | else if (id) | |
5fa4d14e | 500 | cdata = (void *)id->driver_data; |
feb2f19b BG |
501 | else |
502 | cdata = acpi_device_get_match_data(dev); | |
503 | ||
504 | if (!cdata) | |
4fa882c9 | 505 | return ERR_PTR(-ENODEV); |
feb2f19b | 506 | |
4fa882c9 | 507 | return cdata; |
feb2f19b BG |
508 | } |
509 | ||
39933e0f BG |
510 | static void at24_remove_dummy_clients(struct at24_data *at24) |
511 | { | |
512 | int i; | |
513 | ||
514 | for (i = 1; i < at24->num_addresses; i++) | |
515 | i2c_unregister_device(at24->client[i].client); | |
516 | } | |
517 | ||
73b0d922 BG |
518 | static int at24_make_dummy_client(struct at24_data *at24, unsigned int index, |
519 | struct regmap_config *regmap_config) | |
520 | { | |
521 | struct i2c_client *base_client, *dummy_client; | |
522 | unsigned short int addr; | |
523 | struct regmap *regmap; | |
524 | struct device *dev; | |
525 | ||
526 | base_client = at24->client[0].client; | |
527 | dev = &base_client->dev; | |
528 | addr = base_client->addr + index; | |
529 | ||
530 | dummy_client = i2c_new_dummy(base_client->adapter, | |
531 | base_client->addr + index); | |
532 | if (!dummy_client) { | |
533 | dev_err(dev, "address 0x%02x unavailable\n", addr); | |
534 | return -EADDRINUSE; | |
535 | } | |
536 | ||
537 | regmap = devm_regmap_init_i2c(dummy_client, regmap_config); | |
538 | if (IS_ERR(regmap)) { | |
539 | i2c_unregister_device(dummy_client); | |
540 | return PTR_ERR(regmap); | |
541 | } | |
542 | ||
543 | at24->client[index].client = dummy_client; | |
544 | at24->client[index].regmap = regmap; | |
545 | ||
546 | return 0; | |
547 | } | |
548 | ||
4bb5c13c HK |
549 | static unsigned int at24_get_offset_adj(u8 flags, unsigned int byte_len) |
550 | { | |
551 | if (flags & AT24_FLAG_MAC) { | |
552 | /* EUI-48 starts from 0x9a, EUI-64 from 0x98 */ | |
553 | return 0xa0 - byte_len; | |
554 | } else if (flags & AT24_FLAG_SERIAL && flags & AT24_FLAG_ADDR16) { | |
555 | /* | |
556 | * For 16 bit address pointers, the word address must contain | |
557 | * a '10' sequence in bits 11 and 10 regardless of the | |
558 | * intended position of the address pointer. | |
559 | */ | |
560 | return 0x0800; | |
561 | } else if (flags & AT24_FLAG_SERIAL) { | |
562 | /* | |
563 | * Otherwise the word address must begin with a '10' sequence, | |
564 | * regardless of the intended address. | |
565 | */ | |
566 | return 0x0080; | |
567 | } else { | |
568 | return 0; | |
569 | } | |
570 | } | |
571 | ||
48b6a7d1 | 572 | static int at24_probe(struct i2c_client *client) |
2b7a5056 | 573 | { |
eef69398 | 574 | struct regmap_config regmap_config = { }; |
8cdc4e7e | 575 | struct nvmem_config nvmem_config = { }; |
4fa882c9 BG |
576 | u32 byte_len, page_size, flags, addrw; |
577 | const struct at24_chip_data *cdata; | |
021c7d7b | 578 | struct device *dev = &client->dev; |
34d43faf | 579 | bool i2c_fn_i2c, i2c_fn_block; |
5ca2b5b7 BG |
580 | unsigned int i, num_addresses; |
581 | struct at24_data *at24; | |
551a1266 | 582 | struct regmap *regmap; |
11288b7c | 583 | size_t at24_size; |
5ca2b5b7 | 584 | bool writable; |
00f0ea70 | 585 | u8 test_byte; |
5ca2b5b7 | 586 | int err; |
2b7a5056 | 587 | |
34d43faf BG |
588 | i2c_fn_i2c = i2c_check_functionality(client->adapter, I2C_FUNC_I2C); |
589 | i2c_fn_block = i2c_check_functionality(client->adapter, | |
590 | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK); | |
591 | ||
4fa882c9 BG |
592 | cdata = at24_get_chip_data(dev); |
593 | if (IS_ERR(cdata)) | |
594 | return PTR_ERR(cdata); | |
595 | ||
596 | err = device_property_read_u32(dev, "pagesize", &page_size); | |
feb2f19b | 597 | if (err) |
4fa882c9 BG |
598 | /* |
599 | * This is slow, but we can't know all eeproms, so we better | |
600 | * play safe. Specifying custom eeprom-types via platform_data | |
601 | * is recommended anyhow. | |
602 | */ | |
603 | page_size = 1; | |
604 | ||
605 | flags = cdata->flags; | |
606 | if (device_property_present(dev, "read-only")) | |
607 | flags |= AT24_FLAG_READONLY; | |
608 | if (device_property_present(dev, "no-read-rollover")) | |
609 | flags |= AT24_FLAG_NO_RDROL; | |
610 | ||
611 | err = device_property_read_u32(dev, "address-width", &addrw); | |
612 | if (!err) { | |
613 | switch (addrw) { | |
614 | case 8: | |
615 | if (flags & AT24_FLAG_ADDR16) | |
616 | dev_warn(dev, | |
617 | "Override address width to be 8, while default is 16\n"); | |
618 | flags &= ~AT24_FLAG_ADDR16; | |
619 | break; | |
620 | case 16: | |
621 | flags |= AT24_FLAG_ADDR16; | |
622 | break; | |
623 | default: | |
624 | dev_warn(dev, "Bad \"address-width\" property: %u\n", | |
625 | addrw); | |
626 | } | |
627 | } | |
628 | ||
629 | err = device_property_read_u32(dev, "size", &byte_len); | |
630 | if (err) | |
631 | byte_len = cdata->byte_len; | |
2b7a5056 | 632 | |
34d43faf | 633 | if (!i2c_fn_i2c && !i2c_fn_block) |
4fa882c9 | 634 | page_size = 1; |
551a1266 | 635 | |
4fa882c9 | 636 | if (!page_size) { |
021c7d7b | 637 | dev_err(dev, "page_size must not be 0!\n"); |
f0ac2363 | 638 | return -EINVAL; |
45efe847 | 639 | } |
de5db101 | 640 | |
4fa882c9 | 641 | if (!is_power_of_2(page_size)) |
021c7d7b | 642 | dev_warn(dev, "page_size looks suspicious (no power of 2)!\n"); |
2b7a5056 | 643 | |
950bcbbe BG |
644 | err = device_property_read_u32(dev, "num-addresses", &num_addresses); |
645 | if (err) { | |
646 | if (flags & AT24_FLAG_TAKE8ADDR) | |
647 | num_addresses = 8; | |
648 | else | |
649 | num_addresses = DIV_ROUND_UP(byte_len, | |
650 | (flags & AT24_FLAG_ADDR16) ? 65536 : 256); | |
651 | } | |
2b7a5056 | 652 | |
4fa882c9 | 653 | if ((flags & AT24_FLAG_SERIAL) && (flags & AT24_FLAG_MAC)) { |
551a1266 BG |
654 | dev_err(dev, |
655 | "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC."); | |
656 | return -EINVAL; | |
657 | } | |
658 | ||
eef69398 | 659 | regmap_config.val_bits = 8; |
4fa882c9 | 660 | regmap_config.reg_bits = (flags & AT24_FLAG_ADDR16) ? 16 : 8; |
d154316d | 661 | regmap_config.disable_locking = true; |
5c015258 | 662 | |
551a1266 BG |
663 | regmap = devm_regmap_init_i2c(client, ®map_config); |
664 | if (IS_ERR(regmap)) | |
665 | return PTR_ERR(regmap); | |
666 | ||
11288b7c BG |
667 | at24_size = sizeof(*at24) + num_addresses * sizeof(struct at24_client); |
668 | at24 = devm_kzalloc(dev, at24_size, GFP_KERNEL); | |
f0ac2363 NB |
669 | if (!at24) |
670 | return -ENOMEM; | |
2b7a5056 WS |
671 | |
672 | mutex_init(&at24->lock); | |
4fa882c9 BG |
673 | at24->byte_len = byte_len; |
674 | at24->page_size = page_size; | |
675 | at24->flags = flags; | |
2b7a5056 | 676 | at24->num_addresses = num_addresses; |
4fa882c9 | 677 | at24->offset_adj = at24_get_offset_adj(flags, byte_len); |
551a1266 BG |
678 | at24->client[0].client = client; |
679 | at24->client[0].regmap = regmap; | |
2b7a5056 | 680 | |
021c7d7b | 681 | at24->wp_gpio = devm_gpiod_get_optional(dev, "wp", GPIOD_OUT_HIGH); |
6ce261e8 BG |
682 | if (IS_ERR(at24->wp_gpio)) |
683 | return PTR_ERR(at24->wp_gpio); | |
684 | ||
4fa882c9 | 685 | writable = !(flags & AT24_FLAG_READONLY); |
2b7a5056 | 686 | if (writable) { |
ec3c2d51 | 687 | at24->write_max = min_t(unsigned int, |
4fa882c9 | 688 | page_size, at24_io_limit); |
34d43faf | 689 | if (!i2c_fn_i2c && at24->write_max > I2C_SMBUS_BLOCK_MAX) |
a23727cb | 690 | at24->write_max = I2C_SMBUS_BLOCK_MAX; |
2b7a5056 WS |
691 | } |
692 | ||
2b7a5056 WS |
693 | /* use dummy devices for multiple-address chips */ |
694 | for (i = 1; i < num_addresses; i++) { | |
73b0d922 BG |
695 | err = at24_make_dummy_client(at24, i, ®map_config); |
696 | if (err) { | |
697 | at24_remove_dummy_clients(at24); | |
698 | return err; | |
5c015258 | 699 | } |
2b7a5056 WS |
700 | } |
701 | ||
00f0ea70 BG |
702 | i2c_set_clientdata(client, at24); |
703 | ||
98e82010 | 704 | /* enable runtime pm */ |
021c7d7b BG |
705 | pm_runtime_set_active(dev); |
706 | pm_runtime_enable(dev); | |
98e82010 | 707 | |
00f0ea70 BG |
708 | /* |
709 | * Perform a one-byte test read to verify that the | |
710 | * chip is functional. | |
711 | */ | |
712 | err = at24_read(at24, 0, &test_byte, 1); | |
021c7d7b | 713 | pm_runtime_idle(dev); |
00f0ea70 BG |
714 | if (err) { |
715 | err = -ENODEV; | |
716 | goto err_clients; | |
717 | } | |
718 | ||
021c7d7b BG |
719 | nvmem_config.name = dev_name(dev); |
720 | nvmem_config.dev = dev; | |
8cdc4e7e BG |
721 | nvmem_config.read_only = !writable; |
722 | nvmem_config.root_only = true; | |
723 | nvmem_config.owner = THIS_MODULE; | |
724 | nvmem_config.compat = true; | |
021c7d7b | 725 | nvmem_config.base_dev = dev; |
8cdc4e7e BG |
726 | nvmem_config.reg_read = at24_read; |
727 | nvmem_config.reg_write = at24_write; | |
728 | nvmem_config.priv = at24; | |
729 | nvmem_config.stride = 1; | |
730 | nvmem_config.word_size = 1; | |
4fa882c9 | 731 | nvmem_config.size = byte_len; |
8cdc4e7e | 732 | |
bbe69841 | 733 | at24->nvmem = devm_nvmem_register(dev, &nvmem_config); |
57d15550 AL |
734 | if (IS_ERR(at24->nvmem)) { |
735 | err = PTR_ERR(at24->nvmem); | |
736 | goto err_clients; | |
737 | } | |
2b7a5056 | 738 | |
021c7d7b | 739 | dev_info(dev, "%u byte %s EEPROM, %s, %u bytes/write\n", |
4fa882c9 | 740 | byte_len, client->name, |
df3da615 | 741 | writable ? "writable" : "read-only", at24->write_max); |
2b7a5056 WS |
742 | |
743 | return 0; | |
744 | ||
745 | err_clients: | |
39933e0f | 746 | at24_remove_dummy_clients(at24); |
021c7d7b | 747 | pm_runtime_disable(dev); |
98e82010 | 748 | |
2b7a5056 WS |
749 | return err; |
750 | } | |
751 | ||
486a5c28 | 752 | static int at24_remove(struct i2c_client *client) |
2b7a5056 WS |
753 | { |
754 | struct at24_data *at24; | |
2b7a5056 WS |
755 | |
756 | at24 = i2c_get_clientdata(client); | |
57d15550 | 757 | |
39933e0f | 758 | at24_remove_dummy_clients(at24); |
98e82010 DM |
759 | pm_runtime_disable(&client->dev); |
760 | pm_runtime_set_suspended(&client->dev); | |
761 | ||
2b7a5056 WS |
762 | return 0; |
763 | } | |
764 | ||
2b7a5056 WS |
765 | static struct i2c_driver at24_driver = { |
766 | .driver = { | |
767 | .name = "at24", | |
7f2a2f0d | 768 | .of_match_table = at24_of_match, |
40d8edc9 | 769 | .acpi_match_table = ACPI_PTR(at24_acpi_ids), |
2b7a5056 | 770 | }, |
48b6a7d1 | 771 | .probe_new = at24_probe, |
2d6bed9c | 772 | .remove = at24_remove, |
2b7a5056 WS |
773 | .id_table = at24_ids, |
774 | }; | |
775 | ||
776 | static int __init at24_init(void) | |
777 | { | |
ec3c2d51 BG |
778 | if (!at24_io_limit) { |
779 | pr_err("at24: at24_io_limit must not be 0!\n"); | |
45efe847 WS |
780 | return -EINVAL; |
781 | } | |
782 | ||
ec3c2d51 | 783 | at24_io_limit = rounddown_pow_of_two(at24_io_limit); |
2b7a5056 WS |
784 | return i2c_add_driver(&at24_driver); |
785 | } | |
786 | module_init(at24_init); | |
787 | ||
788 | static void __exit at24_exit(void) | |
789 | { | |
790 | i2c_del_driver(&at24_driver); | |
791 | } | |
792 | module_exit(at24_exit); | |
793 | ||
794 | MODULE_DESCRIPTION("Driver for most I2C EEPROMs"); | |
795 | MODULE_AUTHOR("David Brownell and Wolfram Sang"); | |
796 | MODULE_LICENSE("GPL"); |