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455fbdd3 PM |
1 | /* |
2 | * lis3lv02d.h - ST LIS3LV02DL accelerometer driver | |
3 | * | |
4 | * Copyright (C) 2007-2008 Yan Burman | |
bc62c147 | 5 | * Copyright (C) 2008-2009 Eric Piel |
455fbdd3 PM |
6 | * |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
20 | */ | |
dc6ea97b EP |
21 | #include <linux/platform_device.h> |
22 | #include <linux/input-polldev.h> | |
f9deb41f | 23 | #include <linux/regulator/consumer.h> |
895c156c | 24 | #include <linux/miscdevice.h> |
455fbdd3 PM |
25 | |
26 | /* | |
bc62c147 ÉP |
27 | * This driver tries to support the "digital" accelerometer chips from |
28 | * STMicroelectronics such as LIS3LV02DL, LIS302DL, LIS3L02DQ, LIS331DL, | |
0bf5a8be AC |
29 | * LIS331DLH, LIS35DE, or LIS202DL. They are very similar in terms of |
30 | * programming, with almost the same registers. In addition to differing | |
31 | * on physical properties, they differ on the number of axes (2/3), | |
32 | * precision (8/12 bits), and special features (freefall detection, | |
33 | * click...). Unfortunately, not all the differences can be probed via | |
34 | * a register. They can be connected either via I²C or SPI. | |
455fbdd3 PM |
35 | */ |
36 | ||
8f3128e7 DM |
37 | #include <linux/lis3lv02d.h> |
38 | ||
8f3128e7 | 39 | enum lis3_reg { |
455fbdd3 PM |
40 | WHO_AM_I = 0x0F, |
41 | OFFSET_X = 0x16, | |
42 | OFFSET_Y = 0x17, | |
43 | OFFSET_Z = 0x18, | |
44 | GAIN_X = 0x19, | |
45 | GAIN_Y = 0x1A, | |
46 | GAIN_Z = 0x1B, | |
47 | CTRL_REG1 = 0x20, | |
48 | CTRL_REG2 = 0x21, | |
49 | CTRL_REG3 = 0x22, | |
78537c3b | 50 | CTRL_REG4 = 0x23, |
455fbdd3 PM |
51 | HP_FILTER_RESET = 0x23, |
52 | STATUS_REG = 0x27, | |
53 | OUTX_L = 0x28, | |
54 | OUTX_H = 0x29, | |
137bad32 | 55 | OUTX = 0x29, |
455fbdd3 PM |
56 | OUTY_L = 0x2A, |
57 | OUTY_H = 0x2B, | |
137bad32 | 58 | OUTY = 0x2B, |
455fbdd3 PM |
59 | OUTZ_L = 0x2C, |
60 | OUTZ_H = 0x2D, | |
137bad32 | 61 | OUTZ = 0x2D, |
8f3128e7 DM |
62 | }; |
63 | ||
64 | enum lis302d_reg { | |
8873c334 DM |
65 | FF_WU_CFG_1 = 0x30, |
66 | FF_WU_SRC_1 = 0x31, | |
67 | FF_WU_THS_1 = 0x32, | |
68 | FF_WU_DURATION_1 = 0x33, | |
69 | FF_WU_CFG_2 = 0x34, | |
70 | FF_WU_SRC_2 = 0x35, | |
71 | FF_WU_THS_2 = 0x36, | |
72 | FF_WU_DURATION_2 = 0x37, | |
8f3128e7 DM |
73 | CLICK_CFG = 0x38, |
74 | CLICK_SRC = 0x39, | |
75 | CLICK_THSY_X = 0x3B, | |
76 | CLICK_THSZ = 0x3C, | |
77 | CLICK_TIMELIMIT = 0x3D, | |
78 | CLICK_LATENCY = 0x3E, | |
79 | CLICK_WINDOW = 0x3F, | |
80 | }; | |
81 | ||
82 | enum lis3lv02d_reg { | |
8873c334 DM |
83 | FF_WU_CFG = 0x30, |
84 | FF_WU_SRC = 0x31, | |
85 | FF_WU_ACK = 0x32, | |
86 | FF_WU_THS_L = 0x34, | |
87 | FF_WU_THS_H = 0x35, | |
88 | FF_WU_DURATION = 0x36, | |
455fbdd3 PM |
89 | DD_CFG = 0x38, |
90 | DD_SRC = 0x39, | |
91 | DD_ACK = 0x3A, | |
92 | DD_THSI_L = 0x3C, | |
93 | DD_THSI_H = 0x3D, | |
94 | DD_THSE_L = 0x3E, | |
95 | DD_THSE_H = 0x3F, | |
96 | }; | |
97 | ||
bc62c147 | 98 | enum lis3_who_am_i { |
0bf5a8be | 99 | WAI_3DLH = 0x32, /* 16 bits: LIS331DLH */ |
78537c3b | 100 | WAI_3DC = 0x33, /* 8 bits: LIS3DC, HP3DC */ |
bc62c147 ÉP |
101 | WAI_12B = 0x3A, /* 12 bits: LIS3LV02D[LQ]... */ |
102 | WAI_8B = 0x3B, /* 8 bits: LIS[23]02D[LQ]... */ | |
103 | WAI_6B = 0x52, /* 6 bits: LIS331DLF - not supported */ | |
104 | }; | |
105 | ||
0bf5a8be | 106 | enum lis3_type { |
e2b2ed83 | 107 | LIS3LV02D, |
0bf5a8be AC |
108 | LIS3DC, |
109 | HP3DC, | |
0bf5a8be AC |
110 | LIS2302D, |
111 | LIS331DLF, | |
112 | LIS331DLH, | |
113 | }; | |
114 | ||
2db4a76d | 115 | enum lis3lv02d_ctrl1_12b { |
455fbdd3 PM |
116 | CTRL1_Xen = 0x01, |
117 | CTRL1_Yen = 0x02, | |
118 | CTRL1_Zen = 0x04, | |
119 | CTRL1_ST = 0x08, | |
120 | CTRL1_DF0 = 0x10, | |
121 | CTRL1_DF1 = 0x20, | |
122 | CTRL1_PD0 = 0x40, | |
123 | CTRL1_PD1 = 0x80, | |
124 | }; | |
2db4a76d SO |
125 | |
126 | /* Delta to ctrl1_12b version */ | |
127 | enum lis3lv02d_ctrl1_8b { | |
128 | CTRL1_STM = 0x08, | |
129 | CTRL1_STP = 0x10, | |
130 | CTRL1_FS = 0x20, | |
131 | CTRL1_PD = 0x40, | |
132 | CTRL1_DR = 0x80, | |
133 | }; | |
134 | ||
78537c3b TI |
135 | enum lis3lv02d_ctrl1_3dc { |
136 | CTRL1_ODR0 = 0x10, | |
137 | CTRL1_ODR1 = 0x20, | |
138 | CTRL1_ODR2 = 0x40, | |
139 | CTRL1_ODR3 = 0x80, | |
140 | }; | |
141 | ||
0bf5a8be AC |
142 | enum lis331dlh_ctrl1 { |
143 | CTRL1_DR0 = 0x08, | |
144 | CTRL1_DR1 = 0x10, | |
145 | CTRL1_PM0 = 0x20, | |
146 | CTRL1_PM1 = 0x40, | |
147 | CTRL1_PM2 = 0x80, | |
148 | }; | |
149 | ||
150 | enum lis331dlh_ctrl2 { | |
151 | CTRL2_HPEN1 = 0x04, | |
152 | CTRL2_HPEN2 = 0x08, | |
153 | CTRL2_FDS_3DLH = 0x10, | |
154 | CTRL2_BOOT_3DLH = 0x80, | |
155 | }; | |
156 | ||
157 | enum lis331dlh_ctrl4 { | |
158 | CTRL4_STSIGN = 0x08, | |
159 | CTRL4_BLE = 0x40, | |
160 | CTRL4_BDU = 0x80, | |
161 | }; | |
162 | ||
455fbdd3 PM |
163 | enum lis3lv02d_ctrl2 { |
164 | CTRL2_DAS = 0x01, | |
165 | CTRL2_SIM = 0x02, | |
166 | CTRL2_DRDY = 0x04, | |
167 | CTRL2_IEN = 0x08, | |
168 | CTRL2_BOOT = 0x10, | |
169 | CTRL2_BLE = 0x20, | |
170 | CTRL2_BDU = 0x40, /* Block Data Update */ | |
171 | CTRL2_FS = 0x80, /* Full Scale selection */ | |
172 | }; | |
173 | ||
78537c3b TI |
174 | enum lis3lv02d_ctrl4_3dc { |
175 | CTRL4_SIM = 0x01, | |
176 | CTRL4_ST0 = 0x02, | |
177 | CTRL4_ST1 = 0x04, | |
178 | CTRL4_FS0 = 0x10, | |
179 | CTRL4_FS1 = 0x20, | |
180 | }; | |
181 | ||
8873c334 DM |
182 | enum lis302d_ctrl2 { |
183 | HP_FF_WU2 = 0x08, | |
184 | HP_FF_WU1 = 0x04, | |
2a7fade7 | 185 | CTRL2_BOOT_8B = 0x40, |
8873c334 | 186 | }; |
455fbdd3 PM |
187 | |
188 | enum lis3lv02d_ctrl3 { | |
189 | CTRL3_CFS0 = 0x01, | |
190 | CTRL3_CFS1 = 0x02, | |
191 | CTRL3_FDS = 0x10, | |
192 | CTRL3_HPFF = 0x20, | |
193 | CTRL3_HPDD = 0x40, | |
194 | CTRL3_ECK = 0x80, | |
195 | }; | |
196 | ||
197 | enum lis3lv02d_status_reg { | |
198 | STATUS_XDA = 0x01, | |
199 | STATUS_YDA = 0x02, | |
200 | STATUS_ZDA = 0x04, | |
201 | STATUS_XYZDA = 0x08, | |
202 | STATUS_XOR = 0x10, | |
203 | STATUS_YOR = 0x20, | |
204 | STATUS_ZOR = 0x40, | |
205 | STATUS_XYZOR = 0x80, | |
206 | }; | |
207 | ||
208 | enum lis3lv02d_ff_wu_cfg { | |
209 | FF_WU_CFG_XLIE = 0x01, | |
210 | FF_WU_CFG_XHIE = 0x02, | |
211 | FF_WU_CFG_YLIE = 0x04, | |
212 | FF_WU_CFG_YHIE = 0x08, | |
213 | FF_WU_CFG_ZLIE = 0x10, | |
214 | FF_WU_CFG_ZHIE = 0x20, | |
215 | FF_WU_CFG_LIR = 0x40, | |
216 | FF_WU_CFG_AOI = 0x80, | |
217 | }; | |
218 | ||
219 | enum lis3lv02d_ff_wu_src { | |
220 | FF_WU_SRC_XL = 0x01, | |
221 | FF_WU_SRC_XH = 0x02, | |
222 | FF_WU_SRC_YL = 0x04, | |
223 | FF_WU_SRC_YH = 0x08, | |
224 | FF_WU_SRC_ZL = 0x10, | |
225 | FF_WU_SRC_ZH = 0x20, | |
226 | FF_WU_SRC_IA = 0x40, | |
227 | }; | |
228 | ||
229 | enum lis3lv02d_dd_cfg { | |
230 | DD_CFG_XLIE = 0x01, | |
231 | DD_CFG_XHIE = 0x02, | |
232 | DD_CFG_YLIE = 0x04, | |
233 | DD_CFG_YHIE = 0x08, | |
234 | DD_CFG_ZLIE = 0x10, | |
235 | DD_CFG_ZHIE = 0x20, | |
236 | DD_CFG_LIR = 0x40, | |
237 | DD_CFG_IEND = 0x80, | |
238 | }; | |
239 | ||
240 | enum lis3lv02d_dd_src { | |
241 | DD_SRC_XL = 0x01, | |
242 | DD_SRC_XH = 0x02, | |
243 | DD_SRC_YL = 0x04, | |
244 | DD_SRC_YH = 0x08, | |
245 | DD_SRC_ZL = 0x10, | |
246 | DD_SRC_ZH = 0x20, | |
247 | DD_SRC_IA = 0x40, | |
248 | }; | |
249 | ||
58e81422 SO |
250 | enum lis3lv02d_click_src_8b { |
251 | CLICK_SINGLE_X = 0x01, | |
252 | CLICK_DOUBLE_X = 0x02, | |
253 | CLICK_SINGLE_Y = 0x04, | |
254 | CLICK_DOUBLE_Y = 0x08, | |
255 | CLICK_SINGLE_Z = 0x10, | |
256 | CLICK_DOUBLE_Z = 0x20, | |
257 | CLICK_IA = 0x40, | |
258 | }; | |
259 | ||
f9deb41f SO |
260 | enum lis3lv02d_reg_state { |
261 | LIS3_REG_OFF = 0x00, | |
262 | LIS3_REG_ON = 0x01, | |
263 | }; | |
264 | ||
2ee32144 TI |
265 | union axis_conversion { |
266 | struct { | |
267 | int x, y, z; | |
268 | }; | |
269 | int as_array[3]; | |
f9deb41f | 270 | |
cfce41a6 EP |
271 | }; |
272 | ||
a38da2ed DM |
273 | struct lis3lv02d { |
274 | void *bus_priv; /* used by the bus layer only */ | |
2a346996 | 275 | struct device *pm_dev; /* for pm_runtime purposes */ |
a38da2ed DM |
276 | int (*init) (struct lis3lv02d *lis3); |
277 | int (*write) (struct lis3lv02d *lis3, int reg, u8 val); | |
278 | int (*read) (struct lis3lv02d *lis3, int reg, u8 *ret); | |
f10a5407 | 279 | int (*blkread) (struct lis3lv02d *lis3, int reg, int len, u8 *ret); |
f9deb41f | 280 | int (*reg_ctrl) (struct lis3lv02d *lis3, bool state); |
cfce41a6 | 281 | |
a253aaef | 282 | int *odrs; /* Supported output data rates */ |
f9deb41f SO |
283 | u8 *regs; /* Regs to store / restore */ |
284 | int regs_size; | |
285 | u8 *reg_cache; | |
286 | bool regs_stored; | |
a253aaef | 287 | u8 odr_mask; /* ODR bit mask */ |
bc62c147 | 288 | u8 whoami; /* indicates measurement precision */ |
a38da2ed | 289 | s16 (*read_data) (struct lis3lv02d *lis3, int reg); |
137bad32 | 290 | int mdps_max_val; |
641615ab | 291 | int pwron_delay; |
32496c76 SO |
292 | int scale; /* |
293 | * relationship between 1 LBS and mG | |
294 | * (1/1000th of earth gravity) | |
295 | */ | |
137bad32 | 296 | |
dc6ea97b | 297 | struct input_polled_dev *idev; /* input device */ |
cfce41a6 | 298 | struct platform_device *pdev; /* platform device */ |
f9deb41f | 299 | struct regulator_bulk_data regulators[2]; |
cfce41a6 | 300 | atomic_t count; /* interrupt count after last read */ |
2ee32144 | 301 | union axis_conversion ac; /* hw -> logical axis */ |
6d94d408 | 302 | int mapped_btns[3]; |
ef2cfc79 PM |
303 | |
304 | u32 irq; /* IRQ number */ | |
305 | struct fasync_struct *async_queue; /* queue for the misc device */ | |
306 | wait_queue_head_t misc_wait; /* Wait queue for the misc device */ | |
307 | unsigned long misc_opened; /* bit0: whether the device is open */ | |
895c156c ÉP |
308 | struct miscdevice miscdev; |
309 | ||
029756d0 SO |
310 | int data_ready_count[2]; |
311 | atomic_t wake_thread; | |
e726111f | 312 | unsigned char irq_cfg; |
0bf5a8be | 313 | unsigned int shift_adj; |
8f3128e7 DM |
314 | |
315 | struct lis3lv02d_platform_data *pdata; /* for passing board config */ | |
2db4a76d | 316 | struct mutex mutex; /* Serialize poll and selftest */ |
cbac1a8b DM |
317 | |
318 | #ifdef CONFIG_OF | |
319 | struct device_node *of_node; | |
320 | #endif | |
cfce41a6 EP |
321 | }; |
322 | ||
a38da2ed | 323 | int lis3lv02d_init_device(struct lis3lv02d *lis3); |
e1e5687d ÉP |
324 | int lis3lv02d_joystick_enable(struct lis3lv02d *lis3); |
325 | void lis3lv02d_joystick_disable(struct lis3lv02d *lis3); | |
a38da2ed | 326 | void lis3lv02d_poweroff(struct lis3lv02d *lis3); |
1510dd59 | 327 | int lis3lv02d_poweron(struct lis3lv02d *lis3); |
a002ee89 | 328 | int lis3lv02d_remove_fs(struct lis3lv02d *lis3); |
0c83adba | 329 | int lis3lv02d_init_dt(struct lis3lv02d *lis3); |
cfce41a6 | 330 | |
a38da2ed | 331 | extern struct lis3lv02d lis3_dev; |