[mirror_ubuntu-artful-kernel.git] / drivers / misc / phantom.c

/*
 *  Copyright (C) 2005-2007 Jiri Slaby <jirislaby@gmail.com>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  You need a userspace library to cooperate with this driver. It (and other
 *  info) may be obtained here:
 *  http://www.fi.muni.cz/~xslaby/phantom.html
 *  or alternatively, you might use OpenHaptics provided by Sensable.
 */

#include <linux/compat.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/device.h>
#include <linux/pci.h>
#include <linux/fs.h>
#include <linux/poll.h>
#include <linux/interrupt.h>
#include <linux/cdev.h>
#include <linux/phantom.h>
#include <linux/sched.h>
#include <linux/smp_lock.h>

#include <asm/atomic.h>
#include <asm/io.h>

#define PHANTOM_VERSION		"n0.9.8"

#define PHANTOM_MAX_MINORS	8

#define PHN_IRQCTL		0x4c    /* irq control in caddr space */

#define PHB_RUNNING		1
#define PHB_NOT_OH		2

static struct class *phantom_class;
static int phantom_major;

struct phantom_device {
	unsigned int opened;
	void __iomem *caddr;
	u32 __iomem *iaddr;
	u32 __iomem *oaddr;
	unsigned long status;
	atomic_t counter;

	wait_queue_head_t wait;
	struct cdev cdev;

	struct mutex open_lock;
	spinlock_t regs_lock;

	/* used in NOT_OH mode */
	struct phm_regs oregs;
	u32 ctl_reg;
};

static unsigned char phantom_devices[PHANTOM_MAX_MINORS];

static int phantom_status(struct phantom_device *dev, unsigned long newstat)
{
	pr_debug("phantom_status %lx %lx\n", dev->status, newstat);

	if (!(dev->status & PHB_RUNNING) && (newstat & PHB_RUNNING)) {
		atomic_set(&dev->counter, 0);
		iowrite32(PHN_CTL_IRQ, dev->iaddr + PHN_CONTROL);
		iowrite32(0x43, dev->caddr + PHN_IRQCTL);
		ioread32(dev->caddr + PHN_IRQCTL); /* PCI posting */
	} else if ((dev->status & PHB_RUNNING) && !(newstat & PHB_RUNNING)) {
		iowrite32(0, dev->caddr + PHN_IRQCTL);
		ioread32(dev->caddr + PHN_IRQCTL); /* PCI posting */
	}

	dev->status = newstat;

	return 0;
}

/*
 * File ops
 */

static long phantom_ioctl(struct file *file, unsigned int cmd,
		unsigned long arg)
{
	struct phantom_device *dev = file->private_data;
	struct phm_regs rs;
	struct phm_reg r;
	void __user *argp = (void __user *)arg;
	unsigned long flags;
	unsigned int i;

	switch (cmd) {
	case PHN_SETREG:
	case PHN_SET_REG:
		if (copy_from_user(&r, argp, sizeof(r)))
			return -EFAULT;

		if (r.reg > 7)
			return -EINVAL;

		spin_lock_irqsave(&dev->regs_lock, flags);
		if (r.reg == PHN_CONTROL && (r.value & PHN_CTL_IRQ) &&
				phantom_status(dev, dev->status | PHB_RUNNING)){
			spin_unlock_irqrestore(&dev->regs_lock, flags);
			return -ENODEV;
		}

		pr_debug("phantom: writing %x to %u\n", r.value, r.reg);

		/* preserve amp bit (don't allow to change it when in NOT_OH) */
		if (r.reg == PHN_CONTROL && (dev->status & PHB_NOT_OH)) {
			r.value &= ~PHN_CTL_AMP;
			r.value |= dev->ctl_reg & PHN_CTL_AMP;
			dev->ctl_reg = r.value;
		}

		iowrite32(r.value, dev->iaddr + r.reg);
		ioread32(dev->iaddr); /* PCI posting */

		if (r.reg == PHN_CONTROL && !(r.value & PHN_CTL_IRQ))
			phantom_status(dev, dev->status & ~PHB_RUNNING);
		spin_unlock_irqrestore(&dev->regs_lock, flags);
		break;
	case PHN_SETREGS:
	case PHN_SET_REGS:
		if (copy_from_user(&rs, argp, sizeof(rs)))
			return -EFAULT;

		pr_debug("phantom: SRS %u regs %x\n", rs.count, rs.mask);
		spin_lock_irqsave(&dev->regs_lock, flags);
		if (dev->status & PHB_NOT_OH)
			memcpy(&dev->oregs, &rs, sizeof(rs));
		else {
			u32 m = min(rs.count, 8U);
			for (i = 0; i < m; i++)
				if (rs.mask & BIT(i))
					iowrite32(rs.values[i], dev->oaddr + i);
			ioread32(dev->iaddr); /* PCI posting */
		}
		spin_unlock_irqrestore(&dev->regs_lock, flags);
		break;
	case PHN_GETREG:
	case PHN_GET_REG:
		if (copy_from_user(&r, argp, sizeof(r)))
			return -EFAULT;

		if (r.reg > 7)
			return -EINVAL;

		r.value = ioread32(dev->iaddr + r.reg);

		if (copy_to_user(argp, &r, sizeof(r)))
			return -EFAULT;
		break;
	case PHN_GETREGS:
	case PHN_GET_REGS: {
		u32 m;

		if (copy_from_user(&rs, argp, sizeof(rs)))
			return -EFAULT;

		m = min(rs.count, 8U);

		pr_debug("phantom: GRS %u regs %x\n", rs.count, rs.mask);
		spin_lock_irqsave(&dev->regs_lock, flags);
		for (i = 0; i < m; i++)
			if (rs.mask & BIT(i))
				rs.values[i] = ioread32(dev->iaddr + i);
		atomic_set(&dev->counter, 0);
		spin_unlock_irqrestore(&dev->regs_lock, flags);

		if (copy_to_user(argp, &rs, sizeof(rs)))
			return -EFAULT;
		break;
	} case PHN_NOT_OH:
		spin_lock_irqsave(&dev->regs_lock, flags);
		if (dev->status & PHB_RUNNING) {
			printk(KERN_ERR "phantom: you need to set NOT_OH "
					"before you start the device!\n");
			spin_unlock_irqrestore(&dev->regs_lock, flags);
			return -EINVAL;
		}
		dev->status |= PHB_NOT_OH;
		spin_unlock_irqrestore(&dev->regs_lock, flags);
		break;
	default:
		return -ENOTTY;
	}

	return 0;
}

#ifdef CONFIG_COMPAT
static long phantom_compat_ioctl(struct file *filp, unsigned int cmd,
		unsigned long arg)
{
	if (_IOC_NR(cmd) <= 3 && _IOC_SIZE(cmd) == sizeof(compat_uptr_t)) {
		cmd &= ~(_IOC_SIZEMASK << _IOC_SIZESHIFT);
		cmd |= sizeof(void *) << _IOC_SIZESHIFT;
	}
	return phantom_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
}
#else
#define phantom_compat_ioctl NULL
#endif

static int phantom_open(struct inode *inode, struct file *file)
{
	struct phantom_device *dev = container_of(inode->i_cdev,
			struct phantom_device, cdev);

	lock_kernel();
	nonseekable_open(inode, file);

	if (mutex_lock_interruptible(&dev->open_lock)) {
		unlock_kernel();
		return -ERESTARTSYS;
	}

	if (dev->opened) {
		mutex_unlock(&dev->open_lock);
		unlock_kernel();
		return -EINVAL;
	}

	WARN_ON(dev->status & PHB_NOT_OH);

	file->private_data = dev;

	atomic_set(&dev->counter, 0);
	dev->opened++;
	mutex_unlock(&dev->open_lock);
	unlock_kernel();
	return 0;
}

static int phantom_release(struct inode *inode, struct file *file)
{
	struct phantom_device *dev = file->private_data;

	mutex_lock(&dev->open_lock);

	dev->opened = 0;
	phantom_status(dev, dev->status & ~PHB_RUNNING);
	dev->status &= ~PHB_NOT_OH;

	mutex_unlock(&dev->open_lock);

	return 0;
}

static unsigned int phantom_poll(struct file *file, poll_table *wait)
{
	struct phantom_device *dev = file->private_data;
	unsigned int mask = 0;

	pr_debug("phantom_poll: %d\n", atomic_read(&dev->counter));
	poll_wait(file, &dev->wait, wait);

	if (!(dev->status & PHB_RUNNING))
		mask = POLLERR;
	else if (atomic_read(&dev->counter))
		mask = POLLIN | POLLRDNORM;

	pr_debug("phantom_poll end: %x/%d\n", mask, atomic_read(&dev->counter));

	return mask;
}

static const struct file_operations phantom_file_ops = {
	.open = phantom_open,
	.release = phantom_release,
	.unlocked_ioctl = phantom_ioctl,
	.compat_ioctl = phantom_compat_ioctl,
	.poll = phantom_poll,
};

static irqreturn_t phantom_isr(int irq, void *data)
{
	struct phantom_device *dev = data;
	unsigned int i;
	u32 ctl;

	spin_lock(&dev->regs_lock);
	ctl = ioread32(dev->iaddr + PHN_CONTROL);
	if (!(ctl & PHN_CTL_IRQ)) {
		spin_unlock(&dev->regs_lock);
		return IRQ_NONE;
	}

	iowrite32(0, dev->iaddr);
	iowrite32(0xc0, dev->iaddr);

	if (dev->status & PHB_NOT_OH) {
		struct phm_regs *r = &dev->oregs;
		u32 m = min(r->count, 8U);

		for (i = 0; i < m; i++)
			if (r->mask & BIT(i))
				iowrite32(r->values[i], dev->oaddr + i);

		dev->ctl_reg ^= PHN_CTL_AMP;
		iowrite32(dev->ctl_reg, dev->iaddr + PHN_CONTROL);
	}
	spin_unlock(&dev->regs_lock);

	ioread32(dev->iaddr); /* PCI posting */

	atomic_inc(&dev->counter);
	wake_up_interruptible(&dev->wait);

	return IRQ_HANDLED;
}

/*
 * Init and deinit driver
 */

static unsigned int __devinit phantom_get_free(void)
{
	unsigned int i;

	for (i = 0; i < PHANTOM_MAX_MINORS; i++)
		if (phantom_devices[i] == 0)
			break;

	return i;
}

static int __devinit phantom_probe(struct pci_dev *pdev,
	const struct pci_device_id *pci_id)
{
	struct phantom_device *pht;
	unsigned int minor;
	int retval;

	retval = pci_enable_device(pdev);
	if (retval)
		goto err;

	minor = phantom_get_free();
	if (minor == PHANTOM_MAX_MINORS) {
		dev_err(&pdev->dev, "too many devices found!\n");
		retval = -EIO;
		goto err_dis;
	}

	phantom_devices[minor] = 1;

	retval = pci_request_regions(pdev, "phantom");
	if (retval)
		goto err_null;

	retval = -ENOMEM;
	pht = kzalloc(sizeof(*pht), GFP_KERNEL);
	if (pht == NULL) {
		dev_err(&pdev->dev, "unable to allocate device\n");
		goto err_reg;
	}

	pht->caddr = pci_iomap(pdev, 0, 0);
	if (pht->caddr == NULL) {
		dev_err(&pdev->dev, "can't remap conf space\n");
		goto err_fr;
	}
	pht->iaddr = pci_iomap(pdev, 2, 0);
	if (pht->iaddr == NULL) {
		dev_err(&pdev->dev, "can't remap input space\n");
		goto err_unmc;
	}
	pht->oaddr = pci_iomap(pdev, 3, 0);
	if (pht->oaddr == NULL) {
		dev_err(&pdev->dev, "can't remap output space\n");
		goto err_unmi;
	}

	mutex_init(&pht->open_lock);
	spin_lock_init(&pht->regs_lock);
	init_waitqueue_head(&pht->wait);
	cdev_init(&pht->cdev, &phantom_file_ops);
	pht->cdev.owner = THIS_MODULE;

	iowrite32(0, pht->caddr + PHN_IRQCTL);
	ioread32(pht->caddr + PHN_IRQCTL); /* PCI posting */
	retval = request_irq(pdev->irq, phantom_isr,
			IRQF_SHARED | IRQF_DISABLED, "phantom", pht);
	if (retval) {
		dev_err(&pdev->dev, "can't establish ISR\n");
		goto err_unmo;
	}

	retval = cdev_add(&pht->cdev, MKDEV(phantom_major, minor), 1);
	if (retval) {
		dev_err(&pdev->dev, "chardev registration failed\n");
		goto err_irq;
	}

	if (IS_ERR(device_create(phantom_class, &pdev->dev,
				 MKDEV(phantom_major, minor), NULL,
				 "phantom%u", minor)))
		dev_err(&pdev->dev, "can't create device\n");

	pci_set_drvdata(pdev, pht);

	return 0;
err_irq:
	free_irq(pdev->irq, pht);
err_unmo:
	pci_iounmap(pdev, pht->oaddr);
err_unmi:
	pci_iounmap(pdev, pht->iaddr);
err_unmc:
	pci_iounmap(pdev, pht->caddr);
err_fr:
	kfree(pht);
err_reg:
	pci_release_regions(pdev);
err_null:
	phantom_devices[minor] = 0;
err_dis:
	pci_disable_device(pdev);
err:
	return retval;
}

static void __devexit phantom_remove(struct pci_dev *pdev)
{
	struct phantom_device *pht = pci_get_drvdata(pdev);
	unsigned int minor = MINOR(pht->cdev.dev);

	device_destroy(phantom_class, MKDEV(phantom_major, minor));

	cdev_del(&pht->cdev);

	iowrite32(0, pht->caddr + PHN_IRQCTL);
	ioread32(pht->caddr + PHN_IRQCTL); /* PCI posting */
	free_irq(pdev->irq, pht);

	pci_iounmap(pdev, pht->oaddr);
	pci_iounmap(pdev, pht->iaddr);
	pci_iounmap(pdev, pht->caddr);

	kfree(pht);

	pci_release_regions(pdev);

	phantom_devices[minor] = 0;

	pci_disable_device(pdev);
}

#ifdef CONFIG_PM
static int phantom_suspend(struct pci_dev *pdev, pm_message_t state)
{
	struct phantom_device *dev = pci_get_drvdata(pdev);

	iowrite32(0, dev->caddr + PHN_IRQCTL);
	ioread32(dev->caddr + PHN_IRQCTL); /* PCI posting */

	synchronize_irq(pdev->irq);

	return 0;
}

static int phantom_resume(struct pci_dev *pdev)
{
	struct phantom_device *dev = pci_get_drvdata(pdev);

	iowrite32(0, dev->caddr + PHN_IRQCTL);

	return 0;
}
#else
#define phantom_suspend	NULL
#define phantom_resume	NULL
#endif

static struct pci_device_id phantom_pci_tbl[] __devinitdata = {
	{ .vendor = PCI_VENDOR_ID_PLX, .device = PCI_DEVICE_ID_PLX_9050,
	  .subvendor = PCI_VENDOR_ID_PLX, .subdevice = PCI_DEVICE_ID_PLX_9050,
	  .class = PCI_CLASS_BRIDGE_OTHER << 8, .class_mask = 0xffff00 },
	{ 0, }
};
MODULE_DEVICE_TABLE(pci, phantom_pci_tbl);

static struct pci_driver phantom_pci_driver = {
	.name = "phantom",
	.id_table = phantom_pci_tbl,
	.probe = phantom_probe,
	.remove = __devexit_p(phantom_remove),
	.suspend = phantom_suspend,
	.resume = phantom_resume
};

static ssize_t phantom_show_version(struct class *cls, char *buf)
{
	return sprintf(buf, PHANTOM_VERSION "\n");
}

static CLASS_ATTR(version, 0444, phantom_show_version, NULL);

static int __init phantom_init(void)
{
	int retval;
	dev_t dev;

	phantom_class = class_create(THIS_MODULE, "phantom");
	if (IS_ERR(phantom_class)) {
		retval = PTR_ERR(phantom_class);
		printk(KERN_ERR "phantom: can't register phantom class\n");
		goto err;
	}
	retval = class_create_file(phantom_class, &class_attr_version);
	if (retval) {
		printk(KERN_ERR "phantom: can't create sysfs version file\n");
		goto err_class;
	}

	retval = alloc_chrdev_region(&dev, 0, PHANTOM_MAX_MINORS, "phantom");
	if (retval) {
		printk(KERN_ERR "phantom: can't register character device\n");
		goto err_attr;
	}
	phantom_major = MAJOR(dev);

	retval = pci_register_driver(&phantom_pci_driver);
	if (retval) {
		printk(KERN_ERR "phantom: can't register pci driver\n");
		goto err_unchr;
	}

	printk(KERN_INFO "Phantom Linux Driver, version " PHANTOM_VERSION ", "
			"init OK\n");

	return 0;
err_unchr:
	unregister_chrdev_region(dev, PHANTOM_MAX_MINORS);
err_attr:
	class_remove_file(phantom_class, &class_attr_version);
err_class:
	class_destroy(phantom_class);
err:
	return retval;
}

static void __exit phantom_exit(void)
{
	pci_unregister_driver(&phantom_pci_driver);

	unregister_chrdev_region(MKDEV(phantom_major, 0), PHANTOM_MAX_MINORS);

	class_remove_file(phantom_class, &class_attr_version);
	class_destroy(phantom_class);

	pr_debug("phantom: module successfully removed\n");
}

module_init(phantom_init);
module_exit(phantom_exit);

MODULE_AUTHOR("Jiri Slaby <jirislaby@gmail.com>");
MODULE_DESCRIPTION("Sensable Phantom driver (PCI devices)");
MODULE_LICENSE("GPL");
MODULE_VERSION(PHANTOM_VERSION);
Commit	Line	Data
cef2cf07 JS	1	/*
	2	* Copyright (C) 2005-2007 Jiri Slaby <jirislaby@gmail.com>
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License as published by
	6	* the Free Software Foundation; either version 2 of the License, or
	7	* (at your option) any later version.
	8	*
0211a9c8	9	* You need a userspace library to cooperate with this driver. It (and other
cef2cf07 JS	10	* info) may be obtained here:
cef2cf07 JS	11	* http://www.fi.muni.cz/~xslaby/phantom.html
b2afe331	12	* or alternatively, you might use OpenHaptics provided by Sensable.
cef2cf07 JS	13	*/
cef2cf07 JS	14
7e4e8e68	15	#include <linux/compat.h>
cef2cf07 JS	16	#include <linux/kernel.h>
	17	#include <linux/module.h>
	18	#include <linux/device.h>
	19	#include <linux/pci.h>
	20	#include <linux/fs.h>
	21	#include <linux/poll.h>
	22	#include <linux/interrupt.h>
	23	#include <linux/cdev.h>
	24	#include <linux/phantom.h>
d43c36dc	25	#include <linux/sched.h>
4541b5ec	26	#include <linux/smp_lock.h>
cef2cf07 JS	27
	28	#include <asm/atomic.h>
	29	#include <asm/io.h>
	30
82f56087	31	#define PHANTOM_VERSION "n0.9.8"
cef2cf07 JS	32
	33	#define PHANTOM_MAX_MINORS 8
	34
	35	#define PHN_IRQCTL 0x4c /* irq control in caddr space */
	36
	37	#define PHB_RUNNING 1
bc552f77	38	#define PHB_NOT_OH 2
cef2cf07 JS	39
	40	static struct class *phantom_class;
	41	static int phantom_major;
	42
	43	struct phantom_device {
	44	unsigned int opened;
	45	void __iomem *caddr;
	46	u32 __iomem *iaddr;
	47	u32 __iomem *oaddr;
	48	unsigned long status;
	49	atomic_t counter;
	50
	51	wait_queue_head_t wait;
	52	struct cdev cdev;
	53
	54	struct mutex open_lock;
bc552f77 JS	55	spinlock_t regs_lock;
	56
	57	/* used in NOT_OH mode */
	58	struct phm_regs oregs;
	59	u32 ctl_reg;
cef2cf07 JS	60	};
	61
	62	static unsigned char phantom_devices[PHANTOM_MAX_MINORS];
	63
	64	static int phantom_status(struct phantom_device *dev, unsigned long newstat)
	65	{
	66	pr_debug("phantom_status %lx %lx\n", dev->status, newstat);
	67
	68	if (!(dev->status & PHB_RUNNING) && (newstat & PHB_RUNNING)) {
	69	atomic_set(&dev->counter, 0);
	70	iowrite32(PHN_CTL_IRQ, dev->iaddr + PHN_CONTROL);
	71	iowrite32(0x43, dev->caddr + PHN_IRQCTL);
c8511f94 JS	72	ioread32(dev->caddr + PHN_IRQCTL); /* PCI posting */
c8511f94 JS	73	} else if ((dev->status & PHB_RUNNING) && !(newstat & PHB_RUNNING)) {
cef2cf07	74	iowrite32(0, dev->caddr + PHN_IRQCTL);
c8511f94 JS	75	ioread32(dev->caddr + PHN_IRQCTL); /* PCI posting */
c8511f94 JS	76	}
cef2cf07 JS	77
	78	dev->status = newstat;
	79
	80	return 0;
	81	}
	82
	83	/*
	84	* File ops
	85	*/
	86
c15395c0 JS	87	static long phantom_ioctl(struct file *file, unsigned int cmd,
c15395c0 JS	88	unsigned long arg)
cef2cf07 JS	89	{
	90	struct phantom_device *dev = file->private_data;
	91	struct phm_regs rs;
	92	struct phm_reg r;
	93	void __user argp = (void __user )arg;
bc552f77	94	unsigned long flags;
cef2cf07 JS	95	unsigned int i;
cef2cf07 JS	96
cef2cf07	97	switch (cmd) {
7e4e8e68	98	case PHN_SETREG:
cef2cf07 JS	99	case PHN_SET_REG:
	100	if (copy_from_user(&r, argp, sizeof(r)))
	101	return -EFAULT;
	102
	103	if (r.reg > 7)
	104	return -EINVAL;
	105
bc552f77	106	spin_lock_irqsave(&dev->regs_lock, flags);
cef2cf07	107	if (r.reg == PHN_CONTROL && (r.value & PHN_CTL_IRQ) &&
c15395c0	108	phantom_status(dev, dev->status \| PHB_RUNNING)){
bc552f77	109	spin_unlock_irqrestore(&dev->regs_lock, flags);
cef2cf07	110	return -ENODEV;
c15395c0	111	}
cef2cf07 JS	112
cef2cf07 JS	113	pr_debug("phantom: writing %x to %u\n", r.value, r.reg);
bc552f77 JS	114
	115	/* preserve amp bit (don't allow to change it when in NOT_OH) */
	116	if (r.reg == PHN_CONTROL && (dev->status & PHB_NOT_OH)) {
	117	r.value &= ~PHN_CTL_AMP;
	118	r.value \|= dev->ctl_reg & PHN_CTL_AMP;
	119	dev->ctl_reg = r.value;
	120	}
	121
cef2cf07	122	iowrite32(r.value, dev->iaddr + r.reg);
c8511f94	123	ioread32(dev->iaddr); /* PCI posting */
cef2cf07 JS	124
	125	if (r.reg == PHN_CONTROL && !(r.value & PHN_CTL_IRQ))
	126	phantom_status(dev, dev->status & ~PHB_RUNNING);
bc552f77	127	spin_unlock_irqrestore(&dev->regs_lock, flags);
cef2cf07	128	break;
7e4e8e68	129	case PHN_SETREGS:
cef2cf07 JS	130	case PHN_SET_REGS:
	131	if (copy_from_user(&rs, argp, sizeof(rs)))
	132	return -EFAULT;
	133
	134	pr_debug("phantom: SRS %u regs %x\n", rs.count, rs.mask);
bc552f77 JS	135	spin_lock_irqsave(&dev->regs_lock, flags);
	136	if (dev->status & PHB_NOT_OH)
	137	memcpy(&dev->oregs, &rs, sizeof(rs));
	138	else {
	139	u32 m = min(rs.count, 8U);
	140	for (i = 0; i < m; i++)
	141	if (rs.mask & BIT(i))
	142	iowrite32(rs.values[i], dev->oaddr + i);
	143	ioread32(dev->iaddr); /* PCI posting */
	144	}
	145	spin_unlock_irqrestore(&dev->regs_lock, flags);
cef2cf07	146	break;
7e4e8e68	147	case PHN_GETREG:
cef2cf07 JS	148	case PHN_GET_REG:
	149	if (copy_from_user(&r, argp, sizeof(r)))
	150	return -EFAULT;
	151
	152	if (r.reg > 7)
	153	return -EINVAL;
	154
	155	r.value = ioread32(dev->iaddr + r.reg);
	156
	157	if (copy_to_user(argp, &r, sizeof(r)))
	158	return -EFAULT;
	159	break;
7e4e8e68	160	case PHN_GETREGS:
bc552f77 JS	161	case PHN_GET_REGS: {
	162	u32 m;
	163
cef2cf07 JS	164	if (copy_from_user(&rs, argp, sizeof(rs)))
	165	return -EFAULT;
	166
bc552f77 JS	167	m = min(rs.count, 8U);
bc552f77 JS	168
cef2cf07	169	pr_debug("phantom: GRS %u regs %x\n", rs.count, rs.mask);
bc552f77 JS	170	spin_lock_irqsave(&dev->regs_lock, flags);
	171	for (i = 0; i < m; i++)
	172	if (rs.mask & BIT(i))
cef2cf07	173	rs.values[i] = ioread32(dev->iaddr + i);
7d4f9f09	174	atomic_set(&dev->counter, 0);
bc552f77	175	spin_unlock_irqrestore(&dev->regs_lock, flags);
cef2cf07 JS	176
	177	if (copy_to_user(argp, &rs, sizeof(rs)))
	178	return -EFAULT;
	179	break;
bc552f77 JS	180	} case PHN_NOT_OH:
	181	spin_lock_irqsave(&dev->regs_lock, flags);
	182	if (dev->status & PHB_RUNNING) {
	183	printk(KERN_ERR "phantom: you need to set NOT_OH "
	184	"before you start the device!\n");
	185	spin_unlock_irqrestore(&dev->regs_lock, flags);
	186	return -EINVAL;
	187	}
	188	dev->status \|= PHB_NOT_OH;
	189	spin_unlock_irqrestore(&dev->regs_lock, flags);
	190	break;
cef2cf07 JS	191	default:
	192	return -ENOTTY;
	193	}
	194
	195	return 0;
	196	}
	197
7e4e8e68 JS	198	#ifdef CONFIG_COMPAT
	199	static long phantom_compat_ioctl(struct file *filp, unsigned int cmd,
	200	unsigned long arg)
	201	{
	202	if (_IOC_NR(cmd) <= 3 && _IOC_SIZE(cmd) == sizeof(compat_uptr_t)) {
	203	cmd &= ~(_IOC_SIZEMASK << _IOC_SIZESHIFT);
	204	cmd \|= sizeof(void *) << _IOC_SIZESHIFT;
	205	}
	206	return phantom_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
	207	}
	208	#else
	209	#define phantom_compat_ioctl NULL
	210	#endif
	211
cef2cf07 JS	212	static int phantom_open(struct inode inode, struct file file)
	213	{
	214	struct phantom_device *dev = container_of(inode->i_cdev,
	215	struct phantom_device, cdev);
	216
4541b5ec	217	lock_kernel();
cef2cf07 JS	218	nonseekable_open(inode, file);
cef2cf07 JS	219
4541b5ec JC	220	if (mutex_lock_interruptible(&dev->open_lock)) {
4541b5ec JC	221	unlock_kernel();
cef2cf07	222	return -ERESTARTSYS;
4541b5ec	223	}
cef2cf07 JS	224
	225	if (dev->opened) {
	226	mutex_unlock(&dev->open_lock);
4541b5ec	227	unlock_kernel();
cef2cf07 JS	228	return -EINVAL;
	229	}
	230
bc552f77 JS	231	WARN_ON(dev->status & PHB_NOT_OH);
bc552f77 JS	232
cef2cf07 JS	233	file->private_data = dev;
cef2cf07 JS	234
bc552f77	235	atomic_set(&dev->counter, 0);
cef2cf07 JS	236	dev->opened++;
cef2cf07 JS	237	mutex_unlock(&dev->open_lock);
4541b5ec	238	unlock_kernel();
cef2cf07 JS	239	return 0;
	240	}
	241
	242	static int phantom_release(struct inode inode, struct file file)
	243	{
	244	struct phantom_device *dev = file->private_data;
	245
	246	mutex_lock(&dev->open_lock);
	247
	248	dev->opened = 0;
	249	phantom_status(dev, dev->status & ~PHB_RUNNING);
bc552f77	250	dev->status &= ~PHB_NOT_OH;
cef2cf07 JS	251
	252	mutex_unlock(&dev->open_lock);
	253
	254	return 0;
	255	}
	256
	257	static unsigned int phantom_poll(struct file file, poll_table wait)
	258	{
	259	struct phantom_device *dev = file->private_data;
	260	unsigned int mask = 0;
	261
	262	pr_debug("phantom_poll: %d\n", atomic_read(&dev->counter));
	263	poll_wait(file, &dev->wait, wait);
7d4f9f09 JS	264
	265	if (!(dev->status & PHB_RUNNING))
	266	mask = POLLERR;
	267	else if (atomic_read(&dev->counter))
cef2cf07	268	mask = POLLIN \| POLLRDNORM;
7d4f9f09	269
cef2cf07 JS	270	pr_debug("phantom_poll end: %x/%d\n", mask, atomic_read(&dev->counter));
	271
	272	return mask;
	273	}
	274
828c0950	275	static const struct file_operations phantom_file_ops = {
cef2cf07 JS	276	.open = phantom_open,
cef2cf07 JS	277	.release = phantom_release,
c15395c0	278	.unlocked_ioctl = phantom_ioctl,
7e4e8e68	279	.compat_ioctl = phantom_compat_ioctl,
cef2cf07 JS	280	.poll = phantom_poll,
	281	};
	282
	283	static irqreturn_t phantom_isr(int irq, void *data)
	284	{
	285	struct phantom_device *dev = data;
bc552f77 JS	286	unsigned int i;
bc552f77 JS	287	u32 ctl;
cef2cf07	288
bc552f77 JS	289	spin_lock(&dev->regs_lock);
	290	ctl = ioread32(dev->iaddr + PHN_CONTROL);
	291	if (!(ctl & PHN_CTL_IRQ)) {
	292	spin_unlock(&dev->regs_lock);
cef2cf07	293	return IRQ_NONE;
bc552f77	294	}
cef2cf07 JS	295
	296	iowrite32(0, dev->iaddr);
	297	iowrite32(0xc0, dev->iaddr);
bc552f77 JS	298
	299	if (dev->status & PHB_NOT_OH) {
	300	struct phm_regs *r = &dev->oregs;
	301	u32 m = min(r->count, 8U);
	302
	303	for (i = 0; i < m; i++)
	304	if (r->mask & BIT(i))
	305	iowrite32(r->values[i], dev->oaddr + i);
	306
	307	dev->ctl_reg ^= PHN_CTL_AMP;
	308	iowrite32(dev->ctl_reg, dev->iaddr + PHN_CONTROL);
	309	}
	310	spin_unlock(&dev->regs_lock);
	311
c8511f94	312	ioread32(dev->iaddr); /* PCI posting */
cef2cf07 JS	313
	314	atomic_inc(&dev->counter);
	315	wake_up_interruptible(&dev->wait);
	316
	317	return IRQ_HANDLED;
	318	}
	319
	320	/*
	321	* Init and deinit driver
	322	*/
	323
	324	static unsigned int __devinit phantom_get_free(void)
	325	{
	326	unsigned int i;
	327
	328	for (i = 0; i < PHANTOM_MAX_MINORS; i++)
	329	if (phantom_devices[i] == 0)
	330	break;
	331
	332	return i;
	333	}
	334
	335	static int __devinit phantom_probe(struct pci_dev *pdev,
	336	const struct pci_device_id *pci_id)
	337	{
	338	struct phantom_device *pht;
	339	unsigned int minor;
	340	int retval;
	341
	342	retval = pci_enable_device(pdev);
	343	if (retval)
	344	goto err;
	345
	346	minor = phantom_get_free();
	347	if (minor == PHANTOM_MAX_MINORS) {
	348	dev_err(&pdev->dev, "too many devices found!\n");
	349	retval = -EIO;
	350	goto err_dis;
	351	}
	352
	353	phantom_devices[minor] = 1;
	354
	355	retval = pci_request_regions(pdev, "phantom");
	356	if (retval)
	357	goto err_null;
	358
	359	retval = -ENOMEM;
	360	pht = kzalloc(sizeof(*pht), GFP_KERNEL);
	361	if (pht == NULL) {
	362	dev_err(&pdev->dev, "unable to allocate device\n");
	363	goto err_reg;
	364	}
	365
	366	pht->caddr = pci_iomap(pdev, 0, 0);
	367	if (pht->caddr == NULL) {
	368	dev_err(&pdev->dev, "can't remap conf space\n");
	369	goto err_fr;
	370	}
	371	pht->iaddr = pci_iomap(pdev, 2, 0);
	372	if (pht->iaddr == NULL) {
	373	dev_err(&pdev->dev, "can't remap input space\n");
	374	goto err_unmc;
	375	}
	376	pht->oaddr = pci_iomap(pdev, 3, 0);
377	if (pht->oaddr == NULL) {
378	dev_err(&pdev->dev, "can't remap output space\n");
379	goto err_unmi;
380	}
381
382	mutex_init(&pht->open_lock);
bc552f77	383	spin_lock_init(&pht->regs_lock);
cef2cf07 JS	384	init_waitqueue_head(&pht->wait);
	385	cdev_init(&pht->cdev, &phantom_file_ops);
	386	pht->cdev.owner = THIS_MODULE;
	387
	388	iowrite32(0, pht->caddr + PHN_IRQCTL);
c8511f94	389	ioread32(pht->caddr + PHN_IRQCTL); /* PCI posting */
cef2cf07 JS	390	retval = request_irq(pdev->irq, phantom_isr,
	391	IRQF_SHARED \| IRQF_DISABLED, "phantom", pht);
	392	if (retval) {
	393	dev_err(&pdev->dev, "can't establish ISR\n");
	394	goto err_unmo;
	395	}
	396
	397	retval = cdev_add(&pht->cdev, MKDEV(phantom_major, minor), 1);
	398	if (retval) {
	399	dev_err(&pdev->dev, "chardev registration failed\n");
	400	goto err_irq;
	401	}
	402
a9b12619 GKH	403	if (IS_ERR(device_create(phantom_class, &pdev->dev,
	404	MKDEV(phantom_major, minor), NULL,
	405	"phantom%u", minor)))
cef2cf07 JS	406	dev_err(&pdev->dev, "can't create device\n");
	407
	408	pci_set_drvdata(pdev, pht);
	409
	410	return 0;
	411	err_irq:
	412	free_irq(pdev->irq, pht);
	413	err_unmo:
	414	pci_iounmap(pdev, pht->oaddr);
	415	err_unmi:
	416	pci_iounmap(pdev, pht->iaddr);
	417	err_unmc:
	418	pci_iounmap(pdev, pht->caddr);
	419	err_fr:
	420	kfree(pht);
	421	err_reg:
	422	pci_release_regions(pdev);
	423	err_null:
	424	phantom_devices[minor] = 0;
	425	err_dis:
	426	pci_disable_device(pdev);
	427	err:
	428	return retval;
	429	}
	430
	431	static void __devexit phantom_remove(struct pci_dev *pdev)
	432	{
	433	struct phantom_device *pht = pci_get_drvdata(pdev);
	434	unsigned int minor = MINOR(pht->cdev.dev);
	435
	436	device_destroy(phantom_class, MKDEV(phantom_major, minor));
	437
	438	cdev_del(&pht->cdev);
	439
	440	iowrite32(0, pht->caddr + PHN_IRQCTL);
c8511f94	441	ioread32(pht->caddr + PHN_IRQCTL); /* PCI posting */
cef2cf07 JS	442	free_irq(pdev->irq, pht);
	443
	444	pci_iounmap(pdev, pht->oaddr);
	445	pci_iounmap(pdev, pht->iaddr);
	446	pci_iounmap(pdev, pht->caddr);
	447
	448	kfree(pht);
	449
	450	pci_release_regions(pdev);
	451
	452	phantom_devices[minor] = 0;
	453
	454	pci_disable_device(pdev);
	455	}
	456
	457	#ifdef CONFIG_PM
	458	static int phantom_suspend(struct pci_dev *pdev, pm_message_t state)
	459	{
	460	struct phantom_device *dev = pci_get_drvdata(pdev);
	461
	462	iowrite32(0, dev->caddr + PHN_IRQCTL);
c8511f94	463	ioread32(dev->caddr + PHN_IRQCTL); /* PCI posting */
cef2cf07	464
aee8447c JS	465	synchronize_irq(pdev->irq);
aee8447c JS	466
cef2cf07 JS	467	return 0;
	468	}
	469
	470	static int phantom_resume(struct pci_dev *pdev)
	471	{
	472	struct phantom_device *dev = pci_get_drvdata(pdev);
	473
	474	iowrite32(0, dev->caddr + PHN_IRQCTL);
	475
	476	return 0;
	477	}
	478	#else
	479	#define phantom_suspend NULL
	480	#define phantom_resume NULL
	481	#endif
	482
	483	static struct pci_device_id phantom_pci_tbl[] __devinitdata = {
82f56087 JS	484	{ .vendor = PCI_VENDOR_ID_PLX, .device = PCI_DEVICE_ID_PLX_9050,
	485	.subvendor = PCI_VENDOR_ID_PLX, .subdevice = PCI_DEVICE_ID_PLX_9050,
	486	.class = PCI_CLASS_BRIDGE_OTHER << 8, .class_mask = 0xffff00 },
cef2cf07 JS	487	{ 0, }
	488	};
	489	MODULE_DEVICE_TABLE(pci, phantom_pci_tbl);
	490
	491	static struct pci_driver phantom_pci_driver = {
	492	.name = "phantom",
	493	.id_table = phantom_pci_tbl,
	494	.probe = phantom_probe,
	495	.remove = __devexit_p(phantom_remove),
	496	.suspend = phantom_suspend,
	497	.resume = phantom_resume
	498	};
	499
	500	static ssize_t phantom_show_version(struct class cls, char buf)
	501	{
	502	return sprintf(buf, PHANTOM_VERSION "\n");
	503	}
	504
	505	static CLASS_ATTR(version, 0444, phantom_show_version, NULL);
	506
	507	static int __init phantom_init(void)
	508	{
	509	int retval;
	510	dev_t dev;
	511
	512	phantom_class = class_create(THIS_MODULE, "phantom");
	513	if (IS_ERR(phantom_class)) {
	514	retval = PTR_ERR(phantom_class);
	515	printk(KERN_ERR "phantom: can't register phantom class\n");
	516	goto err;
	517	}
	518	retval = class_create_file(phantom_class, &class_attr_version);
	519	if (retval) {
	520	printk(KERN_ERR "phantom: can't create sysfs version file\n");
	521	goto err_class;
	522	}
	523
	524	retval = alloc_chrdev_region(&dev, 0, PHANTOM_MAX_MINORS, "phantom");
	525	if (retval) {
	526	printk(KERN_ERR "phantom: can't register character device\n");
	527	goto err_attr;
	528	}
	529	phantom_major = MAJOR(dev);
	530
	531	retval = pci_register_driver(&phantom_pci_driver);
	532	if (retval) {
	533	printk(KERN_ERR "phantom: can't register pci driver\n");
	534	goto err_unchr;
	535	}
	536
	537	printk(KERN_INFO "Phantom Linux Driver, version " PHANTOM_VERSION ", "
	538	"init OK\n");
	539
	540	return 0;
	541	err_unchr:
	542	unregister_chrdev_region(dev, PHANTOM_MAX_MINORS);
	543	err_attr:
	544	class_remove_file(phantom_class, &class_attr_version);
	545	err_class:
	546	class_destroy(phantom_class);
	547	err:
	548	return retval;
	549	}
	550
551	static void __exit phantom_exit(void)
552	{
553	pci_unregister_driver(&phantom_pci_driver);
554
555	unregister_chrdev_region(MKDEV(phantom_major, 0), PHANTOM_MAX_MINORS);
556
557	class_remove_file(phantom_class, &class_attr_version);
558	class_destroy(phantom_class);
559
560	pr_debug("phantom: module successfully removed\n");
561	}
562
563	module_init(phantom_init);
564	module_exit(phantom_exit);
565
566	MODULE_AUTHOR("Jiri Slaby <jirislaby@gmail.com>");
ec905a18	567	MODULE_DESCRIPTION("Sensable Phantom driver (PCI devices)");
cef2cf07 JS	568	MODULE_LICENSE("GPL");
cef2cf07 JS	569	MODULE_VERSION(PHANTOM_VERSION);