[mirror_ubuntu-artful-kernel.git] / drivers / mmc / host / dw_mmc-k3.c

/*
 * Copyright (c) 2013 Linaro Ltd.
 * Copyright (c) 2013 Hisilicon Limited.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/clk.h>
#include <linux/mfd/syscon.h>
#include <linux/mmc/host.h>
#include <linux/mmc/dw_mmc.h>
#include <linux/module.h>
#include <linux/of_address.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>

#include "dw_mmc.h"
#include "dw_mmc-pltfm.h"

/*
 * hi6220 sd only support io voltage 1.8v and 3v
 * Also need config AO_SCTRL_SEL18 accordingly
 */
#define AO_SCTRL_SEL18		BIT(10)
#define AO_SCTRL_CTRL3		0x40C

struct k3_priv {
	struct regmap	*reg;
};

static unsigned long dw_mci_hi6220_caps[] = {
	MMC_CAP_CMD23,
	MMC_CAP_CMD23,
	0
};

static void dw_mci_k3_set_ios(struct dw_mci *host, struct mmc_ios *ios)
{
	int ret;

	ret = clk_set_rate(host->ciu_clk, ios->clock);
	if (ret)
		dev_warn(host->dev, "failed to set rate %uHz\n", ios->clock);

	host->bus_hz = clk_get_rate(host->ciu_clk);
}

static const struct dw_mci_drv_data k3_drv_data = {
	.set_ios		= dw_mci_k3_set_ios,
};

static int dw_mci_hi6220_parse_dt(struct dw_mci *host)
{
	struct k3_priv *priv;

	priv = devm_kzalloc(host->dev, sizeof(*priv), GFP_KERNEL);
	if (!priv)
		return -ENOMEM;

	priv->reg = syscon_regmap_lookup_by_phandle(host->dev->of_node,
					 "hisilicon,peripheral-syscon");
	if (IS_ERR(priv->reg))
		priv->reg = NULL;

	host->priv = priv;
	return 0;
}

static int dw_mci_hi6220_switch_voltage(struct mmc_host *mmc, struct mmc_ios *ios)
{
	struct dw_mci_slot *slot = mmc_priv(mmc);
	struct k3_priv *priv;
	struct dw_mci *host;
	int min_uv, max_uv;
	int ret;

	host = slot->host;
	priv = host->priv;

	if (!priv || !priv->reg)
		return 0;

	if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) {
		ret = regmap_update_bits(priv->reg, AO_SCTRL_CTRL3,
					 AO_SCTRL_SEL18, 0);
		min_uv = 3000000;
		max_uv = 3000000;
	} else if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_180) {
		ret = regmap_update_bits(priv->reg, AO_SCTRL_CTRL3,
					 AO_SCTRL_SEL18, AO_SCTRL_SEL18);
		min_uv = 1800000;
		max_uv = 1800000;
	} else {
		dev_dbg(host->dev, "voltage not supported\n");
		return -EINVAL;
	}

	if (ret) {
		dev_dbg(host->dev, "switch voltage failed\n");
		return ret;
	}

	if (IS_ERR_OR_NULL(mmc->supply.vqmmc))
		return 0;

	ret = regulator_set_voltage(mmc->supply.vqmmc, min_uv, max_uv);
	if (ret) {
		dev_dbg(host->dev, "Regulator set error %d: %d - %d\n",
				 ret, min_uv, max_uv);
		return ret;
	}

	return 0;
}

static void dw_mci_hi6220_set_ios(struct dw_mci *host, struct mmc_ios *ios)
{
	int ret;
	unsigned int clock;

	clock = (ios->clock <= 25000000) ? 25000000 : ios->clock;

	ret = clk_set_rate(host->biu_clk, clock);
	if (ret)
		dev_warn(host->dev, "failed to set rate %uHz\n", clock);

	host->bus_hz = clk_get_rate(host->biu_clk);
}

static int dw_mci_hi6220_execute_tuning(struct dw_mci_slot *slot, u32 opcode)
{
	return 0;
}

static const struct dw_mci_drv_data hi6220_data = {
	.caps			= dw_mci_hi6220_caps,
	.switch_voltage		= dw_mci_hi6220_switch_voltage,
	.set_ios		= dw_mci_hi6220_set_ios,
	.parse_dt		= dw_mci_hi6220_parse_dt,
	.execute_tuning		= dw_mci_hi6220_execute_tuning,
};

static const struct of_device_id dw_mci_k3_match[] = {
	{ .compatible = "hisilicon,hi4511-dw-mshc", .data = &k3_drv_data, },
	{ .compatible = "hisilicon,hi6220-dw-mshc", .data = &hi6220_data, },
	{},
};
MODULE_DEVICE_TABLE(of, dw_mci_k3_match);

static int dw_mci_k3_probe(struct platform_device *pdev)
{
	const struct dw_mci_drv_data *drv_data;
	const struct of_device_id *match;

	match = of_match_node(dw_mci_k3_match, pdev->dev.of_node);
	drv_data = match->data;

	return dw_mci_pltfm_register(pdev, drv_data);
}

static const struct dev_pm_ops dw_mci_k3_dev_pm_ops = {
	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
				pm_runtime_force_resume)
	SET_RUNTIME_PM_OPS(dw_mci_runtime_suspend,
			   dw_mci_runtime_resume,
			   NULL)
};

static struct platform_driver dw_mci_k3_pltfm_driver = {
	.probe		= dw_mci_k3_probe,
	.remove		= dw_mci_pltfm_remove,
	.driver		= {
		.name		= "dwmmc_k3",
		.of_match_table	= dw_mci_k3_match,
		.pm		= &dw_mci_k3_dev_pm_ops,
	},
};

module_platform_driver(dw_mci_k3_pltfm_driver);

MODULE_DESCRIPTION("K3 Specific DW-MSHC Driver Extension");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("platform:dwmmc_k3");
Commit	Line	Data
036f29d5 ZG	1	/*
	2	* Copyright (c) 2013 Linaro Ltd.
	3	* Copyright (c) 2013 Hisilicon Limited.
	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License as published by
	7	* the Free Software Foundation; either version 2 of the License, or
	8	* (at your option) any later version.
	9	*/
	10
036f29d5	11	#include <linux/clk.h>
0293efdd	12	#include <linux/mfd/syscon.h>
036f29d5 ZG	13	#include <linux/mmc/host.h>
036f29d5 ZG	14	#include <linux/mmc/dw_mmc.h>
0293efdd	15	#include <linux/module.h>
036f29d5	16	#include <linux/of_address.h>
0293efdd	17	#include <linux/platform_device.h>
2c8ae20e	18	#include <linux/pm_runtime.h>
0293efdd ZG	19	#include <linux/regmap.h>
0293efdd ZG	20	#include <linux/regulator/consumer.h>
036f29d5 ZG	21
	22	#include "dw_mmc.h"
	23	#include "dw_mmc-pltfm.h"
	24
0293efdd ZG	25	/*
	26	* hi6220 sd only support io voltage 1.8v and 3v
	27	* Also need config AO_SCTRL_SEL18 accordingly
	28	*/
	29	#define AO_SCTRL_SEL18 BIT(10)
	30	#define AO_SCTRL_CTRL3 0x40C
	31
	32	struct k3_priv {
	33	struct regmap *reg;
	34	};
	35
af637629 JF	36	static unsigned long dw_mci_hi6220_caps[] = {
	37	MMC_CAP_CMD23,
	38	MMC_CAP_CMD23,
	39	0
	40	};
	41
036f29d5 ZG	42	static void dw_mci_k3_set_ios(struct dw_mci host, struct mmc_ios ios)
036f29d5 ZG	43	{
036f29d5 ZG	44	int ret;
036f29d5 ZG	45
0e662440	46	ret = clk_set_rate(host->ciu_clk, ios->clock);
036f29d5	47	if (ret)
0e662440	48	dev_warn(host->dev, "failed to set rate %uHz\n", ios->clock);
036f29d5 ZG	49
	50	host->bus_hz = clk_get_rate(host->ciu_clk);
	51	}
	52
036f29d5 ZG	53	static const struct dw_mci_drv_data k3_drv_data = {
036f29d5 ZG	54	.set_ios = dw_mci_k3_set_ios,
036f29d5 ZG	55	};
036f29d5 ZG	56
0293efdd ZG	57	static int dw_mci_hi6220_parse_dt(struct dw_mci *host)
	58	{
	59	struct k3_priv *priv;
	60
	61	priv = devm_kzalloc(host->dev, sizeof(*priv), GFP_KERNEL);
	62	if (!priv)
	63	return -ENOMEM;
	64
	65	priv->reg = syscon_regmap_lookup_by_phandle(host->dev->of_node,
	66	"hisilicon,peripheral-syscon");
	67	if (IS_ERR(priv->reg))
	68	priv->reg = NULL;
	69
	70	host->priv = priv;
	71	return 0;
	72	}
	73
	74	static int dw_mci_hi6220_switch_voltage(struct mmc_host mmc, struct mmc_ios ios)
	75	{
	76	struct dw_mci_slot *slot = mmc_priv(mmc);
	77	struct k3_priv *priv;
	78	struct dw_mci *host;
	79	int min_uv, max_uv;
	80	int ret;
	81
	82	host = slot->host;
	83	priv = host->priv;
	84
	85	if (!priv \|\| !priv->reg)
	86	return 0;
	87
	88	if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) {
	89	ret = regmap_update_bits(priv->reg, AO_SCTRL_CTRL3,
	90	AO_SCTRL_SEL18, 0);
	91	min_uv = 3000000;
	92	max_uv = 3000000;
	93	} else if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_180) {
	94	ret = regmap_update_bits(priv->reg, AO_SCTRL_CTRL3,
	95	AO_SCTRL_SEL18, AO_SCTRL_SEL18);
	96	min_uv = 1800000;
	97	max_uv = 1800000;
	98	} else {
	99	dev_dbg(host->dev, "voltage not supported\n");
	100	return -EINVAL;
	101	}
	102
	103	if (ret) {
	104	dev_dbg(host->dev, "switch voltage failed\n");
	105	return ret;
	106	}
	107
	108	if (IS_ERR_OR_NULL(mmc->supply.vqmmc))
	109	return 0;
	110
	111	ret = regulator_set_voltage(mmc->supply.vqmmc, min_uv, max_uv);
	112	if (ret) {
	113	dev_dbg(host->dev, "Regulator set error %d: %d - %d\n",
	114	ret, min_uv, max_uv);
	115	return ret;
	116	}
	117
	118	return 0;
	119	}
	120
121	static void dw_mci_hi6220_set_ios(struct dw_mci host, struct mmc_ios ios)
122	{
123	int ret;
124	unsigned int clock;
125
126	clock = (ios->clock <= 25000000) ? 25000000 : ios->clock;
127
128	ret = clk_set_rate(host->biu_clk, clock);
129	if (ret)
130	dev_warn(host->dev, "failed to set rate %uHz\n", clock);
131
132	host->bus_hz = clk_get_rate(host->biu_clk);
133	}
134
3203a827 JG	135	static int dw_mci_hi6220_execute_tuning(struct dw_mci_slot *slot, u32 opcode)
	136	{
	137	return 0;
	138	}
	139
0293efdd	140	static const struct dw_mci_drv_data hi6220_data = {
af637629	141	.caps = dw_mci_hi6220_caps,
0293efdd ZG	142	.switch_voltage = dw_mci_hi6220_switch_voltage,
	143	.set_ios = dw_mci_hi6220_set_ios,
	144	.parse_dt = dw_mci_hi6220_parse_dt,
3203a827	145	.execute_tuning = dw_mci_hi6220_execute_tuning,
0293efdd ZG	146	};
0293efdd ZG	147
036f29d5 ZG	148	static const struct of_device_id dw_mci_k3_match[] = {
036f29d5 ZG	149	{ .compatible = "hisilicon,hi4511-dw-mshc", .data = &k3_drv_data, },
0293efdd	150	{ .compatible = "hisilicon,hi6220-dw-mshc", .data = &hi6220_data, },
036f29d5 ZG	151	{},
	152	};
	153	MODULE_DEVICE_TABLE(of, dw_mci_k3_match);
	154
	155	static int dw_mci_k3_probe(struct platform_device *pdev)
	156	{
	157	const struct dw_mci_drv_data *drv_data;
	158	const struct of_device_id *match;
	159
	160	match = of_match_node(dw_mci_k3_match, pdev->dev.of_node);
	161	drv_data = match->data;
	162
	163	return dw_mci_pltfm_register(pdev, drv_data);
	164	}
	165
2c8ae20e SL	166	static const struct dev_pm_ops dw_mci_k3_dev_pm_ops = {
	167	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
	168	pm_runtime_force_resume)
	169	SET_RUNTIME_PM_OPS(dw_mci_runtime_suspend,
	170	dw_mci_runtime_resume,
	171	NULL)
	172	};
036f29d5 ZG	173
	174	static struct platform_driver dw_mci_k3_pltfm_driver = {
	175	.probe = dw_mci_k3_probe,
	176	.remove = dw_mci_pltfm_remove,
	177	.driver = {
	178	.name = "dwmmc_k3",
	179	.of_match_table = dw_mci_k3_match,
2c8ae20e	180	.pm = &dw_mci_k3_dev_pm_ops,
036f29d5 ZG	181	},
	182	};
	183
	184	module_platform_driver(dw_mci_k3_pltfm_driver);
	185
	186	MODULE_DESCRIPTION("K3 Specific DW-MSHC Driver Extension");
	187	MODULE_LICENSE("GPL v2");
7026fd66	188	MODULE_ALIAS("platform:dwmmc_k3");