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caab277b | 1 | // SPDX-License-Identifier: GPL-2.0-only |
c7f6558d RT |
2 | /* Realtek USB SD/MMC Card Interface driver |
3 | * | |
4 | * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved. | |
5 | * | |
c7f6558d RT |
6 | * Author: |
7 | * Roger Tseng <rogerable@realtek.com> | |
8 | */ | |
9 | ||
10 | #include <linux/module.h> | |
11 | #include <linux/slab.h> | |
12 | #include <linux/delay.h> | |
13 | #include <linux/platform_device.h> | |
14 | #include <linux/usb.h> | |
15 | #include <linux/mmc/host.h> | |
16 | #include <linux/mmc/mmc.h> | |
17 | #include <linux/mmc/sd.h> | |
c7f6558d RT |
18 | #include <linux/mmc/card.h> |
19 | #include <linux/scatterlist.h> | |
4dad599b | 20 | #include <linux/pm.h> |
c7f6558d RT |
21 | #include <linux/pm_runtime.h> |
22 | ||
e455b69d | 23 | #include <linux/rtsx_usb.h> |
c7f6558d RT |
24 | #include <asm/unaligned.h> |
25 | ||
b677b885 AB |
26 | #if defined(CONFIG_LEDS_CLASS) || (defined(CONFIG_LEDS_CLASS_MODULE) && \ |
27 | defined(CONFIG_MMC_REALTEK_USB_MODULE)) | |
c7f6558d RT |
28 | #include <linux/leds.h> |
29 | #include <linux/workqueue.h> | |
30 | #define RTSX_USB_USE_LEDS_CLASS | |
31 | #endif | |
32 | ||
33 | struct rtsx_usb_sdmmc { | |
34 | struct platform_device *pdev; | |
35 | struct rtsx_ucr *ucr; | |
36 | struct mmc_host *mmc; | |
37 | struct mmc_request *mrq; | |
38 | ||
39 | struct mutex host_mutex; | |
40 | ||
41 | u8 ssc_depth; | |
42 | unsigned int clock; | |
43 | bool vpclk; | |
44 | bool double_clk; | |
45 | bool host_removal; | |
46 | bool card_exist; | |
47 | bool initial_mode; | |
48 | bool ddr_mode; | |
49 | ||
50 | unsigned char power_mode; | |
51 | ||
b677b885 | 52 | #ifdef RTSX_USB_USE_LEDS_CLASS |
c7f6558d RT |
53 | struct led_classdev led; |
54 | char led_name[32]; | |
55 | struct work_struct led_work; | |
56 | #endif | |
57 | }; | |
58 | ||
59 | static inline struct device *sdmmc_dev(struct rtsx_usb_sdmmc *host) | |
60 | { | |
61 | return &(host->pdev->dev); | |
62 | } | |
63 | ||
64 | static inline void sd_clear_error(struct rtsx_usb_sdmmc *host) | |
65 | { | |
66 | struct rtsx_ucr *ucr = host->ucr; | |
67 | rtsx_usb_ep0_write_register(ucr, CARD_STOP, | |
68 | SD_STOP | SD_CLR_ERR, | |
69 | SD_STOP | SD_CLR_ERR); | |
70 | ||
71 | rtsx_usb_clear_dma_err(ucr); | |
72 | rtsx_usb_clear_fsm_err(ucr); | |
73 | } | |
74 | ||
75 | #ifdef DEBUG | |
76 | static void sd_print_debug_regs(struct rtsx_usb_sdmmc *host) | |
77 | { | |
78 | struct rtsx_ucr *ucr = host->ucr; | |
79 | u8 val = 0; | |
80 | ||
81 | rtsx_usb_ep0_read_register(ucr, SD_STAT1, &val); | |
82 | dev_dbg(sdmmc_dev(host), "SD_STAT1: 0x%x\n", val); | |
83 | rtsx_usb_ep0_read_register(ucr, SD_STAT2, &val); | |
84 | dev_dbg(sdmmc_dev(host), "SD_STAT2: 0x%x\n", val); | |
85 | rtsx_usb_ep0_read_register(ucr, SD_BUS_STAT, &val); | |
86 | dev_dbg(sdmmc_dev(host), "SD_BUS_STAT: 0x%x\n", val); | |
87 | } | |
88 | #else | |
89 | #define sd_print_debug_regs(host) | |
90 | #endif /* DEBUG */ | |
91 | ||
92 | static int sd_read_data(struct rtsx_usb_sdmmc *host, struct mmc_command *cmd, | |
93 | u16 byte_cnt, u8 *buf, int buf_len, int timeout) | |
94 | { | |
95 | struct rtsx_ucr *ucr = host->ucr; | |
96 | int err; | |
97 | u8 trans_mode; | |
98 | ||
99 | if (!buf) | |
100 | buf_len = 0; | |
101 | ||
102 | rtsx_usb_init_cmd(ucr); | |
103 | if (cmd != NULL) { | |
104 | dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD%d\n", __func__ | |
105 | , cmd->opcode); | |
106 | if (cmd->opcode == MMC_SEND_TUNING_BLOCK) | |
107 | trans_mode = SD_TM_AUTO_TUNING; | |
108 | else | |
109 | trans_mode = SD_TM_NORMAL_READ; | |
110 | ||
111 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, | |
112 | SD_CMD0, 0xFF, (u8)(cmd->opcode) | 0x40); | |
113 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, | |
114 | SD_CMD1, 0xFF, (u8)(cmd->arg >> 24)); | |
115 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, | |
116 | SD_CMD2, 0xFF, (u8)(cmd->arg >> 16)); | |
117 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, | |
118 | SD_CMD3, 0xFF, (u8)(cmd->arg >> 8)); | |
119 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, | |
120 | SD_CMD4, 0xFF, (u8)cmd->arg); | |
121 | } else { | |
122 | trans_mode = SD_TM_AUTO_READ_3; | |
123 | } | |
124 | ||
125 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, (u8)byte_cnt); | |
126 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H, | |
127 | 0xFF, (u8)(byte_cnt >> 8)); | |
128 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, 1); | |
129 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, 0); | |
130 | ||
131 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, | |
132 | SD_CALCULATE_CRC7 | SD_CHECK_CRC16 | | |
133 | SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_6); | |
134 | if (trans_mode != SD_TM_AUTO_TUNING) | |
135 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, | |
136 | CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER); | |
137 | ||
138 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER, | |
139 | 0xFF, trans_mode | SD_TRANSFER_START); | |
140 | rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER, | |
141 | SD_TRANSFER_END, SD_TRANSFER_END); | |
142 | ||
143 | if (cmd != NULL) { | |
144 | rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD1, 0, 0); | |
145 | rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD2, 0, 0); | |
146 | rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD3, 0, 0); | |
147 | rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD4, 0, 0); | |
148 | } | |
149 | ||
150 | err = rtsx_usb_send_cmd(ucr, MODE_CR, timeout); | |
151 | if (err) { | |
152 | dev_dbg(sdmmc_dev(host), | |
153 | "rtsx_usb_send_cmd failed (err = %d)\n", err); | |
154 | return err; | |
155 | } | |
156 | ||
157 | err = rtsx_usb_get_rsp(ucr, !cmd ? 1 : 5, timeout); | |
158 | if (err || (ucr->rsp_buf[0] & SD_TRANSFER_ERR)) { | |
159 | sd_print_debug_regs(host); | |
160 | ||
161 | if (!err) { | |
162 | dev_dbg(sdmmc_dev(host), | |
163 | "Transfer failed (SD_TRANSFER = %02x)\n", | |
164 | ucr->rsp_buf[0]); | |
165 | err = -EIO; | |
166 | } else { | |
167 | dev_dbg(sdmmc_dev(host), | |
168 | "rtsx_usb_get_rsp failed (err = %d)\n", err); | |
169 | } | |
170 | ||
171 | return err; | |
172 | } | |
173 | ||
174 | if (cmd != NULL) { | |
175 | cmd->resp[0] = get_unaligned_be32(ucr->rsp_buf + 1); | |
176 | dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n", | |
177 | cmd->resp[0]); | |
178 | } | |
179 | ||
180 | if (buf && buf_len) { | |
181 | /* 2-byte aligned part */ | |
182 | err = rtsx_usb_read_ppbuf(ucr, buf, byte_cnt - (byte_cnt % 2)); | |
183 | if (err) { | |
184 | dev_dbg(sdmmc_dev(host), | |
185 | "rtsx_usb_read_ppbuf failed (err = %d)\n", err); | |
186 | return err; | |
187 | } | |
188 | ||
189 | /* unaligned byte */ | |
190 | if (byte_cnt % 2) | |
191 | return rtsx_usb_read_register(ucr, | |
192 | PPBUF_BASE2 + byte_cnt, | |
193 | buf + byte_cnt - 1); | |
194 | } | |
195 | ||
196 | return 0; | |
197 | } | |
198 | ||
199 | static int sd_write_data(struct rtsx_usb_sdmmc *host, struct mmc_command *cmd, | |
200 | u16 byte_cnt, u8 *buf, int buf_len, int timeout) | |
201 | { | |
202 | struct rtsx_ucr *ucr = host->ucr; | |
203 | int err; | |
204 | u8 trans_mode; | |
205 | ||
206 | if (!buf) | |
207 | buf_len = 0; | |
208 | ||
209 | if (buf && buf_len) { | |
210 | err = rtsx_usb_write_ppbuf(ucr, buf, buf_len); | |
211 | if (err) { | |
212 | dev_dbg(sdmmc_dev(host), | |
213 | "rtsx_usb_write_ppbuf failed (err = %d)\n", | |
214 | err); | |
215 | return err; | |
216 | } | |
217 | } | |
218 | ||
219 | trans_mode = (cmd != NULL) ? SD_TM_AUTO_WRITE_2 : SD_TM_AUTO_WRITE_3; | |
220 | rtsx_usb_init_cmd(ucr); | |
221 | ||
222 | if (cmd != NULL) { | |
223 | dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD%d\n", __func__, | |
224 | cmd->opcode); | |
225 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, | |
226 | SD_CMD0, 0xFF, (u8)(cmd->opcode) | 0x40); | |
227 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, | |
228 | SD_CMD1, 0xFF, (u8)(cmd->arg >> 24)); | |
229 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, | |
230 | SD_CMD2, 0xFF, (u8)(cmd->arg >> 16)); | |
231 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, | |
232 | SD_CMD3, 0xFF, (u8)(cmd->arg >> 8)); | |
233 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, | |
234 | SD_CMD4, 0xFF, (u8)cmd->arg); | |
235 | } | |
236 | ||
237 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, (u8)byte_cnt); | |
238 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H, | |
239 | 0xFF, (u8)(byte_cnt >> 8)); | |
240 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, 1); | |
241 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, 0); | |
242 | ||
243 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, | |
244 | SD_CALCULATE_CRC7 | SD_CHECK_CRC16 | | |
245 | SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_6); | |
246 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, | |
247 | CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER); | |
248 | ||
249 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER, 0xFF, | |
250 | trans_mode | SD_TRANSFER_START); | |
251 | rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER, | |
252 | SD_TRANSFER_END, SD_TRANSFER_END); | |
253 | ||
254 | if (cmd != NULL) { | |
255 | rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD1, 0, 0); | |
256 | rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD2, 0, 0); | |
257 | rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD3, 0, 0); | |
258 | rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD4, 0, 0); | |
259 | } | |
260 | ||
261 | err = rtsx_usb_send_cmd(ucr, MODE_CR, timeout); | |
262 | if (err) { | |
263 | dev_dbg(sdmmc_dev(host), | |
264 | "rtsx_usb_send_cmd failed (err = %d)\n", err); | |
265 | return err; | |
266 | } | |
267 | ||
268 | err = rtsx_usb_get_rsp(ucr, !cmd ? 1 : 5, timeout); | |
269 | if (err) { | |
270 | sd_print_debug_regs(host); | |
271 | dev_dbg(sdmmc_dev(host), | |
272 | "rtsx_usb_get_rsp failed (err = %d)\n", err); | |
273 | return err; | |
274 | } | |
275 | ||
276 | if (cmd != NULL) { | |
277 | cmd->resp[0] = get_unaligned_be32(ucr->rsp_buf + 1); | |
278 | dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n", | |
279 | cmd->resp[0]); | |
280 | } | |
281 | ||
282 | return 0; | |
283 | } | |
284 | ||
285 | static void sd_send_cmd_get_rsp(struct rtsx_usb_sdmmc *host, | |
286 | struct mmc_command *cmd) | |
287 | { | |
288 | struct rtsx_ucr *ucr = host->ucr; | |
289 | u8 cmd_idx = (u8)cmd->opcode; | |
290 | u32 arg = cmd->arg; | |
291 | int err = 0; | |
292 | int timeout = 100; | |
293 | int i; | |
294 | u8 *ptr; | |
295 | int stat_idx = 0; | |
296 | int len = 2; | |
297 | u8 rsp_type; | |
298 | ||
299 | dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD %d, arg = 0x%08x\n", | |
300 | __func__, cmd_idx, arg); | |
301 | ||
302 | /* Response type: | |
303 | * R0 | |
304 | * R1, R5, R6, R7 | |
305 | * R1b | |
306 | * R2 | |
307 | * R3, R4 | |
308 | */ | |
309 | switch (mmc_resp_type(cmd)) { | |
310 | case MMC_RSP_NONE: | |
311 | rsp_type = SD_RSP_TYPE_R0; | |
312 | break; | |
313 | case MMC_RSP_R1: | |
314 | rsp_type = SD_RSP_TYPE_R1; | |
315 | break; | |
f7dd5462 | 316 | case MMC_RSP_R1_NO_CRC: |
c7f6558d RT |
317 | rsp_type = SD_RSP_TYPE_R1 | SD_NO_CHECK_CRC7; |
318 | break; | |
319 | case MMC_RSP_R1B: | |
320 | rsp_type = SD_RSP_TYPE_R1b; | |
321 | break; | |
322 | case MMC_RSP_R2: | |
323 | rsp_type = SD_RSP_TYPE_R2; | |
324 | break; | |
325 | case MMC_RSP_R3: | |
326 | rsp_type = SD_RSP_TYPE_R3; | |
327 | break; | |
328 | default: | |
329 | dev_dbg(sdmmc_dev(host), "cmd->flag is not valid\n"); | |
330 | err = -EINVAL; | |
331 | goto out; | |
332 | } | |
333 | ||
334 | if (rsp_type == SD_RSP_TYPE_R1b) | |
ec30f11e | 335 | timeout = cmd->busy_timeout ? cmd->busy_timeout : 3000; |
c7f6558d RT |
336 | |
337 | if (cmd->opcode == SD_SWITCH_VOLTAGE) { | |
338 | err = rtsx_usb_write_register(ucr, SD_BUS_STAT, | |
339 | SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, | |
340 | SD_CLK_TOGGLE_EN); | |
341 | if (err) | |
342 | goto out; | |
343 | } | |
344 | ||
345 | rtsx_usb_init_cmd(ucr); | |
346 | ||
347 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD0, 0xFF, 0x40 | cmd_idx); | |
348 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD1, 0xFF, (u8)(arg >> 24)); | |
349 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD2, 0xFF, (u8)(arg >> 16)); | |
350 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD3, 0xFF, (u8)(arg >> 8)); | |
351 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD4, 0xFF, (u8)arg); | |
352 | ||
353 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, rsp_type); | |
354 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_DATA_SOURCE, | |
355 | 0x01, PINGPONG_BUFFER); | |
356 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER, | |
357 | 0xFF, SD_TM_CMD_RSP | SD_TRANSFER_START); | |
358 | rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER, | |
359 | SD_TRANSFER_END | SD_STAT_IDLE, | |
360 | SD_TRANSFER_END | SD_STAT_IDLE); | |
361 | ||
362 | if (rsp_type == SD_RSP_TYPE_R2) { | |
363 | /* Read data from ping-pong buffer */ | |
364 | for (i = PPBUF_BASE2; i < PPBUF_BASE2 + 16; i++) | |
365 | rtsx_usb_add_cmd(ucr, READ_REG_CMD, (u16)i, 0, 0); | |
366 | stat_idx = 16; | |
367 | } else if (rsp_type != SD_RSP_TYPE_R0) { | |
368 | /* Read data from SD_CMDx registers */ | |
369 | for (i = SD_CMD0; i <= SD_CMD4; i++) | |
370 | rtsx_usb_add_cmd(ucr, READ_REG_CMD, (u16)i, 0, 0); | |
371 | stat_idx = 5; | |
372 | } | |
373 | len += stat_idx; | |
374 | ||
375 | rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_STAT1, 0, 0); | |
376 | ||
377 | err = rtsx_usb_send_cmd(ucr, MODE_CR, 100); | |
378 | if (err) { | |
379 | dev_dbg(sdmmc_dev(host), | |
380 | "rtsx_usb_send_cmd error (err = %d)\n", err); | |
381 | goto out; | |
382 | } | |
383 | ||
384 | err = rtsx_usb_get_rsp(ucr, len, timeout); | |
385 | if (err || (ucr->rsp_buf[0] & SD_TRANSFER_ERR)) { | |
386 | sd_print_debug_regs(host); | |
387 | sd_clear_error(host); | |
388 | ||
389 | if (!err) { | |
390 | dev_dbg(sdmmc_dev(host), | |
391 | "Transfer failed (SD_TRANSFER = %02x)\n", | |
392 | ucr->rsp_buf[0]); | |
393 | err = -EIO; | |
394 | } else { | |
395 | dev_dbg(sdmmc_dev(host), | |
396 | "rtsx_usb_get_rsp failed (err = %d)\n", err); | |
397 | } | |
398 | ||
399 | goto out; | |
400 | } | |
401 | ||
402 | if (rsp_type == SD_RSP_TYPE_R0) { | |
403 | err = 0; | |
404 | goto out; | |
405 | } | |
406 | ||
407 | /* Skip result of CHECK_REG_CMD */ | |
408 | ptr = ucr->rsp_buf + 1; | |
409 | ||
410 | /* Check (Start,Transmission) bit of Response */ | |
411 | if ((ptr[0] & 0xC0) != 0) { | |
412 | err = -EILSEQ; | |
413 | dev_dbg(sdmmc_dev(host), "Invalid response bit\n"); | |
414 | goto out; | |
415 | } | |
416 | ||
417 | /* Check CRC7 */ | |
418 | if (!(rsp_type & SD_NO_CHECK_CRC7)) { | |
419 | if (ptr[stat_idx] & SD_CRC7_ERR) { | |
420 | err = -EILSEQ; | |
421 | dev_dbg(sdmmc_dev(host), "CRC7 error\n"); | |
422 | goto out; | |
423 | } | |
424 | } | |
425 | ||
426 | if (rsp_type == SD_RSP_TYPE_R2) { | |
6f67cc6f RT |
427 | /* |
428 | * The controller offloads the last byte {CRC-7, end bit 1'b1} | |
429 | * of response type R2. Assign dummy CRC, 0, and end bit to the | |
430 | * byte(ptr[16], goes into the LSB of resp[3] later). | |
431 | */ | |
432 | ptr[16] = 1; | |
433 | ||
c7f6558d RT |
434 | for (i = 0; i < 4; i++) { |
435 | cmd->resp[i] = get_unaligned_be32(ptr + 1 + i * 4); | |
436 | dev_dbg(sdmmc_dev(host), "cmd->resp[%d] = 0x%08x\n", | |
437 | i, cmd->resp[i]); | |
438 | } | |
439 | } else { | |
440 | cmd->resp[0] = get_unaligned_be32(ptr + 1); | |
441 | dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n", | |
442 | cmd->resp[0]); | |
443 | } | |
444 | ||
445 | out: | |
446 | cmd->error = err; | |
447 | } | |
448 | ||
449 | static int sd_rw_multi(struct rtsx_usb_sdmmc *host, struct mmc_request *mrq) | |
450 | { | |
451 | struct rtsx_ucr *ucr = host->ucr; | |
452 | struct mmc_data *data = mrq->data; | |
453 | int read = (data->flags & MMC_DATA_READ) ? 1 : 0; | |
454 | u8 cfg2, trans_mode; | |
455 | int err; | |
456 | u8 flag; | |
457 | size_t data_len = data->blksz * data->blocks; | |
458 | unsigned int pipe; | |
459 | ||
460 | if (read) { | |
461 | dev_dbg(sdmmc_dev(host), "%s: read %zu bytes\n", | |
462 | __func__, data_len); | |
463 | cfg2 = SD_CALCULATE_CRC7 | SD_CHECK_CRC16 | | |
464 | SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_0; | |
465 | trans_mode = SD_TM_AUTO_READ_3; | |
466 | } else { | |
467 | dev_dbg(sdmmc_dev(host), "%s: write %zu bytes\n", | |
468 | __func__, data_len); | |
469 | cfg2 = SD_NO_CALCULATE_CRC7 | SD_CHECK_CRC16 | | |
470 | SD_NO_WAIT_BUSY_END | SD_NO_CHECK_CRC7 | SD_RSP_LEN_0; | |
471 | trans_mode = SD_TM_AUTO_WRITE_3; | |
472 | } | |
473 | ||
474 | rtsx_usb_init_cmd(ucr); | |
475 | ||
476 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, 0x00); | |
477 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H, 0xFF, 0x02); | |
478 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L, | |
479 | 0xFF, (u8)data->blocks); | |
480 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H, | |
481 | 0xFF, (u8)(data->blocks >> 8)); | |
482 | ||
483 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_DATA_SOURCE, | |
484 | 0x01, RING_BUFFER); | |
485 | ||
486 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC3, | |
487 | 0xFF, (u8)(data_len >> 24)); | |
488 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC2, | |
489 | 0xFF, (u8)(data_len >> 16)); | |
490 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC1, | |
491 | 0xFF, (u8)(data_len >> 8)); | |
492 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC0, | |
493 | 0xFF, (u8)data_len); | |
494 | if (read) { | |
495 | flag = MODE_CDIR; | |
496 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_CTL, | |
497 | 0x03 | DMA_PACK_SIZE_MASK, | |
498 | DMA_DIR_FROM_CARD | DMA_EN | DMA_512); | |
499 | } else { | |
500 | flag = MODE_CDOR; | |
501 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_CTL, | |
502 | 0x03 | DMA_PACK_SIZE_MASK, | |
503 | DMA_DIR_TO_CARD | DMA_EN | DMA_512); | |
504 | } | |
505 | ||
506 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, cfg2); | |
507 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER, 0xFF, | |
508 | trans_mode | SD_TRANSFER_START); | |
509 | rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER, | |
510 | SD_TRANSFER_END, SD_TRANSFER_END); | |
511 | ||
512 | err = rtsx_usb_send_cmd(ucr, flag, 100); | |
513 | if (err) | |
514 | return err; | |
515 | ||
516 | if (read) | |
517 | pipe = usb_rcvbulkpipe(ucr->pusb_dev, EP_BULK_IN); | |
518 | else | |
519 | pipe = usb_sndbulkpipe(ucr->pusb_dev, EP_BULK_OUT); | |
520 | ||
521 | err = rtsx_usb_transfer_data(ucr, pipe, data->sg, data_len, | |
522 | data->sg_len, NULL, 10000); | |
523 | if (err) { | |
524 | dev_dbg(sdmmc_dev(host), "rtsx_usb_transfer_data error %d\n" | |
525 | , err); | |
526 | sd_clear_error(host); | |
527 | return err; | |
528 | } | |
529 | ||
530 | return rtsx_usb_get_rsp(ucr, 1, 2000); | |
531 | } | |
532 | ||
533 | static inline void sd_enable_initial_mode(struct rtsx_usb_sdmmc *host) | |
534 | { | |
535 | rtsx_usb_write_register(host->ucr, SD_CFG1, | |
536 | SD_CLK_DIVIDE_MASK, SD_CLK_DIVIDE_128); | |
537 | } | |
538 | ||
539 | static inline void sd_disable_initial_mode(struct rtsx_usb_sdmmc *host) | |
540 | { | |
541 | rtsx_usb_write_register(host->ucr, SD_CFG1, | |
542 | SD_CLK_DIVIDE_MASK, SD_CLK_DIVIDE_0); | |
543 | } | |
544 | ||
545 | static void sd_normal_rw(struct rtsx_usb_sdmmc *host, | |
546 | struct mmc_request *mrq) | |
547 | { | |
548 | struct mmc_command *cmd = mrq->cmd; | |
549 | struct mmc_data *data = mrq->data; | |
550 | u8 *buf; | |
551 | ||
552 | buf = kzalloc(data->blksz, GFP_NOIO); | |
553 | if (!buf) { | |
554 | cmd->error = -ENOMEM; | |
555 | return; | |
556 | } | |
557 | ||
558 | if (data->flags & MMC_DATA_READ) { | |
559 | if (host->initial_mode) | |
560 | sd_disable_initial_mode(host); | |
561 | ||
562 | cmd->error = sd_read_data(host, cmd, (u16)data->blksz, buf, | |
563 | data->blksz, 200); | |
564 | ||
565 | if (host->initial_mode) | |
566 | sd_enable_initial_mode(host); | |
567 | ||
568 | sg_copy_from_buffer(data->sg, data->sg_len, buf, data->blksz); | |
569 | } else { | |
570 | sg_copy_to_buffer(data->sg, data->sg_len, buf, data->blksz); | |
571 | ||
572 | cmd->error = sd_write_data(host, cmd, (u16)data->blksz, buf, | |
573 | data->blksz, 200); | |
574 | } | |
575 | ||
576 | kfree(buf); | |
577 | } | |
578 | ||
579 | static int sd_change_phase(struct rtsx_usb_sdmmc *host, u8 sample_point, int tx) | |
580 | { | |
581 | struct rtsx_ucr *ucr = host->ucr; | |
c7f6558d RT |
582 | |
583 | dev_dbg(sdmmc_dev(host), "%s: %s sample_point = %d\n", | |
584 | __func__, tx ? "TX" : "RX", sample_point); | |
585 | ||
586 | rtsx_usb_init_cmd(ucr); | |
587 | ||
588 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE, CLK_CHANGE); | |
589 | ||
590 | if (tx) | |
591 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL, | |
592 | 0x0F, sample_point); | |
593 | else | |
594 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK1_CTL, | |
595 | 0x0F, sample_point); | |
596 | ||
597 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL, PHASE_NOT_RESET, 0); | |
598 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL, | |
599 | PHASE_NOT_RESET, PHASE_NOT_RESET); | |
600 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE, 0); | |
601 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1, SD_ASYNC_FIFO_RST, 0); | |
602 | ||
8dae6a24 | 603 | return rtsx_usb_send_cmd(ucr, MODE_C, 100); |
c7f6558d RT |
604 | } |
605 | ||
606 | static inline u32 get_phase_point(u32 phase_map, unsigned int idx) | |
607 | { | |
608 | idx &= MAX_PHASE; | |
609 | return phase_map & (1 << idx); | |
610 | } | |
611 | ||
612 | static int get_phase_len(u32 phase_map, unsigned int idx) | |
613 | { | |
614 | int i; | |
615 | ||
616 | for (i = 0; i < MAX_PHASE + 1; i++) { | |
617 | if (get_phase_point(phase_map, idx + i) == 0) | |
618 | return i; | |
619 | } | |
620 | return MAX_PHASE + 1; | |
621 | } | |
622 | ||
623 | static u8 sd_search_final_phase(struct rtsx_usb_sdmmc *host, u32 phase_map) | |
624 | { | |
625 | int start = 0, len = 0; | |
626 | int start_final = 0, len_final = 0; | |
627 | u8 final_phase = 0xFF; | |
628 | ||
629 | if (phase_map == 0) { | |
630 | dev_dbg(sdmmc_dev(host), "Phase: [map:%x]\n", phase_map); | |
631 | return final_phase; | |
632 | } | |
633 | ||
634 | while (start < MAX_PHASE + 1) { | |
635 | len = get_phase_len(phase_map, start); | |
636 | if (len_final < len) { | |
637 | start_final = start; | |
638 | len_final = len; | |
639 | } | |
640 | start += len ? len : 1; | |
641 | } | |
642 | ||
643 | final_phase = (start_final + len_final / 2) & MAX_PHASE; | |
644 | dev_dbg(sdmmc_dev(host), "Phase: [map:%x] [maxlen:%d] [final:%d]\n", | |
645 | phase_map, len_final, final_phase); | |
646 | ||
647 | return final_phase; | |
648 | } | |
649 | ||
650 | static void sd_wait_data_idle(struct rtsx_usb_sdmmc *host) | |
651 | { | |
d463cf4e | 652 | int i; |
c7f6558d RT |
653 | u8 val = 0; |
654 | ||
655 | for (i = 0; i < 100; i++) { | |
d463cf4e | 656 | rtsx_usb_ep0_read_register(host->ucr, SD_DATA_STATE, &val); |
c7f6558d RT |
657 | if (val & SD_DATA_IDLE) |
658 | return; | |
659 | ||
660 | usleep_range(100, 1000); | |
661 | } | |
662 | } | |
663 | ||
664 | static int sd_tuning_rx_cmd(struct rtsx_usb_sdmmc *host, | |
665 | u8 opcode, u8 sample_point) | |
666 | { | |
667 | int err; | |
c7836d15 | 668 | struct mmc_command cmd = {}; |
c7f6558d RT |
669 | |
670 | err = sd_change_phase(host, sample_point, 0); | |
671 | if (err) | |
672 | return err; | |
673 | ||
674 | cmd.opcode = MMC_SEND_TUNING_BLOCK; | |
675 | err = sd_read_data(host, &cmd, 0x40, NULL, 0, 100); | |
676 | if (err) { | |
677 | /* Wait till SD DATA IDLE */ | |
678 | sd_wait_data_idle(host); | |
679 | sd_clear_error(host); | |
680 | return err; | |
681 | } | |
682 | ||
683 | return 0; | |
684 | } | |
685 | ||
686 | static void sd_tuning_phase(struct rtsx_usb_sdmmc *host, | |
687 | u8 opcode, u16 *phase_map) | |
688 | { | |
689 | int err, i; | |
690 | u16 raw_phase_map = 0; | |
691 | ||
692 | for (i = MAX_PHASE; i >= 0; i--) { | |
693 | err = sd_tuning_rx_cmd(host, opcode, (u8)i); | |
694 | if (!err) | |
695 | raw_phase_map |= 1 << i; | |
696 | } | |
697 | ||
698 | if (phase_map) | |
699 | *phase_map = raw_phase_map; | |
700 | } | |
701 | ||
702 | static int sd_tuning_rx(struct rtsx_usb_sdmmc *host, u8 opcode) | |
703 | { | |
704 | int err, i; | |
705 | u16 raw_phase_map[RX_TUNING_CNT] = {0}, phase_map; | |
706 | u8 final_phase; | |
707 | ||
708 | /* setting fixed default TX phase */ | |
709 | err = sd_change_phase(host, 0x01, 1); | |
710 | if (err) { | |
711 | dev_dbg(sdmmc_dev(host), "TX phase setting failed\n"); | |
712 | return err; | |
713 | } | |
714 | ||
715 | /* tuning RX phase */ | |
716 | for (i = 0; i < RX_TUNING_CNT; i++) { | |
717 | sd_tuning_phase(host, opcode, &(raw_phase_map[i])); | |
718 | ||
719 | if (raw_phase_map[i] == 0) | |
720 | break; | |
721 | } | |
722 | ||
723 | phase_map = 0xFFFF; | |
724 | for (i = 0; i < RX_TUNING_CNT; i++) { | |
725 | dev_dbg(sdmmc_dev(host), "RX raw_phase_map[%d] = 0x%04x\n", | |
726 | i, raw_phase_map[i]); | |
727 | phase_map &= raw_phase_map[i]; | |
728 | } | |
729 | dev_dbg(sdmmc_dev(host), "RX phase_map = 0x%04x\n", phase_map); | |
730 | ||
731 | if (phase_map) { | |
732 | final_phase = sd_search_final_phase(host, phase_map); | |
733 | if (final_phase == 0xFF) | |
734 | return -EINVAL; | |
735 | ||
736 | err = sd_change_phase(host, final_phase, 0); | |
737 | if (err) | |
738 | return err; | |
739 | } else { | |
740 | return -EINVAL; | |
741 | } | |
742 | ||
743 | return 0; | |
744 | } | |
745 | ||
746 | static int sdmmc_get_ro(struct mmc_host *mmc) | |
747 | { | |
748 | struct rtsx_usb_sdmmc *host = mmc_priv(mmc); | |
749 | struct rtsx_ucr *ucr = host->ucr; | |
750 | int err; | |
751 | u16 val; | |
752 | ||
753 | if (host->host_removal) | |
754 | return -ENOMEDIUM; | |
755 | ||
756 | mutex_lock(&ucr->dev_mutex); | |
757 | ||
758 | /* Check SD card detect */ | |
759 | err = rtsx_usb_get_card_status(ucr, &val); | |
760 | ||
761 | mutex_unlock(&ucr->dev_mutex); | |
762 | ||
763 | ||
764 | /* Treat failed detection as non-ro */ | |
765 | if (err) | |
766 | return 0; | |
767 | ||
768 | if (val & SD_WP) | |
769 | return 1; | |
770 | ||
771 | return 0; | |
772 | } | |
773 | ||
774 | static int sdmmc_get_cd(struct mmc_host *mmc) | |
775 | { | |
776 | struct rtsx_usb_sdmmc *host = mmc_priv(mmc); | |
777 | struct rtsx_ucr *ucr = host->ucr; | |
778 | int err; | |
779 | u16 val; | |
780 | ||
781 | if (host->host_removal) | |
782 | return -ENOMEDIUM; | |
783 | ||
784 | mutex_lock(&ucr->dev_mutex); | |
785 | ||
786 | /* Check SD card detect */ | |
787 | err = rtsx_usb_get_card_status(ucr, &val); | |
788 | ||
789 | mutex_unlock(&ucr->dev_mutex); | |
790 | ||
791 | /* Treat failed detection as non-exist */ | |
792 | if (err) | |
793 | goto no_card; | |
794 | ||
795 | if (val & SD_CD) { | |
796 | host->card_exist = true; | |
797 | return 1; | |
798 | } | |
799 | ||
800 | no_card: | |
801 | host->card_exist = false; | |
802 | return 0; | |
803 | } | |
804 | ||
805 | static void sdmmc_request(struct mmc_host *mmc, struct mmc_request *mrq) | |
806 | { | |
807 | struct rtsx_usb_sdmmc *host = mmc_priv(mmc); | |
808 | struct rtsx_ucr *ucr = host->ucr; | |
809 | struct mmc_command *cmd = mrq->cmd; | |
810 | struct mmc_data *data = mrq->data; | |
811 | unsigned int data_size = 0; | |
812 | ||
813 | dev_dbg(sdmmc_dev(host), "%s\n", __func__); | |
814 | ||
815 | if (host->host_removal) { | |
816 | cmd->error = -ENOMEDIUM; | |
817 | goto finish; | |
818 | } | |
819 | ||
820 | if ((!host->card_exist)) { | |
821 | cmd->error = -ENOMEDIUM; | |
822 | goto finish_detect_card; | |
823 | } | |
824 | ||
c7f6558d RT |
825 | mutex_lock(&ucr->dev_mutex); |
826 | ||
827 | mutex_lock(&host->host_mutex); | |
828 | host->mrq = mrq; | |
829 | mutex_unlock(&host->host_mutex); | |
830 | ||
831 | if (mrq->data) | |
832 | data_size = data->blocks * data->blksz; | |
833 | ||
834 | if (!data_size) { | |
835 | sd_send_cmd_get_rsp(host, cmd); | |
836 | } else if ((!(data_size % 512) && cmd->opcode != MMC_SEND_EXT_CSD) || | |
837 | mmc_op_multi(cmd->opcode)) { | |
838 | sd_send_cmd_get_rsp(host, cmd); | |
839 | ||
840 | if (!cmd->error) { | |
841 | sd_rw_multi(host, mrq); | |
842 | ||
843 | if (mmc_op_multi(cmd->opcode) && mrq->stop) { | |
844 | sd_send_cmd_get_rsp(host, mrq->stop); | |
845 | rtsx_usb_write_register(ucr, MC_FIFO_CTL, | |
846 | FIFO_FLUSH, FIFO_FLUSH); | |
847 | } | |
848 | } | |
849 | } else { | |
850 | sd_normal_rw(host, mrq); | |
851 | } | |
852 | ||
853 | if (mrq->data) { | |
854 | if (cmd->error || data->error) | |
855 | data->bytes_xfered = 0; | |
856 | else | |
857 | data->bytes_xfered = data->blocks * data->blksz; | |
858 | } | |
859 | ||
860 | mutex_unlock(&ucr->dev_mutex); | |
861 | ||
862 | finish_detect_card: | |
863 | if (cmd->error) { | |
864 | /* | |
865 | * detect card when fail to update card existence state and | |
866 | * speed up card removal when retry | |
867 | */ | |
868 | sdmmc_get_cd(mmc); | |
869 | dev_dbg(sdmmc_dev(host), "cmd->error = %d\n", cmd->error); | |
870 | } | |
871 | ||
872 | finish: | |
873 | mutex_lock(&host->host_mutex); | |
874 | host->mrq = NULL; | |
875 | mutex_unlock(&host->host_mutex); | |
876 | ||
877 | mmc_request_done(mmc, mrq); | |
878 | } | |
879 | ||
880 | static int sd_set_bus_width(struct rtsx_usb_sdmmc *host, | |
881 | unsigned char bus_width) | |
882 | { | |
883 | int err = 0; | |
b388dc3c | 884 | static const u8 width[] = { |
c7f6558d RT |
885 | [MMC_BUS_WIDTH_1] = SD_BUS_WIDTH_1BIT, |
886 | [MMC_BUS_WIDTH_4] = SD_BUS_WIDTH_4BIT, | |
887 | [MMC_BUS_WIDTH_8] = SD_BUS_WIDTH_8BIT, | |
888 | }; | |
889 | ||
890 | if (bus_width <= MMC_BUS_WIDTH_8) | |
891 | err = rtsx_usb_write_register(host->ucr, SD_CFG1, | |
892 | 0x03, width[bus_width]); | |
893 | ||
894 | return err; | |
895 | } | |
896 | ||
897 | static int sd_pull_ctl_disable_lqfp48(struct rtsx_ucr *ucr) | |
898 | { | |
899 | rtsx_usb_init_cmd(ucr); | |
900 | ||
901 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x55); | |
902 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55); | |
903 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x95); | |
904 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55); | |
905 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55); | |
906 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0xA5); | |
907 | ||
908 | return rtsx_usb_send_cmd(ucr, MODE_C, 100); | |
909 | } | |
910 | ||
911 | static int sd_pull_ctl_disable_qfn24(struct rtsx_ucr *ucr) | |
912 | { | |
913 | rtsx_usb_init_cmd(ucr); | |
914 | ||
915 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x65); | |
916 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55); | |
917 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x95); | |
918 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55); | |
919 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x56); | |
920 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x59); | |
921 | ||
922 | return rtsx_usb_send_cmd(ucr, MODE_C, 100); | |
923 | } | |
924 | ||
925 | static int sd_pull_ctl_enable_lqfp48(struct rtsx_ucr *ucr) | |
926 | { | |
927 | rtsx_usb_init_cmd(ucr); | |
928 | ||
929 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0xAA); | |
930 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0xAA); | |
931 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0xA9); | |
932 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55); | |
933 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55); | |
934 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0xA5); | |
935 | ||
936 | return rtsx_usb_send_cmd(ucr, MODE_C, 100); | |
937 | } | |
938 | ||
939 | static int sd_pull_ctl_enable_qfn24(struct rtsx_ucr *ucr) | |
940 | { | |
941 | rtsx_usb_init_cmd(ucr); | |
942 | ||
943 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0xA5); | |
944 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x9A); | |
945 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0xA5); | |
946 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x9A); | |
947 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x65); | |
948 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x5A); | |
949 | ||
950 | return rtsx_usb_send_cmd(ucr, MODE_C, 100); | |
951 | } | |
952 | ||
953 | static int sd_power_on(struct rtsx_usb_sdmmc *host) | |
954 | { | |
955 | struct rtsx_ucr *ucr = host->ucr; | |
956 | int err; | |
957 | ||
958 | dev_dbg(sdmmc_dev(host), "%s\n", __func__); | |
959 | rtsx_usb_init_cmd(ucr); | |
960 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_SELECT, 0x07, SD_MOD_SEL); | |
961 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_SHARE_MODE, | |
962 | CARD_SHARE_MASK, CARD_SHARE_SD); | |
963 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_EN, | |
964 | SD_CLK_EN, SD_CLK_EN); | |
965 | err = rtsx_usb_send_cmd(ucr, MODE_C, 100); | |
966 | if (err) | |
967 | return err; | |
968 | ||
969 | if (CHECK_PKG(ucr, LQFP48)) | |
970 | err = sd_pull_ctl_enable_lqfp48(ucr); | |
971 | else | |
972 | err = sd_pull_ctl_enable_qfn24(ucr); | |
973 | if (err) | |
974 | return err; | |
975 | ||
976 | err = rtsx_usb_write_register(ucr, CARD_PWR_CTL, | |
977 | POWER_MASK, PARTIAL_POWER_ON); | |
978 | if (err) | |
979 | return err; | |
980 | ||
981 | usleep_range(800, 1000); | |
982 | ||
983 | rtsx_usb_init_cmd(ucr); | |
984 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL, | |
985 | POWER_MASK|LDO3318_PWR_MASK, POWER_ON|LDO_ON); | |
986 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_OE, | |
987 | SD_OUTPUT_EN, SD_OUTPUT_EN); | |
988 | ||
989 | return rtsx_usb_send_cmd(ucr, MODE_C, 100); | |
990 | } | |
991 | ||
992 | static int sd_power_off(struct rtsx_usb_sdmmc *host) | |
993 | { | |
994 | struct rtsx_ucr *ucr = host->ucr; | |
995 | int err; | |
996 | ||
997 | dev_dbg(sdmmc_dev(host), "%s\n", __func__); | |
998 | rtsx_usb_init_cmd(ucr); | |
999 | ||
1000 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_EN, SD_CLK_EN, 0); | |
1001 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_OE, SD_OUTPUT_EN, 0); | |
1002 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL, | |
1003 | POWER_MASK, POWER_OFF); | |
1004 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL, | |
1005 | POWER_MASK|LDO3318_PWR_MASK, POWER_OFF|LDO_SUSPEND); | |
1006 | ||
1007 | err = rtsx_usb_send_cmd(ucr, MODE_C, 100); | |
1008 | if (err) | |
1009 | return err; | |
1010 | ||
1011 | if (CHECK_PKG(ucr, LQFP48)) | |
1012 | return sd_pull_ctl_disable_lqfp48(ucr); | |
1013 | return sd_pull_ctl_disable_qfn24(ucr); | |
1014 | } | |
1015 | ||
1016 | static int sd_set_power_mode(struct rtsx_usb_sdmmc *host, | |
1017 | unsigned char power_mode) | |
1018 | { | |
1019 | int err; | |
1020 | ||
1021 | if (power_mode != MMC_POWER_OFF) | |
1022 | power_mode = MMC_POWER_ON; | |
1023 | ||
1024 | if (power_mode == host->power_mode) | |
1025 | return 0; | |
1026 | ||
1027 | if (power_mode == MMC_POWER_OFF) { | |
1028 | err = sd_power_off(host); | |
f275179f | 1029 | pm_runtime_put_noidle(sdmmc_dev(host)); |
c7f6558d | 1030 | } else { |
f275179f | 1031 | pm_runtime_get_noresume(sdmmc_dev(host)); |
c7f6558d RT |
1032 | err = sd_power_on(host); |
1033 | } | |
1034 | ||
1035 | if (!err) | |
1036 | host->power_mode = power_mode; | |
1037 | ||
1038 | return err; | |
1039 | } | |
1040 | ||
1041 | static int sd_set_timing(struct rtsx_usb_sdmmc *host, | |
1042 | unsigned char timing, bool *ddr_mode) | |
1043 | { | |
1044 | struct rtsx_ucr *ucr = host->ucr; | |
1045 | int err; | |
1046 | ||
1047 | *ddr_mode = false; | |
1048 | ||
1049 | rtsx_usb_init_cmd(ucr); | |
1050 | ||
1051 | switch (timing) { | |
1052 | case MMC_TIMING_UHS_SDR104: | |
1053 | case MMC_TIMING_UHS_SDR50: | |
1054 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1, | |
1055 | 0x0C | SD_ASYNC_FIFO_RST, | |
1056 | SD_30_MODE | SD_ASYNC_FIFO_RST); | |
1057 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF, | |
1058 | CRC_VAR_CLK0 | SD30_FIX_CLK | SAMPLE_VAR_CLK1); | |
1059 | break; | |
1060 | ||
1061 | case MMC_TIMING_UHS_DDR50: | |
1062 | *ddr_mode = true; | |
1063 | ||
1064 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1, | |
1065 | 0x0C | SD_ASYNC_FIFO_RST, | |
1066 | SD_DDR_MODE | SD_ASYNC_FIFO_RST); | |
1067 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF, | |
1068 | CRC_VAR_CLK0 | SD30_FIX_CLK | SAMPLE_VAR_CLK1); | |
1069 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PUSH_POINT_CTL, | |
1070 | DDR_VAR_TX_CMD_DAT, DDR_VAR_TX_CMD_DAT); | |
1071 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL, | |
1072 | DDR_VAR_RX_DAT | DDR_VAR_RX_CMD, | |
1073 | DDR_VAR_RX_DAT | DDR_VAR_RX_CMD); | |
1074 | break; | |
1075 | ||
1076 | case MMC_TIMING_MMC_HS: | |
1077 | case MMC_TIMING_SD_HS: | |
1078 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1, | |
1079 | 0x0C, SD_20_MODE); | |
1080 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF, | |
1081 | CRC_FIX_CLK | SD30_VAR_CLK0 | SAMPLE_VAR_CLK1); | |
1082 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PUSH_POINT_CTL, | |
1083 | SD20_TX_SEL_MASK, SD20_TX_14_AHEAD); | |
1084 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL, | |
1085 | SD20_RX_SEL_MASK, SD20_RX_14_DELAY); | |
1086 | break; | |
1087 | ||
1088 | default: | |
1089 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, | |
1090 | SD_CFG1, 0x0C, SD_20_MODE); | |
1091 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF, | |
1092 | CRC_FIX_CLK | SD30_VAR_CLK0 | SAMPLE_VAR_CLK1); | |
1093 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, | |
1094 | SD_PUSH_POINT_CTL, 0xFF, 0); | |
1095 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL, | |
1096 | SD20_RX_SEL_MASK, SD20_RX_POS_EDGE); | |
1097 | break; | |
1098 | } | |
1099 | ||
1100 | err = rtsx_usb_send_cmd(ucr, MODE_C, 100); | |
1101 | ||
1102 | return err; | |
1103 | } | |
1104 | ||
1105 | static void sdmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | |
1106 | { | |
1107 | struct rtsx_usb_sdmmc *host = mmc_priv(mmc); | |
1108 | struct rtsx_ucr *ucr = host->ucr; | |
1109 | ||
1110 | dev_dbg(sdmmc_dev(host), "%s\n", __func__); | |
1111 | mutex_lock(&ucr->dev_mutex); | |
1112 | ||
c7f6558d RT |
1113 | sd_set_power_mode(host, ios->power_mode); |
1114 | sd_set_bus_width(host, ios->bus_width); | |
1115 | sd_set_timing(host, ios->timing, &host->ddr_mode); | |
1116 | ||
1117 | host->vpclk = false; | |
1118 | host->double_clk = true; | |
1119 | ||
1120 | switch (ios->timing) { | |
1121 | case MMC_TIMING_UHS_SDR104: | |
1122 | case MMC_TIMING_UHS_SDR50: | |
1123 | host->ssc_depth = SSC_DEPTH_2M; | |
1124 | host->vpclk = true; | |
1125 | host->double_clk = false; | |
1126 | break; | |
1127 | case MMC_TIMING_UHS_DDR50: | |
1128 | case MMC_TIMING_UHS_SDR25: | |
1129 | host->ssc_depth = SSC_DEPTH_1M; | |
1130 | break; | |
1131 | default: | |
1132 | host->ssc_depth = SSC_DEPTH_512K; | |
1133 | break; | |
1134 | } | |
1135 | ||
1136 | host->initial_mode = (ios->clock <= 1000000) ? true : false; | |
1137 | host->clock = ios->clock; | |
1138 | ||
1139 | rtsx_usb_switch_clock(host->ucr, host->clock, host->ssc_depth, | |
1140 | host->initial_mode, host->double_clk, host->vpclk); | |
1141 | ||
1142 | mutex_unlock(&ucr->dev_mutex); | |
1143 | dev_dbg(sdmmc_dev(host), "%s end\n", __func__); | |
1144 | } | |
1145 | ||
1146 | static int sdmmc_switch_voltage(struct mmc_host *mmc, struct mmc_ios *ios) | |
1147 | { | |
1148 | struct rtsx_usb_sdmmc *host = mmc_priv(mmc); | |
1149 | struct rtsx_ucr *ucr = host->ucr; | |
1150 | int err = 0; | |
1151 | ||
1152 | dev_dbg(sdmmc_dev(host), "%s: signal_voltage = %d\n", | |
1153 | __func__, ios->signal_voltage); | |
1154 | ||
1155 | if (host->host_removal) | |
1156 | return -ENOMEDIUM; | |
1157 | ||
1158 | if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_120) | |
1159 | return -EPERM; | |
1160 | ||
1161 | mutex_lock(&ucr->dev_mutex); | |
1162 | ||
1163 | err = rtsx_usb_card_exclusive_check(ucr, RTSX_USB_SD_CARD); | |
1164 | if (err) { | |
1165 | mutex_unlock(&ucr->dev_mutex); | |
1166 | return err; | |
1167 | } | |
1168 | ||
1169 | /* Let mmc core do the busy checking, simply stop the forced-toggle | |
1170 | * clock(while issuing CMD11) and switch voltage. | |
1171 | */ | |
1172 | rtsx_usb_init_cmd(ucr); | |
1173 | ||
1174 | if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) { | |
1175 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PAD_CTL, | |
1176 | SD_IO_USING_1V8, SD_IO_USING_3V3); | |
1177 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, LDO_POWER_CFG, | |
1178 | TUNE_SD18_MASK, TUNE_SD18_3V3); | |
1179 | } else { | |
1180 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BUS_STAT, | |
1181 | SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, | |
1182 | SD_CLK_FORCE_STOP); | |
1183 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PAD_CTL, | |
1184 | SD_IO_USING_1V8, SD_IO_USING_1V8); | |
1185 | rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, LDO_POWER_CFG, | |
1186 | TUNE_SD18_MASK, TUNE_SD18_1V8); | |
1187 | } | |
1188 | ||
1189 | err = rtsx_usb_send_cmd(ucr, MODE_C, 100); | |
1190 | mutex_unlock(&ucr->dev_mutex); | |
1191 | ||
1192 | return err; | |
1193 | } | |
1194 | ||
1195 | static int sdmmc_card_busy(struct mmc_host *mmc) | |
1196 | { | |
1197 | struct rtsx_usb_sdmmc *host = mmc_priv(mmc); | |
1198 | struct rtsx_ucr *ucr = host->ucr; | |
1199 | int err; | |
1200 | u8 stat; | |
1201 | u8 mask = SD_DAT3_STATUS | SD_DAT2_STATUS | SD_DAT1_STATUS | |
1202 | | SD_DAT0_STATUS; | |
1203 | ||
1204 | dev_dbg(sdmmc_dev(host), "%s\n", __func__); | |
1205 | ||
1206 | mutex_lock(&ucr->dev_mutex); | |
1207 | ||
1208 | err = rtsx_usb_write_register(ucr, SD_BUS_STAT, | |
1209 | SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, | |
1210 | SD_CLK_TOGGLE_EN); | |
1211 | if (err) | |
1212 | goto out; | |
1213 | ||
1214 | mdelay(1); | |
1215 | ||
1216 | err = rtsx_usb_read_register(ucr, SD_BUS_STAT, &stat); | |
1217 | if (err) | |
1218 | goto out; | |
1219 | ||
1220 | err = rtsx_usb_write_register(ucr, SD_BUS_STAT, | |
1221 | SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, 0); | |
1222 | out: | |
1223 | mutex_unlock(&ucr->dev_mutex); | |
1224 | ||
1225 | if (err) | |
1226 | return err; | |
1227 | ||
1228 | /* check if any pin between dat[0:3] is low */ | |
1229 | if ((stat & mask) != mask) | |
1230 | return 1; | |
1231 | else | |
1232 | return 0; | |
1233 | } | |
1234 | ||
1235 | static int sdmmc_execute_tuning(struct mmc_host *mmc, u32 opcode) | |
1236 | { | |
1237 | struct rtsx_usb_sdmmc *host = mmc_priv(mmc); | |
1238 | struct rtsx_ucr *ucr = host->ucr; | |
1239 | int err = 0; | |
1240 | ||
1241 | if (host->host_removal) | |
1242 | return -ENOMEDIUM; | |
1243 | ||
1244 | mutex_lock(&ucr->dev_mutex); | |
1245 | ||
1246 | if (!host->ddr_mode) | |
1247 | err = sd_tuning_rx(host, MMC_SEND_TUNING_BLOCK); | |
1248 | ||
1249 | mutex_unlock(&ucr->dev_mutex); | |
1250 | ||
1251 | return err; | |
1252 | } | |
1253 | ||
1254 | static const struct mmc_host_ops rtsx_usb_sdmmc_ops = { | |
1255 | .request = sdmmc_request, | |
1256 | .set_ios = sdmmc_set_ios, | |
1257 | .get_ro = sdmmc_get_ro, | |
1258 | .get_cd = sdmmc_get_cd, | |
1259 | .start_signal_voltage_switch = sdmmc_switch_voltage, | |
1260 | .card_busy = sdmmc_card_busy, | |
1261 | .execute_tuning = sdmmc_execute_tuning, | |
1262 | }; | |
1263 | ||
1264 | #ifdef RTSX_USB_USE_LEDS_CLASS | |
1265 | static void rtsx_usb_led_control(struct led_classdev *led, | |
1266 | enum led_brightness brightness) | |
1267 | { | |
1268 | struct rtsx_usb_sdmmc *host = container_of(led, | |
1269 | struct rtsx_usb_sdmmc, led); | |
1270 | ||
1271 | if (host->host_removal) | |
1272 | return; | |
1273 | ||
1274 | host->led.brightness = brightness; | |
1275 | schedule_work(&host->led_work); | |
1276 | } | |
1277 | ||
1278 | static void rtsx_usb_update_led(struct work_struct *work) | |
1279 | { | |
1280 | struct rtsx_usb_sdmmc *host = | |
1281 | container_of(work, struct rtsx_usb_sdmmc, led_work); | |
1282 | struct rtsx_ucr *ucr = host->ucr; | |
1283 | ||
4bfdd76d | 1284 | pm_runtime_get_noresume(sdmmc_dev(host)); |
c7f6558d RT |
1285 | mutex_lock(&ucr->dev_mutex); |
1286 | ||
4bfdd76d UH |
1287 | if (host->power_mode == MMC_POWER_OFF) |
1288 | goto out; | |
1289 | ||
c7f6558d RT |
1290 | if (host->led.brightness == LED_OFF) |
1291 | rtsx_usb_turn_off_led(ucr); | |
1292 | else | |
1293 | rtsx_usb_turn_on_led(ucr); | |
1294 | ||
4bfdd76d | 1295 | out: |
c7f6558d | 1296 | mutex_unlock(&ucr->dev_mutex); |
f275179f | 1297 | pm_runtime_put_sync_suspend(sdmmc_dev(host)); |
c7f6558d RT |
1298 | } |
1299 | #endif | |
1300 | ||
1301 | static void rtsx_usb_init_host(struct rtsx_usb_sdmmc *host) | |
1302 | { | |
1303 | struct mmc_host *mmc = host->mmc; | |
1304 | ||
1305 | mmc->f_min = 250000; | |
1306 | mmc->f_max = 208000000; | |
1307 | mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195; | |
1308 | mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SD_HIGHSPEED | | |
1309 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_BUS_WIDTH_TEST | | |
1310 | MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | MMC_CAP_UHS_SDR50 | | |
1be64c79 | 1311 | MMC_CAP_SYNC_RUNTIME_PM; |
4b7d4545 UH |
1312 | mmc->caps2 = MMC_CAP2_NO_PRESCAN_POWERUP | MMC_CAP2_FULL_PWR_CYCLE | |
1313 | MMC_CAP2_NO_SDIO; | |
c7f6558d RT |
1314 | |
1315 | mmc->max_current_330 = 400; | |
1316 | mmc->max_current_180 = 800; | |
1317 | mmc->ops = &rtsx_usb_sdmmc_ops; | |
1318 | mmc->max_segs = 256; | |
1319 | mmc->max_seg_size = 65536; | |
1320 | mmc->max_blk_size = 512; | |
1321 | mmc->max_blk_count = 65535; | |
1322 | mmc->max_req_size = 524288; | |
1323 | ||
1324 | host->power_mode = MMC_POWER_OFF; | |
1325 | } | |
1326 | ||
1327 | static int rtsx_usb_sdmmc_drv_probe(struct platform_device *pdev) | |
1328 | { | |
1329 | struct mmc_host *mmc; | |
1330 | struct rtsx_usb_sdmmc *host; | |
1331 | struct rtsx_ucr *ucr; | |
1332 | #ifdef RTSX_USB_USE_LEDS_CLASS | |
1333 | int err; | |
1334 | #endif | |
1335 | ||
1336 | ucr = usb_get_intfdata(to_usb_interface(pdev->dev.parent)); | |
1337 | if (!ucr) | |
1338 | return -ENXIO; | |
1339 | ||
1340 | dev_dbg(&(pdev->dev), ": Realtek USB SD/MMC controller found\n"); | |
1341 | ||
1342 | mmc = mmc_alloc_host(sizeof(*host), &pdev->dev); | |
1343 | if (!mmc) | |
1344 | return -ENOMEM; | |
1345 | ||
1346 | host = mmc_priv(mmc); | |
1347 | host->ucr = ucr; | |
1348 | host->mmc = mmc; | |
1349 | host->pdev = pdev; | |
1350 | platform_set_drvdata(pdev, host); | |
1351 | ||
1352 | mutex_init(&host->host_mutex); | |
1353 | rtsx_usb_init_host(host); | |
1354 | pm_runtime_enable(&pdev->dev); | |
1355 | ||
1356 | #ifdef RTSX_USB_USE_LEDS_CLASS | |
1357 | snprintf(host->led_name, sizeof(host->led_name), | |
1358 | "%s::", mmc_hostname(mmc)); | |
1359 | host->led.name = host->led_name; | |
1360 | host->led.brightness = LED_OFF; | |
1361 | host->led.default_trigger = mmc_hostname(mmc); | |
1362 | host->led.brightness_set = rtsx_usb_led_control; | |
1363 | ||
1364 | err = led_classdev_register(mmc_dev(mmc), &host->led); | |
1365 | if (err) | |
1366 | dev_err(&(pdev->dev), | |
1367 | "Failed to register LED device: %d\n", err); | |
1368 | INIT_WORK(&host->led_work, rtsx_usb_update_led); | |
1369 | ||
1370 | #endif | |
1371 | mmc_add_host(mmc); | |
1372 | ||
1373 | return 0; | |
1374 | } | |
1375 | ||
1376 | static int rtsx_usb_sdmmc_drv_remove(struct platform_device *pdev) | |
1377 | { | |
1378 | struct rtsx_usb_sdmmc *host = platform_get_drvdata(pdev); | |
1379 | struct mmc_host *mmc; | |
1380 | ||
1381 | if (!host) | |
1382 | return 0; | |
1383 | ||
1384 | mmc = host->mmc; | |
1385 | host->host_removal = true; | |
1386 | ||
1387 | mutex_lock(&host->host_mutex); | |
1388 | if (host->mrq) { | |
1389 | dev_dbg(&(pdev->dev), | |
1390 | "%s: Controller removed during transfer\n", | |
1391 | mmc_hostname(mmc)); | |
1392 | host->mrq->cmd->error = -ENOMEDIUM; | |
1393 | if (host->mrq->stop) | |
1394 | host->mrq->stop->error = -ENOMEDIUM; | |
1395 | mmc_request_done(mmc, host->mrq); | |
1396 | } | |
1397 | mutex_unlock(&host->host_mutex); | |
1398 | ||
1399 | mmc_remove_host(mmc); | |
1400 | ||
1401 | #ifdef RTSX_USB_USE_LEDS_CLASS | |
1402 | cancel_work_sync(&host->led_work); | |
1403 | led_classdev_unregister(&host->led); | |
1404 | #endif | |
1405 | ||
1406 | mmc_free_host(mmc); | |
1407 | pm_runtime_disable(&pdev->dev); | |
1408 | platform_set_drvdata(pdev, NULL); | |
1409 | ||
1410 | dev_dbg(&(pdev->dev), | |
1411 | ": Realtek USB SD/MMC module has been removed\n"); | |
1412 | ||
1413 | return 0; | |
1414 | } | |
1415 | ||
4dad599b UH |
1416 | #ifdef CONFIG_PM |
1417 | static int rtsx_usb_sdmmc_runtime_suspend(struct device *dev) | |
1418 | { | |
1419 | struct rtsx_usb_sdmmc *host = dev_get_drvdata(dev); | |
1420 | ||
1421 | host->mmc->caps &= ~MMC_CAP_NEEDS_POLL; | |
1422 | return 0; | |
1423 | } | |
1424 | ||
1425 | static int rtsx_usb_sdmmc_runtime_resume(struct device *dev) | |
1426 | { | |
1427 | struct rtsx_usb_sdmmc *host = dev_get_drvdata(dev); | |
1428 | ||
1429 | host->mmc->caps |= MMC_CAP_NEEDS_POLL; | |
1430 | if (sdmmc_get_cd(host->mmc) == 1) | |
1431 | mmc_detect_change(host->mmc, 0); | |
1432 | return 0; | |
1433 | } | |
1434 | #endif | |
1435 | ||
1436 | static const struct dev_pm_ops rtsx_usb_sdmmc_dev_pm_ops = { | |
1437 | SET_RUNTIME_PM_OPS(rtsx_usb_sdmmc_runtime_suspend, | |
1438 | rtsx_usb_sdmmc_runtime_resume, NULL) | |
1439 | }; | |
1440 | ||
f2483b0d | 1441 | static const struct platform_device_id rtsx_usb_sdmmc_ids[] = { |
c7f6558d RT |
1442 | { |
1443 | .name = "rtsx_usb_sdmmc", | |
1444 | }, { | |
1445 | /* sentinel */ | |
1446 | } | |
1447 | }; | |
1448 | MODULE_DEVICE_TABLE(platform, rtsx_usb_sdmmc_ids); | |
1449 | ||
1450 | static struct platform_driver rtsx_usb_sdmmc_driver = { | |
1451 | .probe = rtsx_usb_sdmmc_drv_probe, | |
1452 | .remove = rtsx_usb_sdmmc_drv_remove, | |
1453 | .id_table = rtsx_usb_sdmmc_ids, | |
1454 | .driver = { | |
c7f6558d | 1455 | .name = "rtsx_usb_sdmmc", |
21b2cec6 | 1456 | .probe_type = PROBE_PREFER_ASYNCHRONOUS, |
4dad599b | 1457 | .pm = &rtsx_usb_sdmmc_dev_pm_ops, |
c7f6558d RT |
1458 | }, |
1459 | }; | |
1460 | module_platform_driver(rtsx_usb_sdmmc_driver); | |
1461 | ||
1462 | MODULE_LICENSE("GPL v2"); | |
1463 | MODULE_AUTHOR("Roger Tseng <rogerable@realtek.com>"); | |
1464 | MODULE_DESCRIPTION("Realtek USB SD/MMC Card Host Driver"); |