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0d1bb41a BD |
1 | /* linux/drivers/mmc/host/sdhci-s3c.c |
2 | * | |
3 | * Copyright 2008 Openmoko Inc. | |
4 | * Copyright 2008 Simtec Electronics | |
5 | * Ben Dooks <ben@simtec.co.uk> | |
6 | * http://armlinux.simtec.co.uk/ | |
7 | * | |
8 | * SDHCI (HSMMC) support for Samsung SoC | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | */ | |
14 | ||
15 | #include <linux/delay.h> | |
16 | #include <linux/dma-mapping.h> | |
17 | #include <linux/platform_device.h> | |
5a0e3ad6 | 18 | #include <linux/slab.h> |
0d1bb41a BD |
19 | #include <linux/clk.h> |
20 | #include <linux/io.h> | |
17866e14 | 21 | #include <linux/gpio.h> |
0d1bb41a BD |
22 | |
23 | #include <linux/mmc/host.h> | |
24 | ||
25 | #include <plat/sdhci.h> | |
26 | #include <plat/regs-sdhci.h> | |
27 | ||
28 | #include "sdhci.h" | |
29 | ||
30 | #define MAX_BUS_CLK (4) | |
31 | ||
32 | /** | |
33 | * struct sdhci_s3c - S3C SDHCI instance | |
34 | * @host: The SDHCI host created | |
35 | * @pdev: The platform device we where created from. | |
36 | * @ioarea: The resource created when we claimed the IO area. | |
37 | * @pdata: The platform data for this controller. | |
38 | * @cur_clk: The index of the current bus clock. | |
39 | * @clk_io: The clock for the internal bus interface. | |
40 | * @clk_bus: The clocks that are available for the SD/MMC bus clock. | |
41 | */ | |
42 | struct sdhci_s3c { | |
43 | struct sdhci_host *host; | |
44 | struct platform_device *pdev; | |
45 | struct resource *ioarea; | |
46 | struct s3c_sdhci_platdata *pdata; | |
47 | unsigned int cur_clk; | |
17866e14 MS |
48 | int ext_cd_irq; |
49 | int ext_cd_gpio; | |
0d1bb41a BD |
50 | |
51 | struct clk *clk_io; | |
52 | struct clk *clk_bus[MAX_BUS_CLK]; | |
53 | }; | |
54 | ||
55 | static inline struct sdhci_s3c *to_s3c(struct sdhci_host *host) | |
56 | { | |
57 | return sdhci_priv(host); | |
58 | } | |
59 | ||
60 | /** | |
61 | * get_curclk - convert ctrl2 register to clock source number | |
62 | * @ctrl2: Control2 register value. | |
63 | */ | |
64 | static u32 get_curclk(u32 ctrl2) | |
65 | { | |
66 | ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK; | |
67 | ctrl2 >>= S3C_SDHCI_CTRL2_SELBASECLK_SHIFT; | |
68 | ||
69 | return ctrl2; | |
70 | } | |
71 | ||
72 | static void sdhci_s3c_check_sclk(struct sdhci_host *host) | |
73 | { | |
74 | struct sdhci_s3c *ourhost = to_s3c(host); | |
75 | u32 tmp = readl(host->ioaddr + S3C_SDHCI_CONTROL2); | |
76 | ||
77 | if (get_curclk(tmp) != ourhost->cur_clk) { | |
78 | dev_dbg(&ourhost->pdev->dev, "restored ctrl2 clock setting\n"); | |
79 | ||
80 | tmp &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK; | |
81 | tmp |= ourhost->cur_clk << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT; | |
82 | writel(tmp, host->ioaddr + 0x80); | |
83 | } | |
84 | } | |
85 | ||
86 | /** | |
87 | * sdhci_s3c_get_max_clk - callback to get maximum clock frequency. | |
88 | * @host: The SDHCI host instance. | |
89 | * | |
90 | * Callback to return the maximum clock rate acheivable by the controller. | |
91 | */ | |
92 | static unsigned int sdhci_s3c_get_max_clk(struct sdhci_host *host) | |
93 | { | |
94 | struct sdhci_s3c *ourhost = to_s3c(host); | |
95 | struct clk *busclk; | |
96 | unsigned int rate, max; | |
97 | int clk; | |
98 | ||
99 | /* note, a reset will reset the clock source */ | |
100 | ||
101 | sdhci_s3c_check_sclk(host); | |
102 | ||
103 | for (max = 0, clk = 0; clk < MAX_BUS_CLK; clk++) { | |
104 | busclk = ourhost->clk_bus[clk]; | |
105 | if (!busclk) | |
106 | continue; | |
107 | ||
108 | rate = clk_get_rate(busclk); | |
109 | if (rate > max) | |
110 | max = rate; | |
111 | } | |
112 | ||
113 | return max; | |
114 | } | |
115 | ||
0d1bb41a BD |
116 | /** |
117 | * sdhci_s3c_consider_clock - consider one the bus clocks for current setting | |
118 | * @ourhost: Our SDHCI instance. | |
119 | * @src: The source clock index. | |
120 | * @wanted: The clock frequency wanted. | |
121 | */ | |
122 | static unsigned int sdhci_s3c_consider_clock(struct sdhci_s3c *ourhost, | |
123 | unsigned int src, | |
124 | unsigned int wanted) | |
125 | { | |
126 | unsigned long rate; | |
127 | struct clk *clksrc = ourhost->clk_bus[src]; | |
128 | int div; | |
129 | ||
130 | if (!clksrc) | |
131 | return UINT_MAX; | |
132 | ||
133 | rate = clk_get_rate(clksrc); | |
134 | ||
135 | for (div = 1; div < 256; div *= 2) { | |
136 | if ((rate / div) <= wanted) | |
137 | break; | |
138 | } | |
139 | ||
140 | dev_dbg(&ourhost->pdev->dev, "clk %d: rate %ld, want %d, got %ld\n", | |
141 | src, rate, wanted, rate / div); | |
142 | ||
143 | return (wanted - (rate / div)); | |
144 | } | |
145 | ||
146 | /** | |
147 | * sdhci_s3c_set_clock - callback on clock change | |
148 | * @host: The SDHCI host being changed | |
149 | * @clock: The clock rate being requested. | |
150 | * | |
151 | * When the card's clock is going to be changed, look at the new frequency | |
152 | * and find the best clock source to go with it. | |
153 | */ | |
154 | static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock) | |
155 | { | |
156 | struct sdhci_s3c *ourhost = to_s3c(host); | |
157 | unsigned int best = UINT_MAX; | |
158 | unsigned int delta; | |
159 | int best_src = 0; | |
160 | int src; | |
161 | u32 ctrl; | |
162 | ||
163 | /* don't bother if the clock is going off. */ | |
164 | if (clock == 0) | |
165 | return; | |
166 | ||
167 | for (src = 0; src < MAX_BUS_CLK; src++) { | |
168 | delta = sdhci_s3c_consider_clock(ourhost, src, clock); | |
169 | if (delta < best) { | |
170 | best = delta; | |
171 | best_src = src; | |
172 | } | |
173 | } | |
174 | ||
175 | dev_dbg(&ourhost->pdev->dev, | |
176 | "selected source %d, clock %d, delta %d\n", | |
177 | best_src, clock, best); | |
178 | ||
179 | /* select the new clock source */ | |
180 | ||
181 | if (ourhost->cur_clk != best_src) { | |
182 | struct clk *clk = ourhost->clk_bus[best_src]; | |
183 | ||
184 | /* turn clock off to card before changing clock source */ | |
185 | writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL); | |
186 | ||
187 | ourhost->cur_clk = best_src; | |
188 | host->max_clk = clk_get_rate(clk); | |
0d1bb41a BD |
189 | |
190 | ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2); | |
191 | ctrl &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK; | |
192 | ctrl |= best_src << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT; | |
193 | writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2); | |
194 | } | |
195 | ||
196 | /* reconfigure the hardware for new clock rate */ | |
197 | ||
198 | { | |
199 | struct mmc_ios ios; | |
200 | ||
201 | ios.clock = clock; | |
202 | ||
203 | if (ourhost->pdata->cfg_card) | |
204 | (ourhost->pdata->cfg_card)(ourhost->pdev, host->ioaddr, | |
205 | &ios, NULL); | |
206 | } | |
207 | } | |
208 | ||
ce5f036b MS |
209 | /** |
210 | * sdhci_s3c_get_min_clock - callback to get minimal supported clock value | |
211 | * @host: The SDHCI host being queried | |
212 | * | |
213 | * To init mmc host properly a minimal clock value is needed. For high system | |
214 | * bus clock's values the standard formula gives values out of allowed range. | |
215 | * The clock still can be set to lower values, if clock source other then | |
216 | * system bus is selected. | |
217 | */ | |
218 | static unsigned int sdhci_s3c_get_min_clock(struct sdhci_host *host) | |
219 | { | |
220 | struct sdhci_s3c *ourhost = to_s3c(host); | |
221 | unsigned int delta, min = UINT_MAX; | |
222 | int src; | |
223 | ||
224 | for (src = 0; src < MAX_BUS_CLK; src++) { | |
225 | delta = sdhci_s3c_consider_clock(ourhost, src, 0); | |
226 | if (delta == UINT_MAX) | |
227 | continue; | |
228 | /* delta is a negative value in this case */ | |
229 | if (-delta < min) | |
230 | min = -delta; | |
231 | } | |
232 | return min; | |
233 | } | |
234 | ||
0d1bb41a BD |
235 | static struct sdhci_ops sdhci_s3c_ops = { |
236 | .get_max_clock = sdhci_s3c_get_max_clk, | |
0d1bb41a | 237 | .set_clock = sdhci_s3c_set_clock, |
ce5f036b | 238 | .get_min_clock = sdhci_s3c_get_min_clock, |
0d1bb41a BD |
239 | }; |
240 | ||
17866e14 MS |
241 | static void sdhci_s3c_notify_change(struct platform_device *dev, int state) |
242 | { | |
243 | struct sdhci_host *host = platform_get_drvdata(dev); | |
244 | if (host) { | |
f522886e | 245 | spin_lock(&host->lock); |
17866e14 MS |
246 | if (state) { |
247 | dev_dbg(&dev->dev, "card inserted.\n"); | |
248 | host->flags &= ~SDHCI_DEVICE_DEAD; | |
249 | host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION; | |
250 | } else { | |
251 | dev_dbg(&dev->dev, "card removed.\n"); | |
252 | host->flags |= SDHCI_DEVICE_DEAD; | |
253 | host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION; | |
254 | } | |
f522886e KP |
255 | tasklet_schedule(&host->card_tasklet); |
256 | spin_unlock(&host->lock); | |
17866e14 MS |
257 | } |
258 | } | |
259 | ||
260 | static irqreturn_t sdhci_s3c_gpio_card_detect_thread(int irq, void *dev_id) | |
261 | { | |
262 | struct sdhci_s3c *sc = dev_id; | |
263 | int status = gpio_get_value(sc->ext_cd_gpio); | |
264 | if (sc->pdata->ext_cd_gpio_invert) | |
265 | status = !status; | |
266 | sdhci_s3c_notify_change(sc->pdev, status); | |
267 | return IRQ_HANDLED; | |
268 | } | |
269 | ||
270 | static void sdhci_s3c_setup_card_detect_gpio(struct sdhci_s3c *sc) | |
271 | { | |
272 | struct s3c_sdhci_platdata *pdata = sc->pdata; | |
273 | struct device *dev = &sc->pdev->dev; | |
274 | ||
275 | if (gpio_request(pdata->ext_cd_gpio, "SDHCI EXT CD") == 0) { | |
276 | sc->ext_cd_gpio = pdata->ext_cd_gpio; | |
277 | sc->ext_cd_irq = gpio_to_irq(pdata->ext_cd_gpio); | |
278 | if (sc->ext_cd_irq && | |
279 | request_threaded_irq(sc->ext_cd_irq, NULL, | |
280 | sdhci_s3c_gpio_card_detect_thread, | |
281 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, | |
282 | dev_name(dev), sc) == 0) { | |
283 | int status = gpio_get_value(sc->ext_cd_gpio); | |
284 | if (pdata->ext_cd_gpio_invert) | |
285 | status = !status; | |
286 | sdhci_s3c_notify_change(sc->pdev, status); | |
287 | } else { | |
288 | dev_warn(dev, "cannot request irq for card detect\n"); | |
289 | sc->ext_cd_irq = 0; | |
290 | } | |
291 | } else { | |
292 | dev_err(dev, "cannot request gpio for card detect\n"); | |
293 | } | |
294 | } | |
295 | ||
0d1bb41a BD |
296 | static int __devinit sdhci_s3c_probe(struct platform_device *pdev) |
297 | { | |
298 | struct s3c_sdhci_platdata *pdata = pdev->dev.platform_data; | |
299 | struct device *dev = &pdev->dev; | |
300 | struct sdhci_host *host; | |
301 | struct sdhci_s3c *sc; | |
302 | struct resource *res; | |
303 | int ret, irq, ptr, clks; | |
304 | ||
305 | if (!pdata) { | |
306 | dev_err(dev, "no device data specified\n"); | |
307 | return -ENOENT; | |
308 | } | |
309 | ||
310 | irq = platform_get_irq(pdev, 0); | |
311 | if (irq < 0) { | |
312 | dev_err(dev, "no irq specified\n"); | |
313 | return irq; | |
314 | } | |
315 | ||
316 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
317 | if (!res) { | |
318 | dev_err(dev, "no memory specified\n"); | |
319 | return -ENOENT; | |
320 | } | |
321 | ||
322 | host = sdhci_alloc_host(dev, sizeof(struct sdhci_s3c)); | |
323 | if (IS_ERR(host)) { | |
324 | dev_err(dev, "sdhci_alloc_host() failed\n"); | |
325 | return PTR_ERR(host); | |
326 | } | |
327 | ||
328 | sc = sdhci_priv(host); | |
329 | ||
330 | sc->host = host; | |
331 | sc->pdev = pdev; | |
332 | sc->pdata = pdata; | |
17866e14 | 333 | sc->ext_cd_gpio = -1; /* invalid gpio number */ |
0d1bb41a BD |
334 | |
335 | platform_set_drvdata(pdev, host); | |
336 | ||
337 | sc->clk_io = clk_get(dev, "hsmmc"); | |
338 | if (IS_ERR(sc->clk_io)) { | |
339 | dev_err(dev, "failed to get io clock\n"); | |
340 | ret = PTR_ERR(sc->clk_io); | |
341 | goto err_io_clk; | |
342 | } | |
343 | ||
344 | /* enable the local io clock and keep it running for the moment. */ | |
345 | clk_enable(sc->clk_io); | |
346 | ||
347 | for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) { | |
348 | struct clk *clk; | |
349 | char *name = pdata->clocks[ptr]; | |
350 | ||
351 | if (name == NULL) | |
352 | continue; | |
353 | ||
354 | clk = clk_get(dev, name); | |
355 | if (IS_ERR(clk)) { | |
356 | dev_err(dev, "failed to get clock %s\n", name); | |
357 | continue; | |
358 | } | |
359 | ||
360 | clks++; | |
361 | sc->clk_bus[ptr] = clk; | |
362 | clk_enable(clk); | |
363 | ||
364 | dev_info(dev, "clock source %d: %s (%ld Hz)\n", | |
365 | ptr, name, clk_get_rate(clk)); | |
366 | } | |
367 | ||
368 | if (clks == 0) { | |
369 | dev_err(dev, "failed to find any bus clocks\n"); | |
370 | ret = -ENOENT; | |
371 | goto err_no_busclks; | |
372 | } | |
373 | ||
374 | sc->ioarea = request_mem_region(res->start, resource_size(res), | |
375 | mmc_hostname(host->mmc)); | |
376 | if (!sc->ioarea) { | |
377 | dev_err(dev, "failed to reserve register area\n"); | |
378 | ret = -ENXIO; | |
379 | goto err_req_regs; | |
380 | } | |
381 | ||
382 | host->ioaddr = ioremap_nocache(res->start, resource_size(res)); | |
383 | if (!host->ioaddr) { | |
384 | dev_err(dev, "failed to map registers\n"); | |
385 | ret = -ENXIO; | |
386 | goto err_req_regs; | |
387 | } | |
388 | ||
389 | /* Ensure we have minimal gpio selected CMD/CLK/Detect */ | |
390 | if (pdata->cfg_gpio) | |
391 | pdata->cfg_gpio(pdev, pdata->max_width); | |
392 | ||
393 | host->hw_name = "samsung-hsmmc"; | |
394 | host->ops = &sdhci_s3c_ops; | |
395 | host->quirks = 0; | |
396 | host->irq = irq; | |
397 | ||
398 | /* Setup quirks for the controller */ | |
b2e75eff | 399 | host->quirks |= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC; |
a1d56460 | 400 | host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT; |
0d1bb41a BD |
401 | |
402 | #ifndef CONFIG_MMC_SDHCI_S3C_DMA | |
403 | ||
404 | /* we currently see overruns on errors, so disable the SDMA | |
405 | * support as well. */ | |
406 | host->quirks |= SDHCI_QUIRK_BROKEN_DMA; | |
407 | ||
408 | #endif /* CONFIG_MMC_SDHCI_S3C_DMA */ | |
409 | ||
410 | /* It seems we do not get an DATA transfer complete on non-busy | |
411 | * transfers, not sure if this is a problem with this specific | |
412 | * SDHCI block, or a missing configuration that needs to be set. */ | |
413 | host->quirks |= SDHCI_QUIRK_NO_BUSY_IRQ; | |
414 | ||
17866e14 MS |
415 | if (pdata->cd_type == S3C_SDHCI_CD_NONE || |
416 | pdata->cd_type == S3C_SDHCI_CD_PERMANENT) | |
417 | host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION; | |
418 | ||
419 | if (pdata->cd_type == S3C_SDHCI_CD_PERMANENT) | |
420 | host->mmc->caps = MMC_CAP_NONREMOVABLE; | |
421 | ||
0d1bb41a BD |
422 | host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR | |
423 | SDHCI_QUIRK_32BIT_DMA_SIZE); | |
424 | ||
3fe42e07 HL |
425 | /* HSMMC on Samsung SoCs uses SDCLK as timeout clock */ |
426 | host->quirks |= SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK; | |
427 | ||
0d1bb41a BD |
428 | ret = sdhci_add_host(host); |
429 | if (ret) { | |
430 | dev_err(dev, "sdhci_add_host() failed\n"); | |
431 | goto err_add_host; | |
432 | } | |
433 | ||
17866e14 MS |
434 | /* The following two methods of card detection might call |
435 | sdhci_s3c_notify_change() immediately, so they can be called | |
436 | only after sdhci_add_host(). Setup errors are ignored. */ | |
437 | if (pdata->cd_type == S3C_SDHCI_CD_EXTERNAL && pdata->ext_cd_init) | |
438 | pdata->ext_cd_init(&sdhci_s3c_notify_change); | |
439 | if (pdata->cd_type == S3C_SDHCI_CD_GPIO && | |
440 | gpio_is_valid(pdata->ext_cd_gpio)) | |
441 | sdhci_s3c_setup_card_detect_gpio(sc); | |
442 | ||
0d1bb41a BD |
443 | return 0; |
444 | ||
445 | err_add_host: | |
446 | release_resource(sc->ioarea); | |
447 | kfree(sc->ioarea); | |
448 | ||
449 | err_req_regs: | |
450 | for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) { | |
451 | clk_disable(sc->clk_bus[ptr]); | |
452 | clk_put(sc->clk_bus[ptr]); | |
453 | } | |
454 | ||
455 | err_no_busclks: | |
456 | clk_disable(sc->clk_io); | |
457 | clk_put(sc->clk_io); | |
458 | ||
459 | err_io_clk: | |
460 | sdhci_free_host(host); | |
461 | ||
462 | return ret; | |
463 | } | |
464 | ||
465 | static int __devexit sdhci_s3c_remove(struct platform_device *pdev) | |
466 | { | |
17866e14 | 467 | struct s3c_sdhci_platdata *pdata = pdev->dev.platform_data; |
9d51a6b2 MS |
468 | struct sdhci_host *host = platform_get_drvdata(pdev); |
469 | struct sdhci_s3c *sc = sdhci_priv(host); | |
470 | int ptr; | |
471 | ||
17866e14 MS |
472 | if (pdata->cd_type == S3C_SDHCI_CD_EXTERNAL && pdata->ext_cd_cleanup) |
473 | pdata->ext_cd_cleanup(&sdhci_s3c_notify_change); | |
474 | ||
475 | if (sc->ext_cd_irq) | |
476 | free_irq(sc->ext_cd_irq, sc); | |
477 | ||
478 | if (gpio_is_valid(sc->ext_cd_gpio)) | |
479 | gpio_free(sc->ext_cd_gpio); | |
480 | ||
9d51a6b2 MS |
481 | sdhci_remove_host(host, 1); |
482 | ||
483 | for (ptr = 0; ptr < 3; ptr++) { | |
484 | clk_disable(sc->clk_bus[ptr]); | |
485 | clk_put(sc->clk_bus[ptr]); | |
486 | } | |
487 | clk_disable(sc->clk_io); | |
488 | clk_put(sc->clk_io); | |
489 | ||
490 | iounmap(host->ioaddr); | |
491 | release_resource(sc->ioarea); | |
492 | kfree(sc->ioarea); | |
493 | ||
494 | sdhci_free_host(host); | |
495 | platform_set_drvdata(pdev, NULL); | |
496 | ||
0d1bb41a BD |
497 | return 0; |
498 | } | |
499 | ||
500 | #ifdef CONFIG_PM | |
501 | ||
502 | static int sdhci_s3c_suspend(struct platform_device *dev, pm_message_t pm) | |
503 | { | |
504 | struct sdhci_host *host = platform_get_drvdata(dev); | |
505 | ||
506 | sdhci_suspend_host(host, pm); | |
507 | return 0; | |
508 | } | |
509 | ||
510 | static int sdhci_s3c_resume(struct platform_device *dev) | |
511 | { | |
512 | struct sdhci_host *host = platform_get_drvdata(dev); | |
513 | ||
514 | sdhci_resume_host(host); | |
515 | return 0; | |
516 | } | |
517 | ||
518 | #else | |
519 | #define sdhci_s3c_suspend NULL | |
520 | #define sdhci_s3c_resume NULL | |
521 | #endif | |
522 | ||
523 | static struct platform_driver sdhci_s3c_driver = { | |
524 | .probe = sdhci_s3c_probe, | |
525 | .remove = __devexit_p(sdhci_s3c_remove), | |
526 | .suspend = sdhci_s3c_suspend, | |
527 | .resume = sdhci_s3c_resume, | |
528 | .driver = { | |
529 | .owner = THIS_MODULE, | |
530 | .name = "s3c-sdhci", | |
531 | }, | |
532 | }; | |
533 | ||
534 | static int __init sdhci_s3c_init(void) | |
535 | { | |
536 | return platform_driver_register(&sdhci_s3c_driver); | |
537 | } | |
538 | ||
539 | static void __exit sdhci_s3c_exit(void) | |
540 | { | |
541 | platform_driver_unregister(&sdhci_s3c_driver); | |
542 | } | |
543 | ||
544 | module_init(sdhci_s3c_init); | |
545 | module_exit(sdhci_s3c_exit); | |
546 | ||
547 | MODULE_DESCRIPTION("Samsung SDHCI (HSMMC) glue"); | |
548 | MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>"); | |
549 | MODULE_LICENSE("GPL v2"); | |
550 | MODULE_ALIAS("platform:s3c-sdhci"); |