[mirror_ubuntu-jammy-kernel.git] / drivers / mmc / host / sdhci_f_sdh30.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * linux/drivers/mmc/host/sdhci_f_sdh30.c
 *
 * Copyright (C) 2013 - 2015 Fujitsu Semiconductor, Ltd
 *              Vincent Yang <vincent.yang@tw.fujitsu.com>
 * Copyright (C) 2015 Linaro Ltd  Andy Green <andy.green@linaro.org>
 */

#include <linux/acpi.h>
#include <linux/err.h>
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/property.h>
#include <linux/clk.h>

#include "sdhci-pltfm.h"

/* F_SDH30 extended Controller registers */
#define F_SDH30_AHB_CONFIG		0x100
#define  F_SDH30_AHB_BIGED		0x00000040
#define  F_SDH30_BUSLOCK_DMA		0x00000020
#define  F_SDH30_BUSLOCK_EN		0x00000010
#define  F_SDH30_SIN			0x00000008
#define  F_SDH30_AHB_INCR_16		0x00000004
#define  F_SDH30_AHB_INCR_8		0x00000002
#define  F_SDH30_AHB_INCR_4		0x00000001

#define F_SDH30_TUNING_SETTING		0x108
#define  F_SDH30_CMD_CHK_DIS		0x00010000

#define F_SDH30_IO_CONTROL2		0x114
#define  F_SDH30_CRES_O_DN		0x00080000
#define  F_SDH30_MSEL_O_1_8		0x00040000

#define F_SDH30_ESD_CONTROL		0x124
#define  F_SDH30_EMMC_RST		0x00000002
#define  F_SDH30_EMMC_HS200		0x01000000

#define F_SDH30_CMD_DAT_DELAY		0x200

#define F_SDH30_MIN_CLOCK		400000

struct f_sdhost_priv {
	struct clk *clk_iface;
	struct clk *clk;
	u32 vendor_hs200;
	struct device *dev;
	bool enable_cmd_dat_delay;
};

static void sdhci_f_sdh30_soft_voltage_switch(struct sdhci_host *host)
{
	struct f_sdhost_priv *priv = sdhci_priv(host);
	u32 ctrl = 0;

	usleep_range(2500, 3000);
	ctrl = sdhci_readl(host, F_SDH30_IO_CONTROL2);
	ctrl |= F_SDH30_CRES_O_DN;
	sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2);
	ctrl |= F_SDH30_MSEL_O_1_8;
	sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2);

	ctrl &= ~F_SDH30_CRES_O_DN;
	sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2);
	usleep_range(2500, 3000);

	if (priv->vendor_hs200) {
		dev_info(priv->dev, "%s: setting hs200\n", __func__);
		ctrl = sdhci_readl(host, F_SDH30_ESD_CONTROL);
		ctrl |= priv->vendor_hs200;
		sdhci_writel(host, ctrl, F_SDH30_ESD_CONTROL);
	}

	ctrl = sdhci_readl(host, F_SDH30_TUNING_SETTING);
	ctrl |= F_SDH30_CMD_CHK_DIS;
	sdhci_writel(host, ctrl, F_SDH30_TUNING_SETTING);
}

static unsigned int sdhci_f_sdh30_get_min_clock(struct sdhci_host *host)
{
	return F_SDH30_MIN_CLOCK;
}

static void sdhci_f_sdh30_reset(struct sdhci_host *host, u8 mask)
{
	struct f_sdhost_priv *priv = sdhci_priv(host);
	u32 ctl;

	if (sdhci_readw(host, SDHCI_CLOCK_CONTROL) == 0)
		sdhci_writew(host, 0xBC01, SDHCI_CLOCK_CONTROL);

	sdhci_reset(host, mask);

	if (priv->enable_cmd_dat_delay) {
		ctl = sdhci_readl(host, F_SDH30_ESD_CONTROL);
		ctl |= F_SDH30_CMD_DAT_DELAY;
		sdhci_writel(host, ctl, F_SDH30_ESD_CONTROL);
	}
}

static const struct sdhci_ops sdhci_f_sdh30_ops = {
	.voltage_switch = sdhci_f_sdh30_soft_voltage_switch,
	.get_min_clock = sdhci_f_sdh30_get_min_clock,
	.reset = sdhci_f_sdh30_reset,
	.set_clock = sdhci_set_clock,
	.set_bus_width = sdhci_set_bus_width,
	.set_uhs_signaling = sdhci_set_uhs_signaling,
};

static int sdhci_f_sdh30_probe(struct platform_device *pdev)
{
	struct sdhci_host *host;
	struct device *dev = &pdev->dev;
	struct resource *res;
	int irq, ctrl = 0, ret = 0;
	struct f_sdhost_priv *priv;
	u32 reg = 0;

	irq = platform_get_irq(pdev, 0);
	if (irq < 0) {
		dev_err(dev, "%s: no irq specified\n", __func__);
		return irq;
	}

	host = sdhci_alloc_host(dev, sizeof(struct f_sdhost_priv));
	if (IS_ERR(host))
		return PTR_ERR(host);

	priv = sdhci_priv(host);
	priv->dev = dev;

	host->quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
		       SDHCI_QUIRK_INVERTED_WRITE_PROTECT;
	host->quirks2 = SDHCI_QUIRK2_SUPPORT_SINGLE |
			SDHCI_QUIRK2_TUNING_WORK_AROUND;

	priv->enable_cmd_dat_delay = device_property_read_bool(dev,
						"fujitsu,cmd-dat-delay-select");

	ret = mmc_of_parse(host->mmc);
	if (ret)
		goto err;

	platform_set_drvdata(pdev, host);

	host->hw_name = "f_sdh30";
	host->ops = &sdhci_f_sdh30_ops;
	host->irq = irq;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	host->ioaddr = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(host->ioaddr)) {
		ret = PTR_ERR(host->ioaddr);
		goto err;
	}

	if (dev_of_node(dev)) {
		sdhci_get_of_property(pdev);

		priv->clk_iface = devm_clk_get(&pdev->dev, "iface");
		if (IS_ERR(priv->clk_iface)) {
			ret = PTR_ERR(priv->clk_iface);
			goto err;
		}

		ret = clk_prepare_enable(priv->clk_iface);
		if (ret)
			goto err;

		priv->clk = devm_clk_get(&pdev->dev, "core");
		if (IS_ERR(priv->clk)) {
			ret = PTR_ERR(priv->clk);
			goto err_clk;
		}

		ret = clk_prepare_enable(priv->clk);
		if (ret)
			goto err_clk;
	}

	/* init vendor specific regs */
	ctrl = sdhci_readw(host, F_SDH30_AHB_CONFIG);
	ctrl |= F_SDH30_SIN | F_SDH30_AHB_INCR_16 | F_SDH30_AHB_INCR_8 |
		F_SDH30_AHB_INCR_4;
	ctrl &= ~(F_SDH30_AHB_BIGED | F_SDH30_BUSLOCK_EN);
	sdhci_writew(host, ctrl, F_SDH30_AHB_CONFIG);

	reg = sdhci_readl(host, F_SDH30_ESD_CONTROL);
	sdhci_writel(host, reg & ~F_SDH30_EMMC_RST, F_SDH30_ESD_CONTROL);
	msleep(20);
	sdhci_writel(host, reg | F_SDH30_EMMC_RST, F_SDH30_ESD_CONTROL);

	reg = sdhci_readl(host, SDHCI_CAPABILITIES);
	if (reg & SDHCI_CAN_DO_8BIT)
		priv->vendor_hs200 = F_SDH30_EMMC_HS200;

	ret = sdhci_add_host(host);
	if (ret)
		goto err_add_host;

	return 0;

err_add_host:
	clk_disable_unprepare(priv->clk);
err_clk:
	clk_disable_unprepare(priv->clk_iface);
err:
	sdhci_free_host(host);
	return ret;
}

static int sdhci_f_sdh30_remove(struct platform_device *pdev)
{
	struct sdhci_host *host = platform_get_drvdata(pdev);
	struct f_sdhost_priv *priv = sdhci_priv(host);

	sdhci_remove_host(host, readl(host->ioaddr + SDHCI_INT_STATUS) ==
			  0xffffffff);

	clk_disable_unprepare(priv->clk_iface);
	clk_disable_unprepare(priv->clk);

	sdhci_free_host(host);
	platform_set_drvdata(pdev, NULL);

	return 0;
}

#ifdef CONFIG_OF
static const struct of_device_id f_sdh30_dt_ids[] = {
	{ .compatible = "fujitsu,mb86s70-sdhci-3.0" },
	{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, f_sdh30_dt_ids);
#endif

#ifdef CONFIG_ACPI
static const struct acpi_device_id f_sdh30_acpi_ids[] = {
	{ "SCX0002" },
	{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(acpi, f_sdh30_acpi_ids);
#endif

static struct platform_driver sdhci_f_sdh30_driver = {
	.driver = {
		.name = "f_sdh30",
		.of_match_table = of_match_ptr(f_sdh30_dt_ids),
		.acpi_match_table = ACPI_PTR(f_sdh30_acpi_ids),
		.pm	= &sdhci_pltfm_pmops,
	},
	.probe	= sdhci_f_sdh30_probe,
	.remove	= sdhci_f_sdh30_remove,
};

module_platform_driver(sdhci_f_sdh30_driver);

MODULE_DESCRIPTION("F_SDH30 SD Card Controller driver");
MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("FUJITSU SEMICONDUCTOR LTD.");
MODULE_ALIAS("platform:f_sdh30");
Commit	Line	Data
b886d83c	1	// SPDX-License-Identifier: GPL-2.0-only
87a50745 VY	2	/*
	3	* linux/drivers/mmc/host/sdhci_f_sdh30.c
	4	*
	5	* Copyright (C) 2013 - 2015 Fujitsu Semiconductor, Ltd
	6	* Vincent Yang <vincent.yang@tw.fujitsu.com>
	7	* Copyright (C) 2015 Linaro Ltd Andy Green <andy.green@linaro.org>
87a50745 VY	8	*/
87a50745 VY	9
90e1d8cc	10	#include <linux/acpi.h>
87a50745 VY	11	#include <linux/err.h>
	12	#include <linux/delay.h>
	13	#include <linux/module.h>
90e1d8cc	14	#include <linux/of.h>
06641e8d	15	#include <linux/property.h>
87a50745 VY	16	#include <linux/clk.h>
	17
	18	#include "sdhci-pltfm.h"
	19
	20	/* F_SDH30 extended Controller registers */
	21	#define F_SDH30_AHB_CONFIG 0x100
	22	#define F_SDH30_AHB_BIGED 0x00000040
	23	#define F_SDH30_BUSLOCK_DMA 0x00000020
	24	#define F_SDH30_BUSLOCK_EN 0x00000010
	25	#define F_SDH30_SIN 0x00000008
	26	#define F_SDH30_AHB_INCR_16 0x00000004
	27	#define F_SDH30_AHB_INCR_8 0x00000002
	28	#define F_SDH30_AHB_INCR_4 0x00000001
	29
	30	#define F_SDH30_TUNING_SETTING 0x108
	31	#define F_SDH30_CMD_CHK_DIS 0x00010000
	32
	33	#define F_SDH30_IO_CONTROL2 0x114
	34	#define F_SDH30_CRES_O_DN 0x00080000
	35	#define F_SDH30_MSEL_O_1_8 0x00040000
	36
	37	#define F_SDH30_ESD_CONTROL 0x124
	38	#define F_SDH30_EMMC_RST 0x00000002
	39	#define F_SDH30_EMMC_HS200 0x01000000
	40
	41	#define F_SDH30_CMD_DAT_DELAY 0x200
	42
	43	#define F_SDH30_MIN_CLOCK 400000
	44
	45	struct f_sdhost_priv {
	46	struct clk *clk_iface;
	47	struct clk *clk;
	48	u32 vendor_hs200;
	49	struct device *dev;
06641e8d	50	bool enable_cmd_dat_delay;
87a50745 VY	51	};
87a50745 VY	52
cee4e7a5	53	static void sdhci_f_sdh30_soft_voltage_switch(struct sdhci_host *host)
87a50745 VY	54	{
	55	struct f_sdhost_priv *priv = sdhci_priv(host);
	56	u32 ctrl = 0;
	57
	58	usleep_range(2500, 3000);
	59	ctrl = sdhci_readl(host, F_SDH30_IO_CONTROL2);
	60	ctrl \|= F_SDH30_CRES_O_DN;
	61	sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2);
	62	ctrl \|= F_SDH30_MSEL_O_1_8;
	63	sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2);
	64
	65	ctrl &= ~F_SDH30_CRES_O_DN;
	66	sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2);
	67	usleep_range(2500, 3000);
	68
	69	if (priv->vendor_hs200) {
	70	dev_info(priv->dev, "%s: setting hs200\n", __func__);
	71	ctrl = sdhci_readl(host, F_SDH30_ESD_CONTROL);
	72	ctrl \|= priv->vendor_hs200;
	73	sdhci_writel(host, ctrl, F_SDH30_ESD_CONTROL);
	74	}
	75
	76	ctrl = sdhci_readl(host, F_SDH30_TUNING_SETTING);
	77	ctrl \|= F_SDH30_CMD_CHK_DIS;
	78	sdhci_writel(host, ctrl, F_SDH30_TUNING_SETTING);
	79	}
	80
cee4e7a5	81	static unsigned int sdhci_f_sdh30_get_min_clock(struct sdhci_host *host)
87a50745 VY	82	{
	83	return F_SDH30_MIN_CLOCK;
	84	}
	85
cee4e7a5	86	static void sdhci_f_sdh30_reset(struct sdhci_host *host, u8 mask)
87a50745	87	{
06641e8d AB	88	struct f_sdhost_priv *priv = sdhci_priv(host);
	89	u32 ctl;
	90
87a50745 VY	91	if (sdhci_readw(host, SDHCI_CLOCK_CONTROL) == 0)
	92	sdhci_writew(host, 0xBC01, SDHCI_CLOCK_CONTROL);
	93
	94	sdhci_reset(host, mask);
06641e8d AB	95
	96	if (priv->enable_cmd_dat_delay) {
	97	ctl = sdhci_readl(host, F_SDH30_ESD_CONTROL);
	98	ctl \|= F_SDH30_CMD_DAT_DELAY;
	99	sdhci_writel(host, ctl, F_SDH30_ESD_CONTROL);
	100	}
87a50745 VY	101	}
	102
	103	static const struct sdhci_ops sdhci_f_sdh30_ops = {
	104	.voltage_switch = sdhci_f_sdh30_soft_voltage_switch,
	105	.get_min_clock = sdhci_f_sdh30_get_min_clock,
	106	.reset = sdhci_f_sdh30_reset,
	107	.set_clock = sdhci_set_clock,
	108	.set_bus_width = sdhci_set_bus_width,
	109	.set_uhs_signaling = sdhci_set_uhs_signaling,
	110	};
	111
	112	static int sdhci_f_sdh30_probe(struct platform_device *pdev)
	113	{
	114	struct sdhci_host *host;
	115	struct device *dev = &pdev->dev;
	116	struct resource *res;
	117	int irq, ctrl = 0, ret = 0;
	118	struct f_sdhost_priv *priv;
	119	u32 reg = 0;
	120
	121	irq = platform_get_irq(pdev, 0);
	122	if (irq < 0) {
	123	dev_err(dev, "%s: no irq specified\n", __func__);
	124	return irq;
	125	}
	126
2dbf1dc3	127	host = sdhci_alloc_host(dev, sizeof(struct f_sdhost_priv));
87a50745 VY	128	if (IS_ERR(host))
	129	return PTR_ERR(host);
	130
	131	priv = sdhci_priv(host);
	132	priv->dev = dev;
	133
	134	host->quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC \|
	135	SDHCI_QUIRK_INVERTED_WRITE_PROTECT;
	136	host->quirks2 = SDHCI_QUIRK2_SUPPORT_SINGLE \|
	137	SDHCI_QUIRK2_TUNING_WORK_AROUND;
	138
06641e8d AB	139	priv->enable_cmd_dat_delay = device_property_read_bool(dev,
	140	"fujitsu,cmd-dat-delay-select");
	141
87a50745 VY	142	ret = mmc_of_parse(host->mmc);
	143	if (ret)
	144	goto err;
	145
	146	platform_set_drvdata(pdev, host);
	147
87a50745 VY	148	host->hw_name = "f_sdh30";
	149	host->ops = &sdhci_f_sdh30_ops;
	150	host->irq = irq;
	151
	152	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	153	host->ioaddr = devm_ioremap_resource(&pdev->dev, res);
	154	if (IS_ERR(host->ioaddr)) {
3e7cf902	155	ret = PTR_ERR(host->ioaddr);
87a50745 VY	156	goto err;
	157	}
	158
90e1d8cc AB	159	if (dev_of_node(dev)) {
90e1d8cc AB	160	sdhci_get_of_property(pdev);
87a50745	161
90e1d8cc AB	162	priv->clk_iface = devm_clk_get(&pdev->dev, "iface");
	163	if (IS_ERR(priv->clk_iface)) {
	164	ret = PTR_ERR(priv->clk_iface);
	165	goto err;
	166	}
87a50745	167
90e1d8cc AB	168	ret = clk_prepare_enable(priv->clk_iface);
	169	if (ret)
	170	goto err;
87a50745	171
90e1d8cc AB	172	priv->clk = devm_clk_get(&pdev->dev, "core");
	173	if (IS_ERR(priv->clk)) {
	174	ret = PTR_ERR(priv->clk);
	175	goto err_clk;
	176	}
	177
	178	ret = clk_prepare_enable(priv->clk);
	179	if (ret)
	180	goto err_clk;
	181	}
87a50745 VY	182
	183	/* init vendor specific regs */
	184	ctrl = sdhci_readw(host, F_SDH30_AHB_CONFIG);
	185	ctrl \|= F_SDH30_SIN \| F_SDH30_AHB_INCR_16 \| F_SDH30_AHB_INCR_8 \|
	186	F_SDH30_AHB_INCR_4;
	187	ctrl &= ~(F_SDH30_AHB_BIGED \| F_SDH30_BUSLOCK_EN);
	188	sdhci_writew(host, ctrl, F_SDH30_AHB_CONFIG);
	189
	190	reg = sdhci_readl(host, F_SDH30_ESD_CONTROL);
	191	sdhci_writel(host, reg & ~F_SDH30_EMMC_RST, F_SDH30_ESD_CONTROL);
	192	msleep(20);
	193	sdhci_writel(host, reg \| F_SDH30_EMMC_RST, F_SDH30_ESD_CONTROL);
	194
	195	reg = sdhci_readl(host, SDHCI_CAPABILITIES);
	196	if (reg & SDHCI_CAN_DO_8BIT)
	197	priv->vendor_hs200 = F_SDH30_EMMC_HS200;
	198
	199	ret = sdhci_add_host(host);
	200	if (ret)
	201	goto err_add_host;
	202
	203	return 0;
	204
	205	err_add_host:
	206	clk_disable_unprepare(priv->clk);
	207	err_clk:
	208	clk_disable_unprepare(priv->clk_iface);
	209	err:
	210	sdhci_free_host(host);
	211	return ret;
	212	}
	213
	214	static int sdhci_f_sdh30_remove(struct platform_device *pdev)
	215	{
	216	struct sdhci_host *host = platform_get_drvdata(pdev);
	217	struct f_sdhost_priv *priv = sdhci_priv(host);
	218
	219	sdhci_remove_host(host, readl(host->ioaddr + SDHCI_INT_STATUS) ==
	220	0xffffffff);
	221
	222	clk_disable_unprepare(priv->clk_iface);
	223	clk_disable_unprepare(priv->clk);
	224
	225	sdhci_free_host(host);
	226	platform_set_drvdata(pdev, NULL);
	227
	228	return 0;
	229	}
	230
90e1d8cc	231	#ifdef CONFIG_OF
87a50745 VY	232	static const struct of_device_id f_sdh30_dt_ids[] = {
	233	{ .compatible = "fujitsu,mb86s70-sdhci-3.0" },
	234	{ /* sentinel */ }
	235	};
	236	MODULE_DEVICE_TABLE(of, f_sdh30_dt_ids);
90e1d8cc AB	237	#endif
	238
	239	#ifdef CONFIG_ACPI
	240	static const struct acpi_device_id f_sdh30_acpi_ids[] = {
	241	{ "SCX0002" },
	242	{ /* sentinel */ }
	243	};
	244	MODULE_DEVICE_TABLE(acpi, f_sdh30_acpi_ids);
	245	#endif
87a50745 VY	246
	247	static struct platform_driver sdhci_f_sdh30_driver = {
	248	.driver = {
	249	.name = "f_sdh30",
90e1d8cc AB	250	.of_match_table = of_match_ptr(f_sdh30_dt_ids),
90e1d8cc AB	251	.acpi_match_table = ACPI_PTR(f_sdh30_acpi_ids),
fa243f64	252	.pm = &sdhci_pltfm_pmops,
87a50745 VY	253	},
	254	.probe = sdhci_f_sdh30_probe,
	255	.remove = sdhci_f_sdh30_remove,
	256	};
	257
	258	module_platform_driver(sdhci_f_sdh30_driver);
	259
	260	MODULE_DESCRIPTION("F_SDH30 SD Card Controller driver");
	261	MODULE_LICENSE("GPL v2");
	262	MODULE_AUTHOR("FUJITSU SEMICONDUCTOR LTD.");
	263	MODULE_ALIAS("platform:f_sdh30");