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mmc: tmio, sh_mobile_sdhi: Pass tmio_mmc_host ptr to clk_{enable, disable} ops
[mirror_ubuntu-bionic-kernel.git] / drivers / mmc / host / sh_mobile_sdhi.c
CommitLineData
a87d5638
MD
1/*
2 * SuperH Mobile SDHI
3 *
a72e8b17
WS
4 * Copyright (C) 2016 Sang Engineering, Wolfram Sang
5 * Copyright (C) 2015-16 Renesas Electronics Corporation
a87d5638
MD
6 * Copyright (C) 2009 Magnus Damm
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * Based on "Compaq ASIC3 support":
13 *
14 * Copyright 2001 Compaq Computer Corporation.
15 * Copyright 2004-2005 Phil Blundell
16 * Copyright 2007-2008 OpenedHand Ltd.
17 *
18 * Authors: Phil Blundell <pb@handhelds.org>,
19 * Samuel Ortiz <sameo@openedhand.com>
20 *
21 */
22
23#include <linux/kernel.h>
24#include <linux/clk.h>
5a0e3ad6 25#include <linux/slab.h>
c7bb4487 26#include <linux/mod_devicetable.h>
88b47679 27#include <linux/module.h>
5a00a971 28#include <linux/of_device.h>
a87d5638 29#include <linux/platform_device.h>
3c49e810 30#include <linux/mmc/host.h>
42051e8a 31#include <linux/mmc/sh_mobile_sdhi.h>
a87d5638 32#include <linux/mfd/tmio.h>
056676da 33#include <linux/sh_dma.h>
973ed3af 34#include <linux/delay.h>
a87d5638 35
42051e8a
GL
36#include "tmio_mmc.h"
37
e3c418f1
KM
38#define EXT_ACC 0xe4
39
16935250
KM
40#define host_to_priv(host) container_of((host)->pdata, struct sh_mobile_sdhi, mmc_data)
41
5a00a971
GL
42struct sh_mobile_sdhi_of_data {
43 unsigned long tmio_flags;
b3a5d4ce 44 unsigned long capabilities;
423f6c2e 45 unsigned long capabilities2;
f45394d5 46 enum dma_slave_buswidth dma_buswidth;
384b2cbd 47 dma_addr_t dma_rx_offset;
a72e8b17 48 unsigned bus_shift;
5a00a971
GL
49};
50
51static const struct sh_mobile_sdhi_of_data sh_mobile_sdhi_of_cfg[] = {
52 {
53 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
54 },
55};
56
b3a5d4ce 57static const struct sh_mobile_sdhi_of_data of_rcar_gen1_compatible = {
da29fe2b
SU
58 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
59 TMIO_MMC_CLK_ACTUAL,
b3a5d4ce
KM
60 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
61};
62
423f6c2e 63static const struct sh_mobile_sdhi_of_data of_rcar_gen2_compatible = {
da29fe2b 64 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
16a65524 65 TMIO_MMC_CLK_ACTUAL | TMIO_MMC_FAST_CLK_CHG,
423f6c2e 66 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
f45394d5 67 .dma_buswidth = DMA_SLAVE_BUSWIDTH_4_BYTES,
384b2cbd 68 .dma_rx_offset = 0x2000,
423f6c2e
KM
69};
70
a72e8b17
WS
71static const struct sh_mobile_sdhi_of_data of_rcar_gen3_compatible = {
72 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
73 TMIO_MMC_CLK_ACTUAL | TMIO_MMC_FAST_CLK_CHG,
74 .capabilities = MMC_CAP_SD_HIGHSPEED,
75 .bus_shift = 2,
76};
77
2772ef30
KM
78static const struct of_device_id sh_mobile_sdhi_of_match[] = {
79 { .compatible = "renesas,sdhi-shmobile" },
80 { .compatible = "renesas,sdhi-sh7372" },
81 { .compatible = "renesas,sdhi-sh73a0", .data = &sh_mobile_sdhi_of_cfg[0], },
82 { .compatible = "renesas,sdhi-r8a73a4", .data = &sh_mobile_sdhi_of_cfg[0], },
83 { .compatible = "renesas,sdhi-r8a7740", .data = &sh_mobile_sdhi_of_cfg[0], },
b3a5d4ce 84 { .compatible = "renesas,sdhi-r8a7778", .data = &of_rcar_gen1_compatible, },
81bbbc72 85 { .compatible = "renesas,sdhi-r8a7779", .data = &of_rcar_gen1_compatible, },
423f6c2e 86 { .compatible = "renesas,sdhi-r8a7790", .data = &of_rcar_gen2_compatible, },
81918d25 87 { .compatible = "renesas,sdhi-r8a7791", .data = &of_rcar_gen2_compatible, },
a6386403
GU
88 { .compatible = "renesas,sdhi-r8a7792", .data = &of_rcar_gen2_compatible, },
89 { .compatible = "renesas,sdhi-r8a7793", .data = &of_rcar_gen2_compatible, },
90 { .compatible = "renesas,sdhi-r8a7794", .data = &of_rcar_gen2_compatible, },
a72e8b17 91 { .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_gen3_compatible, },
2772ef30
KM
92 {},
93};
94MODULE_DEVICE_TABLE(of, sh_mobile_sdhi_of_match);
95
a87d5638
MD
96struct sh_mobile_sdhi {
97 struct clk *clk;
98 struct tmio_mmc_data mmc_data;
056676da 99 struct tmio_mmc_dma dma_priv;
a87d5638
MD
100};
101
f45394d5
KM
102static void sh_mobile_sdhi_sdbuf_width(struct tmio_mmc_host *host, int width)
103{
104 u32 val;
105
106 /*
107 * see also
108 * sh_mobile_sdhi_of_data :: dma_buswidth
109 */
110 switch (sd_ctrl_read16(host, CTL_VERSION)) {
111 case 0x490C:
112 val = (width == 32) ? 0x0001 : 0x0000;
113 break;
114 case 0xCB0D:
115 val = (width == 32) ? 0x0000 : 0x0001;
116 break;
a72e8b17
WS
117 case 0xCC10: /* Gen3, SD only */
118 case 0xCD10: /* Gen3, SD + MMC */
119 if (width == 64)
120 val = 0x0000;
121 else if (width == 32)
122 val = 0x0101;
123 else
124 val = 0x0001;
125 break;
f45394d5
KM
126 default:
127 /* nothing to do */
128 return;
129 }
130
131 sd_ctrl_write16(host, EXT_ACC, val);
132}
133
0ea28210 134static int sh_mobile_sdhi_clk_enable(struct tmio_mmc_host *host)
56c49287 135{
0ea28210 136 struct mmc_host *mmc = host->mmc;
16935250 137 struct sh_mobile_sdhi *priv = host_to_priv(host);
00fb3d2a 138 int ret = clk_prepare_enable(priv->clk);
56c49287
GL
139 if (ret < 0)
140 return ret;
141
0ea28210 142 mmc->f_max = clk_get_rate(priv->clk);
f45394d5
KM
143
144 /* enable 16bit data access on SDBUF as default */
145 sh_mobile_sdhi_sdbuf_width(host, 16);
146
56c49287
GL
147 return 0;
148}
149
0ea28210 150static void sh_mobile_sdhi_clk_disable(struct tmio_mmc_host *host)
56c49287 151{
16935250 152 struct sh_mobile_sdhi *priv = host_to_priv(host);
0ea28210 153
00fb3d2a 154 clk_disable_unprepare(priv->clk);
56c49287
GL
155}
156
973ed3af
SH
157static int sh_mobile_sdhi_wait_idle(struct tmio_mmc_host *host)
158{
159 int timeout = 1000;
160
161 while (--timeout && !(sd_ctrl_read16(host, CTL_STATUS2) & (1 << 13)))
162 udelay(1);
163
164 if (!timeout) {
94b110af 165 dev_warn(&host->pdev->dev, "timeout waiting for SD bus idle\n");
973ed3af
SH
166 return -EBUSY;
167 }
168
169 return 0;
170}
171
172static int sh_mobile_sdhi_write16_hook(struct tmio_mmc_host *host, int addr)
173{
174 switch (addr)
175 {
176 case CTL_SD_CMD:
177 case CTL_STOP_INTERNAL_ACTION:
178 case CTL_XFER_BLK_COUNT:
179 case CTL_SD_CARD_CLK_CTL:
180 case CTL_SD_XFER_LEN:
181 case CTL_SD_MEM_CARD_OPT:
182 case CTL_TRANSACTION_CTL:
183 case CTL_DMA_ENABLE:
ff741cfd 184 case EXT_ACC:
973ed3af
SH
185 return sh_mobile_sdhi_wait_idle(host);
186 }
187
188 return 0;
189}
190
8b4efe2f
KM
191static int sh_mobile_sdhi_multi_io_quirk(struct mmc_card *card,
192 unsigned int direction, int blk_size)
193{
194 /*
195 * In Renesas controllers, when performing a
196 * multiple block read of one or two blocks,
197 * depending on the timing with which the
198 * response register is read, the response
199 * value may not be read properly.
200 * Use single block read for this HW bug
201 */
202 if ((direction == MMC_DATA_READ) &&
203 blk_size == 2)
204 return 1;
205
206 return blk_size;
207}
208
0c47f6ae
KM
209static void sh_mobile_sdhi_enable_dma(struct tmio_mmc_host *host, bool enable)
210{
211 sd_ctrl_write16(host, CTL_DMA_ENABLE, enable ? 2 : 0);
f45394d5
KM
212
213 /* enable 32bit access if DMA mode if possibile */
214 sh_mobile_sdhi_sdbuf_width(host, enable ? 32 : 16);
0c47f6ae
KM
215}
216
c3be1efd 217static int sh_mobile_sdhi_probe(struct platform_device *pdev)
a87d5638 218{
5a00a971
GL
219 const struct of_device_id *of_id =
220 of_match_device(sh_mobile_sdhi_of_match, &pdev->dev);
a87d5638 221 struct sh_mobile_sdhi *priv;
056676da 222 struct tmio_mmc_data *mmc_data;
f33c9d65 223 struct tmio_mmc_data *mmd = pdev->dev.platform_data;
42051e8a 224 struct tmio_mmc_host *host;
3b159a6e 225 struct resource *res;
d5098cb6
SH
226 int irq, ret, i = 0;
227 bool multiplexed_isr = true;
87ae7bbe 228 struct tmio_mmc_dma *dma_priv;
a87d5638 229
3b159a6e
KM
230 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
231 if (!res)
232 return -EINVAL;
233
ac51b961 234 priv = devm_kzalloc(&pdev->dev, sizeof(struct sh_mobile_sdhi), GFP_KERNEL);
2bf8ab6b 235 if (!priv)
a87d5638 236 return -ENOMEM;
a87d5638 237
056676da 238 mmc_data = &priv->mmc_data;
87ae7bbe 239 dma_priv = &priv->dma_priv;
056676da 240
ac51b961 241 priv->clk = devm_clk_get(&pdev->dev, NULL);
a87d5638 242 if (IS_ERR(priv->clk)) {
a87d5638 243 ret = PTR_ERR(priv->clk);
56ae1adc 244 dev_err(&pdev->dev, "cannot get clock: %d\n", ret);
010f4aa7 245 goto eprobe;
a87d5638
MD
246 }
247
94b110af
KM
248 host = tmio_mmc_host_alloc(pdev);
249 if (!host) {
250 ret = -ENOMEM;
251 goto eprobe;
252 }
253
a72e8b17
WS
254 if (of_id && of_id->data) {
255 const struct sh_mobile_sdhi_of_data *of_data = of_id->data;
256
257 mmc_data->flags |= of_data->tmio_flags;
258 mmc_data->capabilities |= of_data->capabilities;
259 mmc_data->capabilities2 |= of_data->capabilities2;
260 mmc_data->dma_rx_offset = of_data->dma_rx_offset;
261 dma_priv->dma_buswidth = of_data->dma_buswidth;
262 host->bus_shift = of_data->bus_shift;
263 }
264
7ecc09ba 265 host->dma = dma_priv;
dfe9a229 266 host->write16_hook = sh_mobile_sdhi_write16_hook;
4fe2ec57 267 host->clk_enable = sh_mobile_sdhi_clk_enable;
00452c11 268 host->clk_disable = sh_mobile_sdhi_clk_disable;
85c02ddd 269 host->multi_io_quirk = sh_mobile_sdhi_multi_io_quirk;
a72e8b17
WS
270
271 /* Orginally registers were 16 bit apart, could be 32 or 64 nowadays */
272 if (!host->bus_shift && resource_size(res) > 0x100) /* old way to determine the shift */
95a7dc36 273 host->bus_shift = 1;
7ecc09ba 274
84f11d5b 275 if (mmd)
f33c9d65 276 *mmc_data = *mmd;
84f11d5b 277
87ae7bbe 278 dma_priv->filter = shdma_chan_filter;
0c47f6ae 279 dma_priv->enable = sh_mobile_sdhi_enable_dma;
87ae7bbe 280
e471df0b 281 mmc_data->alignment_shift = 1; /* 2-byte alignment */
f33c9d65 282 mmc_data->capabilities |= MMC_CAP_MMC_HIGHSPEED;
e471df0b 283
f1334fb3
YG
284 /*
285 * All SDHI blocks support 2-byte and larger block sizes in 4-bit
286 * bus width mode.
287 */
288 mmc_data->flags |= TMIO_MMC_BLKSZ_2BYTES;
289
23b66071
AH
290 /*
291 * All SDHI blocks support SDIO IRQ signalling.
292 */
293 mmc_data->flags |= TMIO_MMC_SDIO_IRQ;
294
b8d11962
SU
295 /*
296 * All SDHI have CMD12 controll bit
297 */
298 mmc_data->flags |= TMIO_MMC_HAVE_CMD12_CTRL;
299
6b98757e
SU
300 /*
301 * All SDHI need SDIO_INFO1 reserved bit
302 */
303 mmc_data->flags |= TMIO_MMC_SDIO_STATUS_QUIRK;
304
94b110af 305 ret = tmio_mmc_host_probe(host, mmc_data);
42051e8a 306 if (ret < 0)
94b110af 307 goto efree;
a87d5638 308
d5098cb6
SH
309 /*
310 * Allow one or more specific (named) ISRs or
311 * one or more multiplexed (un-named) ISRs.
312 */
313
314 irq = platform_get_irq_byname(pdev, SH_MOBILE_SDHI_IRQ_CARD_DETECT);
315 if (irq >= 0) {
316 multiplexed_isr = false;
ac51b961 317 ret = devm_request_irq(&pdev->dev, irq, tmio_mmc_card_detect_irq, 0,
d5098cb6
SH
318 dev_name(&pdev->dev), host);
319 if (ret)
ac51b961 320 goto eirq;
d5098cb6
SH
321 }
322
323 irq = platform_get_irq_byname(pdev, SH_MOBILE_SDHI_IRQ_SDIO);
324 if (irq >= 0) {
325 multiplexed_isr = false;
ac51b961 326 ret = devm_request_irq(&pdev->dev, irq, tmio_mmc_sdio_irq, 0,
d5098cb6
SH
327 dev_name(&pdev->dev), host);
328 if (ret)
ac51b961 329 goto eirq;
d5098cb6
SH
330 }
331
332 irq = platform_get_irq_byname(pdev, SH_MOBILE_SDHI_IRQ_SDCARD);
333 if (irq >= 0) {
334 multiplexed_isr = false;
ac51b961 335 ret = devm_request_irq(&pdev->dev, irq, tmio_mmc_sdcard_irq, 0,
d6a1f863 336 dev_name(&pdev->dev), host);
d5098cb6 337 if (ret)
ac51b961 338 goto eirq;
d5098cb6
SH
339 } else if (!multiplexed_isr) {
340 dev_err(&pdev->dev,
341 "Principal SD-card IRQ is missing among named interrupts\n");
342 ret = irq;
ac51b961 343 goto eirq;
d5098cb6
SH
344 }
345
346 if (multiplexed_isr) {
347 while (1) {
348 irq = platform_get_irq(pdev, i);
349 if (irq < 0)
350 break;
351 i++;
ac51b961 352 ret = devm_request_irq(&pdev->dev, irq, tmio_mmc_irq, 0,
d5098cb6
SH
353 dev_name(&pdev->dev), host);
354 if (ret)
ac51b961 355 goto eirq;
d6a1f863 356 }
d5098cb6
SH
357
358 /* There must be at least one IRQ source */
7913ae7d
WY
359 if (!i) {
360 ret = irq;
ac51b961 361 goto eirq;
7913ae7d 362 }
8e7bfdb3 363 }
d5098cb6 364
1f7d6819
MD
365 dev_info(&pdev->dev, "%s base at 0x%08lx clock rate %u MHz\n",
366 mmc_hostname(host->mmc), (unsigned long)
58126c87 367 (platform_get_resource(pdev, IORESOURCE_MEM, 0)->start),
369213bd 368 host->mmc->f_max / 1000000);
a87d5638 369
42051e8a 370 return ret;
a87d5638 371
ac51b961 372eirq:
8e7bfdb3 373 tmio_mmc_host_remove(host);
94b110af
KM
374efree:
375 tmio_mmc_host_free(host);
42051e8a 376eprobe:
a87d5638
MD
377 return ret;
378}
379
380static int sh_mobile_sdhi_remove(struct platform_device *pdev)
381{
42051e8a
GL
382 struct mmc_host *mmc = platform_get_drvdata(pdev);
383 struct tmio_mmc_host *host = mmc_priv(mmc);
d6a1f863 384
742a0c7c
GL
385 tmio_mmc_host_remove(host);
386
a87d5638
MD
387 return 0;
388}
389
e6ee7182 390static const struct dev_pm_ops tmio_mmc_dev_pm_ops = {
753a688c
UH
391 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
392 pm_runtime_force_resume)
6ed23b80 393 SET_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend,
4e262d7f
UH
394 tmio_mmc_host_runtime_resume,
395 NULL)
e6ee7182
GL
396};
397
a87d5638
MD
398static struct platform_driver sh_mobile_sdhi_driver = {
399 .driver = {
400 .name = "sh_mobile_sdhi",
e6ee7182 401 .pm = &tmio_mmc_dev_pm_ops,
c7bb4487 402 .of_match_table = sh_mobile_sdhi_of_match,
a87d5638
MD
403 },
404 .probe = sh_mobile_sdhi_probe,
0433c143 405 .remove = sh_mobile_sdhi_remove,
a87d5638
MD
406};
407
d1f81a64 408module_platform_driver(sh_mobile_sdhi_driver);
a87d5638
MD
409
410MODULE_DESCRIPTION("SuperH Mobile SDHI driver");
411MODULE_AUTHOR("Magnus Damm");
412MODULE_LICENSE("GPL v2");
42051e8a 413MODULE_ALIAS("platform:sh_mobile_sdhi");