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[mirror_ubuntu-bionic-kernel.git] / drivers / mmc / host / wbsd.c
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1da177e4 1/*
70f10482 2 * linux/drivers/mmc/host/wbsd.c - Winbond W83L51xD SD/MMC driver
1da177e4 3 *
14d836e7 4 * Copyright (C) 2004-2007 Pierre Ossman, All Rights Reserved.
1da177e4
LT
5 *
6 * This program is free software; you can redistribute it and/or modify
643f720c
PO
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or (at
9 * your option) any later version.
1da177e4
LT
10 *
11 *
12 * Warning!
13 *
14 * Changes to the FIFO system should be done with extreme care since
15 * the hardware is full of bugs related to the FIFO. Known issues are:
16 *
17 * - FIFO size field in FSR is always zero.
18 *
19 * - FIFO interrupts tend not to work as they should. Interrupts are
20 * triggered only for full/empty events, not for threshold values.
21 *
22 * - On APIC systems the FIFO empty interrupt is sometimes lost.
23 */
24
1da177e4
LT
25#include <linux/module.h>
26#include <linux/moduleparam.h>
27#include <linux/init.h>
28#include <linux/ioport.h>
d052d1be 29#include <linux/platform_device.h>
1da177e4 30#include <linux/interrupt.h>
85bcc130 31#include <linux/dma-mapping.h>
1da177e4 32#include <linux/delay.h>
85bcc130 33#include <linux/pnp.h>
1da177e4
LT
34#include <linux/highmem.h>
35#include <linux/mmc/host.h>
bd6dee6f 36#include <linux/scatterlist.h>
5a0e3ad6 37#include <linux/slab.h>
1da177e4
LT
38
39#include <asm/io.h>
40#include <asm/dma.h>
1da177e4
LT
41
42#include "wbsd.h"
43
44#define DRIVER_NAME "wbsd"
1da177e4 45
1da177e4 46#define DBG(x...) \
c6563178 47 pr_debug(DRIVER_NAME ": " x)
1da177e4 48#define DBGF(f, x...) \
c6563178 49 pr_debug(DRIVER_NAME " [%s()]: " f, __func__ , ##x)
1da177e4 50
85bcc130
PO
51/*
52 * Device resources
53 */
54
55#ifdef CONFIG_PNP
56
57static const struct pnp_device_id pnp_dev_table[] = {
58 { "WEC0517", 0 },
59 { "WEC0518", 0 },
60 { "", 0 },
61};
62
63MODULE_DEVICE_TABLE(pnp, pnp_dev_table);
64
65#endif /* CONFIG_PNP */
66
3eee0d03
AB
67static const int config_ports[] = { 0x2E, 0x4E };
68static const int unlock_codes[] = { 0x83, 0x87 };
69
70static const int valid_ids[] = {
71 0x7112,
9eeebd22 72};
3eee0d03 73
85bcc130 74#ifdef CONFIG_PNP
9eeebd22 75static unsigned int param_nopnp = 0;
85bcc130 76#else
9eeebd22 77static const unsigned int param_nopnp = 1;
85bcc130 78#endif
9eeebd22
TW
79static unsigned int param_io = 0x248;
80static unsigned int param_irq = 6;
81static int param_dma = 2;
85bcc130 82
1da177e4
LT
83/*
84 * Basic functions
85 */
86
cfa7f521 87static inline void wbsd_unlock_config(struct wbsd_host *host)
1da177e4 88{
85bcc130 89 BUG_ON(host->config == 0);
fecf92ba 90
1da177e4
LT
91 outb(host->unlock_code, host->config);
92 outb(host->unlock_code, host->config);
93}
94
cfa7f521 95static inline void wbsd_lock_config(struct wbsd_host *host)
1da177e4 96{
85bcc130 97 BUG_ON(host->config == 0);
fecf92ba 98
1da177e4
LT
99 outb(LOCK_CODE, host->config);
100}
101
cfa7f521 102static inline void wbsd_write_config(struct wbsd_host *host, u8 reg, u8 value)
1da177e4 103{
85bcc130 104 BUG_ON(host->config == 0);
fecf92ba 105
1da177e4
LT
106 outb(reg, host->config);
107 outb(value, host->config + 1);
108}
109
cfa7f521 110static inline u8 wbsd_read_config(struct wbsd_host *host, u8 reg)
1da177e4 111{
85bcc130 112 BUG_ON(host->config == 0);
fecf92ba 113
1da177e4
LT
114 outb(reg, host->config);
115 return inb(host->config + 1);
116}
117
cfa7f521 118static inline void wbsd_write_index(struct wbsd_host *host, u8 index, u8 value)
1da177e4
LT
119{
120 outb(index, host->base + WBSD_IDXR);
121 outb(value, host->base + WBSD_DATAR);
122}
123
cfa7f521 124static inline u8 wbsd_read_index(struct wbsd_host *host, u8 index)
1da177e4
LT
125{
126 outb(index, host->base + WBSD_IDXR);
127 return inb(host->base + WBSD_DATAR);
128}
129
130/*
131 * Common routines
132 */
133
cfa7f521 134static void wbsd_init_device(struct wbsd_host *host)
1da177e4
LT
135{
136 u8 setup, ier;
fecf92ba 137
1da177e4
LT
138 /*
139 * Reset chip (SD/MMC part) and fifo.
140 */
141 setup = wbsd_read_index(host, WBSD_IDX_SETUP);
142 setup |= WBSD_FIFO_RESET | WBSD_SOFT_RESET;
143 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
fecf92ba 144
85bcc130
PO
145 /*
146 * Set DAT3 to input
147 */
148 setup &= ~WBSD_DAT3_H;
149 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
150 host->flags &= ~WBSD_FIGNORE_DETECT;
fecf92ba 151
1da177e4
LT
152 /*
153 * Read back default clock.
154 */
155 host->clk = wbsd_read_index(host, WBSD_IDX_CLK);
156
157 /*
158 * Power down port.
159 */
160 outb(WBSD_POWER_N, host->base + WBSD_CSR);
fecf92ba 161
1da177e4
LT
162 /*
163 * Set maximum timeout.
164 */
165 wbsd_write_index(host, WBSD_IDX_TAAC, 0x7F);
fecf92ba 166
85bcc130
PO
167 /*
168 * Test for card presence
169 */
170 if (inb(host->base + WBSD_CSR) & WBSD_CARDPRESENT)
171 host->flags |= WBSD_FCARD_PRESENT;
172 else
173 host->flags &= ~WBSD_FCARD_PRESENT;
fecf92ba 174
1da177e4
LT
175 /*
176 * Enable interesting interrupts.
177 */
178 ier = 0;
179 ier |= WBSD_EINT_CARD;
180 ier |= WBSD_EINT_FIFO_THRE;
1da177e4 181 ier |= WBSD_EINT_CRC;
5721dbf2 182 ier |= WBSD_EINT_TIMEOUT;
1da177e4
LT
183 ier |= WBSD_EINT_TC;
184
185 outb(ier, host->base + WBSD_EIR);
186
187 /*
188 * Clear interrupts.
189 */
190 inb(host->base + WBSD_ISR);
191}
192
cfa7f521 193static void wbsd_reset(struct wbsd_host *host)
1da177e4
LT
194{
195 u8 setup;
fecf92ba 196
a3c76eb9 197 pr_err("%s: Resetting chip\n", mmc_hostname(host->mmc));
fecf92ba 198
1da177e4
LT
199 /*
200 * Soft reset of chip (SD/MMC part).
201 */
202 setup = wbsd_read_index(host, WBSD_IDX_SETUP);
203 setup |= WBSD_SOFT_RESET;
204 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
205}
206
cfa7f521 207static void wbsd_request_end(struct wbsd_host *host, struct mmc_request *mrq)
1da177e4
LT
208{
209 unsigned long dmaflags;
fecf92ba 210
cfa7f521 211 if (host->dma >= 0) {
1da177e4
LT
212 /*
213 * Release ISA DMA controller.
214 */
215 dmaflags = claim_dma_lock();
216 disable_dma(host->dma);
217 clear_dma_ff(host->dma);
218 release_dma_lock(dmaflags);
219
220 /*
221 * Disable DMA on host.
222 */
223 wbsd_write_index(host, WBSD_IDX_DMA, 0);
224 }
fecf92ba 225
1da177e4
LT
226 host->mrq = NULL;
227
228 /*
229 * MMC layer might call back into the driver so first unlock.
230 */
231 spin_unlock(&host->lock);
232 mmc_request_done(host->mmc, mrq);
233 spin_lock(&host->lock);
234}
235
236/*
237 * Scatter/gather functions
238 */
239
cfa7f521 240static inline void wbsd_init_sg(struct wbsd_host *host, struct mmc_data *data)
1da177e4
LT
241{
242 /*
243 * Get info. about SG list from data structure.
244 */
245 host->cur_sg = data->sg;
246 host->num_sg = data->sg_len;
247
248 host->offset = 0;
249 host->remain = host->cur_sg->length;
250}
251
cfa7f521 252static inline int wbsd_next_sg(struct wbsd_host *host)
1da177e4
LT
253{
254 /*
255 * Skip to next SG entry.
256 */
257 host->cur_sg++;
258 host->num_sg--;
259
260 /*
261 * Any entries left?
262 */
cfa7f521
PO
263 if (host->num_sg > 0) {
264 host->offset = 0;
265 host->remain = host->cur_sg->length;
266 }
fecf92ba 267
1da177e4
LT
268 return host->num_sg;
269}
270
4a0ddbd2 271static inline char *wbsd_sg_to_buffer(struct wbsd_host *host)
1da177e4 272{
45711f1a 273 return sg_virt(host->cur_sg);
1da177e4
LT
274}
275
cfa7f521 276static inline void wbsd_sg_to_dma(struct wbsd_host *host, struct mmc_data *data)
1da177e4 277{
14d836e7 278 unsigned int len, i;
cfa7f521
PO
279 struct scatterlist *sg;
280 char *dmabuf = host->dma_buffer;
281 char *sgbuf;
fecf92ba 282
1da177e4
LT
283 sg = data->sg;
284 len = data->sg_len;
fecf92ba 285
cfa7f521 286 for (i = 0; i < len; i++) {
45711f1a 287 sgbuf = sg_virt(&sg[i]);
14d836e7 288 memcpy(dmabuf, sgbuf, sg[i].length);
1da177e4 289 dmabuf += sg[i].length;
1da177e4 290 }
1da177e4
LT
291}
292
cfa7f521 293static inline void wbsd_dma_to_sg(struct wbsd_host *host, struct mmc_data *data)
1da177e4 294{
14d836e7 295 unsigned int len, i;
cfa7f521
PO
296 struct scatterlist *sg;
297 char *dmabuf = host->dma_buffer;
298 char *sgbuf;
fecf92ba 299
1da177e4
LT
300 sg = data->sg;
301 len = data->sg_len;
fecf92ba 302
cfa7f521 303 for (i = 0; i < len; i++) {
45711f1a 304 sgbuf = sg_virt(&sg[i]);
14d836e7 305 memcpy(sgbuf, dmabuf, sg[i].length);
1da177e4 306 dmabuf += sg[i].length;
1da177e4 307 }
1da177e4
LT
308}
309
310/*
311 * Command handling
312 */
fecf92ba 313
cfa7f521
PO
314static inline void wbsd_get_short_reply(struct wbsd_host *host,
315 struct mmc_command *cmd)
1da177e4
LT
316{
317 /*
318 * Correct response type?
319 */
cfa7f521 320 if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_SHORT) {
17b0429d 321 cmd->error = -EILSEQ;
1da177e4
LT
322 return;
323 }
fecf92ba 324
cfa7f521
PO
325 cmd->resp[0] = wbsd_read_index(host, WBSD_IDX_RESP12) << 24;
326 cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP13) << 16;
327 cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP14) << 8;
328 cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP15) << 0;
329 cmd->resp[1] = wbsd_read_index(host, WBSD_IDX_RESP16) << 24;
1da177e4
LT
330}
331
cfa7f521
PO
332static inline void wbsd_get_long_reply(struct wbsd_host *host,
333 struct mmc_command *cmd)
1da177e4
LT
334{
335 int i;
fecf92ba 336
1da177e4
LT
337 /*
338 * Correct response type?
339 */
cfa7f521 340 if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_LONG) {
17b0429d 341 cmd->error = -EILSEQ;
1da177e4
LT
342 return;
343 }
fecf92ba 344
cfa7f521 345 for (i = 0; i < 4; i++) {
1da177e4
LT
346 cmd->resp[i] =
347 wbsd_read_index(host, WBSD_IDX_RESP1 + i * 4) << 24;
348 cmd->resp[i] |=
349 wbsd_read_index(host, WBSD_IDX_RESP2 + i * 4) << 16;
350 cmd->resp[i] |=
351 wbsd_read_index(host, WBSD_IDX_RESP3 + i * 4) << 8;
352 cmd->resp[i] |=
353 wbsd_read_index(host, WBSD_IDX_RESP4 + i * 4) << 0;
354 }
355}
356
cfa7f521 357static void wbsd_send_command(struct wbsd_host *host, struct mmc_command *cmd)
1da177e4
LT
358{
359 int i;
360 u8 status, isr;
fecf92ba 361
1da177e4
LT
362 /*
363 * Clear accumulated ISR. The interrupt routine
364 * will fill this one with events that occur during
365 * transfer.
366 */
367 host->isr = 0;
fecf92ba 368
1da177e4
LT
369 /*
370 * Send the command (CRC calculated by host).
371 */
372 outb(cmd->opcode, host->base + WBSD_CMDR);
cfa7f521 373 for (i = 3; i >= 0; i--)
1da177e4 374 outb((cmd->arg >> (i * 8)) & 0xff, host->base + WBSD_CMDR);
fecf92ba 375
17b0429d 376 cmd->error = 0;
fecf92ba 377
1da177e4
LT
378 /*
379 * Wait for the request to complete.
380 */
381 do {
382 status = wbsd_read_index(host, WBSD_IDX_STATUS);
383 } while (status & WBSD_CARDTRAFFIC);
384
385 /*
386 * Do we expect a reply?
387 */
e9225176 388 if (cmd->flags & MMC_RSP_PRESENT) {
1da177e4
LT
389 /*
390 * Read back status.
391 */
392 isr = host->isr;
fecf92ba 393
1da177e4
LT
394 /* Card removed? */
395 if (isr & WBSD_INT_CARD)
17b0429d 396 cmd->error = -ENOMEDIUM;
1da177e4
LT
397 /* Timeout? */
398 else if (isr & WBSD_INT_TIMEOUT)
17b0429d 399 cmd->error = -ETIMEDOUT;
1da177e4
LT
400 /* CRC? */
401 else if ((cmd->flags & MMC_RSP_CRC) && (isr & WBSD_INT_CRC))
17b0429d 402 cmd->error = -EILSEQ;
1da177e4 403 /* All ok */
cfa7f521 404 else {
e9225176 405 if (cmd->flags & MMC_RSP_136)
1da177e4 406 wbsd_get_long_reply(host, cmd);
e9225176
RK
407 else
408 wbsd_get_short_reply(host, cmd);
1da177e4
LT
409 }
410 }
1da177e4
LT
411}
412
413/*
414 * Data functions
415 */
416
cfa7f521 417static void wbsd_empty_fifo(struct wbsd_host *host)
1da177e4 418{
cfa7f521
PO
419 struct mmc_data *data = host->mrq->cmd->data;
420 char *buffer;
1da177e4 421 int i, fsr, fifo;
fecf92ba 422
1da177e4
LT
423 /*
424 * Handle excessive data.
425 */
14d836e7 426 if (host->num_sg == 0)
1da177e4 427 return;
fecf92ba 428
4a0ddbd2 429 buffer = wbsd_sg_to_buffer(host) + host->offset;
1da177e4
LT
430
431 /*
432 * Drain the fifo. This has a tendency to loop longer
433 * than the FIFO length (usually one block).
434 */
cfa7f521 435 while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_EMPTY)) {
1da177e4
LT
436 /*
437 * The size field in the FSR is broken so we have to
438 * do some guessing.
fecf92ba 439 */
1da177e4
LT
440 if (fsr & WBSD_FIFO_FULL)
441 fifo = 16;
442 else if (fsr & WBSD_FIFO_FUTHRE)
443 fifo = 8;
444 else
445 fifo = 1;
fecf92ba 446
cfa7f521 447 for (i = 0; i < fifo; i++) {
1da177e4
LT
448 *buffer = inb(host->base + WBSD_DFR);
449 buffer++;
450 host->offset++;
451 host->remain--;
452
453 data->bytes_xfered++;
fecf92ba 454
1da177e4
LT
455 /*
456 * End of scatter list entry?
457 */
cfa7f521 458 if (host->remain == 0) {
1da177e4
LT
459 /*
460 * Get next entry. Check if last.
461 */
14d836e7 462 if (!wbsd_next_sg(host))
1da177e4 463 return;
fecf92ba 464
4a0ddbd2 465 buffer = wbsd_sg_to_buffer(host);
1da177e4
LT
466 }
467 }
468 }
fecf92ba 469
1da177e4
LT
470 /*
471 * This is a very dirty hack to solve a
472 * hardware problem. The chip doesn't trigger
473 * FIFO threshold interrupts properly.
474 */
14d836e7 475 if ((data->blocks * data->blksz - data->bytes_xfered) < 16)
1da177e4
LT
476 tasklet_schedule(&host->fifo_tasklet);
477}
478
cfa7f521 479static void wbsd_fill_fifo(struct wbsd_host *host)
1da177e4 480{
cfa7f521
PO
481 struct mmc_data *data = host->mrq->cmd->data;
482 char *buffer;
1da177e4 483 int i, fsr, fifo;
fecf92ba 484
1da177e4
LT
485 /*
486 * Check that we aren't being called after the
25985edc 487 * entire buffer has been transferred.
1da177e4 488 */
14d836e7 489 if (host->num_sg == 0)
1da177e4
LT
490 return;
491
4a0ddbd2 492 buffer = wbsd_sg_to_buffer(host) + host->offset;
1da177e4
LT
493
494 /*
495 * Fill the fifo. This has a tendency to loop longer
496 * than the FIFO length (usually one block).
497 */
cfa7f521 498 while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_FULL)) {
1da177e4
LT
499 /*
500 * The size field in the FSR is broken so we have to
501 * do some guessing.
fecf92ba 502 */
1da177e4
LT
503 if (fsr & WBSD_FIFO_EMPTY)
504 fifo = 0;
505 else if (fsr & WBSD_FIFO_EMTHRE)
506 fifo = 8;
507 else
508 fifo = 15;
509
cfa7f521 510 for (i = 16; i > fifo; i--) {
1da177e4
LT
511 outb(*buffer, host->base + WBSD_DFR);
512 buffer++;
513 host->offset++;
514 host->remain--;
fecf92ba 515
1da177e4 516 data->bytes_xfered++;
fecf92ba 517
1da177e4
LT
518 /*
519 * End of scatter list entry?
520 */
cfa7f521 521 if (host->remain == 0) {
1da177e4
LT
522 /*
523 * Get next entry. Check if last.
524 */
14d836e7 525 if (!wbsd_next_sg(host))
1da177e4 526 return;
fecf92ba 527
4a0ddbd2 528 buffer = wbsd_sg_to_buffer(host);
1da177e4
LT
529 }
530 }
531 }
fecf92ba 532
85bcc130
PO
533 /*
534 * The controller stops sending interrupts for
535 * 'FIFO empty' under certain conditions. So we
536 * need to be a bit more pro-active.
537 */
538 tasklet_schedule(&host->fifo_tasklet);
1da177e4
LT
539}
540
cfa7f521 541static void wbsd_prepare_data(struct wbsd_host *host, struct mmc_data *data)
1da177e4
LT
542{
543 u16 blksize;
544 u8 setup;
545 unsigned long dmaflags;
14d836e7 546 unsigned int size;
1da177e4 547
1da177e4
LT
548 /*
549 * Calculate size.
550 */
14d836e7 551 size = data->blocks * data->blksz;
1da177e4
LT
552
553 /*
554 * Check timeout values for overflow.
555 * (Yes, some cards cause this value to overflow).
556 */
557 if (data->timeout_ns > 127000000)
558 wbsd_write_index(host, WBSD_IDX_TAAC, 127);
cfa7f521
PO
559 else {
560 wbsd_write_index(host, WBSD_IDX_TAAC,
561 data->timeout_ns / 1000000);
562 }
fecf92ba 563
1da177e4
LT
564 if (data->timeout_clks > 255)
565 wbsd_write_index(host, WBSD_IDX_NSAC, 255);
566 else
567 wbsd_write_index(host, WBSD_IDX_NSAC, data->timeout_clks);
fecf92ba 568
1da177e4
LT
569 /*
570 * Inform the chip of how large blocks will be
571 * sent. It needs this to determine when to
572 * calculate CRC.
573 *
574 * Space for CRC must be included in the size.
65ae2118 575 * Two bytes are needed for each data line.
1da177e4 576 */
cfa7f521 577 if (host->bus_width == MMC_BUS_WIDTH_1) {
2c171bf1 578 blksize = data->blksz + 2;
65ae2118
PO
579
580 wbsd_write_index(host, WBSD_IDX_PBSMSB, (blksize >> 4) & 0xF0);
581 wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF);
cfa7f521 582 } else if (host->bus_width == MMC_BUS_WIDTH_4) {
2c171bf1 583 blksize = data->blksz + 2 * 4;
fecf92ba 584
cfa7f521
PO
585 wbsd_write_index(host, WBSD_IDX_PBSMSB,
586 ((blksize >> 4) & 0xF0) | WBSD_DATA_WIDTH);
65ae2118 587 wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF);
cfa7f521 588 } else {
17b0429d 589 data->error = -EINVAL;
65ae2118
PO
590 return;
591 }
1da177e4
LT
592
593 /*
594 * Clear the FIFO. This is needed even for DMA
595 * transfers since the chip still uses the FIFO
596 * internally.
597 */
598 setup = wbsd_read_index(host, WBSD_IDX_SETUP);
599 setup |= WBSD_FIFO_RESET;
600 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
fecf92ba 601
1da177e4
LT
602 /*
603 * DMA transfer?
604 */
cfa7f521 605 if (host->dma >= 0) {
1da177e4
LT
606 /*
607 * The buffer for DMA is only 64 kB.
608 */
14d836e7
AD
609 BUG_ON(size > 0x10000);
610 if (size > 0x10000) {
17b0429d 611 data->error = -EINVAL;
1da177e4
LT
612 return;
613 }
fecf92ba 614
1da177e4
LT
615 /*
616 * Transfer data from the SG list to
617 * the DMA buffer.
618 */
619 if (data->flags & MMC_DATA_WRITE)
620 wbsd_sg_to_dma(host, data);
fecf92ba 621
1da177e4
LT
622 /*
623 * Initialise the ISA DMA controller.
fecf92ba 624 */
1da177e4
LT
625 dmaflags = claim_dma_lock();
626 disable_dma(host->dma);
627 clear_dma_ff(host->dma);
628 if (data->flags & MMC_DATA_READ)
629 set_dma_mode(host->dma, DMA_MODE_READ & ~0x40);
630 else
631 set_dma_mode(host->dma, DMA_MODE_WRITE & ~0x40);
632 set_dma_addr(host->dma, host->dma_addr);
14d836e7 633 set_dma_count(host->dma, size);
1da177e4
LT
634
635 enable_dma(host->dma);
636 release_dma_lock(dmaflags);
637
638 /*
639 * Enable DMA on the host.
640 */
641 wbsd_write_index(host, WBSD_IDX_DMA, WBSD_DMA_ENABLE);
cfa7f521 642 } else {
1da177e4
LT
643 /*
644 * This flag is used to keep printk
645 * output to a minimum.
646 */
647 host->firsterr = 1;
fecf92ba 648
1da177e4
LT
649 /*
650 * Initialise the SG list.
651 */
652 wbsd_init_sg(host, data);
fecf92ba 653
1da177e4
LT
654 /*
655 * Turn off DMA.
656 */
657 wbsd_write_index(host, WBSD_IDX_DMA, 0);
fecf92ba 658
1da177e4
LT
659 /*
660 * Set up FIFO threshold levels (and fill
661 * buffer if doing a write).
662 */
cfa7f521 663 if (data->flags & MMC_DATA_READ) {
1da177e4
LT
664 wbsd_write_index(host, WBSD_IDX_FIFOEN,
665 WBSD_FIFOEN_FULL | 8);
cfa7f521 666 } else {
1da177e4
LT
667 wbsd_write_index(host, WBSD_IDX_FIFOEN,
668 WBSD_FIFOEN_EMPTY | 8);
669 wbsd_fill_fifo(host);
670 }
fecf92ba
PO
671 }
672
17b0429d 673 data->error = 0;
1da177e4
LT
674}
675
cfa7f521 676static void wbsd_finish_data(struct wbsd_host *host, struct mmc_data *data)
1da177e4
LT
677{
678 unsigned long dmaflags;
679 int count;
680 u8 status;
fecf92ba 681
1da177e4
LT
682 WARN_ON(host->mrq == NULL);
683
684 /*
685 * Send a stop command if needed.
686 */
687 if (data->stop)
688 wbsd_send_command(host, data->stop);
689
690 /*
691 * Wait for the controller to leave data
692 * transfer state.
693 */
cfa7f521 694 do {
1da177e4
LT
695 status = wbsd_read_index(host, WBSD_IDX_STATUS);
696 } while (status & (WBSD_BLOCK_READ | WBSD_BLOCK_WRITE));
fecf92ba 697
1da177e4
LT
698 /*
699 * DMA transfer?
700 */
cfa7f521 701 if (host->dma >= 0) {
1da177e4
LT
702 /*
703 * Disable DMA on the host.
704 */
705 wbsd_write_index(host, WBSD_IDX_DMA, 0);
fecf92ba 706
1da177e4
LT
707 /*
708 * Turn of ISA DMA controller.
709 */
710 dmaflags = claim_dma_lock();
711 disable_dma(host->dma);
712 clear_dma_ff(host->dma);
713 count = get_dma_residue(host->dma);
714 release_dma_lock(dmaflags);
fecf92ba 715
14d836e7
AD
716 data->bytes_xfered = host->mrq->data->blocks *
717 host->mrq->data->blksz - count;
718 data->bytes_xfered -= data->bytes_xfered % data->blksz;
719
1da177e4
LT
720 /*
721 * Any leftover data?
722 */
cfa7f521 723 if (count) {
a3c76eb9 724 pr_err("%s: Incomplete DMA transfer. "
d191634f
PO
725 "%d bytes left.\n",
726 mmc_hostname(host->mmc), count);
fecf92ba 727
17b0429d
PO
728 if (!data->error)
729 data->error = -EIO;
cfa7f521 730 } else {
1da177e4
LT
731 /*
732 * Transfer data from DMA buffer to
733 * SG list.
734 */
735 if (data->flags & MMC_DATA_READ)
736 wbsd_dma_to_sg(host, data);
14d836e7 737 }
fecf92ba 738
17b0429d 739 if (data->error) {
14d836e7
AD
740 if (data->bytes_xfered)
741 data->bytes_xfered -= data->blksz;
1da177e4
LT
742 }
743 }
fecf92ba 744
1da177e4
LT
745 wbsd_request_end(host, host->mrq);
746}
747
85bcc130
PO
748/*****************************************************************************\
749 * *
750 * MMC layer callbacks *
751 * *
752\*****************************************************************************/
1da177e4 753
cfa7f521 754static void wbsd_request(struct mmc_host *mmc, struct mmc_request *mrq)
1da177e4 755{
cfa7f521
PO
756 struct wbsd_host *host = mmc_priv(mmc);
757 struct mmc_command *cmd;
1da177e4
LT
758
759 /*
760 * Disable tasklets to avoid a deadlock.
761 */
762 spin_lock_bh(&host->lock);
763
764 BUG_ON(host->mrq != NULL);
765
766 cmd = mrq->cmd;
767
768 host->mrq = mrq;
fecf92ba 769
1da177e4 770 /*
17b0429d 771 * Check that there is actually a card in the slot.
1da177e4 772 */
cfa7f521 773 if (!(host->flags & WBSD_FCARD_PRESENT)) {
17b0429d 774 cmd->error = -ENOMEDIUM;
1da177e4
LT
775 goto done;
776 }
777
cfa7f521 778 if (cmd->data) {
5ba593a9
PO
779 /*
780 * The hardware is so delightfully stupid that it has a list
781 * of "data" commands. If a command isn't on this list, it'll
782 * just go back to the idle state and won't send any data
783 * interrupts.
784 */
785 switch (cmd->opcode) {
786 case 11:
787 case 17:
788 case 18:
789 case 20:
790 case 24:
791 case 25:
792 case 26:
793 case 27:
794 case 30:
795 case 42:
796 case 56:
797 break;
798
799 /* ACMDs. We don't keep track of state, so we just treat them
800 * like any other command. */
801 case 51:
802 break;
803
804 default:
6606110d 805 pr_warn("%s: Data command %d is not supported by this controller\n",
5ba593a9 806 mmc_hostname(host->mmc), cmd->opcode);
17b0429d 807 cmd->error = -EINVAL;
5ba593a9
PO
808
809 goto done;
17a90539 810 }
b2670b1c 811 }
5ba593a9 812
b2670b1c
PO
813 /*
814 * Does the request include data?
815 */
816 if (cmd->data) {
817 wbsd_prepare_data(host, cmd->data);
818
17b0429d 819 if (cmd->data->error)
b2670b1c
PO
820 goto done;
821 }
822
823 wbsd_send_command(host, cmd);
824
825 /*
826 * If this is a data transfer the request
827 * will be finished after the data has
25985edc 828 * transferred.
b2670b1c 829 */
17b0429d 830 if (cmd->data && !cmd->error) {
1da177e4
LT
831 /*
832 * Dirty fix for hardware bug.
833 */
834 if (host->dma == -1)
835 tasklet_schedule(&host->fifo_tasklet);
836
837 spin_unlock_bh(&host->lock);
838
839 return;
840 }
fecf92ba 841
1da177e4
LT
842done:
843 wbsd_request_end(host, mrq);
844
845 spin_unlock_bh(&host->lock);
846}
847
cfa7f521 848static void wbsd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1da177e4 849{
cfa7f521 850 struct wbsd_host *host = mmc_priv(mmc);
1da177e4 851 u8 clk, setup, pwr;
fecf92ba 852
1da177e4
LT
853 spin_lock_bh(&host->lock);
854
855 /*
856 * Reset the chip on each power off.
857 * Should clear out any weird states.
858 */
859 if (ios->power_mode == MMC_POWER_OFF)
860 wbsd_init_device(host);
fecf92ba 861
1da177e4
LT
862 if (ios->clock >= 24000000)
863 clk = WBSD_CLK_24M;
864 else if (ios->clock >= 16000000)
865 clk = WBSD_CLK_16M;
866 else if (ios->clock >= 12000000)
867 clk = WBSD_CLK_12M;
868 else
869 clk = WBSD_CLK_375K;
870
871 /*
872 * Only write to the clock register when
873 * there is an actual change.
874 */
cfa7f521 875 if (clk != host->clk) {
1da177e4
LT
876 wbsd_write_index(host, WBSD_IDX_CLK, clk);
877 host->clk = clk;
878 }
879
85bcc130
PO
880 /*
881 * Power up card.
882 */
cfa7f521 883 if (ios->power_mode != MMC_POWER_OFF) {
1da177e4
LT
884 pwr = inb(host->base + WBSD_CSR);
885 pwr &= ~WBSD_POWER_N;
886 outb(pwr, host->base + WBSD_CSR);
1da177e4
LT
887 }
888
85bcc130
PO
889 /*
890 * MMC cards need to have pin 1 high during init.
85bcc130 891 * It wreaks havoc with the card detection though so
1656fa57 892 * that needs to be disabled.
85bcc130
PO
893 */
894 setup = wbsd_read_index(host, WBSD_IDX_SETUP);
cfa7f521 895 if (ios->chip_select == MMC_CS_HIGH) {
65ae2118 896 BUG_ON(ios->bus_width != MMC_BUS_WIDTH_1);
85bcc130
PO
897 setup |= WBSD_DAT3_H;
898 host->flags |= WBSD_FIGNORE_DETECT;
cfa7f521
PO
899 } else {
900 if (setup & WBSD_DAT3_H) {
19c1f3ca 901 setup &= ~WBSD_DAT3_H;
1656fa57 902
19c1f3ca 903 /*
25985edc 904 * We cannot resume card detection immediately
19c1f3ca
PO
905 * because of capacitance and delays in the chip.
906 */
cfa7f521 907 mod_timer(&host->ignore_timer, jiffies + HZ / 100);
19c1f3ca 908 }
85bcc130
PO
909 }
910 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
fecf92ba 911
65ae2118
PO
912 /*
913 * Store bus width for later. Will be used when
914 * setting up the data transfer.
915 */
916 host->bus_width = ios->bus_width;
917
1da177e4
LT
918 spin_unlock_bh(&host->lock);
919}
920
cfa7f521 921static int wbsd_get_ro(struct mmc_host *mmc)
65ae2118 922{
cfa7f521 923 struct wbsd_host *host = mmc_priv(mmc);
65ae2118
PO
924 u8 csr;
925
926 spin_lock_bh(&host->lock);
927
928 csr = inb(host->base + WBSD_CSR);
929 csr |= WBSD_MSLED;
930 outb(csr, host->base + WBSD_CSR);
931
932 mdelay(1);
933
934 csr = inb(host->base + WBSD_CSR);
935 csr &= ~WBSD_MSLED;
936 outb(csr, host->base + WBSD_CSR);
937
938 spin_unlock_bh(&host->lock);
939
08f80bb5 940 return !!(csr & WBSD_WRPT);
65ae2118
PO
941}
942
ab7aefd0 943static const struct mmc_host_ops wbsd_ops = {
85bcc130
PO
944 .request = wbsd_request,
945 .set_ios = wbsd_set_ios,
65ae2118 946 .get_ro = wbsd_get_ro,
85bcc130
PO
947};
948
949/*****************************************************************************\
950 * *
951 * Interrupt handling *
952 * *
953\*****************************************************************************/
954
1656fa57
PO
955/*
956 * Helper function to reset detection ignore
957 */
958
959static void wbsd_reset_ignore(unsigned long data)
960{
cfa7f521 961 struct wbsd_host *host = (struct wbsd_host *)data;
1656fa57
PO
962
963 BUG_ON(host == NULL);
964
965 DBG("Resetting card detection ignore\n");
966
967 spin_lock_bh(&host->lock);
968
969 host->flags &= ~WBSD_FIGNORE_DETECT;
970
971 /*
972 * Card status might have changed during the
973 * blackout.
974 */
975 tasklet_schedule(&host->card_tasklet);
976
977 spin_unlock_bh(&host->lock);
978}
979
1da177e4
LT
980/*
981 * Tasklets
982 */
983
cfa7f521 984static inline struct mmc_data *wbsd_get_data(struct wbsd_host *host)
1da177e4
LT
985{
986 WARN_ON(!host->mrq);
987 if (!host->mrq)
988 return NULL;
989
990 WARN_ON(!host->mrq->cmd);
991 if (!host->mrq->cmd)
992 return NULL;
993
994 WARN_ON(!host->mrq->cmd->data);
995 if (!host->mrq->cmd->data)
996 return NULL;
fecf92ba 997
1da177e4
LT
998 return host->mrq->cmd->data;
999}
1000
1001static void wbsd_tasklet_card(unsigned long param)
1002{
cfa7f521 1003 struct wbsd_host *host = (struct wbsd_host *)param;
1da177e4 1004 u8 csr;
210ce2a7 1005 int delay = -1;
fecf92ba 1006
1da177e4 1007 spin_lock(&host->lock);
fecf92ba 1008
cfa7f521 1009 if (host->flags & WBSD_FIGNORE_DETECT) {
85bcc130
PO
1010 spin_unlock(&host->lock);
1011 return;
1012 }
fecf92ba 1013
1da177e4
LT
1014 csr = inb(host->base + WBSD_CSR);
1015 WARN_ON(csr == 0xff);
fecf92ba 1016
cfa7f521
PO
1017 if (csr & WBSD_CARDPRESENT) {
1018 if (!(host->flags & WBSD_FCARD_PRESENT)) {
85bcc130
PO
1019 DBG("Card inserted\n");
1020 host->flags |= WBSD_FCARD_PRESENT;
fecf92ba 1021
210ce2a7 1022 delay = 500;
85bcc130 1023 }
cfa7f521 1024 } else if (host->flags & WBSD_FCARD_PRESENT) {
1da177e4 1025 DBG("Card removed\n");
85bcc130 1026 host->flags &= ~WBSD_FCARD_PRESENT;
fecf92ba 1027
cfa7f521 1028 if (host->mrq) {
a3c76eb9 1029 pr_err("%s: Card removed during transfer!\n",
d191634f 1030 mmc_hostname(host->mmc));
1da177e4 1031 wbsd_reset(host);
fecf92ba 1032
17b0429d 1033 host->mrq->cmd->error = -ENOMEDIUM;
1da177e4
LT
1034 tasklet_schedule(&host->finish_tasklet);
1035 }
fecf92ba 1036
210ce2a7 1037 delay = 0;
6e6293dd 1038 }
210ce2a7
PO
1039
1040 /*
1041 * Unlock first since we might get a call back.
1042 */
1043
1044 spin_unlock(&host->lock);
1045
1046 if (delay != -1)
1047 mmc_detect_change(host->mmc, msecs_to_jiffies(delay));
1da177e4
LT
1048}
1049
1050static void wbsd_tasklet_fifo(unsigned long param)
1051{
cfa7f521
PO
1052 struct wbsd_host *host = (struct wbsd_host *)param;
1053 struct mmc_data *data;
fecf92ba 1054
1da177e4 1055 spin_lock(&host->lock);
fecf92ba 1056
1da177e4
LT
1057 if (!host->mrq)
1058 goto end;
fecf92ba 1059
1da177e4
LT
1060 data = wbsd_get_data(host);
1061 if (!data)
1062 goto end;
1063
1064 if (data->flags & MMC_DATA_WRITE)
1065 wbsd_fill_fifo(host);
1066 else
1067 wbsd_empty_fifo(host);
1068
1069 /*
1070 * Done?
1071 */
14d836e7 1072 if (host->num_sg == 0) {
1da177e4
LT
1073 wbsd_write_index(host, WBSD_IDX_FIFOEN, 0);
1074 tasklet_schedule(&host->finish_tasklet);
1075 }
1076
fecf92ba 1077end:
1da177e4
LT
1078 spin_unlock(&host->lock);
1079}
1080
1081static void wbsd_tasklet_crc(unsigned long param)
1082{
cfa7f521
PO
1083 struct wbsd_host *host = (struct wbsd_host *)param;
1084 struct mmc_data *data;
fecf92ba 1085
1da177e4 1086 spin_lock(&host->lock);
fecf92ba 1087
1da177e4
LT
1088 if (!host->mrq)
1089 goto end;
fecf92ba 1090
1da177e4
LT
1091 data = wbsd_get_data(host);
1092 if (!data)
1093 goto end;
fecf92ba 1094
1da177e4
LT
1095 DBGF("CRC error\n");
1096
17b0429d 1097 data->error = -EILSEQ;
fecf92ba 1098
1da177e4
LT
1099 tasklet_schedule(&host->finish_tasklet);
1100
fecf92ba 1101end:
1da177e4
LT
1102 spin_unlock(&host->lock);
1103}
1104
1105static void wbsd_tasklet_timeout(unsigned long param)
1106{
cfa7f521
PO
1107 struct wbsd_host *host = (struct wbsd_host *)param;
1108 struct mmc_data *data;
fecf92ba 1109
1da177e4 1110 spin_lock(&host->lock);
fecf92ba 1111
1da177e4
LT
1112 if (!host->mrq)
1113 goto end;
fecf92ba 1114
1da177e4
LT
1115 data = wbsd_get_data(host);
1116 if (!data)
1117 goto end;
fecf92ba 1118
1da177e4
LT
1119 DBGF("Timeout\n");
1120
17b0429d 1121 data->error = -ETIMEDOUT;
fecf92ba 1122
1da177e4
LT
1123 tasklet_schedule(&host->finish_tasklet);
1124
fecf92ba 1125end:
1da177e4
LT
1126 spin_unlock(&host->lock);
1127}
1128
1129static void wbsd_tasklet_finish(unsigned long param)
1130{
cfa7f521
PO
1131 struct wbsd_host *host = (struct wbsd_host *)param;
1132 struct mmc_data *data;
fecf92ba 1133
1da177e4 1134 spin_lock(&host->lock);
fecf92ba 1135
1da177e4
LT
1136 WARN_ON(!host->mrq);
1137 if (!host->mrq)
1138 goto end;
fecf92ba 1139
1da177e4
LT
1140 data = wbsd_get_data(host);
1141 if (!data)
1142 goto end;
1143
1144 wbsd_finish_data(host, data);
fecf92ba
PO
1145
1146end:
1da177e4
LT
1147 spin_unlock(&host->lock);
1148}
1149
1da177e4
LT
1150/*
1151 * Interrupt handling
1152 */
1153
7d12e780 1154static irqreturn_t wbsd_irq(int irq, void *dev_id)
1da177e4 1155{
cfa7f521 1156 struct wbsd_host *host = dev_id;
1da177e4 1157 int isr;
fecf92ba 1158
1da177e4
LT
1159 isr = inb(host->base + WBSD_ISR);
1160
1161 /*
1162 * Was it actually our hardware that caused the interrupt?
1163 */
1164 if (isr == 0xff || isr == 0x00)
1165 return IRQ_NONE;
fecf92ba 1166
1da177e4
LT
1167 host->isr |= isr;
1168
1169 /*
1170 * Schedule tasklets as needed.
1171 */
1172 if (isr & WBSD_INT_CARD)
1173 tasklet_schedule(&host->card_tasklet);
1174 if (isr & WBSD_INT_FIFO_THRE)
1175 tasklet_schedule(&host->fifo_tasklet);
1176 if (isr & WBSD_INT_CRC)
1177 tasklet_hi_schedule(&host->crc_tasklet);
1178 if (isr & WBSD_INT_TIMEOUT)
1179 tasklet_hi_schedule(&host->timeout_tasklet);
1da177e4
LT
1180 if (isr & WBSD_INT_TC)
1181 tasklet_schedule(&host->finish_tasklet);
fecf92ba 1182
1da177e4
LT
1183 return IRQ_HANDLED;
1184}
1185
85bcc130
PO
1186/*****************************************************************************\
1187 * *
1188 * Device initialisation and shutdown *
1189 * *
1190\*****************************************************************************/
1191
1da177e4 1192/*
85bcc130 1193 * Allocate/free MMC structure.
1da177e4
LT
1194 */
1195
c3be1efd 1196static int wbsd_alloc_mmc(struct device *dev)
85bcc130 1197{
cfa7f521
PO
1198 struct mmc_host *mmc;
1199 struct wbsd_host *host;
fecf92ba 1200
85bcc130
PO
1201 /*
1202 * Allocate MMC structure.
1203 */
1204 mmc = mmc_alloc_host(sizeof(struct wbsd_host), dev);
1205 if (!mmc)
1206 return -ENOMEM;
fecf92ba 1207
85bcc130
PO
1208 host = mmc_priv(mmc);
1209 host->mmc = mmc;
1210
1211 host->dma = -1;
1212
1213 /*
1214 * Set host parameters.
1215 */
1216 mmc->ops = &wbsd_ops;
1217 mmc->f_min = 375000;
1218 mmc->f_max = 24000000;
cfa7f521 1219 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
23af6039 1220 mmc->caps = MMC_CAP_4_BIT_DATA;
fecf92ba 1221
85bcc130 1222 spin_lock_init(&host->lock);
fecf92ba 1223
6e6293dd 1224 /*
1656fa57 1225 * Set up timers
6e6293dd 1226 */
1656fa57
PO
1227 init_timer(&host->ignore_timer);
1228 host->ignore_timer.data = (unsigned long)host;
1229 host->ignore_timer.function = wbsd_reset_ignore;
fecf92ba 1230
85bcc130
PO
1231 /*
1232 * Maximum number of segments. Worst case is one sector per segment
1233 * so this will be 64kB/512.
1234 */
a36274e0 1235 mmc->max_segs = 128;
fecf92ba 1236
85bcc130 1237 /*
55db890a 1238 * Maximum request size. Also limited by 64KiB buffer.
85bcc130 1239 */
55db890a 1240 mmc->max_req_size = 65536;
fecf92ba 1241
85bcc130
PO
1242 /*
1243 * Maximum segment size. Could be one segment with the maximum number
55db890a 1244 * of bytes.
85bcc130 1245 */
55db890a 1246 mmc->max_seg_size = mmc->max_req_size;
fecf92ba 1247
fe4a3c7a
PO
1248 /*
1249 * Maximum block size. We have 12 bits (= 4095) but have to subtract
1250 * space for CRC. So the maximum is 4095 - 4*2 = 4087.
1251 */
1252 mmc->max_blk_size = 4087;
1253
55db890a
PO
1254 /*
1255 * Maximum block count. There is no real limit so the maximum
1256 * request size will be the only restriction.
1257 */
1258 mmc->max_blk_count = mmc->max_req_size;
1259
85bcc130 1260 dev_set_drvdata(dev, mmc);
fecf92ba 1261
85bcc130
PO
1262 return 0;
1263}
1264
b3627bb1 1265static void wbsd_free_mmc(struct device *dev)
85bcc130 1266{
cfa7f521
PO
1267 struct mmc_host *mmc;
1268 struct wbsd_host *host;
fecf92ba 1269
85bcc130
PO
1270 mmc = dev_get_drvdata(dev);
1271 if (!mmc)
1272 return;
fecf92ba 1273
6e6293dd
PO
1274 host = mmc_priv(mmc);
1275 BUG_ON(host == NULL);
fecf92ba 1276
1656fa57 1277 del_timer_sync(&host->ignore_timer);
fecf92ba 1278
85bcc130 1279 mmc_free_host(mmc);
fecf92ba 1280
85bcc130
PO
1281 dev_set_drvdata(dev, NULL);
1282}
1283
1284/*
1285 * Scan for known chip id:s
1286 */
1287
c3be1efd 1288static int wbsd_scan(struct wbsd_host *host)
1da177e4
LT
1289{
1290 int i, j, k;
1291 int id;
fecf92ba 1292
1da177e4
LT
1293 /*
1294 * Iterate through all ports, all codes to
1295 * find hardware that is in our known list.
1296 */
63648fb5 1297 for (i = 0; i < ARRAY_SIZE(config_ports); i++) {
1da177e4
LT
1298 if (!request_region(config_ports[i], 2, DRIVER_NAME))
1299 continue;
fecf92ba 1300
63648fb5 1301 for (j = 0; j < ARRAY_SIZE(unlock_codes); j++) {
1da177e4 1302 id = 0xFFFF;
fecf92ba 1303
19c1f3ca
PO
1304 host->config = config_ports[i];
1305 host->unlock_code = unlock_codes[j];
1306
1307 wbsd_unlock_config(host);
fecf92ba 1308
1da177e4
LT
1309 outb(WBSD_CONF_ID_HI, config_ports[i]);
1310 id = inb(config_ports[i] + 1) << 8;
1311
1312 outb(WBSD_CONF_ID_LO, config_ports[i]);
1313 id |= inb(config_ports[i] + 1);
fecf92ba 1314
19c1f3ca
PO
1315 wbsd_lock_config(host);
1316
63648fb5 1317 for (k = 0; k < ARRAY_SIZE(valid_ids); k++) {
cfa7f521 1318 if (id == valid_ids[k]) {
1da177e4 1319 host->chip_id = id;
fecf92ba 1320
1da177e4
LT
1321 return 0;
1322 }
1323 }
fecf92ba 1324
cfa7f521 1325 if (id != 0xFFFF) {
1da177e4
LT
1326 DBG("Unknown hardware (id %x) found at %x\n",
1327 id, config_ports[i]);
1328 }
1da177e4 1329 }
fecf92ba 1330
1da177e4
LT
1331 release_region(config_ports[i], 2);
1332 }
fecf92ba 1333
19c1f3ca
PO
1334 host->config = 0;
1335 host->unlock_code = 0;
1336
1da177e4
LT
1337 return -ENODEV;
1338}
1339
85bcc130
PO
1340/*
1341 * Allocate/free io port ranges
1342 */
1343
c3be1efd 1344static int wbsd_request_region(struct wbsd_host *host, int base)
1da177e4 1345{
916f3ac6 1346 if (base & 0x7)
1da177e4 1347 return -EINVAL;
fecf92ba 1348
85bcc130 1349 if (!request_region(base, 8, DRIVER_NAME))
1da177e4 1350 return -EIO;
fecf92ba 1351
916f3ac6 1352 host->base = base;
fecf92ba 1353
1da177e4
LT
1354 return 0;
1355}
1356
b3627bb1 1357static void wbsd_release_regions(struct wbsd_host *host)
1da177e4
LT
1358{
1359 if (host->base)
1360 release_region(host->base, 8);
fecf92ba 1361
85bcc130 1362 host->base = 0;
1da177e4
LT
1363
1364 if (host->config)
1365 release_region(host->config, 2);
fecf92ba 1366
85bcc130 1367 host->config = 0;
1da177e4
LT
1368}
1369
85bcc130
PO
1370/*
1371 * Allocate/free DMA port and buffer
1372 */
1373
c3be1efd 1374static void wbsd_request_dma(struct wbsd_host *host, int dma)
1da177e4 1375{
1da177e4
LT
1376 if (dma < 0)
1377 return;
fecf92ba 1378
1da177e4
LT
1379 if (request_dma(dma, DRIVER_NAME))
1380 goto err;
fecf92ba 1381
1da177e4
LT
1382 /*
1383 * We need to allocate a special buffer in
1384 * order for ISA to be able to DMA to it.
1385 */
85bcc130 1386 host->dma_buffer = kmalloc(WBSD_DMA_SIZE,
dcda9b04 1387 GFP_NOIO | GFP_DMA | __GFP_RETRY_MAYFAIL | __GFP_NOWARN);
1da177e4
LT
1388 if (!host->dma_buffer)
1389 goto free;
1390
1391 /*
1392 * Translate the address to a physical address.
1393 */
fcaf71fd 1394 host->dma_addr = dma_map_single(mmc_dev(host->mmc), host->dma_buffer,
85bcc130 1395 WBSD_DMA_SIZE, DMA_BIDIRECTIONAL);
a5488a35
AK
1396 if (dma_mapping_error(mmc_dev(host->mmc), host->dma_addr))
1397 goto kfree;
fecf92ba 1398
1da177e4
LT
1399 /*
1400 * ISA DMA must be aligned on a 64k basis.
1401 */
1402 if ((host->dma_addr & 0xffff) != 0)
a5488a35 1403 goto unmap;
1da177e4
LT
1404 /*
1405 * ISA cannot access memory above 16 MB.
1406 */
1407 else if (host->dma_addr >= 0x1000000)
a5488a35 1408 goto unmap;
1da177e4
LT
1409
1410 host->dma = dma;
fecf92ba 1411
1da177e4 1412 return;
fecf92ba 1413
a5488a35 1414unmap:
1da177e4
LT
1415 /*
1416 * If we've gotten here then there is some kind of alignment bug
1417 */
1418 BUG_ON(1);
fecf92ba 1419
fcaf71fd 1420 dma_unmap_single(mmc_dev(host->mmc), host->dma_addr,
cfa7f521 1421 WBSD_DMA_SIZE, DMA_BIDIRECTIONAL);
97067d55 1422 host->dma_addr = 0;
fecf92ba 1423
a5488a35 1424kfree:
1da177e4
LT
1425 kfree(host->dma_buffer);
1426 host->dma_buffer = NULL;
1427
1428free:
1429 free_dma(dma);
1430
1431err:
6606110d
JP
1432 pr_warn(DRIVER_NAME ": Unable to allocate DMA %d - falling back on FIFO\n",
1433 dma);
1da177e4
LT
1434}
1435
b3627bb1 1436static void wbsd_release_dma(struct wbsd_host *host)
85bcc130 1437{
e81c022a
AK
1438 /*
1439 * host->dma_addr is valid here iff host->dma_buffer is not NULL.
1440 */
1441 if (host->dma_buffer) {
fcaf71fd 1442 dma_unmap_single(mmc_dev(host->mmc), host->dma_addr,
cfa7f521 1443 WBSD_DMA_SIZE, DMA_BIDIRECTIONAL);
e81c022a 1444 kfree(host->dma_buffer);
cfa7f521 1445 }
85bcc130
PO
1446 if (host->dma >= 0)
1447 free_dma(host->dma);
fecf92ba 1448
85bcc130
PO
1449 host->dma = -1;
1450 host->dma_buffer = NULL;
97067d55 1451 host->dma_addr = 0;
85bcc130 1452}
1da177e4
LT
1453
1454/*
85bcc130 1455 * Allocate/free IRQ.
1da177e4
LT
1456 */
1457
c3be1efd 1458static int wbsd_request_irq(struct wbsd_host *host, int irq)
1da177e4 1459{
1da177e4 1460 int ret;
fecf92ba 1461
1da177e4 1462 /*
cef33400 1463 * Set up tasklets. Must be done before requesting interrupt.
1da177e4 1464 */
cfa7f521
PO
1465 tasklet_init(&host->card_tasklet, wbsd_tasklet_card,
1466 (unsigned long)host);
1467 tasklet_init(&host->fifo_tasklet, wbsd_tasklet_fifo,
1468 (unsigned long)host);
1469 tasklet_init(&host->crc_tasklet, wbsd_tasklet_crc,
1470 (unsigned long)host);
1471 tasklet_init(&host->timeout_tasklet, wbsd_tasklet_timeout,
1472 (unsigned long)host);
1473 tasklet_init(&host->finish_tasklet, wbsd_tasklet_finish,
1474 (unsigned long)host);
fecf92ba 1475
cef33400
CE
1476 /*
1477 * Allocate interrupt.
1478 */
1479 ret = request_irq(irq, wbsd_irq, IRQF_SHARED, DRIVER_NAME, host);
1480 if (ret)
1481 return ret;
1482
1483 host->irq = irq;
1484
85bcc130
PO
1485 return 0;
1486}
1da177e4 1487
b3627bb1 1488static void wbsd_release_irq(struct wbsd_host *host)
85bcc130
PO
1489{
1490 if (!host->irq)
1491 return;
1da177e4 1492
85bcc130 1493 free_irq(host->irq, host);
fecf92ba 1494
85bcc130 1495 host->irq = 0;
fecf92ba 1496
85bcc130
PO
1497 tasklet_kill(&host->card_tasklet);
1498 tasklet_kill(&host->fifo_tasklet);
1499 tasklet_kill(&host->crc_tasklet);
1500 tasklet_kill(&host->timeout_tasklet);
1501 tasklet_kill(&host->finish_tasklet);
85bcc130
PO
1502}
1503
1504/*
1505 * Allocate all resources for the host.
1506 */
1507
c3be1efd 1508static int wbsd_request_resources(struct wbsd_host *host,
85bcc130
PO
1509 int base, int irq, int dma)
1510{
1511 int ret;
fecf92ba 1512
1da177e4
LT
1513 /*
1514 * Allocate I/O ports.
1515 */
85bcc130 1516 ret = wbsd_request_region(host, base);
1da177e4 1517 if (ret)
85bcc130 1518 return ret;
1da177e4
LT
1519
1520 /*
85bcc130 1521 * Allocate interrupt.
1da177e4 1522 */
85bcc130
PO
1523 ret = wbsd_request_irq(host, irq);
1524 if (ret)
1525 return ret;
1526
1527 /*
1528 * Allocate DMA.
1529 */
1530 wbsd_request_dma(host, dma);
fecf92ba 1531
85bcc130
PO
1532 return 0;
1533}
1534
1535/*
1536 * Release all resources for the host.
1537 */
1538
b3627bb1 1539static void wbsd_release_resources(struct wbsd_host *host)
85bcc130
PO
1540{
1541 wbsd_release_dma(host);
1542 wbsd_release_irq(host);
1543 wbsd_release_regions(host);
1544}
1545
1546/*
1547 * Configure the resources the chip should use.
1548 */
1549
cfa7f521 1550static void wbsd_chip_config(struct wbsd_host *host)
85bcc130 1551{
19c1f3ca
PO
1552 wbsd_unlock_config(host);
1553
85bcc130
PO
1554 /*
1555 * Reset the chip.
fecf92ba 1556 */
85bcc130
PO
1557 wbsd_write_config(host, WBSD_CONF_SWRST, 1);
1558 wbsd_write_config(host, WBSD_CONF_SWRST, 0);
1da177e4
LT
1559
1560 /*
1561 * Select SD/MMC function.
1562 */
1563 wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD);
fecf92ba 1564
1da177e4
LT
1565 /*
1566 * Set up card detection.
1567 */
85bcc130 1568 wbsd_write_config(host, WBSD_CONF_PINS, WBSD_PINS_DETECT_GP11);
fecf92ba 1569
1da177e4 1570 /*
85bcc130 1571 * Configure chip
1da177e4
LT
1572 */
1573 wbsd_write_config(host, WBSD_CONF_PORT_HI, host->base >> 8);
1574 wbsd_write_config(host, WBSD_CONF_PORT_LO, host->base & 0xff);
fecf92ba 1575
85bcc130 1576 wbsd_write_config(host, WBSD_CONF_IRQ, host->irq);
fecf92ba 1577
85bcc130
PO
1578 if (host->dma >= 0)
1579 wbsd_write_config(host, WBSD_CONF_DRQ, host->dma);
fecf92ba 1580
1da177e4 1581 /*
85bcc130 1582 * Enable and power up chip.
1da177e4 1583 */
85bcc130
PO
1584 wbsd_write_config(host, WBSD_CONF_ENABLE, 1);
1585 wbsd_write_config(host, WBSD_CONF_POWER, 0x20);
19c1f3ca
PO
1586
1587 wbsd_lock_config(host);
85bcc130
PO
1588}
1589
1590/*
1591 * Check that configured resources are correct.
1592 */
fecf92ba 1593
cfa7f521 1594static int wbsd_chip_validate(struct wbsd_host *host)
85bcc130
PO
1595{
1596 int base, irq, dma;
fecf92ba 1597
19c1f3ca
PO
1598 wbsd_unlock_config(host);
1599
1da177e4 1600 /*
85bcc130 1601 * Select SD/MMC function.
1da177e4 1602 */
85bcc130 1603 wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD);
fecf92ba 1604
1da177e4 1605 /*
85bcc130 1606 * Read configuration.
1da177e4 1607 */
85bcc130
PO
1608 base = wbsd_read_config(host, WBSD_CONF_PORT_HI) << 8;
1609 base |= wbsd_read_config(host, WBSD_CONF_PORT_LO);
fecf92ba 1610
85bcc130 1611 irq = wbsd_read_config(host, WBSD_CONF_IRQ);
fecf92ba 1612
85bcc130 1613 dma = wbsd_read_config(host, WBSD_CONF_DRQ);
fecf92ba 1614
19c1f3ca
PO
1615 wbsd_lock_config(host);
1616
1da177e4 1617 /*
85bcc130 1618 * Validate against given configuration.
1da177e4 1619 */
85bcc130
PO
1620 if (base != host->base)
1621 return 0;
1622 if (irq != host->irq)
1623 return 0;
1624 if ((dma != host->dma) && (host->dma != -1))
1625 return 0;
fecf92ba 1626
85bcc130
PO
1627 return 1;
1628}
1629
19c1f3ca
PO
1630/*
1631 * Powers down the SD function
1632 */
1633
cfa7f521 1634static void wbsd_chip_poweroff(struct wbsd_host *host)
19c1f3ca
PO
1635{
1636 wbsd_unlock_config(host);
1637
1638 wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD);
1639 wbsd_write_config(host, WBSD_CONF_ENABLE, 0);
1640
1641 wbsd_lock_config(host);
1642}
1643
85bcc130
PO
1644/*****************************************************************************\
1645 * *
1646 * Devices setup and shutdown *
1647 * *
1648\*****************************************************************************/
1649
c3be1efd 1650static int wbsd_init(struct device *dev, int base, int irq, int dma,
85bcc130
PO
1651 int pnp)
1652{
cfa7f521
PO
1653 struct wbsd_host *host = NULL;
1654 struct mmc_host *mmc = NULL;
85bcc130 1655 int ret;
fecf92ba 1656
85bcc130
PO
1657 ret = wbsd_alloc_mmc(dev);
1658 if (ret)
1659 return ret;
fecf92ba 1660
85bcc130
PO
1661 mmc = dev_get_drvdata(dev);
1662 host = mmc_priv(mmc);
fecf92ba 1663
1da177e4 1664 /*
85bcc130 1665 * Scan for hardware.
1da177e4 1666 */
85bcc130 1667 ret = wbsd_scan(host);
cfa7f521
PO
1668 if (ret) {
1669 if (pnp && (ret == -ENODEV)) {
6606110d 1670 pr_warn(DRIVER_NAME ": Unable to confirm device presence - you may experience lock-ups\n");
cfa7f521 1671 } else {
85bcc130
PO
1672 wbsd_free_mmc(dev);
1673 return ret;
1674 }
1675 }
fecf92ba 1676
1da177e4 1677 /*
85bcc130 1678 * Request resources.
1da177e4 1679 */
dd2c609c 1680 ret = wbsd_request_resources(host, base, irq, dma);
cfa7f521 1681 if (ret) {
85bcc130
PO
1682 wbsd_release_resources(host);
1683 wbsd_free_mmc(dev);
1684 return ret;
1685 }
fecf92ba 1686
1da177e4 1687 /*
85bcc130 1688 * See if chip needs to be configured.
1da177e4 1689 */
cfa7f521
PO
1690 if (pnp) {
1691 if ((host->config != 0) && !wbsd_chip_validate(host)) {
6606110d 1692 pr_warn(DRIVER_NAME ": PnP active but chip not configured! You probably have a buggy BIOS. Configuring chip manually.\n");
85bcc130
PO
1693 wbsd_chip_config(host);
1694 }
cfa7f521 1695 } else
85bcc130 1696 wbsd_chip_config(host);
fecf92ba 1697
1da177e4
LT
1698 /*
1699 * Power Management stuff. No idea how this works.
1700 * Not tested.
1701 */
1702#ifdef CONFIG_PM
cfa7f521 1703 if (host->config) {
19c1f3ca 1704 wbsd_unlock_config(host);
85bcc130 1705 wbsd_write_config(host, WBSD_CONF_PME, 0xA0);
19c1f3ca
PO
1706 wbsd_lock_config(host);
1707 }
1da177e4 1708#endif
85bcc130
PO
1709 /*
1710 * Allow device to initialise itself properly.
1711 */
1712 mdelay(5);
1da177e4
LT
1713
1714 /*
1715 * Reset the chip into a known state.
1716 */
1717 wbsd_init_device(host);
fecf92ba 1718
1da177e4
LT
1719 mmc_add_host(mmc);
1720
a3c76eb9 1721 pr_info("%s: W83L51xD", mmc_hostname(mmc));
85bcc130
PO
1722 if (host->chip_id != 0)
1723 printk(" id %x", (int)host->chip_id);
1724 printk(" at 0x%x irq %d", (int)host->base, (int)host->irq);
1725 if (host->dma >= 0)
1726 printk(" dma %d", (int)host->dma);
1727 else
1728 printk(" FIFO");
1729 if (pnp)
1730 printk(" PnP");
1731 printk("\n");
1da177e4
LT
1732
1733 return 0;
1da177e4
LT
1734}
1735
6e0ee714 1736static void wbsd_shutdown(struct device *dev, int pnp)
1da177e4 1737{
cfa7f521
PO
1738 struct mmc_host *mmc = dev_get_drvdata(dev);
1739 struct wbsd_host *host;
fecf92ba 1740
1da177e4 1741 if (!mmc)
85bcc130 1742 return;
1da177e4
LT
1743
1744 host = mmc_priv(mmc);
fecf92ba 1745
1da177e4
LT
1746 mmc_remove_host(mmc);
1747
19c1f3ca
PO
1748 /*
1749 * Power down the SD/MMC function.
1750 */
85bcc130 1751 if (!pnp)
19c1f3ca 1752 wbsd_chip_poweroff(host);
fecf92ba 1753
85bcc130 1754 wbsd_release_resources(host);
fecf92ba 1755
85bcc130
PO
1756 wbsd_free_mmc(dev);
1757}
1da177e4 1758
85bcc130
PO
1759/*
1760 * Non-PnP
1761 */
1762
c3be1efd 1763static int wbsd_probe(struct platform_device *dev)
85bcc130 1764{
dd2c609c 1765 /* Use the module parameters for resources */
9eeebd22 1766 return wbsd_init(&dev->dev, param_io, param_irq, param_dma, 0);
85bcc130
PO
1767}
1768
6e0ee714 1769static int wbsd_remove(struct platform_device *dev)
85bcc130 1770{
3ae5eaec 1771 wbsd_shutdown(&dev->dev, 0);
85bcc130
PO
1772
1773 return 0;
1774}
1775
1776/*
1777 * PnP
1778 */
1779
1780#ifdef CONFIG_PNP
1781
c3be1efd 1782static int
cfa7f521 1783wbsd_pnp_probe(struct pnp_dev *pnpdev, const struct pnp_device_id *dev_id)
85bcc130
PO
1784{
1785 int io, irq, dma;
fecf92ba 1786
85bcc130
PO
1787 /*
1788 * Get resources from PnP layer.
1789 */
1790 io = pnp_port_start(pnpdev, 0);
1791 irq = pnp_irq(pnpdev, 0);
1792 if (pnp_dma_valid(pnpdev, 0))
1793 dma = pnp_dma(pnpdev, 0);
1794 else
1795 dma = -1;
fecf92ba 1796
85bcc130 1797 DBGF("PnP resources: port %3x irq %d dma %d\n", io, irq, dma);
fecf92ba 1798
85bcc130
PO
1799 return wbsd_init(&pnpdev->dev, io, irq, dma, 1);
1800}
1da177e4 1801
6e0ee714 1802static void wbsd_pnp_remove(struct pnp_dev *dev)
85bcc130
PO
1803{
1804 wbsd_shutdown(&dev->dev, 1);
1da177e4
LT
1805}
1806
85bcc130
PO
1807#endif /* CONFIG_PNP */
1808
1da177e4
LT
1809/*
1810 * Power management
1811 */
1812
1813#ifdef CONFIG_PM
19c1f3ca 1814
cfa7f521
PO
1815static int wbsd_platform_suspend(struct platform_device *dev,
1816 pm_message_t state)
1da177e4 1817{
3ae5eaec 1818 struct mmc_host *mmc = platform_get_drvdata(dev);
19c1f3ca 1819 struct wbsd_host *host;
19c1f3ca 1820
5e68d95d 1821 if (mmc == NULL)
19c1f3ca
PO
1822 return 0;
1823
5e68d95d 1824 DBGF("Suspending...\n");
19c1f3ca
PO
1825
1826 host = mmc_priv(mmc);
1827
1828 wbsd_chip_poweroff(host);
1da177e4
LT
1829 return 0;
1830}
1831
5e68d95d 1832static int wbsd_platform_resume(struct platform_device *dev)
1da177e4 1833{
3ae5eaec 1834 struct mmc_host *mmc = platform_get_drvdata(dev);
19c1f3ca 1835 struct wbsd_host *host;
1da177e4 1836
5e68d95d 1837 if (mmc == NULL)
19c1f3ca
PO
1838 return 0;
1839
5e68d95d 1840 DBGF("Resuming...\n");
19c1f3ca
PO
1841
1842 host = mmc_priv(mmc);
1843
1844 wbsd_chip_config(host);
1845
1846 /*
1847 * Allow device to initialise itself properly.
1848 */
1849 mdelay(5);
1850
83234ac8
UH
1851 wbsd_init_device(host);
1852 return 0;
5e68d95d
PO
1853}
1854
1855#ifdef CONFIG_PNP
1856
1857static int wbsd_pnp_suspend(struct pnp_dev *pnp_dev, pm_message_t state)
1858{
1859 struct mmc_host *mmc = dev_get_drvdata(&pnp_dev->dev);
5e68d95d
PO
1860
1861 if (mmc == NULL)
1862 return 0;
19c1f3ca 1863
5e68d95d 1864 DBGF("Suspending...\n");
83234ac8 1865 return 0;
1da177e4 1866}
19c1f3ca 1867
5e68d95d
PO
1868static int wbsd_pnp_resume(struct pnp_dev *pnp_dev)
1869{
1870 struct mmc_host *mmc = dev_get_drvdata(&pnp_dev->dev);
1871 struct wbsd_host *host;
1872
1873 if (mmc == NULL)
1874 return 0;
1875
1876 DBGF("Resuming...\n");
1877
1878 host = mmc_priv(mmc);
1879
1880 /*
1881 * See if chip needs to be configured.
1882 */
cfa7f521
PO
1883 if (host->config != 0) {
1884 if (!wbsd_chip_validate(host)) {
6606110d 1885 pr_warn(DRIVER_NAME ": PnP active but chip not configured! You probably have a buggy BIOS. Configuring chip manually.\n");
5e68d95d
PO
1886 wbsd_chip_config(host);
1887 }
1888 }
1889
1890 /*
1891 * Allow device to initialise itself properly.
1892 */
1893 mdelay(5);
1894
83234ac8
UH
1895 wbsd_init_device(host);
1896 return 0;
5e68d95d
PO
1897}
1898
1899#endif /* CONFIG_PNP */
1900
19c1f3ca
PO
1901#else /* CONFIG_PM */
1902
5e68d95d
PO
1903#define wbsd_platform_suspend NULL
1904#define wbsd_platform_resume NULL
1905
1906#define wbsd_pnp_suspend NULL
1907#define wbsd_pnp_resume NULL
19c1f3ca
PO
1908
1909#endif /* CONFIG_PM */
1da177e4 1910
85bcc130 1911static struct platform_device *wbsd_device;
1da177e4 1912
3ae5eaec 1913static struct platform_driver wbsd_driver = {
1da177e4 1914 .probe = wbsd_probe,
0433c143 1915 .remove = wbsd_remove,
fecf92ba 1916
5e68d95d
PO
1917 .suspend = wbsd_platform_suspend,
1918 .resume = wbsd_platform_resume,
3ae5eaec
RK
1919 .driver = {
1920 .name = DRIVER_NAME,
1921 },
1da177e4
LT
1922};
1923
85bcc130
PO
1924#ifdef CONFIG_PNP
1925
1926static struct pnp_driver wbsd_pnp_driver = {
1927 .name = DRIVER_NAME,
1928 .id_table = pnp_dev_table,
1929 .probe = wbsd_pnp_probe,
0433c143 1930 .remove = wbsd_pnp_remove,
5e68d95d
PO
1931
1932 .suspend = wbsd_pnp_suspend,
1933 .resume = wbsd_pnp_resume,
85bcc130
PO
1934};
1935
1936#endif /* CONFIG_PNP */
1937
1da177e4
LT
1938/*
1939 * Module loading/unloading
1940 */
1941
1942static int __init wbsd_drv_init(void)
1943{
1944 int result;
fecf92ba 1945
a3c76eb9 1946 pr_info(DRIVER_NAME
1615cc22 1947 ": Winbond W83L51xD SD/MMC card interface driver\n");
a3c76eb9 1948 pr_info(DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
1da177e4 1949
85bcc130
PO
1950#ifdef CONFIG_PNP
1951
9eeebd22 1952 if (!param_nopnp) {
85bcc130
PO
1953 result = pnp_register_driver(&wbsd_pnp_driver);
1954 if (result < 0)
1955 return result;
1956 }
fecf92ba
PO
1957#endif /* CONFIG_PNP */
1958
9eeebd22 1959 if (param_nopnp) {
3ae5eaec 1960 result = platform_driver_register(&wbsd_driver);
85bcc130
PO
1961 if (result < 0)
1962 return result;
1963
21500bb3 1964 wbsd_device = platform_device_alloc(DRIVER_NAME, -1);
cfa7f521 1965 if (!wbsd_device) {
21500bb3
DT
1966 platform_driver_unregister(&wbsd_driver);
1967 return -ENOMEM;
1968 }
1969
1970 result = platform_device_add(wbsd_device);
cfa7f521 1971 if (result) {
21500bb3
DT
1972 platform_device_put(wbsd_device);
1973 platform_driver_unregister(&wbsd_driver);
1974 return result;
1975 }
85bcc130 1976 }
1da177e4
LT
1977
1978 return 0;
1979}
1980
1981static void __exit wbsd_drv_exit(void)
1982{
85bcc130
PO
1983#ifdef CONFIG_PNP
1984
9eeebd22 1985 if (!param_nopnp)
85bcc130 1986 pnp_unregister_driver(&wbsd_pnp_driver);
fecf92ba
PO
1987
1988#endif /* CONFIG_PNP */
85bcc130 1989
9eeebd22 1990 if (param_nopnp) {
85bcc130 1991 platform_device_unregister(wbsd_device);
fecf92ba 1992
3ae5eaec 1993 platform_driver_unregister(&wbsd_driver);
85bcc130 1994 }
1da177e4
LT
1995
1996 DBG("unloaded\n");
1997}
1998
1999module_init(wbsd_drv_init);
2000module_exit(wbsd_drv_exit);
85bcc130 2001#ifdef CONFIG_PNP
dac562fc 2002module_param_hw_named(nopnp, param_nopnp, uint, other, 0444);
85bcc130 2003#endif
dac562fc
DH
2004module_param_hw_named(io, param_io, uint, ioport, 0444);
2005module_param_hw_named(irq, param_irq, uint, irq, 0444);
2006module_param_hw_named(dma, param_dma, int, dma, 0444);
1da177e4
LT
2007
2008MODULE_LICENSE("GPL");
32710e8f 2009MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
1da177e4 2010MODULE_DESCRIPTION("Winbond W83L51xD SD/MMC card interface driver");
1da177e4 2011
85bcc130
PO
2012#ifdef CONFIG_PNP
2013MODULE_PARM_DESC(nopnp, "Scan for device instead of relying on PNP. (default 0)");
2014#endif
1da177e4
LT
2015MODULE_PARM_DESC(io, "I/O base to allocate. Must be 8 byte aligned. (default 0x248)");
2016MODULE_PARM_DESC(irq, "IRQ to allocate. (default 6)");
2017MODULE_PARM_DESC(dma, "DMA channel to allocate. -1 for no DMA. (default 2)");