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[mirror_ubuntu-artful-kernel.git] / drivers / mmc / host / wbsd.c
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1da177e4 1/*
70f10482 2 * linux/drivers/mmc/host/wbsd.c - Winbond W83L51xD SD/MMC driver
1da177e4 3 *
14d836e7 4 * Copyright (C) 2004-2007 Pierre Ossman, All Rights Reserved.
1da177e4
LT
5 *
6 * This program is free software; you can redistribute it and/or modify
643f720c
PO
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or (at
9 * your option) any later version.
1da177e4
LT
10 *
11 *
12 * Warning!
13 *
14 * Changes to the FIFO system should be done with extreme care since
15 * the hardware is full of bugs related to the FIFO. Known issues are:
16 *
17 * - FIFO size field in FSR is always zero.
18 *
19 * - FIFO interrupts tend not to work as they should. Interrupts are
20 * triggered only for full/empty events, not for threshold values.
21 *
22 * - On APIC systems the FIFO empty interrupt is sometimes lost.
23 */
24
1da177e4
LT
25#include <linux/module.h>
26#include <linux/moduleparam.h>
27#include <linux/init.h>
28#include <linux/ioport.h>
d052d1be 29#include <linux/platform_device.h>
1da177e4 30#include <linux/interrupt.h>
85bcc130 31#include <linux/dma-mapping.h>
1da177e4 32#include <linux/delay.h>
85bcc130 33#include <linux/pnp.h>
1da177e4
LT
34#include <linux/highmem.h>
35#include <linux/mmc/host.h>
bd6dee6f 36#include <linux/scatterlist.h>
5a0e3ad6 37#include <linux/slab.h>
1da177e4
LT
38
39#include <asm/io.h>
40#include <asm/dma.h>
1da177e4
LT
41
42#include "wbsd.h"
43
44#define DRIVER_NAME "wbsd"
1da177e4 45
1da177e4 46#define DBG(x...) \
c6563178 47 pr_debug(DRIVER_NAME ": " x)
1da177e4 48#define DBGF(f, x...) \
c6563178 49 pr_debug(DRIVER_NAME " [%s()]: " f, __func__ , ##x)
1da177e4 50
85bcc130
PO
51/*
52 * Device resources
53 */
54
55#ifdef CONFIG_PNP
56
57static const struct pnp_device_id pnp_dev_table[] = {
58 { "WEC0517", 0 },
59 { "WEC0518", 0 },
60 { "", 0 },
61};
62
63MODULE_DEVICE_TABLE(pnp, pnp_dev_table);
64
65#endif /* CONFIG_PNP */
66
3eee0d03
AB
67static const int config_ports[] = { 0x2E, 0x4E };
68static const int unlock_codes[] = { 0x83, 0x87 };
69
70static const int valid_ids[] = {
71 0x7112,
9eeebd22 72};
3eee0d03 73
85bcc130 74#ifdef CONFIG_PNP
9eeebd22 75static unsigned int param_nopnp = 0;
85bcc130 76#else
9eeebd22 77static const unsigned int param_nopnp = 1;
85bcc130 78#endif
9eeebd22
TW
79static unsigned int param_io = 0x248;
80static unsigned int param_irq = 6;
81static int param_dma = 2;
85bcc130 82
1da177e4
LT
83/*
84 * Basic functions
85 */
86
cfa7f521 87static inline void wbsd_unlock_config(struct wbsd_host *host)
1da177e4 88{
85bcc130 89 BUG_ON(host->config == 0);
fecf92ba 90
1da177e4
LT
91 outb(host->unlock_code, host->config);
92 outb(host->unlock_code, host->config);
93}
94
cfa7f521 95static inline void wbsd_lock_config(struct wbsd_host *host)
1da177e4 96{
85bcc130 97 BUG_ON(host->config == 0);
fecf92ba 98
1da177e4
LT
99 outb(LOCK_CODE, host->config);
100}
101
cfa7f521 102static inline void wbsd_write_config(struct wbsd_host *host, u8 reg, u8 value)
1da177e4 103{
85bcc130 104 BUG_ON(host->config == 0);
fecf92ba 105
1da177e4
LT
106 outb(reg, host->config);
107 outb(value, host->config + 1);
108}
109
cfa7f521 110static inline u8 wbsd_read_config(struct wbsd_host *host, u8 reg)
1da177e4 111{
85bcc130 112 BUG_ON(host->config == 0);
fecf92ba 113
1da177e4
LT
114 outb(reg, host->config);
115 return inb(host->config + 1);
116}
117
cfa7f521 118static inline void wbsd_write_index(struct wbsd_host *host, u8 index, u8 value)
1da177e4
LT
119{
120 outb(index, host->base + WBSD_IDXR);
121 outb(value, host->base + WBSD_DATAR);
122}
123
cfa7f521 124static inline u8 wbsd_read_index(struct wbsd_host *host, u8 index)
1da177e4
LT
125{
126 outb(index, host->base + WBSD_IDXR);
127 return inb(host->base + WBSD_DATAR);
128}
129
130/*
131 * Common routines
132 */
133
cfa7f521 134static void wbsd_init_device(struct wbsd_host *host)
1da177e4
LT
135{
136 u8 setup, ier;
fecf92ba 137
1da177e4
LT
138 /*
139 * Reset chip (SD/MMC part) and fifo.
140 */
141 setup = wbsd_read_index(host, WBSD_IDX_SETUP);
142 setup |= WBSD_FIFO_RESET | WBSD_SOFT_RESET;
143 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
fecf92ba 144
85bcc130
PO
145 /*
146 * Set DAT3 to input
147 */
148 setup &= ~WBSD_DAT3_H;
149 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
150 host->flags &= ~WBSD_FIGNORE_DETECT;
fecf92ba 151
1da177e4
LT
152 /*
153 * Read back default clock.
154 */
155 host->clk = wbsd_read_index(host, WBSD_IDX_CLK);
156
157 /*
158 * Power down port.
159 */
160 outb(WBSD_POWER_N, host->base + WBSD_CSR);
fecf92ba 161
1da177e4
LT
162 /*
163 * Set maximum timeout.
164 */
165 wbsd_write_index(host, WBSD_IDX_TAAC, 0x7F);
fecf92ba 166
85bcc130
PO
167 /*
168 * Test for card presence
169 */
170 if (inb(host->base + WBSD_CSR) & WBSD_CARDPRESENT)
171 host->flags |= WBSD_FCARD_PRESENT;
172 else
173 host->flags &= ~WBSD_FCARD_PRESENT;
fecf92ba 174
1da177e4
LT
175 /*
176 * Enable interesting interrupts.
177 */
178 ier = 0;
179 ier |= WBSD_EINT_CARD;
180 ier |= WBSD_EINT_FIFO_THRE;
1da177e4 181 ier |= WBSD_EINT_CRC;
5721dbf2 182 ier |= WBSD_EINT_TIMEOUT;
1da177e4
LT
183 ier |= WBSD_EINT_TC;
184
185 outb(ier, host->base + WBSD_EIR);
186
187 /*
188 * Clear interrupts.
189 */
190 inb(host->base + WBSD_ISR);
191}
192
cfa7f521 193static void wbsd_reset(struct wbsd_host *host)
1da177e4
LT
194{
195 u8 setup;
fecf92ba 196
a3c76eb9 197 pr_err("%s: Resetting chip\n", mmc_hostname(host->mmc));
fecf92ba 198
1da177e4
LT
199 /*
200 * Soft reset of chip (SD/MMC part).
201 */
202 setup = wbsd_read_index(host, WBSD_IDX_SETUP);
203 setup |= WBSD_SOFT_RESET;
204 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
205}
206
cfa7f521 207static void wbsd_request_end(struct wbsd_host *host, struct mmc_request *mrq)
1da177e4
LT
208{
209 unsigned long dmaflags;
fecf92ba 210
cfa7f521 211 if (host->dma >= 0) {
1da177e4
LT
212 /*
213 * Release ISA DMA controller.
214 */
215 dmaflags = claim_dma_lock();
216 disable_dma(host->dma);
217 clear_dma_ff(host->dma);
218 release_dma_lock(dmaflags);
219
220 /*
221 * Disable DMA on host.
222 */
223 wbsd_write_index(host, WBSD_IDX_DMA, 0);
224 }
fecf92ba 225
1da177e4
LT
226 host->mrq = NULL;
227
228 /*
229 * MMC layer might call back into the driver so first unlock.
230 */
231 spin_unlock(&host->lock);
232 mmc_request_done(host->mmc, mrq);
233 spin_lock(&host->lock);
234}
235
236/*
237 * Scatter/gather functions
238 */
239
cfa7f521 240static inline void wbsd_init_sg(struct wbsd_host *host, struct mmc_data *data)
1da177e4
LT
241{
242 /*
243 * Get info. about SG list from data structure.
244 */
245 host->cur_sg = data->sg;
246 host->num_sg = data->sg_len;
247
248 host->offset = 0;
249 host->remain = host->cur_sg->length;
250}
251
cfa7f521 252static inline int wbsd_next_sg(struct wbsd_host *host)
1da177e4
LT
253{
254 /*
255 * Skip to next SG entry.
256 */
257 host->cur_sg++;
258 host->num_sg--;
259
260 /*
261 * Any entries left?
262 */
cfa7f521
PO
263 if (host->num_sg > 0) {
264 host->offset = 0;
265 host->remain = host->cur_sg->length;
266 }
fecf92ba 267
1da177e4
LT
268 return host->num_sg;
269}
270
4a0ddbd2 271static inline char *wbsd_sg_to_buffer(struct wbsd_host *host)
1da177e4 272{
45711f1a 273 return sg_virt(host->cur_sg);
1da177e4
LT
274}
275
cfa7f521 276static inline void wbsd_sg_to_dma(struct wbsd_host *host, struct mmc_data *data)
1da177e4 277{
14d836e7 278 unsigned int len, i;
cfa7f521
PO
279 struct scatterlist *sg;
280 char *dmabuf = host->dma_buffer;
281 char *sgbuf;
fecf92ba 282
1da177e4
LT
283 sg = data->sg;
284 len = data->sg_len;
fecf92ba 285
cfa7f521 286 for (i = 0; i < len; i++) {
45711f1a 287 sgbuf = sg_virt(&sg[i]);
14d836e7 288 memcpy(dmabuf, sgbuf, sg[i].length);
1da177e4 289 dmabuf += sg[i].length;
1da177e4 290 }
1da177e4
LT
291}
292
cfa7f521 293static inline void wbsd_dma_to_sg(struct wbsd_host *host, struct mmc_data *data)
1da177e4 294{
14d836e7 295 unsigned int len, i;
cfa7f521
PO
296 struct scatterlist *sg;
297 char *dmabuf = host->dma_buffer;
298 char *sgbuf;
fecf92ba 299
1da177e4
LT
300 sg = data->sg;
301 len = data->sg_len;
fecf92ba 302
cfa7f521 303 for (i = 0; i < len; i++) {
45711f1a 304 sgbuf = sg_virt(&sg[i]);
14d836e7 305 memcpy(sgbuf, dmabuf, sg[i].length);
1da177e4 306 dmabuf += sg[i].length;
1da177e4 307 }
1da177e4
LT
308}
309
310/*
311 * Command handling
312 */
fecf92ba 313
cfa7f521
PO
314static inline void wbsd_get_short_reply(struct wbsd_host *host,
315 struct mmc_command *cmd)
1da177e4
LT
316{
317 /*
318 * Correct response type?
319 */
cfa7f521 320 if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_SHORT) {
17b0429d 321 cmd->error = -EILSEQ;
1da177e4
LT
322 return;
323 }
fecf92ba 324
cfa7f521
PO
325 cmd->resp[0] = wbsd_read_index(host, WBSD_IDX_RESP12) << 24;
326 cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP13) << 16;
327 cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP14) << 8;
328 cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP15) << 0;
329 cmd->resp[1] = wbsd_read_index(host, WBSD_IDX_RESP16) << 24;
1da177e4
LT
330}
331
cfa7f521
PO
332static inline void wbsd_get_long_reply(struct wbsd_host *host,
333 struct mmc_command *cmd)
1da177e4
LT
334{
335 int i;
fecf92ba 336
1da177e4
LT
337 /*
338 * Correct response type?
339 */
cfa7f521 340 if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_LONG) {
17b0429d 341 cmd->error = -EILSEQ;
1da177e4
LT
342 return;
343 }
fecf92ba 344
cfa7f521 345 for (i = 0; i < 4; i++) {
1da177e4
LT
346 cmd->resp[i] =
347 wbsd_read_index(host, WBSD_IDX_RESP1 + i * 4) << 24;
348 cmd->resp[i] |=
349 wbsd_read_index(host, WBSD_IDX_RESP2 + i * 4) << 16;
350 cmd->resp[i] |=
351 wbsd_read_index(host, WBSD_IDX_RESP3 + i * 4) << 8;
352 cmd->resp[i] |=
353 wbsd_read_index(host, WBSD_IDX_RESP4 + i * 4) << 0;
354 }
355}
356
cfa7f521 357static void wbsd_send_command(struct wbsd_host *host, struct mmc_command *cmd)
1da177e4
LT
358{
359 int i;
360 u8 status, isr;
fecf92ba 361
1da177e4
LT
362 /*
363 * Clear accumulated ISR. The interrupt routine
364 * will fill this one with events that occur during
365 * transfer.
366 */
367 host->isr = 0;
fecf92ba 368
1da177e4
LT
369 /*
370 * Send the command (CRC calculated by host).
371 */
372 outb(cmd->opcode, host->base + WBSD_CMDR);
cfa7f521 373 for (i = 3; i >= 0; i--)
1da177e4 374 outb((cmd->arg >> (i * 8)) & 0xff, host->base + WBSD_CMDR);
fecf92ba 375
17b0429d 376 cmd->error = 0;
fecf92ba 377
1da177e4
LT
378 /*
379 * Wait for the request to complete.
380 */
381 do {
382 status = wbsd_read_index(host, WBSD_IDX_STATUS);
383 } while (status & WBSD_CARDTRAFFIC);
384
385 /*
386 * Do we expect a reply?
387 */
e9225176 388 if (cmd->flags & MMC_RSP_PRESENT) {
1da177e4
LT
389 /*
390 * Read back status.
391 */
392 isr = host->isr;
fecf92ba 393
1da177e4
LT
394 /* Card removed? */
395 if (isr & WBSD_INT_CARD)
17b0429d 396 cmd->error = -ENOMEDIUM;
1da177e4
LT
397 /* Timeout? */
398 else if (isr & WBSD_INT_TIMEOUT)
17b0429d 399 cmd->error = -ETIMEDOUT;
1da177e4
LT
400 /* CRC? */
401 else if ((cmd->flags & MMC_RSP_CRC) && (isr & WBSD_INT_CRC))
17b0429d 402 cmd->error = -EILSEQ;
1da177e4 403 /* All ok */
cfa7f521 404 else {
e9225176 405 if (cmd->flags & MMC_RSP_136)
1da177e4 406 wbsd_get_long_reply(host, cmd);
e9225176
RK
407 else
408 wbsd_get_short_reply(host, cmd);
1da177e4
LT
409 }
410 }
1da177e4
LT
411}
412
413/*
414 * Data functions
415 */
416
cfa7f521 417static void wbsd_empty_fifo(struct wbsd_host *host)
1da177e4 418{
cfa7f521
PO
419 struct mmc_data *data = host->mrq->cmd->data;
420 char *buffer;
1da177e4 421 int i, fsr, fifo;
fecf92ba 422
1da177e4
LT
423 /*
424 * Handle excessive data.
425 */
14d836e7 426 if (host->num_sg == 0)
1da177e4 427 return;
fecf92ba 428
4a0ddbd2 429 buffer = wbsd_sg_to_buffer(host) + host->offset;
1da177e4
LT
430
431 /*
432 * Drain the fifo. This has a tendency to loop longer
433 * than the FIFO length (usually one block).
434 */
cfa7f521 435 while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_EMPTY)) {
1da177e4
LT
436 /*
437 * The size field in the FSR is broken so we have to
438 * do some guessing.
fecf92ba 439 */
1da177e4
LT
440 if (fsr & WBSD_FIFO_FULL)
441 fifo = 16;
442 else if (fsr & WBSD_FIFO_FUTHRE)
443 fifo = 8;
444 else
445 fifo = 1;
fecf92ba 446
cfa7f521 447 for (i = 0; i < fifo; i++) {
1da177e4
LT
448 *buffer = inb(host->base + WBSD_DFR);
449 buffer++;
450 host->offset++;
451 host->remain--;
452
453 data->bytes_xfered++;
fecf92ba 454
1da177e4
LT
455 /*
456 * End of scatter list entry?
457 */
cfa7f521 458 if (host->remain == 0) {
1da177e4
LT
459 /*
460 * Get next entry. Check if last.
461 */
14d836e7 462 if (!wbsd_next_sg(host))
1da177e4 463 return;
fecf92ba 464
4a0ddbd2 465 buffer = wbsd_sg_to_buffer(host);
1da177e4
LT
466 }
467 }
468 }
fecf92ba 469
1da177e4
LT
470 /*
471 * This is a very dirty hack to solve a
472 * hardware problem. The chip doesn't trigger
473 * FIFO threshold interrupts properly.
474 */
14d836e7 475 if ((data->blocks * data->blksz - data->bytes_xfered) < 16)
1da177e4
LT
476 tasklet_schedule(&host->fifo_tasklet);
477}
478
cfa7f521 479static void wbsd_fill_fifo(struct wbsd_host *host)
1da177e4 480{
cfa7f521
PO
481 struct mmc_data *data = host->mrq->cmd->data;
482 char *buffer;
1da177e4 483 int i, fsr, fifo;
fecf92ba 484
1da177e4
LT
485 /*
486 * Check that we aren't being called after the
25985edc 487 * entire buffer has been transferred.
1da177e4 488 */
14d836e7 489 if (host->num_sg == 0)
1da177e4
LT
490 return;
491
4a0ddbd2 492 buffer = wbsd_sg_to_buffer(host) + host->offset;
1da177e4
LT
493
494 /*
495 * Fill the fifo. This has a tendency to loop longer
496 * than the FIFO length (usually one block).
497 */
cfa7f521 498 while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_FULL)) {
1da177e4
LT
499 /*
500 * The size field in the FSR is broken so we have to
501 * do some guessing.
fecf92ba 502 */
1da177e4
LT
503 if (fsr & WBSD_FIFO_EMPTY)
504 fifo = 0;
505 else if (fsr & WBSD_FIFO_EMTHRE)
506 fifo = 8;
507 else
508 fifo = 15;
509
cfa7f521 510 for (i = 16; i > fifo; i--) {
1da177e4
LT
511 outb(*buffer, host->base + WBSD_DFR);
512 buffer++;
513 host->offset++;
514 host->remain--;
fecf92ba 515
1da177e4 516 data->bytes_xfered++;
fecf92ba 517
1da177e4
LT
518 /*
519 * End of scatter list entry?
520 */
cfa7f521 521 if (host->remain == 0) {
1da177e4
LT
522 /*
523 * Get next entry. Check if last.
524 */
14d836e7 525 if (!wbsd_next_sg(host))
1da177e4 526 return;
fecf92ba 527
4a0ddbd2 528 buffer = wbsd_sg_to_buffer(host);
1da177e4
LT
529 }
530 }
531 }
fecf92ba 532
85bcc130
PO
533 /*
534 * The controller stops sending interrupts for
535 * 'FIFO empty' under certain conditions. So we
536 * need to be a bit more pro-active.
537 */
538 tasklet_schedule(&host->fifo_tasklet);
1da177e4
LT
539}
540
cfa7f521 541static void wbsd_prepare_data(struct wbsd_host *host, struct mmc_data *data)
1da177e4
LT
542{
543 u16 blksize;
544 u8 setup;
545 unsigned long dmaflags;
14d836e7 546 unsigned int size;
1da177e4 547
1da177e4
LT
548 /*
549 * Calculate size.
550 */
14d836e7 551 size = data->blocks * data->blksz;
1da177e4
LT
552
553 /*
554 * Check timeout values for overflow.
555 * (Yes, some cards cause this value to overflow).
556 */
557 if (data->timeout_ns > 127000000)
558 wbsd_write_index(host, WBSD_IDX_TAAC, 127);
cfa7f521
PO
559 else {
560 wbsd_write_index(host, WBSD_IDX_TAAC,
561 data->timeout_ns / 1000000);
562 }
fecf92ba 563
1da177e4
LT
564 if (data->timeout_clks > 255)
565 wbsd_write_index(host, WBSD_IDX_NSAC, 255);
566 else
567 wbsd_write_index(host, WBSD_IDX_NSAC, data->timeout_clks);
fecf92ba 568
1da177e4
LT
569 /*
570 * Inform the chip of how large blocks will be
571 * sent. It needs this to determine when to
572 * calculate CRC.
573 *
574 * Space for CRC must be included in the size.
65ae2118 575 * Two bytes are needed for each data line.
1da177e4 576 */
cfa7f521 577 if (host->bus_width == MMC_BUS_WIDTH_1) {
2c171bf1 578 blksize = data->blksz + 2;
65ae2118
PO
579
580 wbsd_write_index(host, WBSD_IDX_PBSMSB, (blksize >> 4) & 0xF0);
581 wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF);
cfa7f521 582 } else if (host->bus_width == MMC_BUS_WIDTH_4) {
2c171bf1 583 blksize = data->blksz + 2 * 4;
fecf92ba 584
cfa7f521
PO
585 wbsd_write_index(host, WBSD_IDX_PBSMSB,
586 ((blksize >> 4) & 0xF0) | WBSD_DATA_WIDTH);
65ae2118 587 wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF);
cfa7f521 588 } else {
17b0429d 589 data->error = -EINVAL;
65ae2118
PO
590 return;
591 }
1da177e4
LT
592
593 /*
594 * Clear the FIFO. This is needed even for DMA
595 * transfers since the chip still uses the FIFO
596 * internally.
597 */
598 setup = wbsd_read_index(host, WBSD_IDX_SETUP);
599 setup |= WBSD_FIFO_RESET;
600 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
fecf92ba 601
1da177e4
LT
602 /*
603 * DMA transfer?
604 */
cfa7f521 605 if (host->dma >= 0) {
1da177e4
LT
606 /*
607 * The buffer for DMA is only 64 kB.
608 */
14d836e7
AD
609 BUG_ON(size > 0x10000);
610 if (size > 0x10000) {
17b0429d 611 data->error = -EINVAL;
1da177e4
LT
612 return;
613 }
fecf92ba 614
1da177e4
LT
615 /*
616 * Transfer data from the SG list to
617 * the DMA buffer.
618 */
619 if (data->flags & MMC_DATA_WRITE)
620 wbsd_sg_to_dma(host, data);
fecf92ba 621
1da177e4
LT
622 /*
623 * Initialise the ISA DMA controller.
fecf92ba 624 */
1da177e4
LT
625 dmaflags = claim_dma_lock();
626 disable_dma(host->dma);
627 clear_dma_ff(host->dma);
628 if (data->flags & MMC_DATA_READ)
629 set_dma_mode(host->dma, DMA_MODE_READ & ~0x40);
630 else
631 set_dma_mode(host->dma, DMA_MODE_WRITE & ~0x40);
632 set_dma_addr(host->dma, host->dma_addr);
14d836e7 633 set_dma_count(host->dma, size);
1da177e4
LT
634
635 enable_dma(host->dma);
636 release_dma_lock(dmaflags);
637
638 /*
639 * Enable DMA on the host.
640 */
641 wbsd_write_index(host, WBSD_IDX_DMA, WBSD_DMA_ENABLE);
cfa7f521 642 } else {
1da177e4
LT
643 /*
644 * This flag is used to keep printk
645 * output to a minimum.
646 */
647 host->firsterr = 1;
fecf92ba 648
1da177e4
LT
649 /*
650 * Initialise the SG list.
651 */
652 wbsd_init_sg(host, data);
fecf92ba 653
1da177e4
LT
654 /*
655 * Turn off DMA.
656 */
657 wbsd_write_index(host, WBSD_IDX_DMA, 0);
fecf92ba 658
1da177e4
LT
659 /*
660 * Set up FIFO threshold levels (and fill
661 * buffer if doing a write).
662 */
cfa7f521 663 if (data->flags & MMC_DATA_READ) {
1da177e4
LT
664 wbsd_write_index(host, WBSD_IDX_FIFOEN,
665 WBSD_FIFOEN_FULL | 8);
cfa7f521 666 } else {
1da177e4
LT
667 wbsd_write_index(host, WBSD_IDX_FIFOEN,
668 WBSD_FIFOEN_EMPTY | 8);
669 wbsd_fill_fifo(host);
670 }
fecf92ba
PO
671 }
672
17b0429d 673 data->error = 0;
1da177e4
LT
674}
675
cfa7f521 676static void wbsd_finish_data(struct wbsd_host *host, struct mmc_data *data)
1da177e4
LT
677{
678 unsigned long dmaflags;
679 int count;
680 u8 status;
fecf92ba 681
1da177e4
LT
682 WARN_ON(host->mrq == NULL);
683
684 /*
685 * Send a stop command if needed.
686 */
687 if (data->stop)
688 wbsd_send_command(host, data->stop);
689
690 /*
691 * Wait for the controller to leave data
692 * transfer state.
693 */
cfa7f521 694 do {
1da177e4
LT
695 status = wbsd_read_index(host, WBSD_IDX_STATUS);
696 } while (status & (WBSD_BLOCK_READ | WBSD_BLOCK_WRITE));
fecf92ba 697
1da177e4
LT
698 /*
699 * DMA transfer?
700 */
cfa7f521 701 if (host->dma >= 0) {
1da177e4
LT
702 /*
703 * Disable DMA on the host.
704 */
705 wbsd_write_index(host, WBSD_IDX_DMA, 0);
fecf92ba 706
1da177e4
LT
707 /*
708 * Turn of ISA DMA controller.
709 */
710 dmaflags = claim_dma_lock();
711 disable_dma(host->dma);
712 clear_dma_ff(host->dma);
713 count = get_dma_residue(host->dma);
714 release_dma_lock(dmaflags);
fecf92ba 715
14d836e7
AD
716 data->bytes_xfered = host->mrq->data->blocks *
717 host->mrq->data->blksz - count;
718 data->bytes_xfered -= data->bytes_xfered % data->blksz;
719
1da177e4
LT
720 /*
721 * Any leftover data?
722 */
cfa7f521 723 if (count) {
a3c76eb9 724 pr_err("%s: Incomplete DMA transfer. "
d191634f
PO
725 "%d bytes left.\n",
726 mmc_hostname(host->mmc), count);
fecf92ba 727
17b0429d
PO
728 if (!data->error)
729 data->error = -EIO;
cfa7f521 730 } else {
1da177e4
LT
731 /*
732 * Transfer data from DMA buffer to
733 * SG list.
734 */
735 if (data->flags & MMC_DATA_READ)
736 wbsd_dma_to_sg(host, data);
14d836e7 737 }
fecf92ba 738
17b0429d 739 if (data->error) {
14d836e7
AD
740 if (data->bytes_xfered)
741 data->bytes_xfered -= data->blksz;
1da177e4
LT
742 }
743 }
fecf92ba 744
1da177e4
LT
745 wbsd_request_end(host, host->mrq);
746}
747
85bcc130
PO
748/*****************************************************************************\
749 * *
750 * MMC layer callbacks *
751 * *
752\*****************************************************************************/
1da177e4 753
cfa7f521 754static void wbsd_request(struct mmc_host *mmc, struct mmc_request *mrq)
1da177e4 755{
cfa7f521
PO
756 struct wbsd_host *host = mmc_priv(mmc);
757 struct mmc_command *cmd;
1da177e4
LT
758
759 /*
760 * Disable tasklets to avoid a deadlock.
761 */
762 spin_lock_bh(&host->lock);
763
764 BUG_ON(host->mrq != NULL);
765
766 cmd = mrq->cmd;
767
768 host->mrq = mrq;
fecf92ba 769
1da177e4 770 /*
17b0429d 771 * Check that there is actually a card in the slot.
1da177e4 772 */
cfa7f521 773 if (!(host->flags & WBSD_FCARD_PRESENT)) {
17b0429d 774 cmd->error = -ENOMEDIUM;
1da177e4
LT
775 goto done;
776 }
777
cfa7f521 778 if (cmd->data) {
5ba593a9
PO
779 /*
780 * The hardware is so delightfully stupid that it has a list
781 * of "data" commands. If a command isn't on this list, it'll
782 * just go back to the idle state and won't send any data
783 * interrupts.
784 */
785 switch (cmd->opcode) {
786 case 11:
787 case 17:
788 case 18:
789 case 20:
790 case 24:
791 case 25:
792 case 26:
793 case 27:
794 case 30:
795 case 42:
796 case 56:
797 break;
798
799 /* ACMDs. We don't keep track of state, so we just treat them
800 * like any other command. */
801 case 51:
802 break;
803
804 default:
805#ifdef CONFIG_MMC_DEBUG
6606110d 806 pr_warn("%s: Data command %d is not supported by this controller\n",
5ba593a9
PO
807 mmc_hostname(host->mmc), cmd->opcode);
808#endif
17b0429d 809 cmd->error = -EINVAL;
5ba593a9
PO
810
811 goto done;
17a90539 812 }
b2670b1c 813 }
5ba593a9 814
b2670b1c
PO
815 /*
816 * Does the request include data?
817 */
818 if (cmd->data) {
819 wbsd_prepare_data(host, cmd->data);
820
17b0429d 821 if (cmd->data->error)
b2670b1c
PO
822 goto done;
823 }
824
825 wbsd_send_command(host, cmd);
826
827 /*
828 * If this is a data transfer the request
829 * will be finished after the data has
25985edc 830 * transferred.
b2670b1c 831 */
17b0429d 832 if (cmd->data && !cmd->error) {
1da177e4
LT
833 /*
834 * Dirty fix for hardware bug.
835 */
836 if (host->dma == -1)
837 tasklet_schedule(&host->fifo_tasklet);
838
839 spin_unlock_bh(&host->lock);
840
841 return;
842 }
fecf92ba 843
1da177e4
LT
844done:
845 wbsd_request_end(host, mrq);
846
847 spin_unlock_bh(&host->lock);
848}
849
cfa7f521 850static void wbsd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1da177e4 851{
cfa7f521 852 struct wbsd_host *host = mmc_priv(mmc);
1da177e4 853 u8 clk, setup, pwr;
fecf92ba 854
1da177e4
LT
855 spin_lock_bh(&host->lock);
856
857 /*
858 * Reset the chip on each power off.
859 * Should clear out any weird states.
860 */
861 if (ios->power_mode == MMC_POWER_OFF)
862 wbsd_init_device(host);
fecf92ba 863
1da177e4
LT
864 if (ios->clock >= 24000000)
865 clk = WBSD_CLK_24M;
866 else if (ios->clock >= 16000000)
867 clk = WBSD_CLK_16M;
868 else if (ios->clock >= 12000000)
869 clk = WBSD_CLK_12M;
870 else
871 clk = WBSD_CLK_375K;
872
873 /*
874 * Only write to the clock register when
875 * there is an actual change.
876 */
cfa7f521 877 if (clk != host->clk) {
1da177e4
LT
878 wbsd_write_index(host, WBSD_IDX_CLK, clk);
879 host->clk = clk;
880 }
881
85bcc130
PO
882 /*
883 * Power up card.
884 */
cfa7f521 885 if (ios->power_mode != MMC_POWER_OFF) {
1da177e4
LT
886 pwr = inb(host->base + WBSD_CSR);
887 pwr &= ~WBSD_POWER_N;
888 outb(pwr, host->base + WBSD_CSR);
1da177e4
LT
889 }
890
85bcc130
PO
891 /*
892 * MMC cards need to have pin 1 high during init.
85bcc130 893 * It wreaks havoc with the card detection though so
1656fa57 894 * that needs to be disabled.
85bcc130
PO
895 */
896 setup = wbsd_read_index(host, WBSD_IDX_SETUP);
cfa7f521 897 if (ios->chip_select == MMC_CS_HIGH) {
65ae2118 898 BUG_ON(ios->bus_width != MMC_BUS_WIDTH_1);
85bcc130
PO
899 setup |= WBSD_DAT3_H;
900 host->flags |= WBSD_FIGNORE_DETECT;
cfa7f521
PO
901 } else {
902 if (setup & WBSD_DAT3_H) {
19c1f3ca 903 setup &= ~WBSD_DAT3_H;
1656fa57 904
19c1f3ca 905 /*
25985edc 906 * We cannot resume card detection immediately
19c1f3ca
PO
907 * because of capacitance and delays in the chip.
908 */
cfa7f521 909 mod_timer(&host->ignore_timer, jiffies + HZ / 100);
19c1f3ca 910 }
85bcc130
PO
911 }
912 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
fecf92ba 913
65ae2118
PO
914 /*
915 * Store bus width for later. Will be used when
916 * setting up the data transfer.
917 */
918 host->bus_width = ios->bus_width;
919
1da177e4
LT
920 spin_unlock_bh(&host->lock);
921}
922
cfa7f521 923static int wbsd_get_ro(struct mmc_host *mmc)
65ae2118 924{
cfa7f521 925 struct wbsd_host *host = mmc_priv(mmc);
65ae2118
PO
926 u8 csr;
927
928 spin_lock_bh(&host->lock);
929
930 csr = inb(host->base + WBSD_CSR);
931 csr |= WBSD_MSLED;
932 outb(csr, host->base + WBSD_CSR);
933
934 mdelay(1);
935
936 csr = inb(host->base + WBSD_CSR);
937 csr &= ~WBSD_MSLED;
938 outb(csr, host->base + WBSD_CSR);
939
940 spin_unlock_bh(&host->lock);
941
08f80bb5 942 return !!(csr & WBSD_WRPT);
65ae2118
PO
943}
944
ab7aefd0 945static const struct mmc_host_ops wbsd_ops = {
85bcc130
PO
946 .request = wbsd_request,
947 .set_ios = wbsd_set_ios,
65ae2118 948 .get_ro = wbsd_get_ro,
85bcc130
PO
949};
950
951/*****************************************************************************\
952 * *
953 * Interrupt handling *
954 * *
955\*****************************************************************************/
956
1656fa57
PO
957/*
958 * Helper function to reset detection ignore
959 */
960
961static void wbsd_reset_ignore(unsigned long data)
962{
cfa7f521 963 struct wbsd_host *host = (struct wbsd_host *)data;
1656fa57
PO
964
965 BUG_ON(host == NULL);
966
967 DBG("Resetting card detection ignore\n");
968
969 spin_lock_bh(&host->lock);
970
971 host->flags &= ~WBSD_FIGNORE_DETECT;
972
973 /*
974 * Card status might have changed during the
975 * blackout.
976 */
977 tasklet_schedule(&host->card_tasklet);
978
979 spin_unlock_bh(&host->lock);
980}
981
1da177e4
LT
982/*
983 * Tasklets
984 */
985
cfa7f521 986static inline struct mmc_data *wbsd_get_data(struct wbsd_host *host)
1da177e4
LT
987{
988 WARN_ON(!host->mrq);
989 if (!host->mrq)
990 return NULL;
991
992 WARN_ON(!host->mrq->cmd);
993 if (!host->mrq->cmd)
994 return NULL;
995
996 WARN_ON(!host->mrq->cmd->data);
997 if (!host->mrq->cmd->data)
998 return NULL;
fecf92ba 999
1da177e4
LT
1000 return host->mrq->cmd->data;
1001}
1002
1003static void wbsd_tasklet_card(unsigned long param)
1004{
cfa7f521 1005 struct wbsd_host *host = (struct wbsd_host *)param;
1da177e4 1006 u8 csr;
210ce2a7 1007 int delay = -1;
fecf92ba 1008
1da177e4 1009 spin_lock(&host->lock);
fecf92ba 1010
cfa7f521 1011 if (host->flags & WBSD_FIGNORE_DETECT) {
85bcc130
PO
1012 spin_unlock(&host->lock);
1013 return;
1014 }
fecf92ba 1015
1da177e4
LT
1016 csr = inb(host->base + WBSD_CSR);
1017 WARN_ON(csr == 0xff);
fecf92ba 1018
cfa7f521
PO
1019 if (csr & WBSD_CARDPRESENT) {
1020 if (!(host->flags & WBSD_FCARD_PRESENT)) {
85bcc130
PO
1021 DBG("Card inserted\n");
1022 host->flags |= WBSD_FCARD_PRESENT;
fecf92ba 1023
210ce2a7 1024 delay = 500;
85bcc130 1025 }
cfa7f521 1026 } else if (host->flags & WBSD_FCARD_PRESENT) {
1da177e4 1027 DBG("Card removed\n");
85bcc130 1028 host->flags &= ~WBSD_FCARD_PRESENT;
fecf92ba 1029
cfa7f521 1030 if (host->mrq) {
a3c76eb9 1031 pr_err("%s: Card removed during transfer!\n",
d191634f 1032 mmc_hostname(host->mmc));
1da177e4 1033 wbsd_reset(host);
fecf92ba 1034
17b0429d 1035 host->mrq->cmd->error = -ENOMEDIUM;
1da177e4
LT
1036 tasklet_schedule(&host->finish_tasklet);
1037 }
fecf92ba 1038
210ce2a7 1039 delay = 0;
6e6293dd 1040 }
210ce2a7
PO
1041
1042 /*
1043 * Unlock first since we might get a call back.
1044 */
1045
1046 spin_unlock(&host->lock);
1047
1048 if (delay != -1)
1049 mmc_detect_change(host->mmc, msecs_to_jiffies(delay));
1da177e4
LT
1050}
1051
1052static void wbsd_tasklet_fifo(unsigned long param)
1053{
cfa7f521
PO
1054 struct wbsd_host *host = (struct wbsd_host *)param;
1055 struct mmc_data *data;
fecf92ba 1056
1da177e4 1057 spin_lock(&host->lock);
fecf92ba 1058
1da177e4
LT
1059 if (!host->mrq)
1060 goto end;
fecf92ba 1061
1da177e4
LT
1062 data = wbsd_get_data(host);
1063 if (!data)
1064 goto end;
1065
1066 if (data->flags & MMC_DATA_WRITE)
1067 wbsd_fill_fifo(host);
1068 else
1069 wbsd_empty_fifo(host);
1070
1071 /*
1072 * Done?
1073 */
14d836e7 1074 if (host->num_sg == 0) {
1da177e4
LT
1075 wbsd_write_index(host, WBSD_IDX_FIFOEN, 0);
1076 tasklet_schedule(&host->finish_tasklet);
1077 }
1078
fecf92ba 1079end:
1da177e4
LT
1080 spin_unlock(&host->lock);
1081}
1082
1083static void wbsd_tasklet_crc(unsigned long param)
1084{
cfa7f521
PO
1085 struct wbsd_host *host = (struct wbsd_host *)param;
1086 struct mmc_data *data;
fecf92ba 1087
1da177e4 1088 spin_lock(&host->lock);
fecf92ba 1089
1da177e4
LT
1090 if (!host->mrq)
1091 goto end;
fecf92ba 1092
1da177e4
LT
1093 data = wbsd_get_data(host);
1094 if (!data)
1095 goto end;
fecf92ba 1096
1da177e4
LT
1097 DBGF("CRC error\n");
1098
17b0429d 1099 data->error = -EILSEQ;
fecf92ba 1100
1da177e4
LT
1101 tasklet_schedule(&host->finish_tasklet);
1102
fecf92ba 1103end:
1da177e4
LT
1104 spin_unlock(&host->lock);
1105}
1106
1107static void wbsd_tasklet_timeout(unsigned long param)
1108{
cfa7f521
PO
1109 struct wbsd_host *host = (struct wbsd_host *)param;
1110 struct mmc_data *data;
fecf92ba 1111
1da177e4 1112 spin_lock(&host->lock);
fecf92ba 1113
1da177e4
LT
1114 if (!host->mrq)
1115 goto end;
fecf92ba 1116
1da177e4
LT
1117 data = wbsd_get_data(host);
1118 if (!data)
1119 goto end;
fecf92ba 1120
1da177e4
LT
1121 DBGF("Timeout\n");
1122
17b0429d 1123 data->error = -ETIMEDOUT;
fecf92ba 1124
1da177e4
LT
1125 tasklet_schedule(&host->finish_tasklet);
1126
fecf92ba 1127end:
1da177e4
LT
1128 spin_unlock(&host->lock);
1129}
1130
1131static void wbsd_tasklet_finish(unsigned long param)
1132{
cfa7f521
PO
1133 struct wbsd_host *host = (struct wbsd_host *)param;
1134 struct mmc_data *data;
fecf92ba 1135
1da177e4 1136 spin_lock(&host->lock);
fecf92ba 1137
1da177e4
LT
1138 WARN_ON(!host->mrq);
1139 if (!host->mrq)
1140 goto end;
fecf92ba 1141
1da177e4
LT
1142 data = wbsd_get_data(host);
1143 if (!data)
1144 goto end;
1145
1146 wbsd_finish_data(host, data);
fecf92ba
PO
1147
1148end:
1da177e4
LT
1149 spin_unlock(&host->lock);
1150}
1151
1da177e4
LT
1152/*
1153 * Interrupt handling
1154 */
1155
7d12e780 1156static irqreturn_t wbsd_irq(int irq, void *dev_id)
1da177e4 1157{
cfa7f521 1158 struct wbsd_host *host = dev_id;
1da177e4 1159 int isr;
fecf92ba 1160
1da177e4
LT
1161 isr = inb(host->base + WBSD_ISR);
1162
1163 /*
1164 * Was it actually our hardware that caused the interrupt?
1165 */
1166 if (isr == 0xff || isr == 0x00)
1167 return IRQ_NONE;
fecf92ba 1168
1da177e4
LT
1169 host->isr |= isr;
1170
1171 /*
1172 * Schedule tasklets as needed.
1173 */
1174 if (isr & WBSD_INT_CARD)
1175 tasklet_schedule(&host->card_tasklet);
1176 if (isr & WBSD_INT_FIFO_THRE)
1177 tasklet_schedule(&host->fifo_tasklet);
1178 if (isr & WBSD_INT_CRC)
1179 tasklet_hi_schedule(&host->crc_tasklet);
1180 if (isr & WBSD_INT_TIMEOUT)
1181 tasklet_hi_schedule(&host->timeout_tasklet);
1da177e4
LT
1182 if (isr & WBSD_INT_TC)
1183 tasklet_schedule(&host->finish_tasklet);
fecf92ba 1184
1da177e4
LT
1185 return IRQ_HANDLED;
1186}
1187
85bcc130
PO
1188/*****************************************************************************\
1189 * *
1190 * Device initialisation and shutdown *
1191 * *
1192\*****************************************************************************/
1193
1da177e4 1194/*
85bcc130 1195 * Allocate/free MMC structure.
1da177e4
LT
1196 */
1197
c3be1efd 1198static int wbsd_alloc_mmc(struct device *dev)
85bcc130 1199{
cfa7f521
PO
1200 struct mmc_host *mmc;
1201 struct wbsd_host *host;
fecf92ba 1202
85bcc130
PO
1203 /*
1204 * Allocate MMC structure.
1205 */
1206 mmc = mmc_alloc_host(sizeof(struct wbsd_host), dev);
1207 if (!mmc)
1208 return -ENOMEM;
fecf92ba 1209
85bcc130
PO
1210 host = mmc_priv(mmc);
1211 host->mmc = mmc;
1212
1213 host->dma = -1;
1214
1215 /*
1216 * Set host parameters.
1217 */
1218 mmc->ops = &wbsd_ops;
1219 mmc->f_min = 375000;
1220 mmc->f_max = 24000000;
cfa7f521 1221 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
23af6039 1222 mmc->caps = MMC_CAP_4_BIT_DATA;
fecf92ba 1223
85bcc130 1224 spin_lock_init(&host->lock);
fecf92ba 1225
6e6293dd 1226 /*
1656fa57 1227 * Set up timers
6e6293dd 1228 */
1656fa57
PO
1229 init_timer(&host->ignore_timer);
1230 host->ignore_timer.data = (unsigned long)host;
1231 host->ignore_timer.function = wbsd_reset_ignore;
fecf92ba 1232
85bcc130
PO
1233 /*
1234 * Maximum number of segments. Worst case is one sector per segment
1235 * so this will be 64kB/512.
1236 */
a36274e0 1237 mmc->max_segs = 128;
fecf92ba 1238
85bcc130 1239 /*
55db890a 1240 * Maximum request size. Also limited by 64KiB buffer.
85bcc130 1241 */
55db890a 1242 mmc->max_req_size = 65536;
fecf92ba 1243
85bcc130
PO
1244 /*
1245 * Maximum segment size. Could be one segment with the maximum number
55db890a 1246 * of bytes.
85bcc130 1247 */
55db890a 1248 mmc->max_seg_size = mmc->max_req_size;
fecf92ba 1249
fe4a3c7a
PO
1250 /*
1251 * Maximum block size. We have 12 bits (= 4095) but have to subtract
1252 * space for CRC. So the maximum is 4095 - 4*2 = 4087.
1253 */
1254 mmc->max_blk_size = 4087;
1255
55db890a
PO
1256 /*
1257 * Maximum block count. There is no real limit so the maximum
1258 * request size will be the only restriction.
1259 */
1260 mmc->max_blk_count = mmc->max_req_size;
1261
85bcc130 1262 dev_set_drvdata(dev, mmc);
fecf92ba 1263
85bcc130
PO
1264 return 0;
1265}
1266
b3627bb1 1267static void wbsd_free_mmc(struct device *dev)
85bcc130 1268{
cfa7f521
PO
1269 struct mmc_host *mmc;
1270 struct wbsd_host *host;
fecf92ba 1271
85bcc130
PO
1272 mmc = dev_get_drvdata(dev);
1273 if (!mmc)
1274 return;
fecf92ba 1275
6e6293dd
PO
1276 host = mmc_priv(mmc);
1277 BUG_ON(host == NULL);
fecf92ba 1278
1656fa57 1279 del_timer_sync(&host->ignore_timer);
fecf92ba 1280
85bcc130 1281 mmc_free_host(mmc);
fecf92ba 1282
85bcc130
PO
1283 dev_set_drvdata(dev, NULL);
1284}
1285
1286/*
1287 * Scan for known chip id:s
1288 */
1289
c3be1efd 1290static int wbsd_scan(struct wbsd_host *host)
1da177e4
LT
1291{
1292 int i, j, k;
1293 int id;
fecf92ba 1294
1da177e4
LT
1295 /*
1296 * Iterate through all ports, all codes to
1297 * find hardware that is in our known list.
1298 */
63648fb5 1299 for (i = 0; i < ARRAY_SIZE(config_ports); i++) {
1da177e4
LT
1300 if (!request_region(config_ports[i], 2, DRIVER_NAME))
1301 continue;
fecf92ba 1302
63648fb5 1303 for (j = 0; j < ARRAY_SIZE(unlock_codes); j++) {
1da177e4 1304 id = 0xFFFF;
fecf92ba 1305
19c1f3ca
PO
1306 host->config = config_ports[i];
1307 host->unlock_code = unlock_codes[j];
1308
1309 wbsd_unlock_config(host);
fecf92ba 1310
1da177e4
LT
1311 outb(WBSD_CONF_ID_HI, config_ports[i]);
1312 id = inb(config_ports[i] + 1) << 8;
1313
1314 outb(WBSD_CONF_ID_LO, config_ports[i]);
1315 id |= inb(config_ports[i] + 1);
fecf92ba 1316
19c1f3ca
PO
1317 wbsd_lock_config(host);
1318
63648fb5 1319 for (k = 0; k < ARRAY_SIZE(valid_ids); k++) {
cfa7f521 1320 if (id == valid_ids[k]) {
1da177e4 1321 host->chip_id = id;
fecf92ba 1322
1da177e4
LT
1323 return 0;
1324 }
1325 }
fecf92ba 1326
cfa7f521 1327 if (id != 0xFFFF) {
1da177e4
LT
1328 DBG("Unknown hardware (id %x) found at %x\n",
1329 id, config_ports[i]);
1330 }
1da177e4 1331 }
fecf92ba 1332
1da177e4
LT
1333 release_region(config_ports[i], 2);
1334 }
fecf92ba 1335
19c1f3ca
PO
1336 host->config = 0;
1337 host->unlock_code = 0;
1338
1da177e4
LT
1339 return -ENODEV;
1340}
1341
85bcc130
PO
1342/*
1343 * Allocate/free io port ranges
1344 */
1345
c3be1efd 1346static int wbsd_request_region(struct wbsd_host *host, int base)
1da177e4 1347{
916f3ac6 1348 if (base & 0x7)
1da177e4 1349 return -EINVAL;
fecf92ba 1350
85bcc130 1351 if (!request_region(base, 8, DRIVER_NAME))
1da177e4 1352 return -EIO;
fecf92ba 1353
916f3ac6 1354 host->base = base;
fecf92ba 1355
1da177e4
LT
1356 return 0;
1357}
1358
b3627bb1 1359static void wbsd_release_regions(struct wbsd_host *host)
1da177e4
LT
1360{
1361 if (host->base)
1362 release_region(host->base, 8);
fecf92ba 1363
85bcc130 1364 host->base = 0;
1da177e4
LT
1365
1366 if (host->config)
1367 release_region(host->config, 2);
fecf92ba 1368
85bcc130 1369 host->config = 0;
1da177e4
LT
1370}
1371
85bcc130
PO
1372/*
1373 * Allocate/free DMA port and buffer
1374 */
1375
c3be1efd 1376static void wbsd_request_dma(struct wbsd_host *host, int dma)
1da177e4 1377{
1da177e4
LT
1378 if (dma < 0)
1379 return;
fecf92ba 1380
1da177e4
LT
1381 if (request_dma(dma, DRIVER_NAME))
1382 goto err;
fecf92ba 1383
1da177e4
LT
1384 /*
1385 * We need to allocate a special buffer in
1386 * order for ISA to be able to DMA to it.
1387 */
85bcc130 1388 host->dma_buffer = kmalloc(WBSD_DMA_SIZE,
1da177e4
LT
1389 GFP_NOIO | GFP_DMA | __GFP_REPEAT | __GFP_NOWARN);
1390 if (!host->dma_buffer)
1391 goto free;
1392
1393 /*
1394 * Translate the address to a physical address.
1395 */
fcaf71fd 1396 host->dma_addr = dma_map_single(mmc_dev(host->mmc), host->dma_buffer,
85bcc130 1397 WBSD_DMA_SIZE, DMA_BIDIRECTIONAL);
a5488a35
AK
1398 if (dma_mapping_error(mmc_dev(host->mmc), host->dma_addr))
1399 goto kfree;
fecf92ba 1400
1da177e4
LT
1401 /*
1402 * ISA DMA must be aligned on a 64k basis.
1403 */
1404 if ((host->dma_addr & 0xffff) != 0)
a5488a35 1405 goto unmap;
1da177e4
LT
1406 /*
1407 * ISA cannot access memory above 16 MB.
1408 */
1409 else if (host->dma_addr >= 0x1000000)
a5488a35 1410 goto unmap;
1da177e4
LT
1411
1412 host->dma = dma;
fecf92ba 1413
1da177e4 1414 return;
fecf92ba 1415
a5488a35 1416unmap:
1da177e4
LT
1417 /*
1418 * If we've gotten here then there is some kind of alignment bug
1419 */
1420 BUG_ON(1);
fecf92ba 1421
fcaf71fd 1422 dma_unmap_single(mmc_dev(host->mmc), host->dma_addr,
cfa7f521 1423 WBSD_DMA_SIZE, DMA_BIDIRECTIONAL);
97067d55 1424 host->dma_addr = 0;
fecf92ba 1425
a5488a35 1426kfree:
1da177e4
LT
1427 kfree(host->dma_buffer);
1428 host->dma_buffer = NULL;
1429
1430free:
1431 free_dma(dma);
1432
1433err:
6606110d
JP
1434 pr_warn(DRIVER_NAME ": Unable to allocate DMA %d - falling back on FIFO\n",
1435 dma);
1da177e4
LT
1436}
1437
b3627bb1 1438static void wbsd_release_dma(struct wbsd_host *host)
85bcc130 1439{
e81c022a
AK
1440 /*
1441 * host->dma_addr is valid here iff host->dma_buffer is not NULL.
1442 */
1443 if (host->dma_buffer) {
fcaf71fd 1444 dma_unmap_single(mmc_dev(host->mmc), host->dma_addr,
cfa7f521 1445 WBSD_DMA_SIZE, DMA_BIDIRECTIONAL);
e81c022a 1446 kfree(host->dma_buffer);
cfa7f521 1447 }
85bcc130
PO
1448 if (host->dma >= 0)
1449 free_dma(host->dma);
fecf92ba 1450
85bcc130
PO
1451 host->dma = -1;
1452 host->dma_buffer = NULL;
97067d55 1453 host->dma_addr = 0;
85bcc130 1454}
1da177e4
LT
1455
1456/*
85bcc130 1457 * Allocate/free IRQ.
1da177e4
LT
1458 */
1459
c3be1efd 1460static int wbsd_request_irq(struct wbsd_host *host, int irq)
1da177e4 1461{
1da177e4 1462 int ret;
fecf92ba 1463
1da177e4 1464 /*
cef33400 1465 * Set up tasklets. Must be done before requesting interrupt.
1da177e4 1466 */
cfa7f521
PO
1467 tasklet_init(&host->card_tasklet, wbsd_tasklet_card,
1468 (unsigned long)host);
1469 tasklet_init(&host->fifo_tasklet, wbsd_tasklet_fifo,
1470 (unsigned long)host);
1471 tasklet_init(&host->crc_tasklet, wbsd_tasklet_crc,
1472 (unsigned long)host);
1473 tasklet_init(&host->timeout_tasklet, wbsd_tasklet_timeout,
1474 (unsigned long)host);
1475 tasklet_init(&host->finish_tasklet, wbsd_tasklet_finish,
1476 (unsigned long)host);
fecf92ba 1477
cef33400
CE
1478 /*
1479 * Allocate interrupt.
1480 */
1481 ret = request_irq(irq, wbsd_irq, IRQF_SHARED, DRIVER_NAME, host);
1482 if (ret)
1483 return ret;
1484
1485 host->irq = irq;
1486
85bcc130
PO
1487 return 0;
1488}
1da177e4 1489
b3627bb1 1490static void wbsd_release_irq(struct wbsd_host *host)
85bcc130
PO
1491{
1492 if (!host->irq)
1493 return;
1da177e4 1494
85bcc130 1495 free_irq(host->irq, host);
fecf92ba 1496
85bcc130 1497 host->irq = 0;
fecf92ba 1498
85bcc130
PO
1499 tasklet_kill(&host->card_tasklet);
1500 tasklet_kill(&host->fifo_tasklet);
1501 tasklet_kill(&host->crc_tasklet);
1502 tasklet_kill(&host->timeout_tasklet);
1503 tasklet_kill(&host->finish_tasklet);
85bcc130
PO
1504}
1505
1506/*
1507 * Allocate all resources for the host.
1508 */
1509
c3be1efd 1510static int wbsd_request_resources(struct wbsd_host *host,
85bcc130
PO
1511 int base, int irq, int dma)
1512{
1513 int ret;
fecf92ba 1514
1da177e4
LT
1515 /*
1516 * Allocate I/O ports.
1517 */
85bcc130 1518 ret = wbsd_request_region(host, base);
1da177e4 1519 if (ret)
85bcc130 1520 return ret;
1da177e4
LT
1521
1522 /*
85bcc130 1523 * Allocate interrupt.
1da177e4 1524 */
85bcc130
PO
1525 ret = wbsd_request_irq(host, irq);
1526 if (ret)
1527 return ret;
1528
1529 /*
1530 * Allocate DMA.
1531 */
1532 wbsd_request_dma(host, dma);
fecf92ba 1533
85bcc130
PO
1534 return 0;
1535}
1536
1537/*
1538 * Release all resources for the host.
1539 */
1540
b3627bb1 1541static void wbsd_release_resources(struct wbsd_host *host)
85bcc130
PO
1542{
1543 wbsd_release_dma(host);
1544 wbsd_release_irq(host);
1545 wbsd_release_regions(host);
1546}
1547
1548/*
1549 * Configure the resources the chip should use.
1550 */
1551
cfa7f521 1552static void wbsd_chip_config(struct wbsd_host *host)
85bcc130 1553{
19c1f3ca
PO
1554 wbsd_unlock_config(host);
1555
85bcc130
PO
1556 /*
1557 * Reset the chip.
fecf92ba 1558 */
85bcc130
PO
1559 wbsd_write_config(host, WBSD_CONF_SWRST, 1);
1560 wbsd_write_config(host, WBSD_CONF_SWRST, 0);
1da177e4
LT
1561
1562 /*
1563 * Select SD/MMC function.
1564 */
1565 wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD);
fecf92ba 1566
1da177e4
LT
1567 /*
1568 * Set up card detection.
1569 */
85bcc130 1570 wbsd_write_config(host, WBSD_CONF_PINS, WBSD_PINS_DETECT_GP11);
fecf92ba 1571
1da177e4 1572 /*
85bcc130 1573 * Configure chip
1da177e4
LT
1574 */
1575 wbsd_write_config(host, WBSD_CONF_PORT_HI, host->base >> 8);
1576 wbsd_write_config(host, WBSD_CONF_PORT_LO, host->base & 0xff);
fecf92ba 1577
85bcc130 1578 wbsd_write_config(host, WBSD_CONF_IRQ, host->irq);
fecf92ba 1579
85bcc130
PO
1580 if (host->dma >= 0)
1581 wbsd_write_config(host, WBSD_CONF_DRQ, host->dma);
fecf92ba 1582
1da177e4 1583 /*
85bcc130 1584 * Enable and power up chip.
1da177e4 1585 */
85bcc130
PO
1586 wbsd_write_config(host, WBSD_CONF_ENABLE, 1);
1587 wbsd_write_config(host, WBSD_CONF_POWER, 0x20);
19c1f3ca
PO
1588
1589 wbsd_lock_config(host);
85bcc130
PO
1590}
1591
1592/*
1593 * Check that configured resources are correct.
1594 */
fecf92ba 1595
cfa7f521 1596static int wbsd_chip_validate(struct wbsd_host *host)
85bcc130
PO
1597{
1598 int base, irq, dma;
fecf92ba 1599
19c1f3ca
PO
1600 wbsd_unlock_config(host);
1601
1da177e4 1602 /*
85bcc130 1603 * Select SD/MMC function.
1da177e4 1604 */
85bcc130 1605 wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD);
fecf92ba 1606
1da177e4 1607 /*
85bcc130 1608 * Read configuration.
1da177e4 1609 */
85bcc130
PO
1610 base = wbsd_read_config(host, WBSD_CONF_PORT_HI) << 8;
1611 base |= wbsd_read_config(host, WBSD_CONF_PORT_LO);
fecf92ba 1612
85bcc130 1613 irq = wbsd_read_config(host, WBSD_CONF_IRQ);
fecf92ba 1614
85bcc130 1615 dma = wbsd_read_config(host, WBSD_CONF_DRQ);
fecf92ba 1616
19c1f3ca
PO
1617 wbsd_lock_config(host);
1618
1da177e4 1619 /*
85bcc130 1620 * Validate against given configuration.
1da177e4 1621 */
85bcc130
PO
1622 if (base != host->base)
1623 return 0;
1624 if (irq != host->irq)
1625 return 0;
1626 if ((dma != host->dma) && (host->dma != -1))
1627 return 0;
fecf92ba 1628
85bcc130
PO
1629 return 1;
1630}
1631
19c1f3ca
PO
1632/*
1633 * Powers down the SD function
1634 */
1635
cfa7f521 1636static void wbsd_chip_poweroff(struct wbsd_host *host)
19c1f3ca
PO
1637{
1638 wbsd_unlock_config(host);
1639
1640 wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD);
1641 wbsd_write_config(host, WBSD_CONF_ENABLE, 0);
1642
1643 wbsd_lock_config(host);
1644}
1645
85bcc130
PO
1646/*****************************************************************************\
1647 * *
1648 * Devices setup and shutdown *
1649 * *
1650\*****************************************************************************/
1651
c3be1efd 1652static int wbsd_init(struct device *dev, int base, int irq, int dma,
85bcc130
PO
1653 int pnp)
1654{
cfa7f521
PO
1655 struct wbsd_host *host = NULL;
1656 struct mmc_host *mmc = NULL;
85bcc130 1657 int ret;
fecf92ba 1658
85bcc130
PO
1659 ret = wbsd_alloc_mmc(dev);
1660 if (ret)
1661 return ret;
fecf92ba 1662
85bcc130
PO
1663 mmc = dev_get_drvdata(dev);
1664 host = mmc_priv(mmc);
fecf92ba 1665
1da177e4 1666 /*
85bcc130 1667 * Scan for hardware.
1da177e4 1668 */
85bcc130 1669 ret = wbsd_scan(host);
cfa7f521
PO
1670 if (ret) {
1671 if (pnp && (ret == -ENODEV)) {
6606110d 1672 pr_warn(DRIVER_NAME ": Unable to confirm device presence - you may experience lock-ups\n");
cfa7f521 1673 } else {
85bcc130
PO
1674 wbsd_free_mmc(dev);
1675 return ret;
1676 }
1677 }
fecf92ba 1678
1da177e4 1679 /*
85bcc130 1680 * Request resources.
1da177e4 1681 */
dd2c609c 1682 ret = wbsd_request_resources(host, base, irq, dma);
cfa7f521 1683 if (ret) {
85bcc130
PO
1684 wbsd_release_resources(host);
1685 wbsd_free_mmc(dev);
1686 return ret;
1687 }
fecf92ba 1688
1da177e4 1689 /*
85bcc130 1690 * See if chip needs to be configured.
1da177e4 1691 */
cfa7f521
PO
1692 if (pnp) {
1693 if ((host->config != 0) && !wbsd_chip_validate(host)) {
6606110d 1694 pr_warn(DRIVER_NAME ": PnP active but chip not configured! You probably have a buggy BIOS. Configuring chip manually.\n");
85bcc130
PO
1695 wbsd_chip_config(host);
1696 }
cfa7f521 1697 } else
85bcc130 1698 wbsd_chip_config(host);
fecf92ba 1699
1da177e4
LT
1700 /*
1701 * Power Management stuff. No idea how this works.
1702 * Not tested.
1703 */
1704#ifdef CONFIG_PM
cfa7f521 1705 if (host->config) {
19c1f3ca 1706 wbsd_unlock_config(host);
85bcc130 1707 wbsd_write_config(host, WBSD_CONF_PME, 0xA0);
19c1f3ca
PO
1708 wbsd_lock_config(host);
1709 }
1da177e4 1710#endif
85bcc130
PO
1711 /*
1712 * Allow device to initialise itself properly.
1713 */
1714 mdelay(5);
1da177e4
LT
1715
1716 /*
1717 * Reset the chip into a known state.
1718 */
1719 wbsd_init_device(host);
fecf92ba 1720
1da177e4
LT
1721 mmc_add_host(mmc);
1722
a3c76eb9 1723 pr_info("%s: W83L51xD", mmc_hostname(mmc));
85bcc130
PO
1724 if (host->chip_id != 0)
1725 printk(" id %x", (int)host->chip_id);
1726 printk(" at 0x%x irq %d", (int)host->base, (int)host->irq);
1727 if (host->dma >= 0)
1728 printk(" dma %d", (int)host->dma);
1729 else
1730 printk(" FIFO");
1731 if (pnp)
1732 printk(" PnP");
1733 printk("\n");
1da177e4
LT
1734
1735 return 0;
1da177e4
LT
1736}
1737
6e0ee714 1738static void wbsd_shutdown(struct device *dev, int pnp)
1da177e4 1739{
cfa7f521
PO
1740 struct mmc_host *mmc = dev_get_drvdata(dev);
1741 struct wbsd_host *host;
fecf92ba 1742
1da177e4 1743 if (!mmc)
85bcc130 1744 return;
1da177e4
LT
1745
1746 host = mmc_priv(mmc);
fecf92ba 1747
1da177e4
LT
1748 mmc_remove_host(mmc);
1749
19c1f3ca
PO
1750 /*
1751 * Power down the SD/MMC function.
1752 */
85bcc130 1753 if (!pnp)
19c1f3ca 1754 wbsd_chip_poweroff(host);
fecf92ba 1755
85bcc130 1756 wbsd_release_resources(host);
fecf92ba 1757
85bcc130
PO
1758 wbsd_free_mmc(dev);
1759}
1da177e4 1760
85bcc130
PO
1761/*
1762 * Non-PnP
1763 */
1764
c3be1efd 1765static int wbsd_probe(struct platform_device *dev)
85bcc130 1766{
dd2c609c 1767 /* Use the module parameters for resources */
9eeebd22 1768 return wbsd_init(&dev->dev, param_io, param_irq, param_dma, 0);
85bcc130
PO
1769}
1770
6e0ee714 1771static int wbsd_remove(struct platform_device *dev)
85bcc130 1772{
3ae5eaec 1773 wbsd_shutdown(&dev->dev, 0);
85bcc130
PO
1774
1775 return 0;
1776}
1777
1778/*
1779 * PnP
1780 */
1781
1782#ifdef CONFIG_PNP
1783
c3be1efd 1784static int
cfa7f521 1785wbsd_pnp_probe(struct pnp_dev *pnpdev, const struct pnp_device_id *dev_id)
85bcc130
PO
1786{
1787 int io, irq, dma;
fecf92ba 1788
85bcc130
PO
1789 /*
1790 * Get resources from PnP layer.
1791 */
1792 io = pnp_port_start(pnpdev, 0);
1793 irq = pnp_irq(pnpdev, 0);
1794 if (pnp_dma_valid(pnpdev, 0))
1795 dma = pnp_dma(pnpdev, 0);
1796 else
1797 dma = -1;
fecf92ba 1798
85bcc130 1799 DBGF("PnP resources: port %3x irq %d dma %d\n", io, irq, dma);
fecf92ba 1800
85bcc130
PO
1801 return wbsd_init(&pnpdev->dev, io, irq, dma, 1);
1802}
1da177e4 1803
6e0ee714 1804static void wbsd_pnp_remove(struct pnp_dev *dev)
85bcc130
PO
1805{
1806 wbsd_shutdown(&dev->dev, 1);
1da177e4
LT
1807}
1808
85bcc130
PO
1809#endif /* CONFIG_PNP */
1810
1da177e4
LT
1811/*
1812 * Power management
1813 */
1814
1815#ifdef CONFIG_PM
19c1f3ca 1816
cfa7f521
PO
1817static int wbsd_platform_suspend(struct platform_device *dev,
1818 pm_message_t state)
1da177e4 1819{
3ae5eaec 1820 struct mmc_host *mmc = platform_get_drvdata(dev);
19c1f3ca 1821 struct wbsd_host *host;
19c1f3ca 1822
5e68d95d 1823 if (mmc == NULL)
19c1f3ca
PO
1824 return 0;
1825
5e68d95d 1826 DBGF("Suspending...\n");
19c1f3ca
PO
1827
1828 host = mmc_priv(mmc);
1829
1830 wbsd_chip_poweroff(host);
1da177e4
LT
1831 return 0;
1832}
1833
5e68d95d 1834static int wbsd_platform_resume(struct platform_device *dev)
1da177e4 1835{
3ae5eaec 1836 struct mmc_host *mmc = platform_get_drvdata(dev);
19c1f3ca 1837 struct wbsd_host *host;
1da177e4 1838
5e68d95d 1839 if (mmc == NULL)
19c1f3ca
PO
1840 return 0;
1841
5e68d95d 1842 DBGF("Resuming...\n");
19c1f3ca
PO
1843
1844 host = mmc_priv(mmc);
1845
1846 wbsd_chip_config(host);
1847
1848 /*
1849 * Allow device to initialise itself properly.
1850 */
1851 mdelay(5);
1852
83234ac8
UH
1853 wbsd_init_device(host);
1854 return 0;
5e68d95d
PO
1855}
1856
1857#ifdef CONFIG_PNP
1858
1859static int wbsd_pnp_suspend(struct pnp_dev *pnp_dev, pm_message_t state)
1860{
1861 struct mmc_host *mmc = dev_get_drvdata(&pnp_dev->dev);
5e68d95d
PO
1862
1863 if (mmc == NULL)
1864 return 0;
19c1f3ca 1865
5e68d95d 1866 DBGF("Suspending...\n");
83234ac8 1867 return 0;
1da177e4 1868}
19c1f3ca 1869
5e68d95d
PO
1870static int wbsd_pnp_resume(struct pnp_dev *pnp_dev)
1871{
1872 struct mmc_host *mmc = dev_get_drvdata(&pnp_dev->dev);
1873 struct wbsd_host *host;
1874
1875 if (mmc == NULL)
1876 return 0;
1877
1878 DBGF("Resuming...\n");
1879
1880 host = mmc_priv(mmc);
1881
1882 /*
1883 * See if chip needs to be configured.
1884 */
cfa7f521
PO
1885 if (host->config != 0) {
1886 if (!wbsd_chip_validate(host)) {
6606110d 1887 pr_warn(DRIVER_NAME ": PnP active but chip not configured! You probably have a buggy BIOS. Configuring chip manually.\n");
5e68d95d
PO
1888 wbsd_chip_config(host);
1889 }
1890 }
1891
1892 /*
1893 * Allow device to initialise itself properly.
1894 */
1895 mdelay(5);
1896
83234ac8
UH
1897 wbsd_init_device(host);
1898 return 0;
5e68d95d
PO
1899}
1900
1901#endif /* CONFIG_PNP */
1902
19c1f3ca
PO
1903#else /* CONFIG_PM */
1904
5e68d95d
PO
1905#define wbsd_platform_suspend NULL
1906#define wbsd_platform_resume NULL
1907
1908#define wbsd_pnp_suspend NULL
1909#define wbsd_pnp_resume NULL
19c1f3ca
PO
1910
1911#endif /* CONFIG_PM */
1da177e4 1912
85bcc130 1913static struct platform_device *wbsd_device;
1da177e4 1914
3ae5eaec 1915static struct platform_driver wbsd_driver = {
1da177e4 1916 .probe = wbsd_probe,
0433c143 1917 .remove = wbsd_remove,
fecf92ba 1918
5e68d95d
PO
1919 .suspend = wbsd_platform_suspend,
1920 .resume = wbsd_platform_resume,
3ae5eaec
RK
1921 .driver = {
1922 .name = DRIVER_NAME,
1923 },
1da177e4
LT
1924};
1925
85bcc130
PO
1926#ifdef CONFIG_PNP
1927
1928static struct pnp_driver wbsd_pnp_driver = {
1929 .name = DRIVER_NAME,
1930 .id_table = pnp_dev_table,
1931 .probe = wbsd_pnp_probe,
0433c143 1932 .remove = wbsd_pnp_remove,
5e68d95d
PO
1933
1934 .suspend = wbsd_pnp_suspend,
1935 .resume = wbsd_pnp_resume,
85bcc130
PO
1936};
1937
1938#endif /* CONFIG_PNP */
1939
1da177e4
LT
1940/*
1941 * Module loading/unloading
1942 */
1943
1944static int __init wbsd_drv_init(void)
1945{
1946 int result;
fecf92ba 1947
a3c76eb9 1948 pr_info(DRIVER_NAME
1615cc22 1949 ": Winbond W83L51xD SD/MMC card interface driver\n");
a3c76eb9 1950 pr_info(DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
1da177e4 1951
85bcc130
PO
1952#ifdef CONFIG_PNP
1953
9eeebd22 1954 if (!param_nopnp) {
85bcc130
PO
1955 result = pnp_register_driver(&wbsd_pnp_driver);
1956 if (result < 0)
1957 return result;
1958 }
fecf92ba
PO
1959#endif /* CONFIG_PNP */
1960
9eeebd22 1961 if (param_nopnp) {
3ae5eaec 1962 result = platform_driver_register(&wbsd_driver);
85bcc130
PO
1963 if (result < 0)
1964 return result;
1965
21500bb3 1966 wbsd_device = platform_device_alloc(DRIVER_NAME, -1);
cfa7f521 1967 if (!wbsd_device) {
21500bb3
DT
1968 platform_driver_unregister(&wbsd_driver);
1969 return -ENOMEM;
1970 }
1971
1972 result = platform_device_add(wbsd_device);
cfa7f521 1973 if (result) {
21500bb3
DT
1974 platform_device_put(wbsd_device);
1975 platform_driver_unregister(&wbsd_driver);
1976 return result;
1977 }
85bcc130 1978 }
1da177e4
LT
1979
1980 return 0;
1981}
1982
1983static void __exit wbsd_drv_exit(void)
1984{
85bcc130
PO
1985#ifdef CONFIG_PNP
1986
9eeebd22 1987 if (!param_nopnp)
85bcc130 1988 pnp_unregister_driver(&wbsd_pnp_driver);
fecf92ba
PO
1989
1990#endif /* CONFIG_PNP */
85bcc130 1991
9eeebd22 1992 if (param_nopnp) {
85bcc130 1993 platform_device_unregister(wbsd_device);
fecf92ba 1994
3ae5eaec 1995 platform_driver_unregister(&wbsd_driver);
85bcc130 1996 }
1da177e4
LT
1997
1998 DBG("unloaded\n");
1999}
2000
2001module_init(wbsd_drv_init);
2002module_exit(wbsd_drv_exit);
85bcc130 2003#ifdef CONFIG_PNP
9eeebd22 2004module_param_named(nopnp, param_nopnp, uint, 0444);
85bcc130 2005#endif
9eeebd22
TW
2006module_param_named(io, param_io, uint, 0444);
2007module_param_named(irq, param_irq, uint, 0444);
2008module_param_named(dma, param_dma, int, 0444);
1da177e4
LT
2009
2010MODULE_LICENSE("GPL");
32710e8f 2011MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
1da177e4 2012MODULE_DESCRIPTION("Winbond W83L51xD SD/MMC card interface driver");
1da177e4 2013
85bcc130
PO
2014#ifdef CONFIG_PNP
2015MODULE_PARM_DESC(nopnp, "Scan for device instead of relying on PNP. (default 0)");
2016#endif
1da177e4
LT
2017MODULE_PARM_DESC(io, "I/O base to allocate. Must be 8 byte aligned. (default 0x248)");
2018MODULE_PARM_DESC(irq, "IRQ to allocate. (default 6)");
2019MODULE_PARM_DESC(dma, "DMA channel to allocate. -1 for no DMA. (default 2)");