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Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
70f10482 | 2 | * linux/drivers/mmc/host/wbsd.c - Winbond W83L51xD SD/MMC driver |
1da177e4 | 3 | * |
14d836e7 | 4 | * Copyright (C) 2004-2007 Pierre Ossman, All Rights Reserved. |
1da177e4 LT |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
643f720c PO |
7 | * it under the terms of the GNU General Public License as published by |
8 | * the Free Software Foundation; either version 2 of the License, or (at | |
9 | * your option) any later version. | |
1da177e4 LT |
10 | * |
11 | * | |
12 | * Warning! | |
13 | * | |
14 | * Changes to the FIFO system should be done with extreme care since | |
15 | * the hardware is full of bugs related to the FIFO. Known issues are: | |
16 | * | |
17 | * - FIFO size field in FSR is always zero. | |
18 | * | |
19 | * - FIFO interrupts tend not to work as they should. Interrupts are | |
20 | * triggered only for full/empty events, not for threshold values. | |
21 | * | |
22 | * - On APIC systems the FIFO empty interrupt is sometimes lost. | |
23 | */ | |
24 | ||
1da177e4 LT |
25 | #include <linux/module.h> |
26 | #include <linux/moduleparam.h> | |
27 | #include <linux/init.h> | |
28 | #include <linux/ioport.h> | |
d052d1be | 29 | #include <linux/platform_device.h> |
1da177e4 | 30 | #include <linux/interrupt.h> |
85bcc130 | 31 | #include <linux/dma-mapping.h> |
1da177e4 | 32 | #include <linux/delay.h> |
85bcc130 | 33 | #include <linux/pnp.h> |
1da177e4 LT |
34 | #include <linux/highmem.h> |
35 | #include <linux/mmc/host.h> | |
bd6dee6f | 36 | #include <linux/scatterlist.h> |
5a0e3ad6 | 37 | #include <linux/slab.h> |
1da177e4 LT |
38 | |
39 | #include <asm/io.h> | |
40 | #include <asm/dma.h> | |
1da177e4 LT |
41 | |
42 | #include "wbsd.h" | |
43 | ||
44 | #define DRIVER_NAME "wbsd" | |
1da177e4 | 45 | |
1da177e4 | 46 | #define DBG(x...) \ |
c6563178 | 47 | pr_debug(DRIVER_NAME ": " x) |
1da177e4 | 48 | #define DBGF(f, x...) \ |
c6563178 | 49 | pr_debug(DRIVER_NAME " [%s()]: " f, __func__ , ##x) |
1da177e4 | 50 | |
85bcc130 PO |
51 | /* |
52 | * Device resources | |
53 | */ | |
54 | ||
55 | #ifdef CONFIG_PNP | |
56 | ||
57 | static const struct pnp_device_id pnp_dev_table[] = { | |
58 | { "WEC0517", 0 }, | |
59 | { "WEC0518", 0 }, | |
60 | { "", 0 }, | |
61 | }; | |
62 | ||
63 | MODULE_DEVICE_TABLE(pnp, pnp_dev_table); | |
64 | ||
65 | #endif /* CONFIG_PNP */ | |
66 | ||
3eee0d03 AB |
67 | static const int config_ports[] = { 0x2E, 0x4E }; |
68 | static const int unlock_codes[] = { 0x83, 0x87 }; | |
69 | ||
70 | static const int valid_ids[] = { | |
71 | 0x7112, | |
9eeebd22 | 72 | }; |
3eee0d03 | 73 | |
85bcc130 | 74 | #ifdef CONFIG_PNP |
9eeebd22 | 75 | static unsigned int param_nopnp = 0; |
85bcc130 | 76 | #else |
9eeebd22 | 77 | static const unsigned int param_nopnp = 1; |
85bcc130 | 78 | #endif |
9eeebd22 TW |
79 | static unsigned int param_io = 0x248; |
80 | static unsigned int param_irq = 6; | |
81 | static int param_dma = 2; | |
85bcc130 | 82 | |
1da177e4 LT |
83 | /* |
84 | * Basic functions | |
85 | */ | |
86 | ||
cfa7f521 | 87 | static inline void wbsd_unlock_config(struct wbsd_host *host) |
1da177e4 | 88 | { |
85bcc130 | 89 | BUG_ON(host->config == 0); |
fecf92ba | 90 | |
1da177e4 LT |
91 | outb(host->unlock_code, host->config); |
92 | outb(host->unlock_code, host->config); | |
93 | } | |
94 | ||
cfa7f521 | 95 | static inline void wbsd_lock_config(struct wbsd_host *host) |
1da177e4 | 96 | { |
85bcc130 | 97 | BUG_ON(host->config == 0); |
fecf92ba | 98 | |
1da177e4 LT |
99 | outb(LOCK_CODE, host->config); |
100 | } | |
101 | ||
cfa7f521 | 102 | static inline void wbsd_write_config(struct wbsd_host *host, u8 reg, u8 value) |
1da177e4 | 103 | { |
85bcc130 | 104 | BUG_ON(host->config == 0); |
fecf92ba | 105 | |
1da177e4 LT |
106 | outb(reg, host->config); |
107 | outb(value, host->config + 1); | |
108 | } | |
109 | ||
cfa7f521 | 110 | static inline u8 wbsd_read_config(struct wbsd_host *host, u8 reg) |
1da177e4 | 111 | { |
85bcc130 | 112 | BUG_ON(host->config == 0); |
fecf92ba | 113 | |
1da177e4 LT |
114 | outb(reg, host->config); |
115 | return inb(host->config + 1); | |
116 | } | |
117 | ||
cfa7f521 | 118 | static inline void wbsd_write_index(struct wbsd_host *host, u8 index, u8 value) |
1da177e4 LT |
119 | { |
120 | outb(index, host->base + WBSD_IDXR); | |
121 | outb(value, host->base + WBSD_DATAR); | |
122 | } | |
123 | ||
cfa7f521 | 124 | static inline u8 wbsd_read_index(struct wbsd_host *host, u8 index) |
1da177e4 LT |
125 | { |
126 | outb(index, host->base + WBSD_IDXR); | |
127 | return inb(host->base + WBSD_DATAR); | |
128 | } | |
129 | ||
130 | /* | |
131 | * Common routines | |
132 | */ | |
133 | ||
cfa7f521 | 134 | static void wbsd_init_device(struct wbsd_host *host) |
1da177e4 LT |
135 | { |
136 | u8 setup, ier; | |
fecf92ba | 137 | |
1da177e4 LT |
138 | /* |
139 | * Reset chip (SD/MMC part) and fifo. | |
140 | */ | |
141 | setup = wbsd_read_index(host, WBSD_IDX_SETUP); | |
142 | setup |= WBSD_FIFO_RESET | WBSD_SOFT_RESET; | |
143 | wbsd_write_index(host, WBSD_IDX_SETUP, setup); | |
fecf92ba | 144 | |
85bcc130 PO |
145 | /* |
146 | * Set DAT3 to input | |
147 | */ | |
148 | setup &= ~WBSD_DAT3_H; | |
149 | wbsd_write_index(host, WBSD_IDX_SETUP, setup); | |
150 | host->flags &= ~WBSD_FIGNORE_DETECT; | |
fecf92ba | 151 | |
1da177e4 LT |
152 | /* |
153 | * Read back default clock. | |
154 | */ | |
155 | host->clk = wbsd_read_index(host, WBSD_IDX_CLK); | |
156 | ||
157 | /* | |
158 | * Power down port. | |
159 | */ | |
160 | outb(WBSD_POWER_N, host->base + WBSD_CSR); | |
fecf92ba | 161 | |
1da177e4 LT |
162 | /* |
163 | * Set maximum timeout. | |
164 | */ | |
165 | wbsd_write_index(host, WBSD_IDX_TAAC, 0x7F); | |
fecf92ba | 166 | |
85bcc130 PO |
167 | /* |
168 | * Test for card presence | |
169 | */ | |
170 | if (inb(host->base + WBSD_CSR) & WBSD_CARDPRESENT) | |
171 | host->flags |= WBSD_FCARD_PRESENT; | |
172 | else | |
173 | host->flags &= ~WBSD_FCARD_PRESENT; | |
fecf92ba | 174 | |
1da177e4 LT |
175 | /* |
176 | * Enable interesting interrupts. | |
177 | */ | |
178 | ier = 0; | |
179 | ier |= WBSD_EINT_CARD; | |
180 | ier |= WBSD_EINT_FIFO_THRE; | |
1da177e4 | 181 | ier |= WBSD_EINT_CRC; |
5721dbf2 | 182 | ier |= WBSD_EINT_TIMEOUT; |
1da177e4 LT |
183 | ier |= WBSD_EINT_TC; |
184 | ||
185 | outb(ier, host->base + WBSD_EIR); | |
186 | ||
187 | /* | |
188 | * Clear interrupts. | |
189 | */ | |
190 | inb(host->base + WBSD_ISR); | |
191 | } | |
192 | ||
cfa7f521 | 193 | static void wbsd_reset(struct wbsd_host *host) |
1da177e4 LT |
194 | { |
195 | u8 setup; | |
fecf92ba | 196 | |
a3c76eb9 | 197 | pr_err("%s: Resetting chip\n", mmc_hostname(host->mmc)); |
fecf92ba | 198 | |
1da177e4 LT |
199 | /* |
200 | * Soft reset of chip (SD/MMC part). | |
201 | */ | |
202 | setup = wbsd_read_index(host, WBSD_IDX_SETUP); | |
203 | setup |= WBSD_SOFT_RESET; | |
204 | wbsd_write_index(host, WBSD_IDX_SETUP, setup); | |
205 | } | |
206 | ||
cfa7f521 | 207 | static void wbsd_request_end(struct wbsd_host *host, struct mmc_request *mrq) |
1da177e4 LT |
208 | { |
209 | unsigned long dmaflags; | |
fecf92ba | 210 | |
cfa7f521 | 211 | if (host->dma >= 0) { |
1da177e4 LT |
212 | /* |
213 | * Release ISA DMA controller. | |
214 | */ | |
215 | dmaflags = claim_dma_lock(); | |
216 | disable_dma(host->dma); | |
217 | clear_dma_ff(host->dma); | |
218 | release_dma_lock(dmaflags); | |
219 | ||
220 | /* | |
221 | * Disable DMA on host. | |
222 | */ | |
223 | wbsd_write_index(host, WBSD_IDX_DMA, 0); | |
224 | } | |
fecf92ba | 225 | |
1da177e4 LT |
226 | host->mrq = NULL; |
227 | ||
228 | /* | |
229 | * MMC layer might call back into the driver so first unlock. | |
230 | */ | |
231 | spin_unlock(&host->lock); | |
232 | mmc_request_done(host->mmc, mrq); | |
233 | spin_lock(&host->lock); | |
234 | } | |
235 | ||
236 | /* | |
237 | * Scatter/gather functions | |
238 | */ | |
239 | ||
cfa7f521 | 240 | static inline void wbsd_init_sg(struct wbsd_host *host, struct mmc_data *data) |
1da177e4 LT |
241 | { |
242 | /* | |
243 | * Get info. about SG list from data structure. | |
244 | */ | |
245 | host->cur_sg = data->sg; | |
246 | host->num_sg = data->sg_len; | |
247 | ||
248 | host->offset = 0; | |
249 | host->remain = host->cur_sg->length; | |
250 | } | |
251 | ||
cfa7f521 | 252 | static inline int wbsd_next_sg(struct wbsd_host *host) |
1da177e4 LT |
253 | { |
254 | /* | |
255 | * Skip to next SG entry. | |
256 | */ | |
257 | host->cur_sg++; | |
258 | host->num_sg--; | |
259 | ||
260 | /* | |
261 | * Any entries left? | |
262 | */ | |
cfa7f521 PO |
263 | if (host->num_sg > 0) { |
264 | host->offset = 0; | |
265 | host->remain = host->cur_sg->length; | |
266 | } | |
fecf92ba | 267 | |
1da177e4 LT |
268 | return host->num_sg; |
269 | } | |
270 | ||
4a0ddbd2 | 271 | static inline char *wbsd_sg_to_buffer(struct wbsd_host *host) |
1da177e4 | 272 | { |
45711f1a | 273 | return sg_virt(host->cur_sg); |
1da177e4 LT |
274 | } |
275 | ||
cfa7f521 | 276 | static inline void wbsd_sg_to_dma(struct wbsd_host *host, struct mmc_data *data) |
1da177e4 | 277 | { |
14d836e7 | 278 | unsigned int len, i; |
cfa7f521 PO |
279 | struct scatterlist *sg; |
280 | char *dmabuf = host->dma_buffer; | |
281 | char *sgbuf; | |
fecf92ba | 282 | |
1da177e4 LT |
283 | sg = data->sg; |
284 | len = data->sg_len; | |
fecf92ba | 285 | |
cfa7f521 | 286 | for (i = 0; i < len; i++) { |
45711f1a | 287 | sgbuf = sg_virt(&sg[i]); |
14d836e7 | 288 | memcpy(dmabuf, sgbuf, sg[i].length); |
1da177e4 | 289 | dmabuf += sg[i].length; |
1da177e4 | 290 | } |
1da177e4 LT |
291 | } |
292 | ||
cfa7f521 | 293 | static inline void wbsd_dma_to_sg(struct wbsd_host *host, struct mmc_data *data) |
1da177e4 | 294 | { |
14d836e7 | 295 | unsigned int len, i; |
cfa7f521 PO |
296 | struct scatterlist *sg; |
297 | char *dmabuf = host->dma_buffer; | |
298 | char *sgbuf; | |
fecf92ba | 299 | |
1da177e4 LT |
300 | sg = data->sg; |
301 | len = data->sg_len; | |
fecf92ba | 302 | |
cfa7f521 | 303 | for (i = 0; i < len; i++) { |
45711f1a | 304 | sgbuf = sg_virt(&sg[i]); |
14d836e7 | 305 | memcpy(sgbuf, dmabuf, sg[i].length); |
1da177e4 | 306 | dmabuf += sg[i].length; |
1da177e4 | 307 | } |
1da177e4 LT |
308 | } |
309 | ||
310 | /* | |
311 | * Command handling | |
312 | */ | |
fecf92ba | 313 | |
cfa7f521 PO |
314 | static inline void wbsd_get_short_reply(struct wbsd_host *host, |
315 | struct mmc_command *cmd) | |
1da177e4 LT |
316 | { |
317 | /* | |
318 | * Correct response type? | |
319 | */ | |
cfa7f521 | 320 | if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_SHORT) { |
17b0429d | 321 | cmd->error = -EILSEQ; |
1da177e4 LT |
322 | return; |
323 | } | |
fecf92ba | 324 | |
cfa7f521 PO |
325 | cmd->resp[0] = wbsd_read_index(host, WBSD_IDX_RESP12) << 24; |
326 | cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP13) << 16; | |
327 | cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP14) << 8; | |
328 | cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP15) << 0; | |
329 | cmd->resp[1] = wbsd_read_index(host, WBSD_IDX_RESP16) << 24; | |
1da177e4 LT |
330 | } |
331 | ||
cfa7f521 PO |
332 | static inline void wbsd_get_long_reply(struct wbsd_host *host, |
333 | struct mmc_command *cmd) | |
1da177e4 LT |
334 | { |
335 | int i; | |
fecf92ba | 336 | |
1da177e4 LT |
337 | /* |
338 | * Correct response type? | |
339 | */ | |
cfa7f521 | 340 | if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_LONG) { |
17b0429d | 341 | cmd->error = -EILSEQ; |
1da177e4 LT |
342 | return; |
343 | } | |
fecf92ba | 344 | |
cfa7f521 | 345 | for (i = 0; i < 4; i++) { |
1da177e4 LT |
346 | cmd->resp[i] = |
347 | wbsd_read_index(host, WBSD_IDX_RESP1 + i * 4) << 24; | |
348 | cmd->resp[i] |= | |
349 | wbsd_read_index(host, WBSD_IDX_RESP2 + i * 4) << 16; | |
350 | cmd->resp[i] |= | |
351 | wbsd_read_index(host, WBSD_IDX_RESP3 + i * 4) << 8; | |
352 | cmd->resp[i] |= | |
353 | wbsd_read_index(host, WBSD_IDX_RESP4 + i * 4) << 0; | |
354 | } | |
355 | } | |
356 | ||
cfa7f521 | 357 | static void wbsd_send_command(struct wbsd_host *host, struct mmc_command *cmd) |
1da177e4 LT |
358 | { |
359 | int i; | |
360 | u8 status, isr; | |
fecf92ba | 361 | |
1da177e4 LT |
362 | /* |
363 | * Clear accumulated ISR. The interrupt routine | |
364 | * will fill this one with events that occur during | |
365 | * transfer. | |
366 | */ | |
367 | host->isr = 0; | |
fecf92ba | 368 | |
1da177e4 LT |
369 | /* |
370 | * Send the command (CRC calculated by host). | |
371 | */ | |
372 | outb(cmd->opcode, host->base + WBSD_CMDR); | |
cfa7f521 | 373 | for (i = 3; i >= 0; i--) |
1da177e4 | 374 | outb((cmd->arg >> (i * 8)) & 0xff, host->base + WBSD_CMDR); |
fecf92ba | 375 | |
17b0429d | 376 | cmd->error = 0; |
fecf92ba | 377 | |
1da177e4 LT |
378 | /* |
379 | * Wait for the request to complete. | |
380 | */ | |
381 | do { | |
382 | status = wbsd_read_index(host, WBSD_IDX_STATUS); | |
383 | } while (status & WBSD_CARDTRAFFIC); | |
384 | ||
385 | /* | |
386 | * Do we expect a reply? | |
387 | */ | |
e9225176 | 388 | if (cmd->flags & MMC_RSP_PRESENT) { |
1da177e4 LT |
389 | /* |
390 | * Read back status. | |
391 | */ | |
392 | isr = host->isr; | |
fecf92ba | 393 | |
1da177e4 LT |
394 | /* Card removed? */ |
395 | if (isr & WBSD_INT_CARD) | |
17b0429d | 396 | cmd->error = -ENOMEDIUM; |
1da177e4 LT |
397 | /* Timeout? */ |
398 | else if (isr & WBSD_INT_TIMEOUT) | |
17b0429d | 399 | cmd->error = -ETIMEDOUT; |
1da177e4 LT |
400 | /* CRC? */ |
401 | else if ((cmd->flags & MMC_RSP_CRC) && (isr & WBSD_INT_CRC)) | |
17b0429d | 402 | cmd->error = -EILSEQ; |
1da177e4 | 403 | /* All ok */ |
cfa7f521 | 404 | else { |
e9225176 | 405 | if (cmd->flags & MMC_RSP_136) |
1da177e4 | 406 | wbsd_get_long_reply(host, cmd); |
e9225176 RK |
407 | else |
408 | wbsd_get_short_reply(host, cmd); | |
1da177e4 LT |
409 | } |
410 | } | |
1da177e4 LT |
411 | } |
412 | ||
413 | /* | |
414 | * Data functions | |
415 | */ | |
416 | ||
cfa7f521 | 417 | static void wbsd_empty_fifo(struct wbsd_host *host) |
1da177e4 | 418 | { |
cfa7f521 PO |
419 | struct mmc_data *data = host->mrq->cmd->data; |
420 | char *buffer; | |
1da177e4 | 421 | int i, fsr, fifo; |
fecf92ba | 422 | |
1da177e4 LT |
423 | /* |
424 | * Handle excessive data. | |
425 | */ | |
14d836e7 | 426 | if (host->num_sg == 0) |
1da177e4 | 427 | return; |
fecf92ba | 428 | |
4a0ddbd2 | 429 | buffer = wbsd_sg_to_buffer(host) + host->offset; |
1da177e4 LT |
430 | |
431 | /* | |
432 | * Drain the fifo. This has a tendency to loop longer | |
433 | * than the FIFO length (usually one block). | |
434 | */ | |
cfa7f521 | 435 | while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_EMPTY)) { |
1da177e4 LT |
436 | /* |
437 | * The size field in the FSR is broken so we have to | |
438 | * do some guessing. | |
fecf92ba | 439 | */ |
1da177e4 LT |
440 | if (fsr & WBSD_FIFO_FULL) |
441 | fifo = 16; | |
442 | else if (fsr & WBSD_FIFO_FUTHRE) | |
443 | fifo = 8; | |
444 | else | |
445 | fifo = 1; | |
fecf92ba | 446 | |
cfa7f521 | 447 | for (i = 0; i < fifo; i++) { |
1da177e4 LT |
448 | *buffer = inb(host->base + WBSD_DFR); |
449 | buffer++; | |
450 | host->offset++; | |
451 | host->remain--; | |
452 | ||
453 | data->bytes_xfered++; | |
fecf92ba | 454 | |
1da177e4 LT |
455 | /* |
456 | * End of scatter list entry? | |
457 | */ | |
cfa7f521 | 458 | if (host->remain == 0) { |
1da177e4 LT |
459 | /* |
460 | * Get next entry. Check if last. | |
461 | */ | |
14d836e7 | 462 | if (!wbsd_next_sg(host)) |
1da177e4 | 463 | return; |
fecf92ba | 464 | |
4a0ddbd2 | 465 | buffer = wbsd_sg_to_buffer(host); |
1da177e4 LT |
466 | } |
467 | } | |
468 | } | |
fecf92ba | 469 | |
1da177e4 LT |
470 | /* |
471 | * This is a very dirty hack to solve a | |
472 | * hardware problem. The chip doesn't trigger | |
473 | * FIFO threshold interrupts properly. | |
474 | */ | |
14d836e7 | 475 | if ((data->blocks * data->blksz - data->bytes_xfered) < 16) |
1da177e4 LT |
476 | tasklet_schedule(&host->fifo_tasklet); |
477 | } | |
478 | ||
cfa7f521 | 479 | static void wbsd_fill_fifo(struct wbsd_host *host) |
1da177e4 | 480 | { |
cfa7f521 PO |
481 | struct mmc_data *data = host->mrq->cmd->data; |
482 | char *buffer; | |
1da177e4 | 483 | int i, fsr, fifo; |
fecf92ba | 484 | |
1da177e4 LT |
485 | /* |
486 | * Check that we aren't being called after the | |
25985edc | 487 | * entire buffer has been transferred. |
1da177e4 | 488 | */ |
14d836e7 | 489 | if (host->num_sg == 0) |
1da177e4 LT |
490 | return; |
491 | ||
4a0ddbd2 | 492 | buffer = wbsd_sg_to_buffer(host) + host->offset; |
1da177e4 LT |
493 | |
494 | /* | |
495 | * Fill the fifo. This has a tendency to loop longer | |
496 | * than the FIFO length (usually one block). | |
497 | */ | |
cfa7f521 | 498 | while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_FULL)) { |
1da177e4 LT |
499 | /* |
500 | * The size field in the FSR is broken so we have to | |
501 | * do some guessing. | |
fecf92ba | 502 | */ |
1da177e4 LT |
503 | if (fsr & WBSD_FIFO_EMPTY) |
504 | fifo = 0; | |
505 | else if (fsr & WBSD_FIFO_EMTHRE) | |
506 | fifo = 8; | |
507 | else | |
508 | fifo = 15; | |
509 | ||
cfa7f521 | 510 | for (i = 16; i > fifo; i--) { |
1da177e4 LT |
511 | outb(*buffer, host->base + WBSD_DFR); |
512 | buffer++; | |
513 | host->offset++; | |
514 | host->remain--; | |
fecf92ba | 515 | |
1da177e4 | 516 | data->bytes_xfered++; |
fecf92ba | 517 | |
1da177e4 LT |
518 | /* |
519 | * End of scatter list entry? | |
520 | */ | |
cfa7f521 | 521 | if (host->remain == 0) { |
1da177e4 LT |
522 | /* |
523 | * Get next entry. Check if last. | |
524 | */ | |
14d836e7 | 525 | if (!wbsd_next_sg(host)) |
1da177e4 | 526 | return; |
fecf92ba | 527 | |
4a0ddbd2 | 528 | buffer = wbsd_sg_to_buffer(host); |
1da177e4 LT |
529 | } |
530 | } | |
531 | } | |
fecf92ba | 532 | |
85bcc130 PO |
533 | /* |
534 | * The controller stops sending interrupts for | |
535 | * 'FIFO empty' under certain conditions. So we | |
536 | * need to be a bit more pro-active. | |
537 | */ | |
538 | tasklet_schedule(&host->fifo_tasklet); | |
1da177e4 LT |
539 | } |
540 | ||
cfa7f521 | 541 | static void wbsd_prepare_data(struct wbsd_host *host, struct mmc_data *data) |
1da177e4 LT |
542 | { |
543 | u16 blksize; | |
544 | u8 setup; | |
545 | unsigned long dmaflags; | |
14d836e7 | 546 | unsigned int size; |
1da177e4 | 547 | |
1da177e4 LT |
548 | /* |
549 | * Calculate size. | |
550 | */ | |
14d836e7 | 551 | size = data->blocks * data->blksz; |
1da177e4 LT |
552 | |
553 | /* | |
554 | * Check timeout values for overflow. | |
555 | * (Yes, some cards cause this value to overflow). | |
556 | */ | |
557 | if (data->timeout_ns > 127000000) | |
558 | wbsd_write_index(host, WBSD_IDX_TAAC, 127); | |
cfa7f521 PO |
559 | else { |
560 | wbsd_write_index(host, WBSD_IDX_TAAC, | |
561 | data->timeout_ns / 1000000); | |
562 | } | |
fecf92ba | 563 | |
1da177e4 LT |
564 | if (data->timeout_clks > 255) |
565 | wbsd_write_index(host, WBSD_IDX_NSAC, 255); | |
566 | else | |
567 | wbsd_write_index(host, WBSD_IDX_NSAC, data->timeout_clks); | |
fecf92ba | 568 | |
1da177e4 LT |
569 | /* |
570 | * Inform the chip of how large blocks will be | |
571 | * sent. It needs this to determine when to | |
572 | * calculate CRC. | |
573 | * | |
574 | * Space for CRC must be included in the size. | |
65ae2118 | 575 | * Two bytes are needed for each data line. |
1da177e4 | 576 | */ |
cfa7f521 | 577 | if (host->bus_width == MMC_BUS_WIDTH_1) { |
2c171bf1 | 578 | blksize = data->blksz + 2; |
65ae2118 PO |
579 | |
580 | wbsd_write_index(host, WBSD_IDX_PBSMSB, (blksize >> 4) & 0xF0); | |
581 | wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF); | |
cfa7f521 | 582 | } else if (host->bus_width == MMC_BUS_WIDTH_4) { |
2c171bf1 | 583 | blksize = data->blksz + 2 * 4; |
fecf92ba | 584 | |
cfa7f521 PO |
585 | wbsd_write_index(host, WBSD_IDX_PBSMSB, |
586 | ((blksize >> 4) & 0xF0) | WBSD_DATA_WIDTH); | |
65ae2118 | 587 | wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF); |
cfa7f521 | 588 | } else { |
17b0429d | 589 | data->error = -EINVAL; |
65ae2118 PO |
590 | return; |
591 | } | |
1da177e4 LT |
592 | |
593 | /* | |
594 | * Clear the FIFO. This is needed even for DMA | |
595 | * transfers since the chip still uses the FIFO | |
596 | * internally. | |
597 | */ | |
598 | setup = wbsd_read_index(host, WBSD_IDX_SETUP); | |
599 | setup |= WBSD_FIFO_RESET; | |
600 | wbsd_write_index(host, WBSD_IDX_SETUP, setup); | |
fecf92ba | 601 | |
1da177e4 LT |
602 | /* |
603 | * DMA transfer? | |
604 | */ | |
cfa7f521 | 605 | if (host->dma >= 0) { |
1da177e4 LT |
606 | /* |
607 | * The buffer for DMA is only 64 kB. | |
608 | */ | |
14d836e7 AD |
609 | BUG_ON(size > 0x10000); |
610 | if (size > 0x10000) { | |
17b0429d | 611 | data->error = -EINVAL; |
1da177e4 LT |
612 | return; |
613 | } | |
fecf92ba | 614 | |
1da177e4 LT |
615 | /* |
616 | * Transfer data from the SG list to | |
617 | * the DMA buffer. | |
618 | */ | |
619 | if (data->flags & MMC_DATA_WRITE) | |
620 | wbsd_sg_to_dma(host, data); | |
fecf92ba | 621 | |
1da177e4 LT |
622 | /* |
623 | * Initialise the ISA DMA controller. | |
fecf92ba | 624 | */ |
1da177e4 LT |
625 | dmaflags = claim_dma_lock(); |
626 | disable_dma(host->dma); | |
627 | clear_dma_ff(host->dma); | |
628 | if (data->flags & MMC_DATA_READ) | |
629 | set_dma_mode(host->dma, DMA_MODE_READ & ~0x40); | |
630 | else | |
631 | set_dma_mode(host->dma, DMA_MODE_WRITE & ~0x40); | |
632 | set_dma_addr(host->dma, host->dma_addr); | |
14d836e7 | 633 | set_dma_count(host->dma, size); |
1da177e4 LT |
634 | |
635 | enable_dma(host->dma); | |
636 | release_dma_lock(dmaflags); | |
637 | ||
638 | /* | |
639 | * Enable DMA on the host. | |
640 | */ | |
641 | wbsd_write_index(host, WBSD_IDX_DMA, WBSD_DMA_ENABLE); | |
cfa7f521 | 642 | } else { |
1da177e4 LT |
643 | /* |
644 | * This flag is used to keep printk | |
645 | * output to a minimum. | |
646 | */ | |
647 | host->firsterr = 1; | |
fecf92ba | 648 | |
1da177e4 LT |
649 | /* |
650 | * Initialise the SG list. | |
651 | */ | |
652 | wbsd_init_sg(host, data); | |
fecf92ba | 653 | |
1da177e4 LT |
654 | /* |
655 | * Turn off DMA. | |
656 | */ | |
657 | wbsd_write_index(host, WBSD_IDX_DMA, 0); | |
fecf92ba | 658 | |
1da177e4 LT |
659 | /* |
660 | * Set up FIFO threshold levels (and fill | |
661 | * buffer if doing a write). | |
662 | */ | |
cfa7f521 | 663 | if (data->flags & MMC_DATA_READ) { |
1da177e4 LT |
664 | wbsd_write_index(host, WBSD_IDX_FIFOEN, |
665 | WBSD_FIFOEN_FULL | 8); | |
cfa7f521 | 666 | } else { |
1da177e4 LT |
667 | wbsd_write_index(host, WBSD_IDX_FIFOEN, |
668 | WBSD_FIFOEN_EMPTY | 8); | |
669 | wbsd_fill_fifo(host); | |
670 | } | |
fecf92ba PO |
671 | } |
672 | ||
17b0429d | 673 | data->error = 0; |
1da177e4 LT |
674 | } |
675 | ||
cfa7f521 | 676 | static void wbsd_finish_data(struct wbsd_host *host, struct mmc_data *data) |
1da177e4 LT |
677 | { |
678 | unsigned long dmaflags; | |
679 | int count; | |
680 | u8 status; | |
fecf92ba | 681 | |
1da177e4 LT |
682 | WARN_ON(host->mrq == NULL); |
683 | ||
684 | /* | |
685 | * Send a stop command if needed. | |
686 | */ | |
687 | if (data->stop) | |
688 | wbsd_send_command(host, data->stop); | |
689 | ||
690 | /* | |
691 | * Wait for the controller to leave data | |
692 | * transfer state. | |
693 | */ | |
cfa7f521 | 694 | do { |
1da177e4 LT |
695 | status = wbsd_read_index(host, WBSD_IDX_STATUS); |
696 | } while (status & (WBSD_BLOCK_READ | WBSD_BLOCK_WRITE)); | |
fecf92ba | 697 | |
1da177e4 LT |
698 | /* |
699 | * DMA transfer? | |
700 | */ | |
cfa7f521 | 701 | if (host->dma >= 0) { |
1da177e4 LT |
702 | /* |
703 | * Disable DMA on the host. | |
704 | */ | |
705 | wbsd_write_index(host, WBSD_IDX_DMA, 0); | |
fecf92ba | 706 | |
1da177e4 LT |
707 | /* |
708 | * Turn of ISA DMA controller. | |
709 | */ | |
710 | dmaflags = claim_dma_lock(); | |
711 | disable_dma(host->dma); | |
712 | clear_dma_ff(host->dma); | |
713 | count = get_dma_residue(host->dma); | |
714 | release_dma_lock(dmaflags); | |
fecf92ba | 715 | |
14d836e7 AD |
716 | data->bytes_xfered = host->mrq->data->blocks * |
717 | host->mrq->data->blksz - count; | |
718 | data->bytes_xfered -= data->bytes_xfered % data->blksz; | |
719 | ||
1da177e4 LT |
720 | /* |
721 | * Any leftover data? | |
722 | */ | |
cfa7f521 | 723 | if (count) { |
a3c76eb9 | 724 | pr_err("%s: Incomplete DMA transfer. " |
d191634f PO |
725 | "%d bytes left.\n", |
726 | mmc_hostname(host->mmc), count); | |
fecf92ba | 727 | |
17b0429d PO |
728 | if (!data->error) |
729 | data->error = -EIO; | |
cfa7f521 | 730 | } else { |
1da177e4 LT |
731 | /* |
732 | * Transfer data from DMA buffer to | |
733 | * SG list. | |
734 | */ | |
735 | if (data->flags & MMC_DATA_READ) | |
736 | wbsd_dma_to_sg(host, data); | |
14d836e7 | 737 | } |
fecf92ba | 738 | |
17b0429d | 739 | if (data->error) { |
14d836e7 AD |
740 | if (data->bytes_xfered) |
741 | data->bytes_xfered -= data->blksz; | |
1da177e4 LT |
742 | } |
743 | } | |
fecf92ba | 744 | |
1da177e4 LT |
745 | wbsd_request_end(host, host->mrq); |
746 | } | |
747 | ||
85bcc130 PO |
748 | /*****************************************************************************\ |
749 | * * | |
750 | * MMC layer callbacks * | |
751 | * * | |
752 | \*****************************************************************************/ | |
1da177e4 | 753 | |
cfa7f521 | 754 | static void wbsd_request(struct mmc_host *mmc, struct mmc_request *mrq) |
1da177e4 | 755 | { |
cfa7f521 PO |
756 | struct wbsd_host *host = mmc_priv(mmc); |
757 | struct mmc_command *cmd; | |
1da177e4 LT |
758 | |
759 | /* | |
760 | * Disable tasklets to avoid a deadlock. | |
761 | */ | |
762 | spin_lock_bh(&host->lock); | |
763 | ||
764 | BUG_ON(host->mrq != NULL); | |
765 | ||
766 | cmd = mrq->cmd; | |
767 | ||
768 | host->mrq = mrq; | |
fecf92ba | 769 | |
1da177e4 | 770 | /* |
17b0429d | 771 | * Check that there is actually a card in the slot. |
1da177e4 | 772 | */ |
cfa7f521 | 773 | if (!(host->flags & WBSD_FCARD_PRESENT)) { |
17b0429d | 774 | cmd->error = -ENOMEDIUM; |
1da177e4 LT |
775 | goto done; |
776 | } | |
777 | ||
cfa7f521 | 778 | if (cmd->data) { |
5ba593a9 PO |
779 | /* |
780 | * The hardware is so delightfully stupid that it has a list | |
781 | * of "data" commands. If a command isn't on this list, it'll | |
782 | * just go back to the idle state and won't send any data | |
783 | * interrupts. | |
784 | */ | |
785 | switch (cmd->opcode) { | |
786 | case 11: | |
787 | case 17: | |
788 | case 18: | |
789 | case 20: | |
790 | case 24: | |
791 | case 25: | |
792 | case 26: | |
793 | case 27: | |
794 | case 30: | |
795 | case 42: | |
796 | case 56: | |
797 | break; | |
798 | ||
799 | /* ACMDs. We don't keep track of state, so we just treat them | |
800 | * like any other command. */ | |
801 | case 51: | |
802 | break; | |
803 | ||
804 | default: | |
6606110d | 805 | pr_warn("%s: Data command %d is not supported by this controller\n", |
5ba593a9 | 806 | mmc_hostname(host->mmc), cmd->opcode); |
17b0429d | 807 | cmd->error = -EINVAL; |
5ba593a9 PO |
808 | |
809 | goto done; | |
17a90539 | 810 | } |
b2670b1c | 811 | } |
5ba593a9 | 812 | |
b2670b1c PO |
813 | /* |
814 | * Does the request include data? | |
815 | */ | |
816 | if (cmd->data) { | |
817 | wbsd_prepare_data(host, cmd->data); | |
818 | ||
17b0429d | 819 | if (cmd->data->error) |
b2670b1c PO |
820 | goto done; |
821 | } | |
822 | ||
823 | wbsd_send_command(host, cmd); | |
824 | ||
825 | /* | |
826 | * If this is a data transfer the request | |
827 | * will be finished after the data has | |
25985edc | 828 | * transferred. |
b2670b1c | 829 | */ |
17b0429d | 830 | if (cmd->data && !cmd->error) { |
1da177e4 LT |
831 | /* |
832 | * Dirty fix for hardware bug. | |
833 | */ | |
834 | if (host->dma == -1) | |
835 | tasklet_schedule(&host->fifo_tasklet); | |
836 | ||
837 | spin_unlock_bh(&host->lock); | |
838 | ||
839 | return; | |
840 | } | |
fecf92ba | 841 | |
1da177e4 LT |
842 | done: |
843 | wbsd_request_end(host, mrq); | |
844 | ||
845 | spin_unlock_bh(&host->lock); | |
846 | } | |
847 | ||
cfa7f521 | 848 | static void wbsd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) |
1da177e4 | 849 | { |
cfa7f521 | 850 | struct wbsd_host *host = mmc_priv(mmc); |
1da177e4 | 851 | u8 clk, setup, pwr; |
fecf92ba | 852 | |
1da177e4 LT |
853 | spin_lock_bh(&host->lock); |
854 | ||
855 | /* | |
856 | * Reset the chip on each power off. | |
857 | * Should clear out any weird states. | |
858 | */ | |
859 | if (ios->power_mode == MMC_POWER_OFF) | |
860 | wbsd_init_device(host); | |
fecf92ba | 861 | |
1da177e4 LT |
862 | if (ios->clock >= 24000000) |
863 | clk = WBSD_CLK_24M; | |
864 | else if (ios->clock >= 16000000) | |
865 | clk = WBSD_CLK_16M; | |
866 | else if (ios->clock >= 12000000) | |
867 | clk = WBSD_CLK_12M; | |
868 | else | |
869 | clk = WBSD_CLK_375K; | |
870 | ||
871 | /* | |
872 | * Only write to the clock register when | |
873 | * there is an actual change. | |
874 | */ | |
cfa7f521 | 875 | if (clk != host->clk) { |
1da177e4 LT |
876 | wbsd_write_index(host, WBSD_IDX_CLK, clk); |
877 | host->clk = clk; | |
878 | } | |
879 | ||
85bcc130 PO |
880 | /* |
881 | * Power up card. | |
882 | */ | |
cfa7f521 | 883 | if (ios->power_mode != MMC_POWER_OFF) { |
1da177e4 LT |
884 | pwr = inb(host->base + WBSD_CSR); |
885 | pwr &= ~WBSD_POWER_N; | |
886 | outb(pwr, host->base + WBSD_CSR); | |
1da177e4 LT |
887 | } |
888 | ||
85bcc130 PO |
889 | /* |
890 | * MMC cards need to have pin 1 high during init. | |
85bcc130 | 891 | * It wreaks havoc with the card detection though so |
1656fa57 | 892 | * that needs to be disabled. |
85bcc130 PO |
893 | */ |
894 | setup = wbsd_read_index(host, WBSD_IDX_SETUP); | |
cfa7f521 | 895 | if (ios->chip_select == MMC_CS_HIGH) { |
65ae2118 | 896 | BUG_ON(ios->bus_width != MMC_BUS_WIDTH_1); |
85bcc130 PO |
897 | setup |= WBSD_DAT3_H; |
898 | host->flags |= WBSD_FIGNORE_DETECT; | |
cfa7f521 PO |
899 | } else { |
900 | if (setup & WBSD_DAT3_H) { | |
19c1f3ca | 901 | setup &= ~WBSD_DAT3_H; |
1656fa57 | 902 | |
19c1f3ca | 903 | /* |
25985edc | 904 | * We cannot resume card detection immediately |
19c1f3ca PO |
905 | * because of capacitance and delays in the chip. |
906 | */ | |
cfa7f521 | 907 | mod_timer(&host->ignore_timer, jiffies + HZ / 100); |
19c1f3ca | 908 | } |
85bcc130 PO |
909 | } |
910 | wbsd_write_index(host, WBSD_IDX_SETUP, setup); | |
fecf92ba | 911 | |
65ae2118 PO |
912 | /* |
913 | * Store bus width for later. Will be used when | |
914 | * setting up the data transfer. | |
915 | */ | |
916 | host->bus_width = ios->bus_width; | |
917 | ||
1da177e4 LT |
918 | spin_unlock_bh(&host->lock); |
919 | } | |
920 | ||
cfa7f521 | 921 | static int wbsd_get_ro(struct mmc_host *mmc) |
65ae2118 | 922 | { |
cfa7f521 | 923 | struct wbsd_host *host = mmc_priv(mmc); |
65ae2118 PO |
924 | u8 csr; |
925 | ||
926 | spin_lock_bh(&host->lock); | |
927 | ||
928 | csr = inb(host->base + WBSD_CSR); | |
929 | csr |= WBSD_MSLED; | |
930 | outb(csr, host->base + WBSD_CSR); | |
931 | ||
932 | mdelay(1); | |
933 | ||
934 | csr = inb(host->base + WBSD_CSR); | |
935 | csr &= ~WBSD_MSLED; | |
936 | outb(csr, host->base + WBSD_CSR); | |
937 | ||
938 | spin_unlock_bh(&host->lock); | |
939 | ||
08f80bb5 | 940 | return !!(csr & WBSD_WRPT); |
65ae2118 PO |
941 | } |
942 | ||
ab7aefd0 | 943 | static const struct mmc_host_ops wbsd_ops = { |
85bcc130 PO |
944 | .request = wbsd_request, |
945 | .set_ios = wbsd_set_ios, | |
65ae2118 | 946 | .get_ro = wbsd_get_ro, |
85bcc130 PO |
947 | }; |
948 | ||
949 | /*****************************************************************************\ | |
950 | * * | |
951 | * Interrupt handling * | |
952 | * * | |
953 | \*****************************************************************************/ | |
954 | ||
1656fa57 PO |
955 | /* |
956 | * Helper function to reset detection ignore | |
957 | */ | |
958 | ||
959 | static void wbsd_reset_ignore(unsigned long data) | |
960 | { | |
cfa7f521 | 961 | struct wbsd_host *host = (struct wbsd_host *)data; |
1656fa57 PO |
962 | |
963 | BUG_ON(host == NULL); | |
964 | ||
965 | DBG("Resetting card detection ignore\n"); | |
966 | ||
967 | spin_lock_bh(&host->lock); | |
968 | ||
969 | host->flags &= ~WBSD_FIGNORE_DETECT; | |
970 | ||
971 | /* | |
972 | * Card status might have changed during the | |
973 | * blackout. | |
974 | */ | |
975 | tasklet_schedule(&host->card_tasklet); | |
976 | ||
977 | spin_unlock_bh(&host->lock); | |
978 | } | |
979 | ||
1da177e4 LT |
980 | /* |
981 | * Tasklets | |
982 | */ | |
983 | ||
cfa7f521 | 984 | static inline struct mmc_data *wbsd_get_data(struct wbsd_host *host) |
1da177e4 LT |
985 | { |
986 | WARN_ON(!host->mrq); | |
987 | if (!host->mrq) | |
988 | return NULL; | |
989 | ||
990 | WARN_ON(!host->mrq->cmd); | |
991 | if (!host->mrq->cmd) | |
992 | return NULL; | |
993 | ||
994 | WARN_ON(!host->mrq->cmd->data); | |
995 | if (!host->mrq->cmd->data) | |
996 | return NULL; | |
fecf92ba | 997 | |
1da177e4 LT |
998 | return host->mrq->cmd->data; |
999 | } | |
1000 | ||
1001 | static void wbsd_tasklet_card(unsigned long param) | |
1002 | { | |
cfa7f521 | 1003 | struct wbsd_host *host = (struct wbsd_host *)param; |
1da177e4 | 1004 | u8 csr; |
210ce2a7 | 1005 | int delay = -1; |
fecf92ba | 1006 | |
1da177e4 | 1007 | spin_lock(&host->lock); |
fecf92ba | 1008 | |
cfa7f521 | 1009 | if (host->flags & WBSD_FIGNORE_DETECT) { |
85bcc130 PO |
1010 | spin_unlock(&host->lock); |
1011 | return; | |
1012 | } | |
fecf92ba | 1013 | |
1da177e4 LT |
1014 | csr = inb(host->base + WBSD_CSR); |
1015 | WARN_ON(csr == 0xff); | |
fecf92ba | 1016 | |
cfa7f521 PO |
1017 | if (csr & WBSD_CARDPRESENT) { |
1018 | if (!(host->flags & WBSD_FCARD_PRESENT)) { | |
85bcc130 PO |
1019 | DBG("Card inserted\n"); |
1020 | host->flags |= WBSD_FCARD_PRESENT; | |
fecf92ba | 1021 | |
210ce2a7 | 1022 | delay = 500; |
85bcc130 | 1023 | } |
cfa7f521 | 1024 | } else if (host->flags & WBSD_FCARD_PRESENT) { |
1da177e4 | 1025 | DBG("Card removed\n"); |
85bcc130 | 1026 | host->flags &= ~WBSD_FCARD_PRESENT; |
fecf92ba | 1027 | |
cfa7f521 | 1028 | if (host->mrq) { |
a3c76eb9 | 1029 | pr_err("%s: Card removed during transfer!\n", |
d191634f | 1030 | mmc_hostname(host->mmc)); |
1da177e4 | 1031 | wbsd_reset(host); |
fecf92ba | 1032 | |
17b0429d | 1033 | host->mrq->cmd->error = -ENOMEDIUM; |
1da177e4 LT |
1034 | tasklet_schedule(&host->finish_tasklet); |
1035 | } | |
fecf92ba | 1036 | |
210ce2a7 | 1037 | delay = 0; |
6e6293dd | 1038 | } |
210ce2a7 PO |
1039 | |
1040 | /* | |
1041 | * Unlock first since we might get a call back. | |
1042 | */ | |
1043 | ||
1044 | spin_unlock(&host->lock); | |
1045 | ||
1046 | if (delay != -1) | |
1047 | mmc_detect_change(host->mmc, msecs_to_jiffies(delay)); | |
1da177e4 LT |
1048 | } |
1049 | ||
1050 | static void wbsd_tasklet_fifo(unsigned long param) | |
1051 | { | |
cfa7f521 PO |
1052 | struct wbsd_host *host = (struct wbsd_host *)param; |
1053 | struct mmc_data *data; | |
fecf92ba | 1054 | |
1da177e4 | 1055 | spin_lock(&host->lock); |
fecf92ba | 1056 | |
1da177e4 LT |
1057 | if (!host->mrq) |
1058 | goto end; | |
fecf92ba | 1059 | |
1da177e4 LT |
1060 | data = wbsd_get_data(host); |
1061 | if (!data) | |
1062 | goto end; | |
1063 | ||
1064 | if (data->flags & MMC_DATA_WRITE) | |
1065 | wbsd_fill_fifo(host); | |
1066 | else | |
1067 | wbsd_empty_fifo(host); | |
1068 | ||
1069 | /* | |
1070 | * Done? | |
1071 | */ | |
14d836e7 | 1072 | if (host->num_sg == 0) { |
1da177e4 LT |
1073 | wbsd_write_index(host, WBSD_IDX_FIFOEN, 0); |
1074 | tasklet_schedule(&host->finish_tasklet); | |
1075 | } | |
1076 | ||
fecf92ba | 1077 | end: |
1da177e4 LT |
1078 | spin_unlock(&host->lock); |
1079 | } | |
1080 | ||
1081 | static void wbsd_tasklet_crc(unsigned long param) | |
1082 | { | |
cfa7f521 PO |
1083 | struct wbsd_host *host = (struct wbsd_host *)param; |
1084 | struct mmc_data *data; | |
fecf92ba | 1085 | |
1da177e4 | 1086 | spin_lock(&host->lock); |
fecf92ba | 1087 | |
1da177e4 LT |
1088 | if (!host->mrq) |
1089 | goto end; | |
fecf92ba | 1090 | |
1da177e4 LT |
1091 | data = wbsd_get_data(host); |
1092 | if (!data) | |
1093 | goto end; | |
fecf92ba | 1094 | |
1da177e4 LT |
1095 | DBGF("CRC error\n"); |
1096 | ||
17b0429d | 1097 | data->error = -EILSEQ; |
fecf92ba | 1098 | |
1da177e4 LT |
1099 | tasklet_schedule(&host->finish_tasklet); |
1100 | ||
fecf92ba | 1101 | end: |
1da177e4 LT |
1102 | spin_unlock(&host->lock); |
1103 | } | |
1104 | ||
1105 | static void wbsd_tasklet_timeout(unsigned long param) | |
1106 | { | |
cfa7f521 PO |
1107 | struct wbsd_host *host = (struct wbsd_host *)param; |
1108 | struct mmc_data *data; | |
fecf92ba | 1109 | |
1da177e4 | 1110 | spin_lock(&host->lock); |
fecf92ba | 1111 | |
1da177e4 LT |
1112 | if (!host->mrq) |
1113 | goto end; | |
fecf92ba | 1114 | |
1da177e4 LT |
1115 | data = wbsd_get_data(host); |
1116 | if (!data) | |
1117 | goto end; | |
fecf92ba | 1118 | |
1da177e4 LT |
1119 | DBGF("Timeout\n"); |
1120 | ||
17b0429d | 1121 | data->error = -ETIMEDOUT; |
fecf92ba | 1122 | |
1da177e4 LT |
1123 | tasklet_schedule(&host->finish_tasklet); |
1124 | ||
fecf92ba | 1125 | end: |
1da177e4 LT |
1126 | spin_unlock(&host->lock); |
1127 | } | |
1128 | ||
1129 | static void wbsd_tasklet_finish(unsigned long param) | |
1130 | { | |
cfa7f521 PO |
1131 | struct wbsd_host *host = (struct wbsd_host *)param; |
1132 | struct mmc_data *data; | |
fecf92ba | 1133 | |
1da177e4 | 1134 | spin_lock(&host->lock); |
fecf92ba | 1135 | |
1da177e4 LT |
1136 | WARN_ON(!host->mrq); |
1137 | if (!host->mrq) | |
1138 | goto end; | |
fecf92ba | 1139 | |
1da177e4 LT |
1140 | data = wbsd_get_data(host); |
1141 | if (!data) | |
1142 | goto end; | |
1143 | ||
1144 | wbsd_finish_data(host, data); | |
fecf92ba PO |
1145 | |
1146 | end: | |
1da177e4 LT |
1147 | spin_unlock(&host->lock); |
1148 | } | |
1149 | ||
1da177e4 LT |
1150 | /* |
1151 | * Interrupt handling | |
1152 | */ | |
1153 | ||
7d12e780 | 1154 | static irqreturn_t wbsd_irq(int irq, void *dev_id) |
1da177e4 | 1155 | { |
cfa7f521 | 1156 | struct wbsd_host *host = dev_id; |
1da177e4 | 1157 | int isr; |
fecf92ba | 1158 | |
1da177e4 LT |
1159 | isr = inb(host->base + WBSD_ISR); |
1160 | ||
1161 | /* | |
1162 | * Was it actually our hardware that caused the interrupt? | |
1163 | */ | |
1164 | if (isr == 0xff || isr == 0x00) | |
1165 | return IRQ_NONE; | |
fecf92ba | 1166 | |
1da177e4 LT |
1167 | host->isr |= isr; |
1168 | ||
1169 | /* | |
1170 | * Schedule tasklets as needed. | |
1171 | */ | |
1172 | if (isr & WBSD_INT_CARD) | |
1173 | tasklet_schedule(&host->card_tasklet); | |
1174 | if (isr & WBSD_INT_FIFO_THRE) | |
1175 | tasklet_schedule(&host->fifo_tasklet); | |
1176 | if (isr & WBSD_INT_CRC) | |
1177 | tasklet_hi_schedule(&host->crc_tasklet); | |
1178 | if (isr & WBSD_INT_TIMEOUT) | |
1179 | tasklet_hi_schedule(&host->timeout_tasklet); | |
1da177e4 LT |
1180 | if (isr & WBSD_INT_TC) |
1181 | tasklet_schedule(&host->finish_tasklet); | |
fecf92ba | 1182 | |
1da177e4 LT |
1183 | return IRQ_HANDLED; |
1184 | } | |
1185 | ||
85bcc130 PO |
1186 | /*****************************************************************************\ |
1187 | * * | |
1188 | * Device initialisation and shutdown * | |
1189 | * * | |
1190 | \*****************************************************************************/ | |
1191 | ||
1da177e4 | 1192 | /* |
85bcc130 | 1193 | * Allocate/free MMC structure. |
1da177e4 LT |
1194 | */ |
1195 | ||
c3be1efd | 1196 | static int wbsd_alloc_mmc(struct device *dev) |
85bcc130 | 1197 | { |
cfa7f521 PO |
1198 | struct mmc_host *mmc; |
1199 | struct wbsd_host *host; | |
fecf92ba | 1200 | |
85bcc130 PO |
1201 | /* |
1202 | * Allocate MMC structure. | |
1203 | */ | |
1204 | mmc = mmc_alloc_host(sizeof(struct wbsd_host), dev); | |
1205 | if (!mmc) | |
1206 | return -ENOMEM; | |
fecf92ba | 1207 | |
85bcc130 PO |
1208 | host = mmc_priv(mmc); |
1209 | host->mmc = mmc; | |
1210 | ||
1211 | host->dma = -1; | |
1212 | ||
1213 | /* | |
1214 | * Set host parameters. | |
1215 | */ | |
1216 | mmc->ops = &wbsd_ops; | |
1217 | mmc->f_min = 375000; | |
1218 | mmc->f_max = 24000000; | |
cfa7f521 | 1219 | mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; |
23af6039 | 1220 | mmc->caps = MMC_CAP_4_BIT_DATA; |
fecf92ba | 1221 | |
85bcc130 | 1222 | spin_lock_init(&host->lock); |
fecf92ba | 1223 | |
6e6293dd | 1224 | /* |
1656fa57 | 1225 | * Set up timers |
6e6293dd | 1226 | */ |
ec32e106 A |
1227 | setup_timer(&host->ignore_timer, wbsd_reset_ignore, |
1228 | (unsigned long)host); | |
fecf92ba | 1229 | |
85bcc130 PO |
1230 | /* |
1231 | * Maximum number of segments. Worst case is one sector per segment | |
1232 | * so this will be 64kB/512. | |
1233 | */ | |
a36274e0 | 1234 | mmc->max_segs = 128; |
fecf92ba | 1235 | |
85bcc130 | 1236 | /* |
55db890a | 1237 | * Maximum request size. Also limited by 64KiB buffer. |
85bcc130 | 1238 | */ |
55db890a | 1239 | mmc->max_req_size = 65536; |
fecf92ba | 1240 | |
85bcc130 PO |
1241 | /* |
1242 | * Maximum segment size. Could be one segment with the maximum number | |
55db890a | 1243 | * of bytes. |
85bcc130 | 1244 | */ |
55db890a | 1245 | mmc->max_seg_size = mmc->max_req_size; |
fecf92ba | 1246 | |
fe4a3c7a PO |
1247 | /* |
1248 | * Maximum block size. We have 12 bits (= 4095) but have to subtract | |
1249 | * space for CRC. So the maximum is 4095 - 4*2 = 4087. | |
1250 | */ | |
1251 | mmc->max_blk_size = 4087; | |
1252 | ||
55db890a PO |
1253 | /* |
1254 | * Maximum block count. There is no real limit so the maximum | |
1255 | * request size will be the only restriction. | |
1256 | */ | |
1257 | mmc->max_blk_count = mmc->max_req_size; | |
1258 | ||
85bcc130 | 1259 | dev_set_drvdata(dev, mmc); |
fecf92ba | 1260 | |
85bcc130 PO |
1261 | return 0; |
1262 | } | |
1263 | ||
b3627bb1 | 1264 | static void wbsd_free_mmc(struct device *dev) |
85bcc130 | 1265 | { |
cfa7f521 PO |
1266 | struct mmc_host *mmc; |
1267 | struct wbsd_host *host; | |
fecf92ba | 1268 | |
85bcc130 PO |
1269 | mmc = dev_get_drvdata(dev); |
1270 | if (!mmc) | |
1271 | return; | |
fecf92ba | 1272 | |
6e6293dd PO |
1273 | host = mmc_priv(mmc); |
1274 | BUG_ON(host == NULL); | |
fecf92ba | 1275 | |
1656fa57 | 1276 | del_timer_sync(&host->ignore_timer); |
fecf92ba | 1277 | |
85bcc130 | 1278 | mmc_free_host(mmc); |
fecf92ba | 1279 | |
85bcc130 PO |
1280 | dev_set_drvdata(dev, NULL); |
1281 | } | |
1282 | ||
1283 | /* | |
1284 | * Scan for known chip id:s | |
1285 | */ | |
1286 | ||
c3be1efd | 1287 | static int wbsd_scan(struct wbsd_host *host) |
1da177e4 LT |
1288 | { |
1289 | int i, j, k; | |
1290 | int id; | |
fecf92ba | 1291 | |
1da177e4 LT |
1292 | /* |
1293 | * Iterate through all ports, all codes to | |
1294 | * find hardware that is in our known list. | |
1295 | */ | |
63648fb5 | 1296 | for (i = 0; i < ARRAY_SIZE(config_ports); i++) { |
1da177e4 LT |
1297 | if (!request_region(config_ports[i], 2, DRIVER_NAME)) |
1298 | continue; | |
fecf92ba | 1299 | |
63648fb5 | 1300 | for (j = 0; j < ARRAY_SIZE(unlock_codes); j++) { |
1da177e4 | 1301 | id = 0xFFFF; |
fecf92ba | 1302 | |
19c1f3ca PO |
1303 | host->config = config_ports[i]; |
1304 | host->unlock_code = unlock_codes[j]; | |
1305 | ||
1306 | wbsd_unlock_config(host); | |
fecf92ba | 1307 | |
1da177e4 LT |
1308 | outb(WBSD_CONF_ID_HI, config_ports[i]); |
1309 | id = inb(config_ports[i] + 1) << 8; | |
1310 | ||
1311 | outb(WBSD_CONF_ID_LO, config_ports[i]); | |
1312 | id |= inb(config_ports[i] + 1); | |
fecf92ba | 1313 | |
19c1f3ca PO |
1314 | wbsd_lock_config(host); |
1315 | ||
63648fb5 | 1316 | for (k = 0; k < ARRAY_SIZE(valid_ids); k++) { |
cfa7f521 | 1317 | if (id == valid_ids[k]) { |
1da177e4 | 1318 | host->chip_id = id; |
fecf92ba | 1319 | |
1da177e4 LT |
1320 | return 0; |
1321 | } | |
1322 | } | |
fecf92ba | 1323 | |
cfa7f521 | 1324 | if (id != 0xFFFF) { |
1da177e4 LT |
1325 | DBG("Unknown hardware (id %x) found at %x\n", |
1326 | id, config_ports[i]); | |
1327 | } | |
1da177e4 | 1328 | } |
fecf92ba | 1329 | |
1da177e4 LT |
1330 | release_region(config_ports[i], 2); |
1331 | } | |
fecf92ba | 1332 | |
19c1f3ca PO |
1333 | host->config = 0; |
1334 | host->unlock_code = 0; | |
1335 | ||
1da177e4 LT |
1336 | return -ENODEV; |
1337 | } | |
1338 | ||
85bcc130 PO |
1339 | /* |
1340 | * Allocate/free io port ranges | |
1341 | */ | |
1342 | ||
c3be1efd | 1343 | static int wbsd_request_region(struct wbsd_host *host, int base) |
1da177e4 | 1344 | { |
916f3ac6 | 1345 | if (base & 0x7) |
1da177e4 | 1346 | return -EINVAL; |
fecf92ba | 1347 | |
85bcc130 | 1348 | if (!request_region(base, 8, DRIVER_NAME)) |
1da177e4 | 1349 | return -EIO; |
fecf92ba | 1350 | |
916f3ac6 | 1351 | host->base = base; |
fecf92ba | 1352 | |
1da177e4 LT |
1353 | return 0; |
1354 | } | |
1355 | ||
b3627bb1 | 1356 | static void wbsd_release_regions(struct wbsd_host *host) |
1da177e4 LT |
1357 | { |
1358 | if (host->base) | |
1359 | release_region(host->base, 8); | |
fecf92ba | 1360 | |
85bcc130 | 1361 | host->base = 0; |
1da177e4 LT |
1362 | |
1363 | if (host->config) | |
1364 | release_region(host->config, 2); | |
fecf92ba | 1365 | |
85bcc130 | 1366 | host->config = 0; |
1da177e4 LT |
1367 | } |
1368 | ||
85bcc130 PO |
1369 | /* |
1370 | * Allocate/free DMA port and buffer | |
1371 | */ | |
1372 | ||
c3be1efd | 1373 | static void wbsd_request_dma(struct wbsd_host *host, int dma) |
1da177e4 | 1374 | { |
1da177e4 LT |
1375 | if (dma < 0) |
1376 | return; | |
fecf92ba | 1377 | |
1da177e4 LT |
1378 | if (request_dma(dma, DRIVER_NAME)) |
1379 | goto err; | |
fecf92ba | 1380 | |
1da177e4 LT |
1381 | /* |
1382 | * We need to allocate a special buffer in | |
1383 | * order for ISA to be able to DMA to it. | |
1384 | */ | |
85bcc130 | 1385 | host->dma_buffer = kmalloc(WBSD_DMA_SIZE, |
dcda9b04 | 1386 | GFP_NOIO | GFP_DMA | __GFP_RETRY_MAYFAIL | __GFP_NOWARN); |
1da177e4 LT |
1387 | if (!host->dma_buffer) |
1388 | goto free; | |
1389 | ||
1390 | /* | |
1391 | * Translate the address to a physical address. | |
1392 | */ | |
fcaf71fd | 1393 | host->dma_addr = dma_map_single(mmc_dev(host->mmc), host->dma_buffer, |
85bcc130 | 1394 | WBSD_DMA_SIZE, DMA_BIDIRECTIONAL); |
a5488a35 AK |
1395 | if (dma_mapping_error(mmc_dev(host->mmc), host->dma_addr)) |
1396 | goto kfree; | |
fecf92ba | 1397 | |
1da177e4 LT |
1398 | /* |
1399 | * ISA DMA must be aligned on a 64k basis. | |
1400 | */ | |
1401 | if ((host->dma_addr & 0xffff) != 0) | |
a5488a35 | 1402 | goto unmap; |
1da177e4 LT |
1403 | /* |
1404 | * ISA cannot access memory above 16 MB. | |
1405 | */ | |
1406 | else if (host->dma_addr >= 0x1000000) | |
a5488a35 | 1407 | goto unmap; |
1da177e4 LT |
1408 | |
1409 | host->dma = dma; | |
fecf92ba | 1410 | |
1da177e4 | 1411 | return; |
fecf92ba | 1412 | |
a5488a35 | 1413 | unmap: |
1da177e4 LT |
1414 | /* |
1415 | * If we've gotten here then there is some kind of alignment bug | |
1416 | */ | |
1417 | BUG_ON(1); | |
fecf92ba | 1418 | |
fcaf71fd | 1419 | dma_unmap_single(mmc_dev(host->mmc), host->dma_addr, |
cfa7f521 | 1420 | WBSD_DMA_SIZE, DMA_BIDIRECTIONAL); |
97067d55 | 1421 | host->dma_addr = 0; |
fecf92ba | 1422 | |
a5488a35 | 1423 | kfree: |
1da177e4 LT |
1424 | kfree(host->dma_buffer); |
1425 | host->dma_buffer = NULL; | |
1426 | ||
1427 | free: | |
1428 | free_dma(dma); | |
1429 | ||
1430 | err: | |
6606110d JP |
1431 | pr_warn(DRIVER_NAME ": Unable to allocate DMA %d - falling back on FIFO\n", |
1432 | dma); | |
1da177e4 LT |
1433 | } |
1434 | ||
b3627bb1 | 1435 | static void wbsd_release_dma(struct wbsd_host *host) |
85bcc130 | 1436 | { |
e81c022a AK |
1437 | /* |
1438 | * host->dma_addr is valid here iff host->dma_buffer is not NULL. | |
1439 | */ | |
1440 | if (host->dma_buffer) { | |
fcaf71fd | 1441 | dma_unmap_single(mmc_dev(host->mmc), host->dma_addr, |
cfa7f521 | 1442 | WBSD_DMA_SIZE, DMA_BIDIRECTIONAL); |
e81c022a | 1443 | kfree(host->dma_buffer); |
cfa7f521 | 1444 | } |
85bcc130 PO |
1445 | if (host->dma >= 0) |
1446 | free_dma(host->dma); | |
fecf92ba | 1447 | |
85bcc130 PO |
1448 | host->dma = -1; |
1449 | host->dma_buffer = NULL; | |
97067d55 | 1450 | host->dma_addr = 0; |
85bcc130 | 1451 | } |
1da177e4 LT |
1452 | |
1453 | /* | |
85bcc130 | 1454 | * Allocate/free IRQ. |
1da177e4 LT |
1455 | */ |
1456 | ||
c3be1efd | 1457 | static int wbsd_request_irq(struct wbsd_host *host, int irq) |
1da177e4 | 1458 | { |
1da177e4 | 1459 | int ret; |
fecf92ba | 1460 | |
1da177e4 | 1461 | /* |
cef33400 | 1462 | * Set up tasklets. Must be done before requesting interrupt. |
1da177e4 | 1463 | */ |
cfa7f521 PO |
1464 | tasklet_init(&host->card_tasklet, wbsd_tasklet_card, |
1465 | (unsigned long)host); | |
1466 | tasklet_init(&host->fifo_tasklet, wbsd_tasklet_fifo, | |
1467 | (unsigned long)host); | |
1468 | tasklet_init(&host->crc_tasklet, wbsd_tasklet_crc, | |
1469 | (unsigned long)host); | |
1470 | tasklet_init(&host->timeout_tasklet, wbsd_tasklet_timeout, | |
1471 | (unsigned long)host); | |
1472 | tasklet_init(&host->finish_tasklet, wbsd_tasklet_finish, | |
1473 | (unsigned long)host); | |
fecf92ba | 1474 | |
cef33400 CE |
1475 | /* |
1476 | * Allocate interrupt. | |
1477 | */ | |
1478 | ret = request_irq(irq, wbsd_irq, IRQF_SHARED, DRIVER_NAME, host); | |
1479 | if (ret) | |
1480 | return ret; | |
1481 | ||
1482 | host->irq = irq; | |
1483 | ||
85bcc130 PO |
1484 | return 0; |
1485 | } | |
1da177e4 | 1486 | |
b3627bb1 | 1487 | static void wbsd_release_irq(struct wbsd_host *host) |
85bcc130 PO |
1488 | { |
1489 | if (!host->irq) | |
1490 | return; | |
1da177e4 | 1491 | |
85bcc130 | 1492 | free_irq(host->irq, host); |
fecf92ba | 1493 | |
85bcc130 | 1494 | host->irq = 0; |
fecf92ba | 1495 | |
85bcc130 PO |
1496 | tasklet_kill(&host->card_tasklet); |
1497 | tasklet_kill(&host->fifo_tasklet); | |
1498 | tasklet_kill(&host->crc_tasklet); | |
1499 | tasklet_kill(&host->timeout_tasklet); | |
1500 | tasklet_kill(&host->finish_tasklet); | |
85bcc130 PO |
1501 | } |
1502 | ||
1503 | /* | |
1504 | * Allocate all resources for the host. | |
1505 | */ | |
1506 | ||
c3be1efd | 1507 | static int wbsd_request_resources(struct wbsd_host *host, |
85bcc130 PO |
1508 | int base, int irq, int dma) |
1509 | { | |
1510 | int ret; | |
fecf92ba | 1511 | |
1da177e4 LT |
1512 | /* |
1513 | * Allocate I/O ports. | |
1514 | */ | |
85bcc130 | 1515 | ret = wbsd_request_region(host, base); |
1da177e4 | 1516 | if (ret) |
85bcc130 | 1517 | return ret; |
1da177e4 LT |
1518 | |
1519 | /* | |
85bcc130 | 1520 | * Allocate interrupt. |
1da177e4 | 1521 | */ |
85bcc130 PO |
1522 | ret = wbsd_request_irq(host, irq); |
1523 | if (ret) | |
1524 | return ret; | |
1525 | ||
1526 | /* | |
1527 | * Allocate DMA. | |
1528 | */ | |
1529 | wbsd_request_dma(host, dma); | |
fecf92ba | 1530 | |
85bcc130 PO |
1531 | return 0; |
1532 | } | |
1533 | ||
1534 | /* | |
1535 | * Release all resources for the host. | |
1536 | */ | |
1537 | ||
b3627bb1 | 1538 | static void wbsd_release_resources(struct wbsd_host *host) |
85bcc130 PO |
1539 | { |
1540 | wbsd_release_dma(host); | |
1541 | wbsd_release_irq(host); | |
1542 | wbsd_release_regions(host); | |
1543 | } | |
1544 | ||
1545 | /* | |
1546 | * Configure the resources the chip should use. | |
1547 | */ | |
1548 | ||
cfa7f521 | 1549 | static void wbsd_chip_config(struct wbsd_host *host) |
85bcc130 | 1550 | { |
19c1f3ca PO |
1551 | wbsd_unlock_config(host); |
1552 | ||
85bcc130 PO |
1553 | /* |
1554 | * Reset the chip. | |
fecf92ba | 1555 | */ |
85bcc130 PO |
1556 | wbsd_write_config(host, WBSD_CONF_SWRST, 1); |
1557 | wbsd_write_config(host, WBSD_CONF_SWRST, 0); | |
1da177e4 LT |
1558 | |
1559 | /* | |
1560 | * Select SD/MMC function. | |
1561 | */ | |
1562 | wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD); | |
fecf92ba | 1563 | |
1da177e4 LT |
1564 | /* |
1565 | * Set up card detection. | |
1566 | */ | |
85bcc130 | 1567 | wbsd_write_config(host, WBSD_CONF_PINS, WBSD_PINS_DETECT_GP11); |
fecf92ba | 1568 | |
1da177e4 | 1569 | /* |
85bcc130 | 1570 | * Configure chip |
1da177e4 LT |
1571 | */ |
1572 | wbsd_write_config(host, WBSD_CONF_PORT_HI, host->base >> 8); | |
1573 | wbsd_write_config(host, WBSD_CONF_PORT_LO, host->base & 0xff); | |
fecf92ba | 1574 | |
85bcc130 | 1575 | wbsd_write_config(host, WBSD_CONF_IRQ, host->irq); |
fecf92ba | 1576 | |
85bcc130 PO |
1577 | if (host->dma >= 0) |
1578 | wbsd_write_config(host, WBSD_CONF_DRQ, host->dma); | |
fecf92ba | 1579 | |
1da177e4 | 1580 | /* |
85bcc130 | 1581 | * Enable and power up chip. |
1da177e4 | 1582 | */ |
85bcc130 PO |
1583 | wbsd_write_config(host, WBSD_CONF_ENABLE, 1); |
1584 | wbsd_write_config(host, WBSD_CONF_POWER, 0x20); | |
19c1f3ca PO |
1585 | |
1586 | wbsd_lock_config(host); | |
85bcc130 PO |
1587 | } |
1588 | ||
1589 | /* | |
1590 | * Check that configured resources are correct. | |
1591 | */ | |
fecf92ba | 1592 | |
cfa7f521 | 1593 | static int wbsd_chip_validate(struct wbsd_host *host) |
85bcc130 PO |
1594 | { |
1595 | int base, irq, dma; | |
fecf92ba | 1596 | |
19c1f3ca PO |
1597 | wbsd_unlock_config(host); |
1598 | ||
1da177e4 | 1599 | /* |
85bcc130 | 1600 | * Select SD/MMC function. |
1da177e4 | 1601 | */ |
85bcc130 | 1602 | wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD); |
fecf92ba | 1603 | |
1da177e4 | 1604 | /* |
85bcc130 | 1605 | * Read configuration. |
1da177e4 | 1606 | */ |
85bcc130 PO |
1607 | base = wbsd_read_config(host, WBSD_CONF_PORT_HI) << 8; |
1608 | base |= wbsd_read_config(host, WBSD_CONF_PORT_LO); | |
fecf92ba | 1609 | |
85bcc130 | 1610 | irq = wbsd_read_config(host, WBSD_CONF_IRQ); |
fecf92ba | 1611 | |
85bcc130 | 1612 | dma = wbsd_read_config(host, WBSD_CONF_DRQ); |
fecf92ba | 1613 | |
19c1f3ca PO |
1614 | wbsd_lock_config(host); |
1615 | ||
1da177e4 | 1616 | /* |
85bcc130 | 1617 | * Validate against given configuration. |
1da177e4 | 1618 | */ |
85bcc130 PO |
1619 | if (base != host->base) |
1620 | return 0; | |
1621 | if (irq != host->irq) | |
1622 | return 0; | |
1623 | if ((dma != host->dma) && (host->dma != -1)) | |
1624 | return 0; | |
fecf92ba | 1625 | |
85bcc130 PO |
1626 | return 1; |
1627 | } | |
1628 | ||
19c1f3ca PO |
1629 | /* |
1630 | * Powers down the SD function | |
1631 | */ | |
1632 | ||
cfa7f521 | 1633 | static void wbsd_chip_poweroff(struct wbsd_host *host) |
19c1f3ca PO |
1634 | { |
1635 | wbsd_unlock_config(host); | |
1636 | ||
1637 | wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD); | |
1638 | wbsd_write_config(host, WBSD_CONF_ENABLE, 0); | |
1639 | ||
1640 | wbsd_lock_config(host); | |
1641 | } | |
1642 | ||
85bcc130 PO |
1643 | /*****************************************************************************\ |
1644 | * * | |
1645 | * Devices setup and shutdown * | |
1646 | * * | |
1647 | \*****************************************************************************/ | |
1648 | ||
c3be1efd | 1649 | static int wbsd_init(struct device *dev, int base, int irq, int dma, |
85bcc130 PO |
1650 | int pnp) |
1651 | { | |
cfa7f521 PO |
1652 | struct wbsd_host *host = NULL; |
1653 | struct mmc_host *mmc = NULL; | |
85bcc130 | 1654 | int ret; |
fecf92ba | 1655 | |
85bcc130 PO |
1656 | ret = wbsd_alloc_mmc(dev); |
1657 | if (ret) | |
1658 | return ret; | |
fecf92ba | 1659 | |
85bcc130 PO |
1660 | mmc = dev_get_drvdata(dev); |
1661 | host = mmc_priv(mmc); | |
fecf92ba | 1662 | |
1da177e4 | 1663 | /* |
85bcc130 | 1664 | * Scan for hardware. |
1da177e4 | 1665 | */ |
85bcc130 | 1666 | ret = wbsd_scan(host); |
cfa7f521 PO |
1667 | if (ret) { |
1668 | if (pnp && (ret == -ENODEV)) { | |
6606110d | 1669 | pr_warn(DRIVER_NAME ": Unable to confirm device presence - you may experience lock-ups\n"); |
cfa7f521 | 1670 | } else { |
85bcc130 PO |
1671 | wbsd_free_mmc(dev); |
1672 | return ret; | |
1673 | } | |
1674 | } | |
fecf92ba | 1675 | |
1da177e4 | 1676 | /* |
85bcc130 | 1677 | * Request resources. |
1da177e4 | 1678 | */ |
dd2c609c | 1679 | ret = wbsd_request_resources(host, base, irq, dma); |
cfa7f521 | 1680 | if (ret) { |
85bcc130 PO |
1681 | wbsd_release_resources(host); |
1682 | wbsd_free_mmc(dev); | |
1683 | return ret; | |
1684 | } | |
fecf92ba | 1685 | |
1da177e4 | 1686 | /* |
85bcc130 | 1687 | * See if chip needs to be configured. |
1da177e4 | 1688 | */ |
cfa7f521 PO |
1689 | if (pnp) { |
1690 | if ((host->config != 0) && !wbsd_chip_validate(host)) { | |
6606110d | 1691 | pr_warn(DRIVER_NAME ": PnP active but chip not configured! You probably have a buggy BIOS. Configuring chip manually.\n"); |
85bcc130 PO |
1692 | wbsd_chip_config(host); |
1693 | } | |
cfa7f521 | 1694 | } else |
85bcc130 | 1695 | wbsd_chip_config(host); |
fecf92ba | 1696 | |
1da177e4 LT |
1697 | /* |
1698 | * Power Management stuff. No idea how this works. | |
1699 | * Not tested. | |
1700 | */ | |
1701 | #ifdef CONFIG_PM | |
cfa7f521 | 1702 | if (host->config) { |
19c1f3ca | 1703 | wbsd_unlock_config(host); |
85bcc130 | 1704 | wbsd_write_config(host, WBSD_CONF_PME, 0xA0); |
19c1f3ca PO |
1705 | wbsd_lock_config(host); |
1706 | } | |
1da177e4 | 1707 | #endif |
85bcc130 PO |
1708 | /* |
1709 | * Allow device to initialise itself properly. | |
1710 | */ | |
1711 | mdelay(5); | |
1da177e4 LT |
1712 | |
1713 | /* | |
1714 | * Reset the chip into a known state. | |
1715 | */ | |
1716 | wbsd_init_device(host); | |
fecf92ba | 1717 | |
1da177e4 LT |
1718 | mmc_add_host(mmc); |
1719 | ||
a3c76eb9 | 1720 | pr_info("%s: W83L51xD", mmc_hostname(mmc)); |
85bcc130 PO |
1721 | if (host->chip_id != 0) |
1722 | printk(" id %x", (int)host->chip_id); | |
1723 | printk(" at 0x%x irq %d", (int)host->base, (int)host->irq); | |
1724 | if (host->dma >= 0) | |
1725 | printk(" dma %d", (int)host->dma); | |
1726 | else | |
1727 | printk(" FIFO"); | |
1728 | if (pnp) | |
1729 | printk(" PnP"); | |
1730 | printk("\n"); | |
1da177e4 LT |
1731 | |
1732 | return 0; | |
1da177e4 LT |
1733 | } |
1734 | ||
6e0ee714 | 1735 | static void wbsd_shutdown(struct device *dev, int pnp) |
1da177e4 | 1736 | { |
cfa7f521 PO |
1737 | struct mmc_host *mmc = dev_get_drvdata(dev); |
1738 | struct wbsd_host *host; | |
fecf92ba | 1739 | |
1da177e4 | 1740 | if (!mmc) |
85bcc130 | 1741 | return; |
1da177e4 LT |
1742 | |
1743 | host = mmc_priv(mmc); | |
fecf92ba | 1744 | |
1da177e4 LT |
1745 | mmc_remove_host(mmc); |
1746 | ||
19c1f3ca PO |
1747 | /* |
1748 | * Power down the SD/MMC function. | |
1749 | */ | |
85bcc130 | 1750 | if (!pnp) |
19c1f3ca | 1751 | wbsd_chip_poweroff(host); |
fecf92ba | 1752 | |
85bcc130 | 1753 | wbsd_release_resources(host); |
fecf92ba | 1754 | |
85bcc130 PO |
1755 | wbsd_free_mmc(dev); |
1756 | } | |
1da177e4 | 1757 | |
85bcc130 PO |
1758 | /* |
1759 | * Non-PnP | |
1760 | */ | |
1761 | ||
c3be1efd | 1762 | static int wbsd_probe(struct platform_device *dev) |
85bcc130 | 1763 | { |
dd2c609c | 1764 | /* Use the module parameters for resources */ |
9eeebd22 | 1765 | return wbsd_init(&dev->dev, param_io, param_irq, param_dma, 0); |
85bcc130 PO |
1766 | } |
1767 | ||
6e0ee714 | 1768 | static int wbsd_remove(struct platform_device *dev) |
85bcc130 | 1769 | { |
3ae5eaec | 1770 | wbsd_shutdown(&dev->dev, 0); |
85bcc130 PO |
1771 | |
1772 | return 0; | |
1773 | } | |
1774 | ||
1775 | /* | |
1776 | * PnP | |
1777 | */ | |
1778 | ||
1779 | #ifdef CONFIG_PNP | |
1780 | ||
c3be1efd | 1781 | static int |
cfa7f521 | 1782 | wbsd_pnp_probe(struct pnp_dev *pnpdev, const struct pnp_device_id *dev_id) |
85bcc130 PO |
1783 | { |
1784 | int io, irq, dma; | |
fecf92ba | 1785 | |
85bcc130 PO |
1786 | /* |
1787 | * Get resources from PnP layer. | |
1788 | */ | |
1789 | io = pnp_port_start(pnpdev, 0); | |
1790 | irq = pnp_irq(pnpdev, 0); | |
1791 | if (pnp_dma_valid(pnpdev, 0)) | |
1792 | dma = pnp_dma(pnpdev, 0); | |
1793 | else | |
1794 | dma = -1; | |
fecf92ba | 1795 | |
85bcc130 | 1796 | DBGF("PnP resources: port %3x irq %d dma %d\n", io, irq, dma); |
fecf92ba | 1797 | |
85bcc130 PO |
1798 | return wbsd_init(&pnpdev->dev, io, irq, dma, 1); |
1799 | } | |
1da177e4 | 1800 | |
6e0ee714 | 1801 | static void wbsd_pnp_remove(struct pnp_dev *dev) |
85bcc130 PO |
1802 | { |
1803 | wbsd_shutdown(&dev->dev, 1); | |
1da177e4 LT |
1804 | } |
1805 | ||
85bcc130 PO |
1806 | #endif /* CONFIG_PNP */ |
1807 | ||
1da177e4 LT |
1808 | /* |
1809 | * Power management | |
1810 | */ | |
1811 | ||
1812 | #ifdef CONFIG_PM | |
19c1f3ca | 1813 | |
cfa7f521 PO |
1814 | static int wbsd_platform_suspend(struct platform_device *dev, |
1815 | pm_message_t state) | |
1da177e4 | 1816 | { |
3ae5eaec | 1817 | struct mmc_host *mmc = platform_get_drvdata(dev); |
19c1f3ca | 1818 | struct wbsd_host *host; |
19c1f3ca | 1819 | |
5e68d95d | 1820 | if (mmc == NULL) |
19c1f3ca PO |
1821 | return 0; |
1822 | ||
5e68d95d | 1823 | DBGF("Suspending...\n"); |
19c1f3ca PO |
1824 | |
1825 | host = mmc_priv(mmc); | |
1826 | ||
1827 | wbsd_chip_poweroff(host); | |
1da177e4 LT |
1828 | return 0; |
1829 | } | |
1830 | ||
5e68d95d | 1831 | static int wbsd_platform_resume(struct platform_device *dev) |
1da177e4 | 1832 | { |
3ae5eaec | 1833 | struct mmc_host *mmc = platform_get_drvdata(dev); |
19c1f3ca | 1834 | struct wbsd_host *host; |
1da177e4 | 1835 | |
5e68d95d | 1836 | if (mmc == NULL) |
19c1f3ca PO |
1837 | return 0; |
1838 | ||
5e68d95d | 1839 | DBGF("Resuming...\n"); |
19c1f3ca PO |
1840 | |
1841 | host = mmc_priv(mmc); | |
1842 | ||
1843 | wbsd_chip_config(host); | |
1844 | ||
1845 | /* | |
1846 | * Allow device to initialise itself properly. | |
1847 | */ | |
1848 | mdelay(5); | |
1849 | ||
83234ac8 UH |
1850 | wbsd_init_device(host); |
1851 | return 0; | |
5e68d95d PO |
1852 | } |
1853 | ||
1854 | #ifdef CONFIG_PNP | |
1855 | ||
1856 | static int wbsd_pnp_suspend(struct pnp_dev *pnp_dev, pm_message_t state) | |
1857 | { | |
1858 | struct mmc_host *mmc = dev_get_drvdata(&pnp_dev->dev); | |
5e68d95d PO |
1859 | |
1860 | if (mmc == NULL) | |
1861 | return 0; | |
19c1f3ca | 1862 | |
5e68d95d | 1863 | DBGF("Suspending...\n"); |
83234ac8 | 1864 | return 0; |
1da177e4 | 1865 | } |
19c1f3ca | 1866 | |
5e68d95d PO |
1867 | static int wbsd_pnp_resume(struct pnp_dev *pnp_dev) |
1868 | { | |
1869 | struct mmc_host *mmc = dev_get_drvdata(&pnp_dev->dev); | |
1870 | struct wbsd_host *host; | |
1871 | ||
1872 | if (mmc == NULL) | |
1873 | return 0; | |
1874 | ||
1875 | DBGF("Resuming...\n"); | |
1876 | ||
1877 | host = mmc_priv(mmc); | |
1878 | ||
1879 | /* | |
1880 | * See if chip needs to be configured. | |
1881 | */ | |
cfa7f521 PO |
1882 | if (host->config != 0) { |
1883 | if (!wbsd_chip_validate(host)) { | |
6606110d | 1884 | pr_warn(DRIVER_NAME ": PnP active but chip not configured! You probably have a buggy BIOS. Configuring chip manually.\n"); |
5e68d95d PO |
1885 | wbsd_chip_config(host); |
1886 | } | |
1887 | } | |
1888 | ||
1889 | /* | |
1890 | * Allow device to initialise itself properly. | |
1891 | */ | |
1892 | mdelay(5); | |
1893 | ||
83234ac8 UH |
1894 | wbsd_init_device(host); |
1895 | return 0; | |
5e68d95d PO |
1896 | } |
1897 | ||
1898 | #endif /* CONFIG_PNP */ | |
1899 | ||
19c1f3ca PO |
1900 | #else /* CONFIG_PM */ |
1901 | ||
5e68d95d PO |
1902 | #define wbsd_platform_suspend NULL |
1903 | #define wbsd_platform_resume NULL | |
1904 | ||
1905 | #define wbsd_pnp_suspend NULL | |
1906 | #define wbsd_pnp_resume NULL | |
19c1f3ca PO |
1907 | |
1908 | #endif /* CONFIG_PM */ | |
1da177e4 | 1909 | |
85bcc130 | 1910 | static struct platform_device *wbsd_device; |
1da177e4 | 1911 | |
3ae5eaec | 1912 | static struct platform_driver wbsd_driver = { |
1da177e4 | 1913 | .probe = wbsd_probe, |
0433c143 | 1914 | .remove = wbsd_remove, |
fecf92ba | 1915 | |
5e68d95d PO |
1916 | .suspend = wbsd_platform_suspend, |
1917 | .resume = wbsd_platform_resume, | |
3ae5eaec RK |
1918 | .driver = { |
1919 | .name = DRIVER_NAME, | |
1920 | }, | |
1da177e4 LT |
1921 | }; |
1922 | ||
85bcc130 PO |
1923 | #ifdef CONFIG_PNP |
1924 | ||
1925 | static struct pnp_driver wbsd_pnp_driver = { | |
1926 | .name = DRIVER_NAME, | |
1927 | .id_table = pnp_dev_table, | |
1928 | .probe = wbsd_pnp_probe, | |
0433c143 | 1929 | .remove = wbsd_pnp_remove, |
5e68d95d PO |
1930 | |
1931 | .suspend = wbsd_pnp_suspend, | |
1932 | .resume = wbsd_pnp_resume, | |
85bcc130 PO |
1933 | }; |
1934 | ||
1935 | #endif /* CONFIG_PNP */ | |
1936 | ||
1da177e4 LT |
1937 | /* |
1938 | * Module loading/unloading | |
1939 | */ | |
1940 | ||
1941 | static int __init wbsd_drv_init(void) | |
1942 | { | |
1943 | int result; | |
fecf92ba | 1944 | |
a3c76eb9 | 1945 | pr_info(DRIVER_NAME |
1615cc22 | 1946 | ": Winbond W83L51xD SD/MMC card interface driver\n"); |
a3c76eb9 | 1947 | pr_info(DRIVER_NAME ": Copyright(c) Pierre Ossman\n"); |
1da177e4 | 1948 | |
85bcc130 PO |
1949 | #ifdef CONFIG_PNP |
1950 | ||
9eeebd22 | 1951 | if (!param_nopnp) { |
85bcc130 PO |
1952 | result = pnp_register_driver(&wbsd_pnp_driver); |
1953 | if (result < 0) | |
1954 | return result; | |
1955 | } | |
fecf92ba PO |
1956 | #endif /* CONFIG_PNP */ |
1957 | ||
9eeebd22 | 1958 | if (param_nopnp) { |
3ae5eaec | 1959 | result = platform_driver_register(&wbsd_driver); |
85bcc130 PO |
1960 | if (result < 0) |
1961 | return result; | |
1962 | ||
21500bb3 | 1963 | wbsd_device = platform_device_alloc(DRIVER_NAME, -1); |
cfa7f521 | 1964 | if (!wbsd_device) { |
21500bb3 DT |
1965 | platform_driver_unregister(&wbsd_driver); |
1966 | return -ENOMEM; | |
1967 | } | |
1968 | ||
1969 | result = platform_device_add(wbsd_device); | |
cfa7f521 | 1970 | if (result) { |
21500bb3 DT |
1971 | platform_device_put(wbsd_device); |
1972 | platform_driver_unregister(&wbsd_driver); | |
1973 | return result; | |
1974 | } | |
85bcc130 | 1975 | } |
1da177e4 LT |
1976 | |
1977 | return 0; | |
1978 | } | |
1979 | ||
1980 | static void __exit wbsd_drv_exit(void) | |
1981 | { | |
85bcc130 PO |
1982 | #ifdef CONFIG_PNP |
1983 | ||
9eeebd22 | 1984 | if (!param_nopnp) |
85bcc130 | 1985 | pnp_unregister_driver(&wbsd_pnp_driver); |
fecf92ba PO |
1986 | |
1987 | #endif /* CONFIG_PNP */ | |
85bcc130 | 1988 | |
9eeebd22 | 1989 | if (param_nopnp) { |
85bcc130 | 1990 | platform_device_unregister(wbsd_device); |
fecf92ba | 1991 | |
3ae5eaec | 1992 | platform_driver_unregister(&wbsd_driver); |
85bcc130 | 1993 | } |
1da177e4 LT |
1994 | |
1995 | DBG("unloaded\n"); | |
1996 | } | |
1997 | ||
1998 | module_init(wbsd_drv_init); | |
1999 | module_exit(wbsd_drv_exit); | |
85bcc130 | 2000 | #ifdef CONFIG_PNP |
dac562fc | 2001 | module_param_hw_named(nopnp, param_nopnp, uint, other, 0444); |
85bcc130 | 2002 | #endif |
dac562fc DH |
2003 | module_param_hw_named(io, param_io, uint, ioport, 0444); |
2004 | module_param_hw_named(irq, param_irq, uint, irq, 0444); | |
2005 | module_param_hw_named(dma, param_dma, int, dma, 0444); | |
1da177e4 LT |
2006 | |
2007 | MODULE_LICENSE("GPL"); | |
32710e8f | 2008 | MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>"); |
1da177e4 | 2009 | MODULE_DESCRIPTION("Winbond W83L51xD SD/MMC card interface driver"); |
1da177e4 | 2010 | |
85bcc130 PO |
2011 | #ifdef CONFIG_PNP |
2012 | MODULE_PARM_DESC(nopnp, "Scan for device instead of relying on PNP. (default 0)"); | |
2013 | #endif | |
1da177e4 LT |
2014 | MODULE_PARM_DESC(io, "I/O base to allocate. Must be 8 byte aligned. (default 0x248)"); |
2015 | MODULE_PARM_DESC(irq, "IRQ to allocate. (default 6)"); | |
2016 | MODULE_PARM_DESC(dma, "DMA channel to allocate. -1 for no DMA. (default 2)"); |