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2874c5fd 1// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4 2/*
70f10482 3 * linux/drivers/mmc/host/wbsd.c - Winbond W83L51xD SD/MMC driver
1da177e4 4 *
14d836e7 5 * Copyright (C) 2004-2007 Pierre Ossman, All Rights Reserved.
1da177e4 6 *
1da177e4
LT
7 * Warning!
8 *
9 * Changes to the FIFO system should be done with extreme care since
10 * the hardware is full of bugs related to the FIFO. Known issues are:
11 *
12 * - FIFO size field in FSR is always zero.
13 *
14 * - FIFO interrupts tend not to work as they should. Interrupts are
15 * triggered only for full/empty events, not for threshold values.
16 *
17 * - On APIC systems the FIFO empty interrupt is sometimes lost.
18 */
19
1da177e4
LT
20#include <linux/module.h>
21#include <linux/moduleparam.h>
22#include <linux/init.h>
23#include <linux/ioport.h>
d052d1be 24#include <linux/platform_device.h>
1da177e4 25#include <linux/interrupt.h>
85bcc130 26#include <linux/dma-mapping.h>
1da177e4 27#include <linux/delay.h>
85bcc130 28#include <linux/pnp.h>
1da177e4
LT
29#include <linux/highmem.h>
30#include <linux/mmc/host.h>
bd6dee6f 31#include <linux/scatterlist.h>
5a0e3ad6 32#include <linux/slab.h>
1da177e4
LT
33
34#include <asm/io.h>
35#include <asm/dma.h>
1da177e4
LT
36
37#include "wbsd.h"
38
39#define DRIVER_NAME "wbsd"
1da177e4 40
1da177e4 41#define DBG(x...) \
c6563178 42 pr_debug(DRIVER_NAME ": " x)
1da177e4 43#define DBGF(f, x...) \
c6563178 44 pr_debug(DRIVER_NAME " [%s()]: " f, __func__ , ##x)
1da177e4 45
85bcc130
PO
46/*
47 * Device resources
48 */
49
50#ifdef CONFIG_PNP
51
52static const struct pnp_device_id pnp_dev_table[] = {
53 { "WEC0517", 0 },
54 { "WEC0518", 0 },
55 { "", 0 },
56};
57
58MODULE_DEVICE_TABLE(pnp, pnp_dev_table);
59
60#endif /* CONFIG_PNP */
61
3eee0d03
AB
62static const int config_ports[] = { 0x2E, 0x4E };
63static const int unlock_codes[] = { 0x83, 0x87 };
64
65static const int valid_ids[] = {
66 0x7112,
9eeebd22 67};
3eee0d03 68
85bcc130 69#ifdef CONFIG_PNP
9eeebd22 70static unsigned int param_nopnp = 0;
85bcc130 71#else
9eeebd22 72static const unsigned int param_nopnp = 1;
85bcc130 73#endif
9eeebd22
TW
74static unsigned int param_io = 0x248;
75static unsigned int param_irq = 6;
76static int param_dma = 2;
85bcc130 77
1da177e4
LT
78/*
79 * Basic functions
80 */
81
cfa7f521 82static inline void wbsd_unlock_config(struct wbsd_host *host)
1da177e4 83{
85bcc130 84 BUG_ON(host->config == 0);
fecf92ba 85
1da177e4
LT
86 outb(host->unlock_code, host->config);
87 outb(host->unlock_code, host->config);
88}
89
cfa7f521 90static inline void wbsd_lock_config(struct wbsd_host *host)
1da177e4 91{
85bcc130 92 BUG_ON(host->config == 0);
fecf92ba 93
1da177e4
LT
94 outb(LOCK_CODE, host->config);
95}
96
cfa7f521 97static inline void wbsd_write_config(struct wbsd_host *host, u8 reg, u8 value)
1da177e4 98{
85bcc130 99 BUG_ON(host->config == 0);
fecf92ba 100
1da177e4
LT
101 outb(reg, host->config);
102 outb(value, host->config + 1);
103}
104
cfa7f521 105static inline u8 wbsd_read_config(struct wbsd_host *host, u8 reg)
1da177e4 106{
85bcc130 107 BUG_ON(host->config == 0);
fecf92ba 108
1da177e4
LT
109 outb(reg, host->config);
110 return inb(host->config + 1);
111}
112
cfa7f521 113static inline void wbsd_write_index(struct wbsd_host *host, u8 index, u8 value)
1da177e4
LT
114{
115 outb(index, host->base + WBSD_IDXR);
116 outb(value, host->base + WBSD_DATAR);
117}
118
cfa7f521 119static inline u8 wbsd_read_index(struct wbsd_host *host, u8 index)
1da177e4
LT
120{
121 outb(index, host->base + WBSD_IDXR);
122 return inb(host->base + WBSD_DATAR);
123}
124
125/*
126 * Common routines
127 */
128
cfa7f521 129static void wbsd_init_device(struct wbsd_host *host)
1da177e4
LT
130{
131 u8 setup, ier;
fecf92ba 132
1da177e4
LT
133 /*
134 * Reset chip (SD/MMC part) and fifo.
135 */
136 setup = wbsd_read_index(host, WBSD_IDX_SETUP);
137 setup |= WBSD_FIFO_RESET | WBSD_SOFT_RESET;
138 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
fecf92ba 139
85bcc130
PO
140 /*
141 * Set DAT3 to input
142 */
143 setup &= ~WBSD_DAT3_H;
144 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
145 host->flags &= ~WBSD_FIGNORE_DETECT;
fecf92ba 146
1da177e4
LT
147 /*
148 * Read back default clock.
149 */
150 host->clk = wbsd_read_index(host, WBSD_IDX_CLK);
151
152 /*
153 * Power down port.
154 */
155 outb(WBSD_POWER_N, host->base + WBSD_CSR);
fecf92ba 156
1da177e4
LT
157 /*
158 * Set maximum timeout.
159 */
160 wbsd_write_index(host, WBSD_IDX_TAAC, 0x7F);
fecf92ba 161
85bcc130
PO
162 /*
163 * Test for card presence
164 */
165 if (inb(host->base + WBSD_CSR) & WBSD_CARDPRESENT)
166 host->flags |= WBSD_FCARD_PRESENT;
167 else
168 host->flags &= ~WBSD_FCARD_PRESENT;
fecf92ba 169
1da177e4
LT
170 /*
171 * Enable interesting interrupts.
172 */
173 ier = 0;
174 ier |= WBSD_EINT_CARD;
175 ier |= WBSD_EINT_FIFO_THRE;
1da177e4 176 ier |= WBSD_EINT_CRC;
5721dbf2 177 ier |= WBSD_EINT_TIMEOUT;
1da177e4
LT
178 ier |= WBSD_EINT_TC;
179
180 outb(ier, host->base + WBSD_EIR);
181
182 /*
183 * Clear interrupts.
184 */
185 inb(host->base + WBSD_ISR);
186}
187
cfa7f521 188static void wbsd_reset(struct wbsd_host *host)
1da177e4
LT
189{
190 u8 setup;
fecf92ba 191
a3c76eb9 192 pr_err("%s: Resetting chip\n", mmc_hostname(host->mmc));
fecf92ba 193
1da177e4
LT
194 /*
195 * Soft reset of chip (SD/MMC part).
196 */
197 setup = wbsd_read_index(host, WBSD_IDX_SETUP);
198 setup |= WBSD_SOFT_RESET;
199 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
200}
201
cfa7f521 202static void wbsd_request_end(struct wbsd_host *host, struct mmc_request *mrq)
1da177e4
LT
203{
204 unsigned long dmaflags;
fecf92ba 205
cfa7f521 206 if (host->dma >= 0) {
1da177e4
LT
207 /*
208 * Release ISA DMA controller.
209 */
210 dmaflags = claim_dma_lock();
211 disable_dma(host->dma);
212 clear_dma_ff(host->dma);
213 release_dma_lock(dmaflags);
214
215 /*
216 * Disable DMA on host.
217 */
218 wbsd_write_index(host, WBSD_IDX_DMA, 0);
219 }
fecf92ba 220
1da177e4
LT
221 host->mrq = NULL;
222
223 /*
224 * MMC layer might call back into the driver so first unlock.
225 */
226 spin_unlock(&host->lock);
227 mmc_request_done(host->mmc, mrq);
228 spin_lock(&host->lock);
229}
230
231/*
232 * Scatter/gather functions
233 */
234
cfa7f521 235static inline void wbsd_init_sg(struct wbsd_host *host, struct mmc_data *data)
1da177e4
LT
236{
237 /*
238 * Get info. about SG list from data structure.
239 */
240 host->cur_sg = data->sg;
241 host->num_sg = data->sg_len;
242
243 host->offset = 0;
244 host->remain = host->cur_sg->length;
245}
246
cfa7f521 247static inline int wbsd_next_sg(struct wbsd_host *host)
1da177e4
LT
248{
249 /*
250 * Skip to next SG entry.
251 */
252 host->cur_sg++;
253 host->num_sg--;
254
255 /*
256 * Any entries left?
257 */
cfa7f521
PO
258 if (host->num_sg > 0) {
259 host->offset = 0;
260 host->remain = host->cur_sg->length;
261 }
fecf92ba 262
1da177e4
LT
263 return host->num_sg;
264}
265
9181ece3 266static inline char *wbsd_map_sg(struct wbsd_host *host)
1da177e4 267{
9181ece3 268 return kmap_atomic(sg_page(host->cur_sg)) + host->cur_sg->offset;
1da177e4
LT
269}
270
cfa7f521 271static inline void wbsd_sg_to_dma(struct wbsd_host *host, struct mmc_data *data)
1da177e4 272{
9181ece3
CH
273 size_t len = 0;
274 int i;
275
276 for (i = 0; i < data->sg_len; i++)
277 len += data->sg[i].length;
278 sg_copy_to_buffer(data->sg, data->sg_len, host->dma_buffer, len);
1da177e4
LT
279}
280
cfa7f521 281static inline void wbsd_dma_to_sg(struct wbsd_host *host, struct mmc_data *data)
1da177e4 282{
9181ece3
CH
283 size_t len = 0;
284 int i;
285
286 for (i = 0; i < data->sg_len; i++)
287 len += data->sg[i].length;
288 sg_copy_from_buffer(data->sg, data->sg_len, host->dma_buffer, len);
1da177e4
LT
289}
290
291/*
292 * Command handling
293 */
fecf92ba 294
cfa7f521
PO
295static inline void wbsd_get_short_reply(struct wbsd_host *host,
296 struct mmc_command *cmd)
1da177e4
LT
297{
298 /*
299 * Correct response type?
300 */
cfa7f521 301 if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_SHORT) {
17b0429d 302 cmd->error = -EILSEQ;
1da177e4
LT
303 return;
304 }
fecf92ba 305
cfa7f521
PO
306 cmd->resp[0] = wbsd_read_index(host, WBSD_IDX_RESP12) << 24;
307 cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP13) << 16;
308 cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP14) << 8;
309 cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP15) << 0;
310 cmd->resp[1] = wbsd_read_index(host, WBSD_IDX_RESP16) << 24;
1da177e4
LT
311}
312
cfa7f521
PO
313static inline void wbsd_get_long_reply(struct wbsd_host *host,
314 struct mmc_command *cmd)
1da177e4
LT
315{
316 int i;
fecf92ba 317
1da177e4
LT
318 /*
319 * Correct response type?
320 */
cfa7f521 321 if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_LONG) {
17b0429d 322 cmd->error = -EILSEQ;
1da177e4
LT
323 return;
324 }
fecf92ba 325
cfa7f521 326 for (i = 0; i < 4; i++) {
1da177e4
LT
327 cmd->resp[i] =
328 wbsd_read_index(host, WBSD_IDX_RESP1 + i * 4) << 24;
329 cmd->resp[i] |=
330 wbsd_read_index(host, WBSD_IDX_RESP2 + i * 4) << 16;
331 cmd->resp[i] |=
332 wbsd_read_index(host, WBSD_IDX_RESP3 + i * 4) << 8;
333 cmd->resp[i] |=
334 wbsd_read_index(host, WBSD_IDX_RESP4 + i * 4) << 0;
335 }
336}
337
cfa7f521 338static void wbsd_send_command(struct wbsd_host *host, struct mmc_command *cmd)
1da177e4
LT
339{
340 int i;
341 u8 status, isr;
fecf92ba 342
1da177e4
LT
343 /*
344 * Clear accumulated ISR. The interrupt routine
345 * will fill this one with events that occur during
346 * transfer.
347 */
348 host->isr = 0;
fecf92ba 349
1da177e4
LT
350 /*
351 * Send the command (CRC calculated by host).
352 */
353 outb(cmd->opcode, host->base + WBSD_CMDR);
cfa7f521 354 for (i = 3; i >= 0; i--)
1da177e4 355 outb((cmd->arg >> (i * 8)) & 0xff, host->base + WBSD_CMDR);
fecf92ba 356
17b0429d 357 cmd->error = 0;
fecf92ba 358
1da177e4
LT
359 /*
360 * Wait for the request to complete.
361 */
362 do {
363 status = wbsd_read_index(host, WBSD_IDX_STATUS);
364 } while (status & WBSD_CARDTRAFFIC);
365
366 /*
367 * Do we expect a reply?
368 */
e9225176 369 if (cmd->flags & MMC_RSP_PRESENT) {
1da177e4
LT
370 /*
371 * Read back status.
372 */
373 isr = host->isr;
fecf92ba 374
1da177e4
LT
375 /* Card removed? */
376 if (isr & WBSD_INT_CARD)
17b0429d 377 cmd->error = -ENOMEDIUM;
1da177e4
LT
378 /* Timeout? */
379 else if (isr & WBSD_INT_TIMEOUT)
17b0429d 380 cmd->error = -ETIMEDOUT;
1da177e4
LT
381 /* CRC? */
382 else if ((cmd->flags & MMC_RSP_CRC) && (isr & WBSD_INT_CRC))
17b0429d 383 cmd->error = -EILSEQ;
1da177e4 384 /* All ok */
cfa7f521 385 else {
e9225176 386 if (cmd->flags & MMC_RSP_136)
1da177e4 387 wbsd_get_long_reply(host, cmd);
e9225176
RK
388 else
389 wbsd_get_short_reply(host, cmd);
1da177e4
LT
390 }
391 }
1da177e4
LT
392}
393
394/*
395 * Data functions
396 */
397
cfa7f521 398static void wbsd_empty_fifo(struct wbsd_host *host)
1da177e4 399{
cfa7f521
PO
400 struct mmc_data *data = host->mrq->cmd->data;
401 char *buffer;
9181ece3 402 int i, idx, fsr, fifo;
fecf92ba 403
1da177e4
LT
404 /*
405 * Handle excessive data.
406 */
14d836e7 407 if (host->num_sg == 0)
1da177e4 408 return;
fecf92ba 409
9181ece3
CH
410 buffer = wbsd_map_sg(host) + host->offset;
411 idx = 0;
1da177e4
LT
412
413 /*
414 * Drain the fifo. This has a tendency to loop longer
415 * than the FIFO length (usually one block).
416 */
cfa7f521 417 while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_EMPTY)) {
1da177e4
LT
418 /*
419 * The size field in the FSR is broken so we have to
420 * do some guessing.
fecf92ba 421 */
1da177e4
LT
422 if (fsr & WBSD_FIFO_FULL)
423 fifo = 16;
424 else if (fsr & WBSD_FIFO_FUTHRE)
425 fifo = 8;
426 else
427 fifo = 1;
fecf92ba 428
cfa7f521 429 for (i = 0; i < fifo; i++) {
9181ece3 430 buffer[idx++] = inb(host->base + WBSD_DFR);
1da177e4
LT
431 host->offset++;
432 host->remain--;
433
434 data->bytes_xfered++;
fecf92ba 435
1da177e4
LT
436 /*
437 * End of scatter list entry?
438 */
cfa7f521 439 if (host->remain == 0) {
9181ece3 440 kunmap_atomic(buffer);
1da177e4
LT
441 /*
442 * Get next entry. Check if last.
443 */
14d836e7 444 if (!wbsd_next_sg(host))
1da177e4 445 return;
fecf92ba 446
9181ece3
CH
447 buffer = wbsd_map_sg(host);
448 idx = 0;
1da177e4
LT
449 }
450 }
451 }
9181ece3 452 kunmap_atomic(buffer);
fecf92ba 453
1da177e4
LT
454 /*
455 * This is a very dirty hack to solve a
456 * hardware problem. The chip doesn't trigger
457 * FIFO threshold interrupts properly.
458 */
14d836e7 459 if ((data->blocks * data->blksz - data->bytes_xfered) < 16)
1da177e4
LT
460 tasklet_schedule(&host->fifo_tasklet);
461}
462
cfa7f521 463static void wbsd_fill_fifo(struct wbsd_host *host)
1da177e4 464{
cfa7f521
PO
465 struct mmc_data *data = host->mrq->cmd->data;
466 char *buffer;
9181ece3 467 int i, idx, fsr, fifo;
fecf92ba 468
1da177e4
LT
469 /*
470 * Check that we aren't being called after the
25985edc 471 * entire buffer has been transferred.
1da177e4 472 */
14d836e7 473 if (host->num_sg == 0)
1da177e4
LT
474 return;
475
9181ece3
CH
476 buffer = wbsd_map_sg(host) + host->offset;
477 idx = 0;
1da177e4
LT
478
479 /*
480 * Fill the fifo. This has a tendency to loop longer
481 * than the FIFO length (usually one block).
482 */
cfa7f521 483 while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_FULL)) {
1da177e4
LT
484 /*
485 * The size field in the FSR is broken so we have to
486 * do some guessing.
fecf92ba 487 */
1da177e4
LT
488 if (fsr & WBSD_FIFO_EMPTY)
489 fifo = 0;
490 else if (fsr & WBSD_FIFO_EMTHRE)
491 fifo = 8;
492 else
493 fifo = 15;
494
cfa7f521 495 for (i = 16; i > fifo; i--) {
9181ece3 496 outb(buffer[idx], host->base + WBSD_DFR);
1da177e4
LT
497 host->offset++;
498 host->remain--;
fecf92ba 499
1da177e4 500 data->bytes_xfered++;
fecf92ba 501
1da177e4
LT
502 /*
503 * End of scatter list entry?
504 */
cfa7f521 505 if (host->remain == 0) {
9181ece3 506 kunmap_atomic(buffer);
1da177e4
LT
507 /*
508 * Get next entry. Check if last.
509 */
14d836e7 510 if (!wbsd_next_sg(host))
1da177e4 511 return;
fecf92ba 512
9181ece3
CH
513 buffer = wbsd_map_sg(host);
514 idx = 0;
1da177e4
LT
515 }
516 }
517 }
9181ece3 518 kunmap_atomic(buffer);
fecf92ba 519
85bcc130
PO
520 /*
521 * The controller stops sending interrupts for
522 * 'FIFO empty' under certain conditions. So we
523 * need to be a bit more pro-active.
524 */
525 tasklet_schedule(&host->fifo_tasklet);
1da177e4
LT
526}
527
cfa7f521 528static void wbsd_prepare_data(struct wbsd_host *host, struct mmc_data *data)
1da177e4
LT
529{
530 u16 blksize;
531 u8 setup;
532 unsigned long dmaflags;
14d836e7 533 unsigned int size;
1da177e4 534
1da177e4
LT
535 /*
536 * Calculate size.
537 */
14d836e7 538 size = data->blocks * data->blksz;
1da177e4
LT
539
540 /*
541 * Check timeout values for overflow.
542 * (Yes, some cards cause this value to overflow).
543 */
544 if (data->timeout_ns > 127000000)
545 wbsd_write_index(host, WBSD_IDX_TAAC, 127);
cfa7f521
PO
546 else {
547 wbsd_write_index(host, WBSD_IDX_TAAC,
548 data->timeout_ns / 1000000);
549 }
fecf92ba 550
1da177e4
LT
551 if (data->timeout_clks > 255)
552 wbsd_write_index(host, WBSD_IDX_NSAC, 255);
553 else
554 wbsd_write_index(host, WBSD_IDX_NSAC, data->timeout_clks);
fecf92ba 555
1da177e4
LT
556 /*
557 * Inform the chip of how large blocks will be
558 * sent. It needs this to determine when to
559 * calculate CRC.
560 *
561 * Space for CRC must be included in the size.
65ae2118 562 * Two bytes are needed for each data line.
1da177e4 563 */
cfa7f521 564 if (host->bus_width == MMC_BUS_WIDTH_1) {
2c171bf1 565 blksize = data->blksz + 2;
65ae2118
PO
566
567 wbsd_write_index(host, WBSD_IDX_PBSMSB, (blksize >> 4) & 0xF0);
568 wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF);
cfa7f521 569 } else if (host->bus_width == MMC_BUS_WIDTH_4) {
2c171bf1 570 blksize = data->blksz + 2 * 4;
fecf92ba 571
cfa7f521
PO
572 wbsd_write_index(host, WBSD_IDX_PBSMSB,
573 ((blksize >> 4) & 0xF0) | WBSD_DATA_WIDTH);
65ae2118 574 wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF);
cfa7f521 575 } else {
17b0429d 576 data->error = -EINVAL;
65ae2118
PO
577 return;
578 }
1da177e4
LT
579
580 /*
581 * Clear the FIFO. This is needed even for DMA
582 * transfers since the chip still uses the FIFO
583 * internally.
584 */
585 setup = wbsd_read_index(host, WBSD_IDX_SETUP);
586 setup |= WBSD_FIFO_RESET;
587 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
fecf92ba 588
1da177e4
LT
589 /*
590 * DMA transfer?
591 */
cfa7f521 592 if (host->dma >= 0) {
1da177e4
LT
593 /*
594 * The buffer for DMA is only 64 kB.
595 */
14d836e7
AD
596 BUG_ON(size > 0x10000);
597 if (size > 0x10000) {
17b0429d 598 data->error = -EINVAL;
1da177e4
LT
599 return;
600 }
fecf92ba 601
1da177e4
LT
602 /*
603 * Transfer data from the SG list to
604 * the DMA buffer.
605 */
606 if (data->flags & MMC_DATA_WRITE)
607 wbsd_sg_to_dma(host, data);
fecf92ba 608
1da177e4
LT
609 /*
610 * Initialise the ISA DMA controller.
fecf92ba 611 */
1da177e4
LT
612 dmaflags = claim_dma_lock();
613 disable_dma(host->dma);
614 clear_dma_ff(host->dma);
615 if (data->flags & MMC_DATA_READ)
616 set_dma_mode(host->dma, DMA_MODE_READ & ~0x40);
617 else
618 set_dma_mode(host->dma, DMA_MODE_WRITE & ~0x40);
619 set_dma_addr(host->dma, host->dma_addr);
14d836e7 620 set_dma_count(host->dma, size);
1da177e4
LT
621
622 enable_dma(host->dma);
623 release_dma_lock(dmaflags);
624
625 /*
626 * Enable DMA on the host.
627 */
628 wbsd_write_index(host, WBSD_IDX_DMA, WBSD_DMA_ENABLE);
cfa7f521 629 } else {
1da177e4
LT
630 /*
631 * This flag is used to keep printk
632 * output to a minimum.
633 */
634 host->firsterr = 1;
fecf92ba 635
1da177e4
LT
636 /*
637 * Initialise the SG list.
638 */
639 wbsd_init_sg(host, data);
fecf92ba 640
1da177e4
LT
641 /*
642 * Turn off DMA.
643 */
644 wbsd_write_index(host, WBSD_IDX_DMA, 0);
fecf92ba 645
1da177e4
LT
646 /*
647 * Set up FIFO threshold levels (and fill
648 * buffer if doing a write).
649 */
cfa7f521 650 if (data->flags & MMC_DATA_READ) {
1da177e4
LT
651 wbsd_write_index(host, WBSD_IDX_FIFOEN,
652 WBSD_FIFOEN_FULL | 8);
cfa7f521 653 } else {
1da177e4
LT
654 wbsd_write_index(host, WBSD_IDX_FIFOEN,
655 WBSD_FIFOEN_EMPTY | 8);
656 wbsd_fill_fifo(host);
657 }
fecf92ba
PO
658 }
659
17b0429d 660 data->error = 0;
1da177e4
LT
661}
662
cfa7f521 663static void wbsd_finish_data(struct wbsd_host *host, struct mmc_data *data)
1da177e4
LT
664{
665 unsigned long dmaflags;
666 int count;
667 u8 status;
fecf92ba 668
1da177e4
LT
669 WARN_ON(host->mrq == NULL);
670
671 /*
672 * Send a stop command if needed.
673 */
674 if (data->stop)
675 wbsd_send_command(host, data->stop);
676
677 /*
678 * Wait for the controller to leave data
679 * transfer state.
680 */
cfa7f521 681 do {
1da177e4
LT
682 status = wbsd_read_index(host, WBSD_IDX_STATUS);
683 } while (status & (WBSD_BLOCK_READ | WBSD_BLOCK_WRITE));
fecf92ba 684
1da177e4
LT
685 /*
686 * DMA transfer?
687 */
cfa7f521 688 if (host->dma >= 0) {
1da177e4
LT
689 /*
690 * Disable DMA on the host.
691 */
692 wbsd_write_index(host, WBSD_IDX_DMA, 0);
fecf92ba 693
1da177e4
LT
694 /*
695 * Turn of ISA DMA controller.
696 */
697 dmaflags = claim_dma_lock();
698 disable_dma(host->dma);
699 clear_dma_ff(host->dma);
700 count = get_dma_residue(host->dma);
701 release_dma_lock(dmaflags);
fecf92ba 702
14d836e7
AD
703 data->bytes_xfered = host->mrq->data->blocks *
704 host->mrq->data->blksz - count;
705 data->bytes_xfered -= data->bytes_xfered % data->blksz;
706
1da177e4
LT
707 /*
708 * Any leftover data?
709 */
cfa7f521 710 if (count) {
a3c76eb9 711 pr_err("%s: Incomplete DMA transfer. "
d191634f
PO
712 "%d bytes left.\n",
713 mmc_hostname(host->mmc), count);
fecf92ba 714
17b0429d
PO
715 if (!data->error)
716 data->error = -EIO;
cfa7f521 717 } else {
1da177e4
LT
718 /*
719 * Transfer data from DMA buffer to
720 * SG list.
721 */
722 if (data->flags & MMC_DATA_READ)
723 wbsd_dma_to_sg(host, data);
14d836e7 724 }
fecf92ba 725
17b0429d 726 if (data->error) {
14d836e7
AD
727 if (data->bytes_xfered)
728 data->bytes_xfered -= data->blksz;
1da177e4
LT
729 }
730 }
fecf92ba 731
1da177e4
LT
732 wbsd_request_end(host, host->mrq);
733}
734
85bcc130
PO
735/*****************************************************************************\
736 * *
737 * MMC layer callbacks *
738 * *
739\*****************************************************************************/
1da177e4 740
cfa7f521 741static void wbsd_request(struct mmc_host *mmc, struct mmc_request *mrq)
1da177e4 742{
cfa7f521
PO
743 struct wbsd_host *host = mmc_priv(mmc);
744 struct mmc_command *cmd;
1da177e4
LT
745
746 /*
747 * Disable tasklets to avoid a deadlock.
748 */
749 spin_lock_bh(&host->lock);
750
751 BUG_ON(host->mrq != NULL);
752
753 cmd = mrq->cmd;
754
755 host->mrq = mrq;
fecf92ba 756
1da177e4 757 /*
17b0429d 758 * Check that there is actually a card in the slot.
1da177e4 759 */
cfa7f521 760 if (!(host->flags & WBSD_FCARD_PRESENT)) {
17b0429d 761 cmd->error = -ENOMEDIUM;
1da177e4
LT
762 goto done;
763 }
764
cfa7f521 765 if (cmd->data) {
5ba593a9
PO
766 /*
767 * The hardware is so delightfully stupid that it has a list
768 * of "data" commands. If a command isn't on this list, it'll
769 * just go back to the idle state and won't send any data
770 * interrupts.
771 */
772 switch (cmd->opcode) {
773 case 11:
774 case 17:
775 case 18:
776 case 20:
777 case 24:
778 case 25:
779 case 26:
780 case 27:
781 case 30:
782 case 42:
783 case 56:
784 break;
785
786 /* ACMDs. We don't keep track of state, so we just treat them
787 * like any other command. */
788 case 51:
789 break;
790
791 default:
6606110d 792 pr_warn("%s: Data command %d is not supported by this controller\n",
5ba593a9 793 mmc_hostname(host->mmc), cmd->opcode);
17b0429d 794 cmd->error = -EINVAL;
5ba593a9
PO
795
796 goto done;
17a90539 797 }
b2670b1c 798 }
5ba593a9 799
b2670b1c
PO
800 /*
801 * Does the request include data?
802 */
803 if (cmd->data) {
804 wbsd_prepare_data(host, cmd->data);
805
17b0429d 806 if (cmd->data->error)
b2670b1c
PO
807 goto done;
808 }
809
810 wbsd_send_command(host, cmd);
811
812 /*
813 * If this is a data transfer the request
814 * will be finished after the data has
25985edc 815 * transferred.
b2670b1c 816 */
17b0429d 817 if (cmd->data && !cmd->error) {
1da177e4
LT
818 /*
819 * Dirty fix for hardware bug.
820 */
821 if (host->dma == -1)
822 tasklet_schedule(&host->fifo_tasklet);
823
824 spin_unlock_bh(&host->lock);
825
826 return;
827 }
fecf92ba 828
1da177e4
LT
829done:
830 wbsd_request_end(host, mrq);
831
832 spin_unlock_bh(&host->lock);
833}
834
cfa7f521 835static void wbsd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1da177e4 836{
cfa7f521 837 struct wbsd_host *host = mmc_priv(mmc);
1da177e4 838 u8 clk, setup, pwr;
fecf92ba 839
1da177e4
LT
840 spin_lock_bh(&host->lock);
841
842 /*
843 * Reset the chip on each power off.
844 * Should clear out any weird states.
845 */
846 if (ios->power_mode == MMC_POWER_OFF)
847 wbsd_init_device(host);
fecf92ba 848
1da177e4
LT
849 if (ios->clock >= 24000000)
850 clk = WBSD_CLK_24M;
851 else if (ios->clock >= 16000000)
852 clk = WBSD_CLK_16M;
853 else if (ios->clock >= 12000000)
854 clk = WBSD_CLK_12M;
855 else
856 clk = WBSD_CLK_375K;
857
858 /*
859 * Only write to the clock register when
860 * there is an actual change.
861 */
cfa7f521 862 if (clk != host->clk) {
1da177e4
LT
863 wbsd_write_index(host, WBSD_IDX_CLK, clk);
864 host->clk = clk;
865 }
866
85bcc130
PO
867 /*
868 * Power up card.
869 */
cfa7f521 870 if (ios->power_mode != MMC_POWER_OFF) {
1da177e4
LT
871 pwr = inb(host->base + WBSD_CSR);
872 pwr &= ~WBSD_POWER_N;
873 outb(pwr, host->base + WBSD_CSR);
1da177e4
LT
874 }
875
85bcc130
PO
876 /*
877 * MMC cards need to have pin 1 high during init.
85bcc130 878 * It wreaks havoc with the card detection though so
1656fa57 879 * that needs to be disabled.
85bcc130
PO
880 */
881 setup = wbsd_read_index(host, WBSD_IDX_SETUP);
cfa7f521 882 if (ios->chip_select == MMC_CS_HIGH) {
65ae2118 883 BUG_ON(ios->bus_width != MMC_BUS_WIDTH_1);
85bcc130
PO
884 setup |= WBSD_DAT3_H;
885 host->flags |= WBSD_FIGNORE_DETECT;
cfa7f521
PO
886 } else {
887 if (setup & WBSD_DAT3_H) {
19c1f3ca 888 setup &= ~WBSD_DAT3_H;
1656fa57 889
19c1f3ca 890 /*
25985edc 891 * We cannot resume card detection immediately
19c1f3ca
PO
892 * because of capacitance and delays in the chip.
893 */
cfa7f521 894 mod_timer(&host->ignore_timer, jiffies + HZ / 100);
19c1f3ca 895 }
85bcc130
PO
896 }
897 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
fecf92ba 898
65ae2118
PO
899 /*
900 * Store bus width for later. Will be used when
901 * setting up the data transfer.
902 */
903 host->bus_width = ios->bus_width;
904
1da177e4
LT
905 spin_unlock_bh(&host->lock);
906}
907
cfa7f521 908static int wbsd_get_ro(struct mmc_host *mmc)
65ae2118 909{
cfa7f521 910 struct wbsd_host *host = mmc_priv(mmc);
65ae2118
PO
911 u8 csr;
912
913 spin_lock_bh(&host->lock);
914
915 csr = inb(host->base + WBSD_CSR);
916 csr |= WBSD_MSLED;
917 outb(csr, host->base + WBSD_CSR);
918
919 mdelay(1);
920
921 csr = inb(host->base + WBSD_CSR);
922 csr &= ~WBSD_MSLED;
923 outb(csr, host->base + WBSD_CSR);
924
925 spin_unlock_bh(&host->lock);
926
08f80bb5 927 return !!(csr & WBSD_WRPT);
65ae2118
PO
928}
929
ab7aefd0 930static const struct mmc_host_ops wbsd_ops = {
85bcc130
PO
931 .request = wbsd_request,
932 .set_ios = wbsd_set_ios,
65ae2118 933 .get_ro = wbsd_get_ro,
85bcc130
PO
934};
935
936/*****************************************************************************\
937 * *
938 * Interrupt handling *
939 * *
940\*****************************************************************************/
941
1656fa57
PO
942/*
943 * Helper function to reset detection ignore
944 */
945
2ee4f620 946static void wbsd_reset_ignore(struct timer_list *t)
1656fa57 947{
2ee4f620 948 struct wbsd_host *host = from_timer(host, t, ignore_timer);
1656fa57
PO
949
950 BUG_ON(host == NULL);
951
952 DBG("Resetting card detection ignore\n");
953
954 spin_lock_bh(&host->lock);
955
956 host->flags &= ~WBSD_FIGNORE_DETECT;
957
958 /*
959 * Card status might have changed during the
960 * blackout.
961 */
962 tasklet_schedule(&host->card_tasklet);
963
964 spin_unlock_bh(&host->lock);
965}
966
1da177e4
LT
967/*
968 * Tasklets
969 */
970
cfa7f521 971static inline struct mmc_data *wbsd_get_data(struct wbsd_host *host)
1da177e4
LT
972{
973 WARN_ON(!host->mrq);
974 if (!host->mrq)
975 return NULL;
976
977 WARN_ON(!host->mrq->cmd);
978 if (!host->mrq->cmd)
979 return NULL;
980
981 WARN_ON(!host->mrq->cmd->data);
982 if (!host->mrq->cmd->data)
983 return NULL;
fecf92ba 984
1da177e4
LT
985 return host->mrq->cmd->data;
986}
987
988static void wbsd_tasklet_card(unsigned long param)
989{
cfa7f521 990 struct wbsd_host *host = (struct wbsd_host *)param;
1da177e4 991 u8 csr;
210ce2a7 992 int delay = -1;
fecf92ba 993
1da177e4 994 spin_lock(&host->lock);
fecf92ba 995
cfa7f521 996 if (host->flags & WBSD_FIGNORE_DETECT) {
85bcc130
PO
997 spin_unlock(&host->lock);
998 return;
999 }
fecf92ba 1000
1da177e4
LT
1001 csr = inb(host->base + WBSD_CSR);
1002 WARN_ON(csr == 0xff);
fecf92ba 1003
cfa7f521
PO
1004 if (csr & WBSD_CARDPRESENT) {
1005 if (!(host->flags & WBSD_FCARD_PRESENT)) {
85bcc130
PO
1006 DBG("Card inserted\n");
1007 host->flags |= WBSD_FCARD_PRESENT;
fecf92ba 1008
210ce2a7 1009 delay = 500;
85bcc130 1010 }
cfa7f521 1011 } else if (host->flags & WBSD_FCARD_PRESENT) {
1da177e4 1012 DBG("Card removed\n");
85bcc130 1013 host->flags &= ~WBSD_FCARD_PRESENT;
fecf92ba 1014
cfa7f521 1015 if (host->mrq) {
a3c76eb9 1016 pr_err("%s: Card removed during transfer!\n",
d191634f 1017 mmc_hostname(host->mmc));
1da177e4 1018 wbsd_reset(host);
fecf92ba 1019
17b0429d 1020 host->mrq->cmd->error = -ENOMEDIUM;
1da177e4
LT
1021 tasklet_schedule(&host->finish_tasklet);
1022 }
fecf92ba 1023
210ce2a7 1024 delay = 0;
6e6293dd 1025 }
210ce2a7
PO
1026
1027 /*
1028 * Unlock first since we might get a call back.
1029 */
1030
1031 spin_unlock(&host->lock);
1032
1033 if (delay != -1)
1034 mmc_detect_change(host->mmc, msecs_to_jiffies(delay));
1da177e4
LT
1035}
1036
1037static void wbsd_tasklet_fifo(unsigned long param)
1038{
cfa7f521
PO
1039 struct wbsd_host *host = (struct wbsd_host *)param;
1040 struct mmc_data *data;
fecf92ba 1041
1da177e4 1042 spin_lock(&host->lock);
fecf92ba 1043
1da177e4
LT
1044 if (!host->mrq)
1045 goto end;
fecf92ba 1046
1da177e4
LT
1047 data = wbsd_get_data(host);
1048 if (!data)
1049 goto end;
1050
1051 if (data->flags & MMC_DATA_WRITE)
1052 wbsd_fill_fifo(host);
1053 else
1054 wbsd_empty_fifo(host);
1055
1056 /*
1057 * Done?
1058 */
14d836e7 1059 if (host->num_sg == 0) {
1da177e4
LT
1060 wbsd_write_index(host, WBSD_IDX_FIFOEN, 0);
1061 tasklet_schedule(&host->finish_tasklet);
1062 }
1063
fecf92ba 1064end:
1da177e4
LT
1065 spin_unlock(&host->lock);
1066}
1067
1068static void wbsd_tasklet_crc(unsigned long param)
1069{
cfa7f521
PO
1070 struct wbsd_host *host = (struct wbsd_host *)param;
1071 struct mmc_data *data;
fecf92ba 1072
1da177e4 1073 spin_lock(&host->lock);
fecf92ba 1074
1da177e4
LT
1075 if (!host->mrq)
1076 goto end;
fecf92ba 1077
1da177e4
LT
1078 data = wbsd_get_data(host);
1079 if (!data)
1080 goto end;
fecf92ba 1081
1da177e4
LT
1082 DBGF("CRC error\n");
1083
17b0429d 1084 data->error = -EILSEQ;
fecf92ba 1085
1da177e4
LT
1086 tasklet_schedule(&host->finish_tasklet);
1087
fecf92ba 1088end:
1da177e4
LT
1089 spin_unlock(&host->lock);
1090}
1091
1092static void wbsd_tasklet_timeout(unsigned long param)
1093{
cfa7f521
PO
1094 struct wbsd_host *host = (struct wbsd_host *)param;
1095 struct mmc_data *data;
fecf92ba 1096
1da177e4 1097 spin_lock(&host->lock);
fecf92ba 1098
1da177e4
LT
1099 if (!host->mrq)
1100 goto end;
fecf92ba 1101
1da177e4
LT
1102 data = wbsd_get_data(host);
1103 if (!data)
1104 goto end;
fecf92ba 1105
1da177e4
LT
1106 DBGF("Timeout\n");
1107
17b0429d 1108 data->error = -ETIMEDOUT;
fecf92ba 1109
1da177e4
LT
1110 tasklet_schedule(&host->finish_tasklet);
1111
fecf92ba 1112end:
1da177e4
LT
1113 spin_unlock(&host->lock);
1114}
1115
1116static void wbsd_tasklet_finish(unsigned long param)
1117{
cfa7f521
PO
1118 struct wbsd_host *host = (struct wbsd_host *)param;
1119 struct mmc_data *data;
fecf92ba 1120
1da177e4 1121 spin_lock(&host->lock);
fecf92ba 1122
1da177e4
LT
1123 WARN_ON(!host->mrq);
1124 if (!host->mrq)
1125 goto end;
fecf92ba 1126
1da177e4
LT
1127 data = wbsd_get_data(host);
1128 if (!data)
1129 goto end;
1130
1131 wbsd_finish_data(host, data);
fecf92ba
PO
1132
1133end:
1da177e4
LT
1134 spin_unlock(&host->lock);
1135}
1136
1da177e4
LT
1137/*
1138 * Interrupt handling
1139 */
1140
7d12e780 1141static irqreturn_t wbsd_irq(int irq, void *dev_id)
1da177e4 1142{
cfa7f521 1143 struct wbsd_host *host = dev_id;
1da177e4 1144 int isr;
fecf92ba 1145
1da177e4
LT
1146 isr = inb(host->base + WBSD_ISR);
1147
1148 /*
1149 * Was it actually our hardware that caused the interrupt?
1150 */
1151 if (isr == 0xff || isr == 0x00)
1152 return IRQ_NONE;
fecf92ba 1153
1da177e4
LT
1154 host->isr |= isr;
1155
1156 /*
1157 * Schedule tasklets as needed.
1158 */
1159 if (isr & WBSD_INT_CARD)
1160 tasklet_schedule(&host->card_tasklet);
1161 if (isr & WBSD_INT_FIFO_THRE)
1162 tasklet_schedule(&host->fifo_tasklet);
1163 if (isr & WBSD_INT_CRC)
1164 tasklet_hi_schedule(&host->crc_tasklet);
1165 if (isr & WBSD_INT_TIMEOUT)
1166 tasklet_hi_schedule(&host->timeout_tasklet);
1da177e4
LT
1167 if (isr & WBSD_INT_TC)
1168 tasklet_schedule(&host->finish_tasklet);
fecf92ba 1169
1da177e4
LT
1170 return IRQ_HANDLED;
1171}
1172
85bcc130
PO
1173/*****************************************************************************\
1174 * *
1175 * Device initialisation and shutdown *
1176 * *
1177\*****************************************************************************/
1178
1da177e4 1179/*
85bcc130 1180 * Allocate/free MMC structure.
1da177e4
LT
1181 */
1182
c3be1efd 1183static int wbsd_alloc_mmc(struct device *dev)
85bcc130 1184{
cfa7f521
PO
1185 struct mmc_host *mmc;
1186 struct wbsd_host *host;
fecf92ba 1187
85bcc130
PO
1188 /*
1189 * Allocate MMC structure.
1190 */
1191 mmc = mmc_alloc_host(sizeof(struct wbsd_host), dev);
1192 if (!mmc)
1193 return -ENOMEM;
fecf92ba 1194
85bcc130
PO
1195 host = mmc_priv(mmc);
1196 host->mmc = mmc;
1197
1198 host->dma = -1;
1199
1200 /*
1201 * Set host parameters.
1202 */
1203 mmc->ops = &wbsd_ops;
1204 mmc->f_min = 375000;
1205 mmc->f_max = 24000000;
cfa7f521 1206 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
23af6039 1207 mmc->caps = MMC_CAP_4_BIT_DATA;
fecf92ba 1208
85bcc130 1209 spin_lock_init(&host->lock);
fecf92ba 1210
6e6293dd 1211 /*
1656fa57 1212 * Set up timers
6e6293dd 1213 */
2ee4f620 1214 timer_setup(&host->ignore_timer, wbsd_reset_ignore, 0);
fecf92ba 1215
85bcc130
PO
1216 /*
1217 * Maximum number of segments. Worst case is one sector per segment
1218 * so this will be 64kB/512.
1219 */
a36274e0 1220 mmc->max_segs = 128;
fecf92ba 1221
85bcc130 1222 /*
55db890a 1223 * Maximum request size. Also limited by 64KiB buffer.
85bcc130 1224 */
55db890a 1225 mmc->max_req_size = 65536;
fecf92ba 1226
85bcc130
PO
1227 /*
1228 * Maximum segment size. Could be one segment with the maximum number
55db890a 1229 * of bytes.
85bcc130 1230 */
55db890a 1231 mmc->max_seg_size = mmc->max_req_size;
fecf92ba 1232
fe4a3c7a
PO
1233 /*
1234 * Maximum block size. We have 12 bits (= 4095) but have to subtract
1235 * space for CRC. So the maximum is 4095 - 4*2 = 4087.
1236 */
1237 mmc->max_blk_size = 4087;
1238
55db890a
PO
1239 /*
1240 * Maximum block count. There is no real limit so the maximum
1241 * request size will be the only restriction.
1242 */
1243 mmc->max_blk_count = mmc->max_req_size;
1244
85bcc130 1245 dev_set_drvdata(dev, mmc);
fecf92ba 1246
85bcc130
PO
1247 return 0;
1248}
1249
b3627bb1 1250static void wbsd_free_mmc(struct device *dev)
85bcc130 1251{
cfa7f521
PO
1252 struct mmc_host *mmc;
1253 struct wbsd_host *host;
fecf92ba 1254
85bcc130
PO
1255 mmc = dev_get_drvdata(dev);
1256 if (!mmc)
1257 return;
fecf92ba 1258
6e6293dd
PO
1259 host = mmc_priv(mmc);
1260 BUG_ON(host == NULL);
fecf92ba 1261
1656fa57 1262 del_timer_sync(&host->ignore_timer);
fecf92ba 1263
85bcc130 1264 mmc_free_host(mmc);
fecf92ba 1265
85bcc130
PO
1266 dev_set_drvdata(dev, NULL);
1267}
1268
1269/*
1270 * Scan for known chip id:s
1271 */
1272
c3be1efd 1273static int wbsd_scan(struct wbsd_host *host)
1da177e4
LT
1274{
1275 int i, j, k;
1276 int id;
fecf92ba 1277
1da177e4
LT
1278 /*
1279 * Iterate through all ports, all codes to
1280 * find hardware that is in our known list.
1281 */
63648fb5 1282 for (i = 0; i < ARRAY_SIZE(config_ports); i++) {
1da177e4
LT
1283 if (!request_region(config_ports[i], 2, DRIVER_NAME))
1284 continue;
fecf92ba 1285
63648fb5 1286 for (j = 0; j < ARRAY_SIZE(unlock_codes); j++) {
1da177e4 1287 id = 0xFFFF;
fecf92ba 1288
19c1f3ca
PO
1289 host->config = config_ports[i];
1290 host->unlock_code = unlock_codes[j];
1291
1292 wbsd_unlock_config(host);
fecf92ba 1293
1da177e4
LT
1294 outb(WBSD_CONF_ID_HI, config_ports[i]);
1295 id = inb(config_ports[i] + 1) << 8;
1296
1297 outb(WBSD_CONF_ID_LO, config_ports[i]);
1298 id |= inb(config_ports[i] + 1);
fecf92ba 1299
19c1f3ca
PO
1300 wbsd_lock_config(host);
1301
63648fb5 1302 for (k = 0; k < ARRAY_SIZE(valid_ids); k++) {
cfa7f521 1303 if (id == valid_ids[k]) {
1da177e4 1304 host->chip_id = id;
fecf92ba 1305
1da177e4
LT
1306 return 0;
1307 }
1308 }
fecf92ba 1309
cfa7f521 1310 if (id != 0xFFFF) {
1da177e4
LT
1311 DBG("Unknown hardware (id %x) found at %x\n",
1312 id, config_ports[i]);
1313 }
1da177e4 1314 }
fecf92ba 1315
1da177e4
LT
1316 release_region(config_ports[i], 2);
1317 }
fecf92ba 1318
19c1f3ca
PO
1319 host->config = 0;
1320 host->unlock_code = 0;
1321
1da177e4
LT
1322 return -ENODEV;
1323}
1324
85bcc130
PO
1325/*
1326 * Allocate/free io port ranges
1327 */
1328
c3be1efd 1329static int wbsd_request_region(struct wbsd_host *host, int base)
1da177e4 1330{
916f3ac6 1331 if (base & 0x7)
1da177e4 1332 return -EINVAL;
fecf92ba 1333
85bcc130 1334 if (!request_region(base, 8, DRIVER_NAME))
1da177e4 1335 return -EIO;
fecf92ba 1336
916f3ac6 1337 host->base = base;
fecf92ba 1338
1da177e4
LT
1339 return 0;
1340}
1341
b3627bb1 1342static void wbsd_release_regions(struct wbsd_host *host)
1da177e4
LT
1343{
1344 if (host->base)
1345 release_region(host->base, 8);
fecf92ba 1346
85bcc130 1347 host->base = 0;
1da177e4
LT
1348
1349 if (host->config)
1350 release_region(host->config, 2);
fecf92ba 1351
85bcc130 1352 host->config = 0;
1da177e4
LT
1353}
1354
85bcc130
PO
1355/*
1356 * Allocate/free DMA port and buffer
1357 */
1358
c3be1efd 1359static void wbsd_request_dma(struct wbsd_host *host, int dma)
1da177e4 1360{
1da177e4
LT
1361 if (dma < 0)
1362 return;
fecf92ba 1363
1da177e4
LT
1364 if (request_dma(dma, DRIVER_NAME))
1365 goto err;
fecf92ba 1366
1da177e4
LT
1367 /*
1368 * We need to allocate a special buffer in
1369 * order for ISA to be able to DMA to it.
1370 */
85bcc130 1371 host->dma_buffer = kmalloc(WBSD_DMA_SIZE,
dcda9b04 1372 GFP_NOIO | GFP_DMA | __GFP_RETRY_MAYFAIL | __GFP_NOWARN);
1da177e4
LT
1373 if (!host->dma_buffer)
1374 goto free;
1375
1376 /*
1377 * Translate the address to a physical address.
1378 */
fcaf71fd 1379 host->dma_addr = dma_map_single(mmc_dev(host->mmc), host->dma_buffer,
85bcc130 1380 WBSD_DMA_SIZE, DMA_BIDIRECTIONAL);
a5488a35
AK
1381 if (dma_mapping_error(mmc_dev(host->mmc), host->dma_addr))
1382 goto kfree;
fecf92ba 1383
1da177e4
LT
1384 /*
1385 * ISA DMA must be aligned on a 64k basis.
1386 */
1387 if ((host->dma_addr & 0xffff) != 0)
a5488a35 1388 goto unmap;
1da177e4
LT
1389 /*
1390 * ISA cannot access memory above 16 MB.
1391 */
1392 else if (host->dma_addr >= 0x1000000)
a5488a35 1393 goto unmap;
1da177e4
LT
1394
1395 host->dma = dma;
fecf92ba 1396
1da177e4 1397 return;
fecf92ba 1398
a5488a35 1399unmap:
1da177e4
LT
1400 /*
1401 * If we've gotten here then there is some kind of alignment bug
1402 */
1403 BUG_ON(1);
fecf92ba 1404
fcaf71fd 1405 dma_unmap_single(mmc_dev(host->mmc), host->dma_addr,
cfa7f521 1406 WBSD_DMA_SIZE, DMA_BIDIRECTIONAL);
97067d55 1407 host->dma_addr = 0;
fecf92ba 1408
a5488a35 1409kfree:
1da177e4
LT
1410 kfree(host->dma_buffer);
1411 host->dma_buffer = NULL;
1412
1413free:
1414 free_dma(dma);
1415
1416err:
6606110d
JP
1417 pr_warn(DRIVER_NAME ": Unable to allocate DMA %d - falling back on FIFO\n",
1418 dma);
1da177e4
LT
1419}
1420
b3627bb1 1421static void wbsd_release_dma(struct wbsd_host *host)
85bcc130 1422{
e81c022a
AK
1423 /*
1424 * host->dma_addr is valid here iff host->dma_buffer is not NULL.
1425 */
1426 if (host->dma_buffer) {
fcaf71fd 1427 dma_unmap_single(mmc_dev(host->mmc), host->dma_addr,
cfa7f521 1428 WBSD_DMA_SIZE, DMA_BIDIRECTIONAL);
e81c022a 1429 kfree(host->dma_buffer);
cfa7f521 1430 }
85bcc130
PO
1431 if (host->dma >= 0)
1432 free_dma(host->dma);
fecf92ba 1433
85bcc130
PO
1434 host->dma = -1;
1435 host->dma_buffer = NULL;
97067d55 1436 host->dma_addr = 0;
85bcc130 1437}
1da177e4
LT
1438
1439/*
85bcc130 1440 * Allocate/free IRQ.
1da177e4
LT
1441 */
1442
c3be1efd 1443static int wbsd_request_irq(struct wbsd_host *host, int irq)
1da177e4 1444{
1da177e4 1445 int ret;
fecf92ba 1446
1da177e4 1447 /*
cef33400 1448 * Set up tasklets. Must be done before requesting interrupt.
1da177e4 1449 */
cfa7f521
PO
1450 tasklet_init(&host->card_tasklet, wbsd_tasklet_card,
1451 (unsigned long)host);
1452 tasklet_init(&host->fifo_tasklet, wbsd_tasklet_fifo,
1453 (unsigned long)host);
1454 tasklet_init(&host->crc_tasklet, wbsd_tasklet_crc,
1455 (unsigned long)host);
1456 tasklet_init(&host->timeout_tasklet, wbsd_tasklet_timeout,
1457 (unsigned long)host);
1458 tasklet_init(&host->finish_tasklet, wbsd_tasklet_finish,
1459 (unsigned long)host);
fecf92ba 1460
cef33400
CE
1461 /*
1462 * Allocate interrupt.
1463 */
1464 ret = request_irq(irq, wbsd_irq, IRQF_SHARED, DRIVER_NAME, host);
1465 if (ret)
1466 return ret;
1467
1468 host->irq = irq;
1469
85bcc130
PO
1470 return 0;
1471}
1da177e4 1472
b3627bb1 1473static void wbsd_release_irq(struct wbsd_host *host)
85bcc130
PO
1474{
1475 if (!host->irq)
1476 return;
1da177e4 1477
85bcc130 1478 free_irq(host->irq, host);
fecf92ba 1479
85bcc130 1480 host->irq = 0;
fecf92ba 1481
85bcc130
PO
1482 tasklet_kill(&host->card_tasklet);
1483 tasklet_kill(&host->fifo_tasklet);
1484 tasklet_kill(&host->crc_tasklet);
1485 tasklet_kill(&host->timeout_tasklet);
1486 tasklet_kill(&host->finish_tasklet);
85bcc130
PO
1487}
1488
1489/*
1490 * Allocate all resources for the host.
1491 */
1492
c3be1efd 1493static int wbsd_request_resources(struct wbsd_host *host,
85bcc130
PO
1494 int base, int irq, int dma)
1495{
1496 int ret;
fecf92ba 1497
1da177e4
LT
1498 /*
1499 * Allocate I/O ports.
1500 */
85bcc130 1501 ret = wbsd_request_region(host, base);
1da177e4 1502 if (ret)
85bcc130 1503 return ret;
1da177e4
LT
1504
1505 /*
85bcc130 1506 * Allocate interrupt.
1da177e4 1507 */
85bcc130
PO
1508 ret = wbsd_request_irq(host, irq);
1509 if (ret)
1510 return ret;
1511
1512 /*
1513 * Allocate DMA.
1514 */
1515 wbsd_request_dma(host, dma);
fecf92ba 1516
85bcc130
PO
1517 return 0;
1518}
1519
1520/*
1521 * Release all resources for the host.
1522 */
1523
b3627bb1 1524static void wbsd_release_resources(struct wbsd_host *host)
85bcc130
PO
1525{
1526 wbsd_release_dma(host);
1527 wbsd_release_irq(host);
1528 wbsd_release_regions(host);
1529}
1530
1531/*
1532 * Configure the resources the chip should use.
1533 */
1534
cfa7f521 1535static void wbsd_chip_config(struct wbsd_host *host)
85bcc130 1536{
19c1f3ca
PO
1537 wbsd_unlock_config(host);
1538
85bcc130
PO
1539 /*
1540 * Reset the chip.
fecf92ba 1541 */
85bcc130
PO
1542 wbsd_write_config(host, WBSD_CONF_SWRST, 1);
1543 wbsd_write_config(host, WBSD_CONF_SWRST, 0);
1da177e4
LT
1544
1545 /*
1546 * Select SD/MMC function.
1547 */
1548 wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD);
fecf92ba 1549
1da177e4
LT
1550 /*
1551 * Set up card detection.
1552 */
85bcc130 1553 wbsd_write_config(host, WBSD_CONF_PINS, WBSD_PINS_DETECT_GP11);
fecf92ba 1554
1da177e4 1555 /*
85bcc130 1556 * Configure chip
1da177e4
LT
1557 */
1558 wbsd_write_config(host, WBSD_CONF_PORT_HI, host->base >> 8);
1559 wbsd_write_config(host, WBSD_CONF_PORT_LO, host->base & 0xff);
fecf92ba 1560
85bcc130 1561 wbsd_write_config(host, WBSD_CONF_IRQ, host->irq);
fecf92ba 1562
85bcc130
PO
1563 if (host->dma >= 0)
1564 wbsd_write_config(host, WBSD_CONF_DRQ, host->dma);
fecf92ba 1565
1da177e4 1566 /*
85bcc130 1567 * Enable and power up chip.
1da177e4 1568 */
85bcc130
PO
1569 wbsd_write_config(host, WBSD_CONF_ENABLE, 1);
1570 wbsd_write_config(host, WBSD_CONF_POWER, 0x20);
19c1f3ca
PO
1571
1572 wbsd_lock_config(host);
85bcc130
PO
1573}
1574
1575/*
1576 * Check that configured resources are correct.
1577 */
fecf92ba 1578
cfa7f521 1579static int wbsd_chip_validate(struct wbsd_host *host)
85bcc130
PO
1580{
1581 int base, irq, dma;
fecf92ba 1582
19c1f3ca
PO
1583 wbsd_unlock_config(host);
1584
1da177e4 1585 /*
85bcc130 1586 * Select SD/MMC function.
1da177e4 1587 */
85bcc130 1588 wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD);
fecf92ba 1589
1da177e4 1590 /*
85bcc130 1591 * Read configuration.
1da177e4 1592 */
85bcc130
PO
1593 base = wbsd_read_config(host, WBSD_CONF_PORT_HI) << 8;
1594 base |= wbsd_read_config(host, WBSD_CONF_PORT_LO);
fecf92ba 1595
85bcc130 1596 irq = wbsd_read_config(host, WBSD_CONF_IRQ);
fecf92ba 1597
85bcc130 1598 dma = wbsd_read_config(host, WBSD_CONF_DRQ);
fecf92ba 1599
19c1f3ca
PO
1600 wbsd_lock_config(host);
1601
1da177e4 1602 /*
85bcc130 1603 * Validate against given configuration.
1da177e4 1604 */
85bcc130
PO
1605 if (base != host->base)
1606 return 0;
1607 if (irq != host->irq)
1608 return 0;
1609 if ((dma != host->dma) && (host->dma != -1))
1610 return 0;
fecf92ba 1611
85bcc130
PO
1612 return 1;
1613}
1614
19c1f3ca
PO
1615/*
1616 * Powers down the SD function
1617 */
1618
cfa7f521 1619static void wbsd_chip_poweroff(struct wbsd_host *host)
19c1f3ca
PO
1620{
1621 wbsd_unlock_config(host);
1622
1623 wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD);
1624 wbsd_write_config(host, WBSD_CONF_ENABLE, 0);
1625
1626 wbsd_lock_config(host);
1627}
1628
85bcc130
PO
1629/*****************************************************************************\
1630 * *
1631 * Devices setup and shutdown *
1632 * *
1633\*****************************************************************************/
1634
c3be1efd 1635static int wbsd_init(struct device *dev, int base, int irq, int dma,
85bcc130
PO
1636 int pnp)
1637{
cfa7f521
PO
1638 struct wbsd_host *host = NULL;
1639 struct mmc_host *mmc = NULL;
85bcc130 1640 int ret;
fecf92ba 1641
85bcc130
PO
1642 ret = wbsd_alloc_mmc(dev);
1643 if (ret)
1644 return ret;
fecf92ba 1645
85bcc130
PO
1646 mmc = dev_get_drvdata(dev);
1647 host = mmc_priv(mmc);
fecf92ba 1648
1da177e4 1649 /*
85bcc130 1650 * Scan for hardware.
1da177e4 1651 */
85bcc130 1652 ret = wbsd_scan(host);
cfa7f521
PO
1653 if (ret) {
1654 if (pnp && (ret == -ENODEV)) {
6606110d 1655 pr_warn(DRIVER_NAME ": Unable to confirm device presence - you may experience lock-ups\n");
cfa7f521 1656 } else {
85bcc130
PO
1657 wbsd_free_mmc(dev);
1658 return ret;
1659 }
1660 }
fecf92ba 1661
1da177e4 1662 /*
85bcc130 1663 * Request resources.
1da177e4 1664 */
dd2c609c 1665 ret = wbsd_request_resources(host, base, irq, dma);
cfa7f521 1666 if (ret) {
85bcc130
PO
1667 wbsd_release_resources(host);
1668 wbsd_free_mmc(dev);
1669 return ret;
1670 }
fecf92ba 1671
1da177e4 1672 /*
85bcc130 1673 * See if chip needs to be configured.
1da177e4 1674 */
cfa7f521
PO
1675 if (pnp) {
1676 if ((host->config != 0) && !wbsd_chip_validate(host)) {
6606110d 1677 pr_warn(DRIVER_NAME ": PnP active but chip not configured! You probably have a buggy BIOS. Configuring chip manually.\n");
85bcc130
PO
1678 wbsd_chip_config(host);
1679 }
cfa7f521 1680 } else
85bcc130 1681 wbsd_chip_config(host);
fecf92ba 1682
1da177e4
LT
1683 /*
1684 * Power Management stuff. No idea how this works.
1685 * Not tested.
1686 */
1687#ifdef CONFIG_PM
cfa7f521 1688 if (host->config) {
19c1f3ca 1689 wbsd_unlock_config(host);
85bcc130 1690 wbsd_write_config(host, WBSD_CONF_PME, 0xA0);
19c1f3ca
PO
1691 wbsd_lock_config(host);
1692 }
1da177e4 1693#endif
85bcc130
PO
1694 /*
1695 * Allow device to initialise itself properly.
1696 */
1697 mdelay(5);
1da177e4
LT
1698
1699 /*
1700 * Reset the chip into a known state.
1701 */
1702 wbsd_init_device(host);
fecf92ba 1703
1da177e4
LT
1704 mmc_add_host(mmc);
1705
a3c76eb9 1706 pr_info("%s: W83L51xD", mmc_hostname(mmc));
85bcc130
PO
1707 if (host->chip_id != 0)
1708 printk(" id %x", (int)host->chip_id);
1709 printk(" at 0x%x irq %d", (int)host->base, (int)host->irq);
1710 if (host->dma >= 0)
1711 printk(" dma %d", (int)host->dma);
1712 else
1713 printk(" FIFO");
1714 if (pnp)
1715 printk(" PnP");
1716 printk("\n");
1da177e4
LT
1717
1718 return 0;
1da177e4
LT
1719}
1720
6e0ee714 1721static void wbsd_shutdown(struct device *dev, int pnp)
1da177e4 1722{
cfa7f521
PO
1723 struct mmc_host *mmc = dev_get_drvdata(dev);
1724 struct wbsd_host *host;
fecf92ba 1725
1da177e4 1726 if (!mmc)
85bcc130 1727 return;
1da177e4
LT
1728
1729 host = mmc_priv(mmc);
fecf92ba 1730
1da177e4
LT
1731 mmc_remove_host(mmc);
1732
19c1f3ca
PO
1733 /*
1734 * Power down the SD/MMC function.
1735 */
85bcc130 1736 if (!pnp)
19c1f3ca 1737 wbsd_chip_poweroff(host);
fecf92ba 1738
85bcc130 1739 wbsd_release_resources(host);
fecf92ba 1740
85bcc130
PO
1741 wbsd_free_mmc(dev);
1742}
1da177e4 1743
85bcc130
PO
1744/*
1745 * Non-PnP
1746 */
1747
c3be1efd 1748static int wbsd_probe(struct platform_device *dev)
85bcc130 1749{
dd2c609c 1750 /* Use the module parameters for resources */
9eeebd22 1751 return wbsd_init(&dev->dev, param_io, param_irq, param_dma, 0);
85bcc130
PO
1752}
1753
6e0ee714 1754static int wbsd_remove(struct platform_device *dev)
85bcc130 1755{
3ae5eaec 1756 wbsd_shutdown(&dev->dev, 0);
85bcc130
PO
1757
1758 return 0;
1759}
1760
1761/*
1762 * PnP
1763 */
1764
1765#ifdef CONFIG_PNP
1766
c3be1efd 1767static int
cfa7f521 1768wbsd_pnp_probe(struct pnp_dev *pnpdev, const struct pnp_device_id *dev_id)
85bcc130
PO
1769{
1770 int io, irq, dma;
fecf92ba 1771
85bcc130
PO
1772 /*
1773 * Get resources from PnP layer.
1774 */
1775 io = pnp_port_start(pnpdev, 0);
1776 irq = pnp_irq(pnpdev, 0);
1777 if (pnp_dma_valid(pnpdev, 0))
1778 dma = pnp_dma(pnpdev, 0);
1779 else
1780 dma = -1;
fecf92ba 1781
85bcc130 1782 DBGF("PnP resources: port %3x irq %d dma %d\n", io, irq, dma);
fecf92ba 1783
85bcc130
PO
1784 return wbsd_init(&pnpdev->dev, io, irq, dma, 1);
1785}
1da177e4 1786
6e0ee714 1787static void wbsd_pnp_remove(struct pnp_dev *dev)
85bcc130
PO
1788{
1789 wbsd_shutdown(&dev->dev, 1);
1da177e4
LT
1790}
1791
85bcc130
PO
1792#endif /* CONFIG_PNP */
1793
1da177e4
LT
1794/*
1795 * Power management
1796 */
1797
1798#ifdef CONFIG_PM
19c1f3ca 1799
cfa7f521
PO
1800static int wbsd_platform_suspend(struct platform_device *dev,
1801 pm_message_t state)
1da177e4 1802{
3ae5eaec 1803 struct mmc_host *mmc = platform_get_drvdata(dev);
19c1f3ca 1804 struct wbsd_host *host;
19c1f3ca 1805
5e68d95d 1806 if (mmc == NULL)
19c1f3ca
PO
1807 return 0;
1808
5e68d95d 1809 DBGF("Suspending...\n");
19c1f3ca
PO
1810
1811 host = mmc_priv(mmc);
1812
1813 wbsd_chip_poweroff(host);
1da177e4
LT
1814 return 0;
1815}
1816
5e68d95d 1817static int wbsd_platform_resume(struct platform_device *dev)
1da177e4 1818{
3ae5eaec 1819 struct mmc_host *mmc = platform_get_drvdata(dev);
19c1f3ca 1820 struct wbsd_host *host;
1da177e4 1821
5e68d95d 1822 if (mmc == NULL)
19c1f3ca
PO
1823 return 0;
1824
5e68d95d 1825 DBGF("Resuming...\n");
19c1f3ca
PO
1826
1827 host = mmc_priv(mmc);
1828
1829 wbsd_chip_config(host);
1830
1831 /*
1832 * Allow device to initialise itself properly.
1833 */
1834 mdelay(5);
1835
83234ac8
UH
1836 wbsd_init_device(host);
1837 return 0;
5e68d95d
PO
1838}
1839
1840#ifdef CONFIG_PNP
1841
1842static int wbsd_pnp_suspend(struct pnp_dev *pnp_dev, pm_message_t state)
1843{
1844 struct mmc_host *mmc = dev_get_drvdata(&pnp_dev->dev);
5e68d95d
PO
1845
1846 if (mmc == NULL)
1847 return 0;
19c1f3ca 1848
5e68d95d 1849 DBGF("Suspending...\n");
83234ac8 1850 return 0;
1da177e4 1851}
19c1f3ca 1852
5e68d95d
PO
1853static int wbsd_pnp_resume(struct pnp_dev *pnp_dev)
1854{
1855 struct mmc_host *mmc = dev_get_drvdata(&pnp_dev->dev);
1856 struct wbsd_host *host;
1857
1858 if (mmc == NULL)
1859 return 0;
1860
1861 DBGF("Resuming...\n");
1862
1863 host = mmc_priv(mmc);
1864
1865 /*
1866 * See if chip needs to be configured.
1867 */
cfa7f521
PO
1868 if (host->config != 0) {
1869 if (!wbsd_chip_validate(host)) {
6606110d 1870 pr_warn(DRIVER_NAME ": PnP active but chip not configured! You probably have a buggy BIOS. Configuring chip manually.\n");
5e68d95d
PO
1871 wbsd_chip_config(host);
1872 }
1873 }
1874
1875 /*
1876 * Allow device to initialise itself properly.
1877 */
1878 mdelay(5);
1879
83234ac8
UH
1880 wbsd_init_device(host);
1881 return 0;
5e68d95d
PO
1882}
1883
1884#endif /* CONFIG_PNP */
1885
19c1f3ca
PO
1886#else /* CONFIG_PM */
1887
5e68d95d
PO
1888#define wbsd_platform_suspend NULL
1889#define wbsd_platform_resume NULL
1890
1891#define wbsd_pnp_suspend NULL
1892#define wbsd_pnp_resume NULL
19c1f3ca
PO
1893
1894#endif /* CONFIG_PM */
1da177e4 1895
85bcc130 1896static struct platform_device *wbsd_device;
1da177e4 1897
3ae5eaec 1898static struct platform_driver wbsd_driver = {
1da177e4 1899 .probe = wbsd_probe,
0433c143 1900 .remove = wbsd_remove,
fecf92ba 1901
5e68d95d
PO
1902 .suspend = wbsd_platform_suspend,
1903 .resume = wbsd_platform_resume,
3ae5eaec
RK
1904 .driver = {
1905 .name = DRIVER_NAME,
1906 },
1da177e4
LT
1907};
1908
85bcc130
PO
1909#ifdef CONFIG_PNP
1910
1911static struct pnp_driver wbsd_pnp_driver = {
1912 .name = DRIVER_NAME,
1913 .id_table = pnp_dev_table,
1914 .probe = wbsd_pnp_probe,
0433c143 1915 .remove = wbsd_pnp_remove,
5e68d95d
PO
1916
1917 .suspend = wbsd_pnp_suspend,
1918 .resume = wbsd_pnp_resume,
85bcc130
PO
1919};
1920
1921#endif /* CONFIG_PNP */
1922
1da177e4
LT
1923/*
1924 * Module loading/unloading
1925 */
1926
1927static int __init wbsd_drv_init(void)
1928{
1929 int result;
fecf92ba 1930
a3c76eb9 1931 pr_info(DRIVER_NAME
1615cc22 1932 ": Winbond W83L51xD SD/MMC card interface driver\n");
a3c76eb9 1933 pr_info(DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
1da177e4 1934
85bcc130
PO
1935#ifdef CONFIG_PNP
1936
9eeebd22 1937 if (!param_nopnp) {
85bcc130
PO
1938 result = pnp_register_driver(&wbsd_pnp_driver);
1939 if (result < 0)
1940 return result;
1941 }
fecf92ba
PO
1942#endif /* CONFIG_PNP */
1943
9eeebd22 1944 if (param_nopnp) {
3ae5eaec 1945 result = platform_driver_register(&wbsd_driver);
85bcc130
PO
1946 if (result < 0)
1947 return result;
1948
21500bb3 1949 wbsd_device = platform_device_alloc(DRIVER_NAME, -1);
cfa7f521 1950 if (!wbsd_device) {
21500bb3
DT
1951 platform_driver_unregister(&wbsd_driver);
1952 return -ENOMEM;
1953 }
1954
1955 result = platform_device_add(wbsd_device);
cfa7f521 1956 if (result) {
21500bb3
DT
1957 platform_device_put(wbsd_device);
1958 platform_driver_unregister(&wbsd_driver);
1959 return result;
1960 }
85bcc130 1961 }
1da177e4
LT
1962
1963 return 0;
1964}
1965
1966static void __exit wbsd_drv_exit(void)
1967{
85bcc130
PO
1968#ifdef CONFIG_PNP
1969
9eeebd22 1970 if (!param_nopnp)
85bcc130 1971 pnp_unregister_driver(&wbsd_pnp_driver);
fecf92ba
PO
1972
1973#endif /* CONFIG_PNP */
85bcc130 1974
9eeebd22 1975 if (param_nopnp) {
85bcc130 1976 platform_device_unregister(wbsd_device);
fecf92ba 1977
3ae5eaec 1978 platform_driver_unregister(&wbsd_driver);
85bcc130 1979 }
1da177e4
LT
1980
1981 DBG("unloaded\n");
1982}
1983
1984module_init(wbsd_drv_init);
1985module_exit(wbsd_drv_exit);
85bcc130 1986#ifdef CONFIG_PNP
dac562fc 1987module_param_hw_named(nopnp, param_nopnp, uint, other, 0444);
85bcc130 1988#endif
dac562fc
DH
1989module_param_hw_named(io, param_io, uint, ioport, 0444);
1990module_param_hw_named(irq, param_irq, uint, irq, 0444);
1991module_param_hw_named(dma, param_dma, int, dma, 0444);
1da177e4
LT
1992
1993MODULE_LICENSE("GPL");
32710e8f 1994MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
1da177e4 1995MODULE_DESCRIPTION("Winbond W83L51xD SD/MMC card interface driver");
1da177e4 1996
85bcc130
PO
1997#ifdef CONFIG_PNP
1998MODULE_PARM_DESC(nopnp, "Scan for device instead of relying on PNP. (default 0)");
1999#endif
1da177e4
LT
2000MODULE_PARM_DESC(io, "I/O base to allocate. Must be 8 byte aligned. (default 0x248)");
2001MODULE_PARM_DESC(irq, "IRQ to allocate. (default 6)");
2002MODULE_PARM_DESC(dma, "DMA channel to allocate. -1 for no DMA. (default 2)");