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Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
70f10482 | 2 | * linux/drivers/mmc/host/wbsd.c - Winbond W83L51xD SD/MMC driver |
1da177e4 | 3 | * |
14d836e7 | 4 | * Copyright (C) 2004-2007 Pierre Ossman, All Rights Reserved. |
1da177e4 LT |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
643f720c PO |
7 | * it under the terms of the GNU General Public License as published by |
8 | * the Free Software Foundation; either version 2 of the License, or (at | |
9 | * your option) any later version. | |
1da177e4 LT |
10 | * |
11 | * | |
12 | * Warning! | |
13 | * | |
14 | * Changes to the FIFO system should be done with extreme care since | |
15 | * the hardware is full of bugs related to the FIFO. Known issues are: | |
16 | * | |
17 | * - FIFO size field in FSR is always zero. | |
18 | * | |
19 | * - FIFO interrupts tend not to work as they should. Interrupts are | |
20 | * triggered only for full/empty events, not for threshold values. | |
21 | * | |
22 | * - On APIC systems the FIFO empty interrupt is sometimes lost. | |
23 | */ | |
24 | ||
1da177e4 LT |
25 | #include <linux/module.h> |
26 | #include <linux/moduleparam.h> | |
27 | #include <linux/init.h> | |
28 | #include <linux/ioport.h> | |
d052d1be | 29 | #include <linux/platform_device.h> |
1da177e4 | 30 | #include <linux/interrupt.h> |
85bcc130 | 31 | #include <linux/dma-mapping.h> |
1da177e4 | 32 | #include <linux/delay.h> |
85bcc130 | 33 | #include <linux/pnp.h> |
1da177e4 LT |
34 | #include <linux/highmem.h> |
35 | #include <linux/mmc/host.h> | |
bd6dee6f | 36 | #include <linux/scatterlist.h> |
1da177e4 LT |
37 | |
38 | #include <asm/io.h> | |
39 | #include <asm/dma.h> | |
1da177e4 LT |
40 | |
41 | #include "wbsd.h" | |
42 | ||
43 | #define DRIVER_NAME "wbsd" | |
1da177e4 | 44 | |
1da177e4 | 45 | #define DBG(x...) \ |
c6563178 | 46 | pr_debug(DRIVER_NAME ": " x) |
1da177e4 | 47 | #define DBGF(f, x...) \ |
c6563178 | 48 | pr_debug(DRIVER_NAME " [%s()]: " f, __func__ , ##x) |
1da177e4 | 49 | |
85bcc130 PO |
50 | /* |
51 | * Device resources | |
52 | */ | |
53 | ||
54 | #ifdef CONFIG_PNP | |
55 | ||
56 | static const struct pnp_device_id pnp_dev_table[] = { | |
57 | { "WEC0517", 0 }, | |
58 | { "WEC0518", 0 }, | |
59 | { "", 0 }, | |
60 | }; | |
61 | ||
62 | MODULE_DEVICE_TABLE(pnp, pnp_dev_table); | |
63 | ||
64 | #endif /* CONFIG_PNP */ | |
65 | ||
3eee0d03 AB |
66 | static const int config_ports[] = { 0x2E, 0x4E }; |
67 | static const int unlock_codes[] = { 0x83, 0x87 }; | |
68 | ||
69 | static const int valid_ids[] = { | |
70 | 0x7112, | |
9eeebd22 | 71 | }; |
3eee0d03 | 72 | |
85bcc130 | 73 | #ifdef CONFIG_PNP |
9eeebd22 | 74 | static unsigned int param_nopnp = 0; |
85bcc130 | 75 | #else |
9eeebd22 | 76 | static const unsigned int param_nopnp = 1; |
85bcc130 | 77 | #endif |
9eeebd22 TW |
78 | static unsigned int param_io = 0x248; |
79 | static unsigned int param_irq = 6; | |
80 | static int param_dma = 2; | |
85bcc130 | 81 | |
1da177e4 LT |
82 | /* |
83 | * Basic functions | |
84 | */ | |
85 | ||
cfa7f521 | 86 | static inline void wbsd_unlock_config(struct wbsd_host *host) |
1da177e4 | 87 | { |
85bcc130 | 88 | BUG_ON(host->config == 0); |
fecf92ba | 89 | |
1da177e4 LT |
90 | outb(host->unlock_code, host->config); |
91 | outb(host->unlock_code, host->config); | |
92 | } | |
93 | ||
cfa7f521 | 94 | static inline void wbsd_lock_config(struct wbsd_host *host) |
1da177e4 | 95 | { |
85bcc130 | 96 | BUG_ON(host->config == 0); |
fecf92ba | 97 | |
1da177e4 LT |
98 | outb(LOCK_CODE, host->config); |
99 | } | |
100 | ||
cfa7f521 | 101 | static inline void wbsd_write_config(struct wbsd_host *host, u8 reg, u8 value) |
1da177e4 | 102 | { |
85bcc130 | 103 | BUG_ON(host->config == 0); |
fecf92ba | 104 | |
1da177e4 LT |
105 | outb(reg, host->config); |
106 | outb(value, host->config + 1); | |
107 | } | |
108 | ||
cfa7f521 | 109 | static inline u8 wbsd_read_config(struct wbsd_host *host, u8 reg) |
1da177e4 | 110 | { |
85bcc130 | 111 | BUG_ON(host->config == 0); |
fecf92ba | 112 | |
1da177e4 LT |
113 | outb(reg, host->config); |
114 | return inb(host->config + 1); | |
115 | } | |
116 | ||
cfa7f521 | 117 | static inline void wbsd_write_index(struct wbsd_host *host, u8 index, u8 value) |
1da177e4 LT |
118 | { |
119 | outb(index, host->base + WBSD_IDXR); | |
120 | outb(value, host->base + WBSD_DATAR); | |
121 | } | |
122 | ||
cfa7f521 | 123 | static inline u8 wbsd_read_index(struct wbsd_host *host, u8 index) |
1da177e4 LT |
124 | { |
125 | outb(index, host->base + WBSD_IDXR); | |
126 | return inb(host->base + WBSD_DATAR); | |
127 | } | |
128 | ||
129 | /* | |
130 | * Common routines | |
131 | */ | |
132 | ||
cfa7f521 | 133 | static void wbsd_init_device(struct wbsd_host *host) |
1da177e4 LT |
134 | { |
135 | u8 setup, ier; | |
fecf92ba | 136 | |
1da177e4 LT |
137 | /* |
138 | * Reset chip (SD/MMC part) and fifo. | |
139 | */ | |
140 | setup = wbsd_read_index(host, WBSD_IDX_SETUP); | |
141 | setup |= WBSD_FIFO_RESET | WBSD_SOFT_RESET; | |
142 | wbsd_write_index(host, WBSD_IDX_SETUP, setup); | |
fecf92ba | 143 | |
85bcc130 PO |
144 | /* |
145 | * Set DAT3 to input | |
146 | */ | |
147 | setup &= ~WBSD_DAT3_H; | |
148 | wbsd_write_index(host, WBSD_IDX_SETUP, setup); | |
149 | host->flags &= ~WBSD_FIGNORE_DETECT; | |
fecf92ba | 150 | |
1da177e4 LT |
151 | /* |
152 | * Read back default clock. | |
153 | */ | |
154 | host->clk = wbsd_read_index(host, WBSD_IDX_CLK); | |
155 | ||
156 | /* | |
157 | * Power down port. | |
158 | */ | |
159 | outb(WBSD_POWER_N, host->base + WBSD_CSR); | |
fecf92ba | 160 | |
1da177e4 LT |
161 | /* |
162 | * Set maximum timeout. | |
163 | */ | |
164 | wbsd_write_index(host, WBSD_IDX_TAAC, 0x7F); | |
fecf92ba | 165 | |
85bcc130 PO |
166 | /* |
167 | * Test for card presence | |
168 | */ | |
169 | if (inb(host->base + WBSD_CSR) & WBSD_CARDPRESENT) | |
170 | host->flags |= WBSD_FCARD_PRESENT; | |
171 | else | |
172 | host->flags &= ~WBSD_FCARD_PRESENT; | |
fecf92ba | 173 | |
1da177e4 LT |
174 | /* |
175 | * Enable interesting interrupts. | |
176 | */ | |
177 | ier = 0; | |
178 | ier |= WBSD_EINT_CARD; | |
179 | ier |= WBSD_EINT_FIFO_THRE; | |
1da177e4 | 180 | ier |= WBSD_EINT_CRC; |
5721dbf2 | 181 | ier |= WBSD_EINT_TIMEOUT; |
1da177e4 LT |
182 | ier |= WBSD_EINT_TC; |
183 | ||
184 | outb(ier, host->base + WBSD_EIR); | |
185 | ||
186 | /* | |
187 | * Clear interrupts. | |
188 | */ | |
189 | inb(host->base + WBSD_ISR); | |
190 | } | |
191 | ||
cfa7f521 | 192 | static void wbsd_reset(struct wbsd_host *host) |
1da177e4 LT |
193 | { |
194 | u8 setup; | |
fecf92ba | 195 | |
d191634f | 196 | printk(KERN_ERR "%s: Resetting chip\n", mmc_hostname(host->mmc)); |
fecf92ba | 197 | |
1da177e4 LT |
198 | /* |
199 | * Soft reset of chip (SD/MMC part). | |
200 | */ | |
201 | setup = wbsd_read_index(host, WBSD_IDX_SETUP); | |
202 | setup |= WBSD_SOFT_RESET; | |
203 | wbsd_write_index(host, WBSD_IDX_SETUP, setup); | |
204 | } | |
205 | ||
cfa7f521 | 206 | static void wbsd_request_end(struct wbsd_host *host, struct mmc_request *mrq) |
1da177e4 LT |
207 | { |
208 | unsigned long dmaflags; | |
fecf92ba | 209 | |
cfa7f521 | 210 | if (host->dma >= 0) { |
1da177e4 LT |
211 | /* |
212 | * Release ISA DMA controller. | |
213 | */ | |
214 | dmaflags = claim_dma_lock(); | |
215 | disable_dma(host->dma); | |
216 | clear_dma_ff(host->dma); | |
217 | release_dma_lock(dmaflags); | |
218 | ||
219 | /* | |
220 | * Disable DMA on host. | |
221 | */ | |
222 | wbsd_write_index(host, WBSD_IDX_DMA, 0); | |
223 | } | |
fecf92ba | 224 | |
1da177e4 LT |
225 | host->mrq = NULL; |
226 | ||
227 | /* | |
228 | * MMC layer might call back into the driver so first unlock. | |
229 | */ | |
230 | spin_unlock(&host->lock); | |
231 | mmc_request_done(host->mmc, mrq); | |
232 | spin_lock(&host->lock); | |
233 | } | |
234 | ||
235 | /* | |
236 | * Scatter/gather functions | |
237 | */ | |
238 | ||
cfa7f521 | 239 | static inline void wbsd_init_sg(struct wbsd_host *host, struct mmc_data *data) |
1da177e4 LT |
240 | { |
241 | /* | |
242 | * Get info. about SG list from data structure. | |
243 | */ | |
244 | host->cur_sg = data->sg; | |
245 | host->num_sg = data->sg_len; | |
246 | ||
247 | host->offset = 0; | |
248 | host->remain = host->cur_sg->length; | |
249 | } | |
250 | ||
cfa7f521 | 251 | static inline int wbsd_next_sg(struct wbsd_host *host) |
1da177e4 LT |
252 | { |
253 | /* | |
254 | * Skip to next SG entry. | |
255 | */ | |
256 | host->cur_sg++; | |
257 | host->num_sg--; | |
258 | ||
259 | /* | |
260 | * Any entries left? | |
261 | */ | |
cfa7f521 PO |
262 | if (host->num_sg > 0) { |
263 | host->offset = 0; | |
264 | host->remain = host->cur_sg->length; | |
265 | } | |
fecf92ba | 266 | |
1da177e4 LT |
267 | return host->num_sg; |
268 | } | |
269 | ||
4a0ddbd2 | 270 | static inline char *wbsd_sg_to_buffer(struct wbsd_host *host) |
1da177e4 | 271 | { |
45711f1a | 272 | return sg_virt(host->cur_sg); |
1da177e4 LT |
273 | } |
274 | ||
cfa7f521 | 275 | static inline void wbsd_sg_to_dma(struct wbsd_host *host, struct mmc_data *data) |
1da177e4 | 276 | { |
14d836e7 | 277 | unsigned int len, i; |
cfa7f521 PO |
278 | struct scatterlist *sg; |
279 | char *dmabuf = host->dma_buffer; | |
280 | char *sgbuf; | |
fecf92ba | 281 | |
1da177e4 LT |
282 | sg = data->sg; |
283 | len = data->sg_len; | |
fecf92ba | 284 | |
cfa7f521 | 285 | for (i = 0; i < len; i++) { |
45711f1a | 286 | sgbuf = sg_virt(&sg[i]); |
14d836e7 | 287 | memcpy(dmabuf, sgbuf, sg[i].length); |
1da177e4 | 288 | dmabuf += sg[i].length; |
1da177e4 | 289 | } |
1da177e4 LT |
290 | } |
291 | ||
cfa7f521 | 292 | static inline void wbsd_dma_to_sg(struct wbsd_host *host, struct mmc_data *data) |
1da177e4 | 293 | { |
14d836e7 | 294 | unsigned int len, i; |
cfa7f521 PO |
295 | struct scatterlist *sg; |
296 | char *dmabuf = host->dma_buffer; | |
297 | char *sgbuf; | |
fecf92ba | 298 | |
1da177e4 LT |
299 | sg = data->sg; |
300 | len = data->sg_len; | |
fecf92ba | 301 | |
cfa7f521 | 302 | for (i = 0; i < len; i++) { |
45711f1a | 303 | sgbuf = sg_virt(&sg[i]); |
14d836e7 | 304 | memcpy(sgbuf, dmabuf, sg[i].length); |
1da177e4 | 305 | dmabuf += sg[i].length; |
1da177e4 | 306 | } |
1da177e4 LT |
307 | } |
308 | ||
309 | /* | |
310 | * Command handling | |
311 | */ | |
fecf92ba | 312 | |
cfa7f521 PO |
313 | static inline void wbsd_get_short_reply(struct wbsd_host *host, |
314 | struct mmc_command *cmd) | |
1da177e4 LT |
315 | { |
316 | /* | |
317 | * Correct response type? | |
318 | */ | |
cfa7f521 | 319 | if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_SHORT) { |
17b0429d | 320 | cmd->error = -EILSEQ; |
1da177e4 LT |
321 | return; |
322 | } | |
fecf92ba | 323 | |
cfa7f521 PO |
324 | cmd->resp[0] = wbsd_read_index(host, WBSD_IDX_RESP12) << 24; |
325 | cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP13) << 16; | |
326 | cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP14) << 8; | |
327 | cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP15) << 0; | |
328 | cmd->resp[1] = wbsd_read_index(host, WBSD_IDX_RESP16) << 24; | |
1da177e4 LT |
329 | } |
330 | ||
cfa7f521 PO |
331 | static inline void wbsd_get_long_reply(struct wbsd_host *host, |
332 | struct mmc_command *cmd) | |
1da177e4 LT |
333 | { |
334 | int i; | |
fecf92ba | 335 | |
1da177e4 LT |
336 | /* |
337 | * Correct response type? | |
338 | */ | |
cfa7f521 | 339 | if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_LONG) { |
17b0429d | 340 | cmd->error = -EILSEQ; |
1da177e4 LT |
341 | return; |
342 | } | |
fecf92ba | 343 | |
cfa7f521 | 344 | for (i = 0; i < 4; i++) { |
1da177e4 LT |
345 | cmd->resp[i] = |
346 | wbsd_read_index(host, WBSD_IDX_RESP1 + i * 4) << 24; | |
347 | cmd->resp[i] |= | |
348 | wbsd_read_index(host, WBSD_IDX_RESP2 + i * 4) << 16; | |
349 | cmd->resp[i] |= | |
350 | wbsd_read_index(host, WBSD_IDX_RESP3 + i * 4) << 8; | |
351 | cmd->resp[i] |= | |
352 | wbsd_read_index(host, WBSD_IDX_RESP4 + i * 4) << 0; | |
353 | } | |
354 | } | |
355 | ||
cfa7f521 | 356 | static void wbsd_send_command(struct wbsd_host *host, struct mmc_command *cmd) |
1da177e4 LT |
357 | { |
358 | int i; | |
359 | u8 status, isr; | |
fecf92ba | 360 | |
1da177e4 LT |
361 | /* |
362 | * Clear accumulated ISR. The interrupt routine | |
363 | * will fill this one with events that occur during | |
364 | * transfer. | |
365 | */ | |
366 | host->isr = 0; | |
fecf92ba | 367 | |
1da177e4 LT |
368 | /* |
369 | * Send the command (CRC calculated by host). | |
370 | */ | |
371 | outb(cmd->opcode, host->base + WBSD_CMDR); | |
cfa7f521 | 372 | for (i = 3; i >= 0; i--) |
1da177e4 | 373 | outb((cmd->arg >> (i * 8)) & 0xff, host->base + WBSD_CMDR); |
fecf92ba | 374 | |
17b0429d | 375 | cmd->error = 0; |
fecf92ba | 376 | |
1da177e4 LT |
377 | /* |
378 | * Wait for the request to complete. | |
379 | */ | |
380 | do { | |
381 | status = wbsd_read_index(host, WBSD_IDX_STATUS); | |
382 | } while (status & WBSD_CARDTRAFFIC); | |
383 | ||
384 | /* | |
385 | * Do we expect a reply? | |
386 | */ | |
e9225176 | 387 | if (cmd->flags & MMC_RSP_PRESENT) { |
1da177e4 LT |
388 | /* |
389 | * Read back status. | |
390 | */ | |
391 | isr = host->isr; | |
fecf92ba | 392 | |
1da177e4 LT |
393 | /* Card removed? */ |
394 | if (isr & WBSD_INT_CARD) | |
17b0429d | 395 | cmd->error = -ENOMEDIUM; |
1da177e4 LT |
396 | /* Timeout? */ |
397 | else if (isr & WBSD_INT_TIMEOUT) | |
17b0429d | 398 | cmd->error = -ETIMEDOUT; |
1da177e4 LT |
399 | /* CRC? */ |
400 | else if ((cmd->flags & MMC_RSP_CRC) && (isr & WBSD_INT_CRC)) | |
17b0429d | 401 | cmd->error = -EILSEQ; |
1da177e4 | 402 | /* All ok */ |
cfa7f521 | 403 | else { |
e9225176 | 404 | if (cmd->flags & MMC_RSP_136) |
1da177e4 | 405 | wbsd_get_long_reply(host, cmd); |
e9225176 RK |
406 | else |
407 | wbsd_get_short_reply(host, cmd); | |
1da177e4 LT |
408 | } |
409 | } | |
1da177e4 LT |
410 | } |
411 | ||
412 | /* | |
413 | * Data functions | |
414 | */ | |
415 | ||
cfa7f521 | 416 | static void wbsd_empty_fifo(struct wbsd_host *host) |
1da177e4 | 417 | { |
cfa7f521 PO |
418 | struct mmc_data *data = host->mrq->cmd->data; |
419 | char *buffer; | |
1da177e4 | 420 | int i, fsr, fifo; |
fecf92ba | 421 | |
1da177e4 LT |
422 | /* |
423 | * Handle excessive data. | |
424 | */ | |
14d836e7 | 425 | if (host->num_sg == 0) |
1da177e4 | 426 | return; |
fecf92ba | 427 | |
4a0ddbd2 | 428 | buffer = wbsd_sg_to_buffer(host) + host->offset; |
1da177e4 LT |
429 | |
430 | /* | |
431 | * Drain the fifo. This has a tendency to loop longer | |
432 | * than the FIFO length (usually one block). | |
433 | */ | |
cfa7f521 | 434 | while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_EMPTY)) { |
1da177e4 LT |
435 | /* |
436 | * The size field in the FSR is broken so we have to | |
437 | * do some guessing. | |
fecf92ba | 438 | */ |
1da177e4 LT |
439 | if (fsr & WBSD_FIFO_FULL) |
440 | fifo = 16; | |
441 | else if (fsr & WBSD_FIFO_FUTHRE) | |
442 | fifo = 8; | |
443 | else | |
444 | fifo = 1; | |
fecf92ba | 445 | |
cfa7f521 | 446 | for (i = 0; i < fifo; i++) { |
1da177e4 LT |
447 | *buffer = inb(host->base + WBSD_DFR); |
448 | buffer++; | |
449 | host->offset++; | |
450 | host->remain--; | |
451 | ||
452 | data->bytes_xfered++; | |
fecf92ba | 453 | |
1da177e4 LT |
454 | /* |
455 | * End of scatter list entry? | |
456 | */ | |
cfa7f521 | 457 | if (host->remain == 0) { |
1da177e4 LT |
458 | /* |
459 | * Get next entry. Check if last. | |
460 | */ | |
14d836e7 | 461 | if (!wbsd_next_sg(host)) |
1da177e4 | 462 | return; |
fecf92ba | 463 | |
4a0ddbd2 | 464 | buffer = wbsd_sg_to_buffer(host); |
1da177e4 LT |
465 | } |
466 | } | |
467 | } | |
fecf92ba | 468 | |
1da177e4 LT |
469 | /* |
470 | * This is a very dirty hack to solve a | |
471 | * hardware problem. The chip doesn't trigger | |
472 | * FIFO threshold interrupts properly. | |
473 | */ | |
14d836e7 | 474 | if ((data->blocks * data->blksz - data->bytes_xfered) < 16) |
1da177e4 LT |
475 | tasklet_schedule(&host->fifo_tasklet); |
476 | } | |
477 | ||
cfa7f521 | 478 | static void wbsd_fill_fifo(struct wbsd_host *host) |
1da177e4 | 479 | { |
cfa7f521 PO |
480 | struct mmc_data *data = host->mrq->cmd->data; |
481 | char *buffer; | |
1da177e4 | 482 | int i, fsr, fifo; |
fecf92ba | 483 | |
1da177e4 LT |
484 | /* |
485 | * Check that we aren't being called after the | |
486 | * entire buffer has been transfered. | |
487 | */ | |
14d836e7 | 488 | if (host->num_sg == 0) |
1da177e4 LT |
489 | return; |
490 | ||
4a0ddbd2 | 491 | buffer = wbsd_sg_to_buffer(host) + host->offset; |
1da177e4 LT |
492 | |
493 | /* | |
494 | * Fill the fifo. This has a tendency to loop longer | |
495 | * than the FIFO length (usually one block). | |
496 | */ | |
cfa7f521 | 497 | while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_FULL)) { |
1da177e4 LT |
498 | /* |
499 | * The size field in the FSR is broken so we have to | |
500 | * do some guessing. | |
fecf92ba | 501 | */ |
1da177e4 LT |
502 | if (fsr & WBSD_FIFO_EMPTY) |
503 | fifo = 0; | |
504 | else if (fsr & WBSD_FIFO_EMTHRE) | |
505 | fifo = 8; | |
506 | else | |
507 | fifo = 15; | |
508 | ||
cfa7f521 | 509 | for (i = 16; i > fifo; i--) { |
1da177e4 LT |
510 | outb(*buffer, host->base + WBSD_DFR); |
511 | buffer++; | |
512 | host->offset++; | |
513 | host->remain--; | |
fecf92ba | 514 | |
1da177e4 | 515 | data->bytes_xfered++; |
fecf92ba | 516 | |
1da177e4 LT |
517 | /* |
518 | * End of scatter list entry? | |
519 | */ | |
cfa7f521 | 520 | if (host->remain == 0) { |
1da177e4 LT |
521 | /* |
522 | * Get next entry. Check if last. | |
523 | */ | |
14d836e7 | 524 | if (!wbsd_next_sg(host)) |
1da177e4 | 525 | return; |
fecf92ba | 526 | |
4a0ddbd2 | 527 | buffer = wbsd_sg_to_buffer(host); |
1da177e4 LT |
528 | } |
529 | } | |
530 | } | |
fecf92ba | 531 | |
85bcc130 PO |
532 | /* |
533 | * The controller stops sending interrupts for | |
534 | * 'FIFO empty' under certain conditions. So we | |
535 | * need to be a bit more pro-active. | |
536 | */ | |
537 | tasklet_schedule(&host->fifo_tasklet); | |
1da177e4 LT |
538 | } |
539 | ||
cfa7f521 | 540 | static void wbsd_prepare_data(struct wbsd_host *host, struct mmc_data *data) |
1da177e4 LT |
541 | { |
542 | u16 blksize; | |
543 | u8 setup; | |
544 | unsigned long dmaflags; | |
14d836e7 | 545 | unsigned int size; |
1da177e4 | 546 | |
1da177e4 LT |
547 | /* |
548 | * Calculate size. | |
549 | */ | |
14d836e7 | 550 | size = data->blocks * data->blksz; |
1da177e4 LT |
551 | |
552 | /* | |
553 | * Check timeout values for overflow. | |
554 | * (Yes, some cards cause this value to overflow). | |
555 | */ | |
556 | if (data->timeout_ns > 127000000) | |
557 | wbsd_write_index(host, WBSD_IDX_TAAC, 127); | |
cfa7f521 PO |
558 | else { |
559 | wbsd_write_index(host, WBSD_IDX_TAAC, | |
560 | data->timeout_ns / 1000000); | |
561 | } | |
fecf92ba | 562 | |
1da177e4 LT |
563 | if (data->timeout_clks > 255) |
564 | wbsd_write_index(host, WBSD_IDX_NSAC, 255); | |
565 | else | |
566 | wbsd_write_index(host, WBSD_IDX_NSAC, data->timeout_clks); | |
fecf92ba | 567 | |
1da177e4 LT |
568 | /* |
569 | * Inform the chip of how large blocks will be | |
570 | * sent. It needs this to determine when to | |
571 | * calculate CRC. | |
572 | * | |
573 | * Space for CRC must be included in the size. | |
65ae2118 | 574 | * Two bytes are needed for each data line. |
1da177e4 | 575 | */ |
cfa7f521 | 576 | if (host->bus_width == MMC_BUS_WIDTH_1) { |
2c171bf1 | 577 | blksize = data->blksz + 2; |
65ae2118 PO |
578 | |
579 | wbsd_write_index(host, WBSD_IDX_PBSMSB, (blksize >> 4) & 0xF0); | |
580 | wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF); | |
cfa7f521 | 581 | } else if (host->bus_width == MMC_BUS_WIDTH_4) { |
2c171bf1 | 582 | blksize = data->blksz + 2 * 4; |
fecf92ba | 583 | |
cfa7f521 PO |
584 | wbsd_write_index(host, WBSD_IDX_PBSMSB, |
585 | ((blksize >> 4) & 0xF0) | WBSD_DATA_WIDTH); | |
65ae2118 | 586 | wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF); |
cfa7f521 | 587 | } else { |
17b0429d | 588 | data->error = -EINVAL; |
65ae2118 PO |
589 | return; |
590 | } | |
1da177e4 LT |
591 | |
592 | /* | |
593 | * Clear the FIFO. This is needed even for DMA | |
594 | * transfers since the chip still uses the FIFO | |
595 | * internally. | |
596 | */ | |
597 | setup = wbsd_read_index(host, WBSD_IDX_SETUP); | |
598 | setup |= WBSD_FIFO_RESET; | |
599 | wbsd_write_index(host, WBSD_IDX_SETUP, setup); | |
fecf92ba | 600 | |
1da177e4 LT |
601 | /* |
602 | * DMA transfer? | |
603 | */ | |
cfa7f521 | 604 | if (host->dma >= 0) { |
1da177e4 LT |
605 | /* |
606 | * The buffer for DMA is only 64 kB. | |
607 | */ | |
14d836e7 AD |
608 | BUG_ON(size > 0x10000); |
609 | if (size > 0x10000) { | |
17b0429d | 610 | data->error = -EINVAL; |
1da177e4 LT |
611 | return; |
612 | } | |
fecf92ba | 613 | |
1da177e4 LT |
614 | /* |
615 | * Transfer data from the SG list to | |
616 | * the DMA buffer. | |
617 | */ | |
618 | if (data->flags & MMC_DATA_WRITE) | |
619 | wbsd_sg_to_dma(host, data); | |
fecf92ba | 620 | |
1da177e4 LT |
621 | /* |
622 | * Initialise the ISA DMA controller. | |
fecf92ba | 623 | */ |
1da177e4 LT |
624 | dmaflags = claim_dma_lock(); |
625 | disable_dma(host->dma); | |
626 | clear_dma_ff(host->dma); | |
627 | if (data->flags & MMC_DATA_READ) | |
628 | set_dma_mode(host->dma, DMA_MODE_READ & ~0x40); | |
629 | else | |
630 | set_dma_mode(host->dma, DMA_MODE_WRITE & ~0x40); | |
631 | set_dma_addr(host->dma, host->dma_addr); | |
14d836e7 | 632 | set_dma_count(host->dma, size); |
1da177e4 LT |
633 | |
634 | enable_dma(host->dma); | |
635 | release_dma_lock(dmaflags); | |
636 | ||
637 | /* | |
638 | * Enable DMA on the host. | |
639 | */ | |
640 | wbsd_write_index(host, WBSD_IDX_DMA, WBSD_DMA_ENABLE); | |
cfa7f521 | 641 | } else { |
1da177e4 LT |
642 | /* |
643 | * This flag is used to keep printk | |
644 | * output to a minimum. | |
645 | */ | |
646 | host->firsterr = 1; | |
fecf92ba | 647 | |
1da177e4 LT |
648 | /* |
649 | * Initialise the SG list. | |
650 | */ | |
651 | wbsd_init_sg(host, data); | |
fecf92ba | 652 | |
1da177e4 LT |
653 | /* |
654 | * Turn off DMA. | |
655 | */ | |
656 | wbsd_write_index(host, WBSD_IDX_DMA, 0); | |
fecf92ba | 657 | |
1da177e4 LT |
658 | /* |
659 | * Set up FIFO threshold levels (and fill | |
660 | * buffer if doing a write). | |
661 | */ | |
cfa7f521 | 662 | if (data->flags & MMC_DATA_READ) { |
1da177e4 LT |
663 | wbsd_write_index(host, WBSD_IDX_FIFOEN, |
664 | WBSD_FIFOEN_FULL | 8); | |
cfa7f521 | 665 | } else { |
1da177e4 LT |
666 | wbsd_write_index(host, WBSD_IDX_FIFOEN, |
667 | WBSD_FIFOEN_EMPTY | 8); | |
668 | wbsd_fill_fifo(host); | |
669 | } | |
fecf92ba PO |
670 | } |
671 | ||
17b0429d | 672 | data->error = 0; |
1da177e4 LT |
673 | } |
674 | ||
cfa7f521 | 675 | static void wbsd_finish_data(struct wbsd_host *host, struct mmc_data *data) |
1da177e4 LT |
676 | { |
677 | unsigned long dmaflags; | |
678 | int count; | |
679 | u8 status; | |
fecf92ba | 680 | |
1da177e4 LT |
681 | WARN_ON(host->mrq == NULL); |
682 | ||
683 | /* | |
684 | * Send a stop command if needed. | |
685 | */ | |
686 | if (data->stop) | |
687 | wbsd_send_command(host, data->stop); | |
688 | ||
689 | /* | |
690 | * Wait for the controller to leave data | |
691 | * transfer state. | |
692 | */ | |
cfa7f521 | 693 | do { |
1da177e4 LT |
694 | status = wbsd_read_index(host, WBSD_IDX_STATUS); |
695 | } while (status & (WBSD_BLOCK_READ | WBSD_BLOCK_WRITE)); | |
fecf92ba | 696 | |
1da177e4 LT |
697 | /* |
698 | * DMA transfer? | |
699 | */ | |
cfa7f521 | 700 | if (host->dma >= 0) { |
1da177e4 LT |
701 | /* |
702 | * Disable DMA on the host. | |
703 | */ | |
704 | wbsd_write_index(host, WBSD_IDX_DMA, 0); | |
fecf92ba | 705 | |
1da177e4 LT |
706 | /* |
707 | * Turn of ISA DMA controller. | |
708 | */ | |
709 | dmaflags = claim_dma_lock(); | |
710 | disable_dma(host->dma); | |
711 | clear_dma_ff(host->dma); | |
712 | count = get_dma_residue(host->dma); | |
713 | release_dma_lock(dmaflags); | |
fecf92ba | 714 | |
14d836e7 AD |
715 | data->bytes_xfered = host->mrq->data->blocks * |
716 | host->mrq->data->blksz - count; | |
717 | data->bytes_xfered -= data->bytes_xfered % data->blksz; | |
718 | ||
1da177e4 LT |
719 | /* |
720 | * Any leftover data? | |
721 | */ | |
cfa7f521 | 722 | if (count) { |
d191634f PO |
723 | printk(KERN_ERR "%s: Incomplete DMA transfer. " |
724 | "%d bytes left.\n", | |
725 | mmc_hostname(host->mmc), count); | |
fecf92ba | 726 | |
17b0429d PO |
727 | if (!data->error) |
728 | data->error = -EIO; | |
cfa7f521 | 729 | } else { |
1da177e4 LT |
730 | /* |
731 | * Transfer data from DMA buffer to | |
732 | * SG list. | |
733 | */ | |
734 | if (data->flags & MMC_DATA_READ) | |
735 | wbsd_dma_to_sg(host, data); | |
14d836e7 | 736 | } |
fecf92ba | 737 | |
17b0429d | 738 | if (data->error) { |
14d836e7 AD |
739 | if (data->bytes_xfered) |
740 | data->bytes_xfered -= data->blksz; | |
1da177e4 LT |
741 | } |
742 | } | |
fecf92ba | 743 | |
1da177e4 LT |
744 | wbsd_request_end(host, host->mrq); |
745 | } | |
746 | ||
85bcc130 PO |
747 | /*****************************************************************************\ |
748 | * * | |
749 | * MMC layer callbacks * | |
750 | * * | |
751 | \*****************************************************************************/ | |
1da177e4 | 752 | |
cfa7f521 | 753 | static void wbsd_request(struct mmc_host *mmc, struct mmc_request *mrq) |
1da177e4 | 754 | { |
cfa7f521 PO |
755 | struct wbsd_host *host = mmc_priv(mmc); |
756 | struct mmc_command *cmd; | |
1da177e4 LT |
757 | |
758 | /* | |
759 | * Disable tasklets to avoid a deadlock. | |
760 | */ | |
761 | spin_lock_bh(&host->lock); | |
762 | ||
763 | BUG_ON(host->mrq != NULL); | |
764 | ||
765 | cmd = mrq->cmd; | |
766 | ||
767 | host->mrq = mrq; | |
fecf92ba | 768 | |
1da177e4 | 769 | /* |
17b0429d | 770 | * Check that there is actually a card in the slot. |
1da177e4 | 771 | */ |
cfa7f521 | 772 | if (!(host->flags & WBSD_FCARD_PRESENT)) { |
17b0429d | 773 | cmd->error = -ENOMEDIUM; |
1da177e4 LT |
774 | goto done; |
775 | } | |
776 | ||
cfa7f521 | 777 | if (cmd->data) { |
5ba593a9 PO |
778 | /* |
779 | * The hardware is so delightfully stupid that it has a list | |
780 | * of "data" commands. If a command isn't on this list, it'll | |
781 | * just go back to the idle state and won't send any data | |
782 | * interrupts. | |
783 | */ | |
784 | switch (cmd->opcode) { | |
785 | case 11: | |
786 | case 17: | |
787 | case 18: | |
788 | case 20: | |
789 | case 24: | |
790 | case 25: | |
791 | case 26: | |
792 | case 27: | |
793 | case 30: | |
794 | case 42: | |
795 | case 56: | |
796 | break; | |
797 | ||
798 | /* ACMDs. We don't keep track of state, so we just treat them | |
799 | * like any other command. */ | |
800 | case 51: | |
801 | break; | |
802 | ||
803 | default: | |
804 | #ifdef CONFIG_MMC_DEBUG | |
805 | printk(KERN_WARNING "%s: Data command %d is not " | |
806 | "supported by this controller.\n", | |
807 | mmc_hostname(host->mmc), cmd->opcode); | |
808 | #endif | |
17b0429d | 809 | cmd->error = -EINVAL; |
5ba593a9 PO |
810 | |
811 | goto done; | |
812 | }; | |
b2670b1c | 813 | } |
5ba593a9 | 814 | |
b2670b1c PO |
815 | /* |
816 | * Does the request include data? | |
817 | */ | |
818 | if (cmd->data) { | |
819 | wbsd_prepare_data(host, cmd->data); | |
820 | ||
17b0429d | 821 | if (cmd->data->error) |
b2670b1c PO |
822 | goto done; |
823 | } | |
824 | ||
825 | wbsd_send_command(host, cmd); | |
826 | ||
827 | /* | |
828 | * If this is a data transfer the request | |
829 | * will be finished after the data has | |
830 | * transfered. | |
831 | */ | |
17b0429d | 832 | if (cmd->data && !cmd->error) { |
1da177e4 LT |
833 | /* |
834 | * Dirty fix for hardware bug. | |
835 | */ | |
836 | if (host->dma == -1) | |
837 | tasklet_schedule(&host->fifo_tasklet); | |
838 | ||
839 | spin_unlock_bh(&host->lock); | |
840 | ||
841 | return; | |
842 | } | |
fecf92ba | 843 | |
1da177e4 LT |
844 | done: |
845 | wbsd_request_end(host, mrq); | |
846 | ||
847 | spin_unlock_bh(&host->lock); | |
848 | } | |
849 | ||
cfa7f521 | 850 | static void wbsd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) |
1da177e4 | 851 | { |
cfa7f521 | 852 | struct wbsd_host *host = mmc_priv(mmc); |
1da177e4 | 853 | u8 clk, setup, pwr; |
fecf92ba | 854 | |
1da177e4 LT |
855 | spin_lock_bh(&host->lock); |
856 | ||
857 | /* | |
858 | * Reset the chip on each power off. | |
859 | * Should clear out any weird states. | |
860 | */ | |
861 | if (ios->power_mode == MMC_POWER_OFF) | |
862 | wbsd_init_device(host); | |
fecf92ba | 863 | |
1da177e4 LT |
864 | if (ios->clock >= 24000000) |
865 | clk = WBSD_CLK_24M; | |
866 | else if (ios->clock >= 16000000) | |
867 | clk = WBSD_CLK_16M; | |
868 | else if (ios->clock >= 12000000) | |
869 | clk = WBSD_CLK_12M; | |
870 | else | |
871 | clk = WBSD_CLK_375K; | |
872 | ||
873 | /* | |
874 | * Only write to the clock register when | |
875 | * there is an actual change. | |
876 | */ | |
cfa7f521 | 877 | if (clk != host->clk) { |
1da177e4 LT |
878 | wbsd_write_index(host, WBSD_IDX_CLK, clk); |
879 | host->clk = clk; | |
880 | } | |
881 | ||
85bcc130 PO |
882 | /* |
883 | * Power up card. | |
884 | */ | |
cfa7f521 | 885 | if (ios->power_mode != MMC_POWER_OFF) { |
1da177e4 LT |
886 | pwr = inb(host->base + WBSD_CSR); |
887 | pwr &= ~WBSD_POWER_N; | |
888 | outb(pwr, host->base + WBSD_CSR); | |
1da177e4 LT |
889 | } |
890 | ||
85bcc130 PO |
891 | /* |
892 | * MMC cards need to have pin 1 high during init. | |
85bcc130 | 893 | * It wreaks havoc with the card detection though so |
1656fa57 | 894 | * that needs to be disabled. |
85bcc130 PO |
895 | */ |
896 | setup = wbsd_read_index(host, WBSD_IDX_SETUP); | |
cfa7f521 | 897 | if (ios->chip_select == MMC_CS_HIGH) { |
65ae2118 | 898 | BUG_ON(ios->bus_width != MMC_BUS_WIDTH_1); |
85bcc130 PO |
899 | setup |= WBSD_DAT3_H; |
900 | host->flags |= WBSD_FIGNORE_DETECT; | |
cfa7f521 PO |
901 | } else { |
902 | if (setup & WBSD_DAT3_H) { | |
19c1f3ca | 903 | setup &= ~WBSD_DAT3_H; |
1656fa57 | 904 | |
19c1f3ca PO |
905 | /* |
906 | * We cannot resume card detection immediatly | |
907 | * because of capacitance and delays in the chip. | |
908 | */ | |
cfa7f521 | 909 | mod_timer(&host->ignore_timer, jiffies + HZ / 100); |
19c1f3ca | 910 | } |
85bcc130 PO |
911 | } |
912 | wbsd_write_index(host, WBSD_IDX_SETUP, setup); | |
fecf92ba | 913 | |
65ae2118 PO |
914 | /* |
915 | * Store bus width for later. Will be used when | |
916 | * setting up the data transfer. | |
917 | */ | |
918 | host->bus_width = ios->bus_width; | |
919 | ||
1da177e4 LT |
920 | spin_unlock_bh(&host->lock); |
921 | } | |
922 | ||
cfa7f521 | 923 | static int wbsd_get_ro(struct mmc_host *mmc) |
65ae2118 | 924 | { |
cfa7f521 | 925 | struct wbsd_host *host = mmc_priv(mmc); |
65ae2118 PO |
926 | u8 csr; |
927 | ||
928 | spin_lock_bh(&host->lock); | |
929 | ||
930 | csr = inb(host->base + WBSD_CSR); | |
931 | csr |= WBSD_MSLED; | |
932 | outb(csr, host->base + WBSD_CSR); | |
933 | ||
934 | mdelay(1); | |
935 | ||
936 | csr = inb(host->base + WBSD_CSR); | |
937 | csr &= ~WBSD_MSLED; | |
938 | outb(csr, host->base + WBSD_CSR); | |
939 | ||
940 | spin_unlock_bh(&host->lock); | |
941 | ||
08f80bb5 | 942 | return !!(csr & WBSD_WRPT); |
65ae2118 PO |
943 | } |
944 | ||
ab7aefd0 | 945 | static const struct mmc_host_ops wbsd_ops = { |
85bcc130 PO |
946 | .request = wbsd_request, |
947 | .set_ios = wbsd_set_ios, | |
65ae2118 | 948 | .get_ro = wbsd_get_ro, |
85bcc130 PO |
949 | }; |
950 | ||
951 | /*****************************************************************************\ | |
952 | * * | |
953 | * Interrupt handling * | |
954 | * * | |
955 | \*****************************************************************************/ | |
956 | ||
1656fa57 PO |
957 | /* |
958 | * Helper function to reset detection ignore | |
959 | */ | |
960 | ||
961 | static void wbsd_reset_ignore(unsigned long data) | |
962 | { | |
cfa7f521 | 963 | struct wbsd_host *host = (struct wbsd_host *)data; |
1656fa57 PO |
964 | |
965 | BUG_ON(host == NULL); | |
966 | ||
967 | DBG("Resetting card detection ignore\n"); | |
968 | ||
969 | spin_lock_bh(&host->lock); | |
970 | ||
971 | host->flags &= ~WBSD_FIGNORE_DETECT; | |
972 | ||
973 | /* | |
974 | * Card status might have changed during the | |
975 | * blackout. | |
976 | */ | |
977 | tasklet_schedule(&host->card_tasklet); | |
978 | ||
979 | spin_unlock_bh(&host->lock); | |
980 | } | |
981 | ||
1da177e4 LT |
982 | /* |
983 | * Tasklets | |
984 | */ | |
985 | ||
cfa7f521 | 986 | static inline struct mmc_data *wbsd_get_data(struct wbsd_host *host) |
1da177e4 LT |
987 | { |
988 | WARN_ON(!host->mrq); | |
989 | if (!host->mrq) | |
990 | return NULL; | |
991 | ||
992 | WARN_ON(!host->mrq->cmd); | |
993 | if (!host->mrq->cmd) | |
994 | return NULL; | |
995 | ||
996 | WARN_ON(!host->mrq->cmd->data); | |
997 | if (!host->mrq->cmd->data) | |
998 | return NULL; | |
fecf92ba | 999 | |
1da177e4 LT |
1000 | return host->mrq->cmd->data; |
1001 | } | |
1002 | ||
1003 | static void wbsd_tasklet_card(unsigned long param) | |
1004 | { | |
cfa7f521 | 1005 | struct wbsd_host *host = (struct wbsd_host *)param; |
1da177e4 | 1006 | u8 csr; |
210ce2a7 | 1007 | int delay = -1; |
fecf92ba | 1008 | |
1da177e4 | 1009 | spin_lock(&host->lock); |
fecf92ba | 1010 | |
cfa7f521 | 1011 | if (host->flags & WBSD_FIGNORE_DETECT) { |
85bcc130 PO |
1012 | spin_unlock(&host->lock); |
1013 | return; | |
1014 | } | |
fecf92ba | 1015 | |
1da177e4 LT |
1016 | csr = inb(host->base + WBSD_CSR); |
1017 | WARN_ON(csr == 0xff); | |
fecf92ba | 1018 | |
cfa7f521 PO |
1019 | if (csr & WBSD_CARDPRESENT) { |
1020 | if (!(host->flags & WBSD_FCARD_PRESENT)) { | |
85bcc130 PO |
1021 | DBG("Card inserted\n"); |
1022 | host->flags |= WBSD_FCARD_PRESENT; | |
fecf92ba | 1023 | |
210ce2a7 | 1024 | delay = 500; |
85bcc130 | 1025 | } |
cfa7f521 | 1026 | } else if (host->flags & WBSD_FCARD_PRESENT) { |
1da177e4 | 1027 | DBG("Card removed\n"); |
85bcc130 | 1028 | host->flags &= ~WBSD_FCARD_PRESENT; |
fecf92ba | 1029 | |
cfa7f521 | 1030 | if (host->mrq) { |
d191634f PO |
1031 | printk(KERN_ERR "%s: Card removed during transfer!\n", |
1032 | mmc_hostname(host->mmc)); | |
1da177e4 | 1033 | wbsd_reset(host); |
fecf92ba | 1034 | |
17b0429d | 1035 | host->mrq->cmd->error = -ENOMEDIUM; |
1da177e4 LT |
1036 | tasklet_schedule(&host->finish_tasklet); |
1037 | } | |
fecf92ba | 1038 | |
210ce2a7 | 1039 | delay = 0; |
6e6293dd | 1040 | } |
210ce2a7 PO |
1041 | |
1042 | /* | |
1043 | * Unlock first since we might get a call back. | |
1044 | */ | |
1045 | ||
1046 | spin_unlock(&host->lock); | |
1047 | ||
1048 | if (delay != -1) | |
1049 | mmc_detect_change(host->mmc, msecs_to_jiffies(delay)); | |
1da177e4 LT |
1050 | } |
1051 | ||
1052 | static void wbsd_tasklet_fifo(unsigned long param) | |
1053 | { | |
cfa7f521 PO |
1054 | struct wbsd_host *host = (struct wbsd_host *)param; |
1055 | struct mmc_data *data; | |
fecf92ba | 1056 | |
1da177e4 | 1057 | spin_lock(&host->lock); |
fecf92ba | 1058 | |
1da177e4 LT |
1059 | if (!host->mrq) |
1060 | goto end; | |
fecf92ba | 1061 | |
1da177e4 LT |
1062 | data = wbsd_get_data(host); |
1063 | if (!data) | |
1064 | goto end; | |
1065 | ||
1066 | if (data->flags & MMC_DATA_WRITE) | |
1067 | wbsd_fill_fifo(host); | |
1068 | else | |
1069 | wbsd_empty_fifo(host); | |
1070 | ||
1071 | /* | |
1072 | * Done? | |
1073 | */ | |
14d836e7 | 1074 | if (host->num_sg == 0) { |
1da177e4 LT |
1075 | wbsd_write_index(host, WBSD_IDX_FIFOEN, 0); |
1076 | tasklet_schedule(&host->finish_tasklet); | |
1077 | } | |
1078 | ||
fecf92ba | 1079 | end: |
1da177e4 LT |
1080 | spin_unlock(&host->lock); |
1081 | } | |
1082 | ||
1083 | static void wbsd_tasklet_crc(unsigned long param) | |
1084 | { | |
cfa7f521 PO |
1085 | struct wbsd_host *host = (struct wbsd_host *)param; |
1086 | struct mmc_data *data; | |
fecf92ba | 1087 | |
1da177e4 | 1088 | spin_lock(&host->lock); |
fecf92ba | 1089 | |
1da177e4 LT |
1090 | if (!host->mrq) |
1091 | goto end; | |
fecf92ba | 1092 | |
1da177e4 LT |
1093 | data = wbsd_get_data(host); |
1094 | if (!data) | |
1095 | goto end; | |
fecf92ba | 1096 | |
1da177e4 LT |
1097 | DBGF("CRC error\n"); |
1098 | ||
17b0429d | 1099 | data->error = -EILSEQ; |
fecf92ba | 1100 | |
1da177e4 LT |
1101 | tasklet_schedule(&host->finish_tasklet); |
1102 | ||
fecf92ba | 1103 | end: |
1da177e4 LT |
1104 | spin_unlock(&host->lock); |
1105 | } | |
1106 | ||
1107 | static void wbsd_tasklet_timeout(unsigned long param) | |
1108 | { | |
cfa7f521 PO |
1109 | struct wbsd_host *host = (struct wbsd_host *)param; |
1110 | struct mmc_data *data; | |
fecf92ba | 1111 | |
1da177e4 | 1112 | spin_lock(&host->lock); |
fecf92ba | 1113 | |
1da177e4 LT |
1114 | if (!host->mrq) |
1115 | goto end; | |
fecf92ba | 1116 | |
1da177e4 LT |
1117 | data = wbsd_get_data(host); |
1118 | if (!data) | |
1119 | goto end; | |
fecf92ba | 1120 | |
1da177e4 LT |
1121 | DBGF("Timeout\n"); |
1122 | ||
17b0429d | 1123 | data->error = -ETIMEDOUT; |
fecf92ba | 1124 | |
1da177e4 LT |
1125 | tasklet_schedule(&host->finish_tasklet); |
1126 | ||
fecf92ba | 1127 | end: |
1da177e4 LT |
1128 | spin_unlock(&host->lock); |
1129 | } | |
1130 | ||
1131 | static void wbsd_tasklet_finish(unsigned long param) | |
1132 | { | |
cfa7f521 PO |
1133 | struct wbsd_host *host = (struct wbsd_host *)param; |
1134 | struct mmc_data *data; | |
fecf92ba | 1135 | |
1da177e4 | 1136 | spin_lock(&host->lock); |
fecf92ba | 1137 | |
1da177e4 LT |
1138 | WARN_ON(!host->mrq); |
1139 | if (!host->mrq) | |
1140 | goto end; | |
fecf92ba | 1141 | |
1da177e4 LT |
1142 | data = wbsd_get_data(host); |
1143 | if (!data) | |
1144 | goto end; | |
1145 | ||
1146 | wbsd_finish_data(host, data); | |
fecf92ba PO |
1147 | |
1148 | end: | |
1da177e4 LT |
1149 | spin_unlock(&host->lock); |
1150 | } | |
1151 | ||
1da177e4 LT |
1152 | /* |
1153 | * Interrupt handling | |
1154 | */ | |
1155 | ||
7d12e780 | 1156 | static irqreturn_t wbsd_irq(int irq, void *dev_id) |
1da177e4 | 1157 | { |
cfa7f521 | 1158 | struct wbsd_host *host = dev_id; |
1da177e4 | 1159 | int isr; |
fecf92ba | 1160 | |
1da177e4 LT |
1161 | isr = inb(host->base + WBSD_ISR); |
1162 | ||
1163 | /* | |
1164 | * Was it actually our hardware that caused the interrupt? | |
1165 | */ | |
1166 | if (isr == 0xff || isr == 0x00) | |
1167 | return IRQ_NONE; | |
fecf92ba | 1168 | |
1da177e4 LT |
1169 | host->isr |= isr; |
1170 | ||
1171 | /* | |
1172 | * Schedule tasklets as needed. | |
1173 | */ | |
1174 | if (isr & WBSD_INT_CARD) | |
1175 | tasklet_schedule(&host->card_tasklet); | |
1176 | if (isr & WBSD_INT_FIFO_THRE) | |
1177 | tasklet_schedule(&host->fifo_tasklet); | |
1178 | if (isr & WBSD_INT_CRC) | |
1179 | tasklet_hi_schedule(&host->crc_tasklet); | |
1180 | if (isr & WBSD_INT_TIMEOUT) | |
1181 | tasklet_hi_schedule(&host->timeout_tasklet); | |
1da177e4 LT |
1182 | if (isr & WBSD_INT_TC) |
1183 | tasklet_schedule(&host->finish_tasklet); | |
fecf92ba | 1184 | |
1da177e4 LT |
1185 | return IRQ_HANDLED; |
1186 | } | |
1187 | ||
85bcc130 PO |
1188 | /*****************************************************************************\ |
1189 | * * | |
1190 | * Device initialisation and shutdown * | |
1191 | * * | |
1192 | \*****************************************************************************/ | |
1193 | ||
1da177e4 | 1194 | /* |
85bcc130 | 1195 | * Allocate/free MMC structure. |
1da177e4 LT |
1196 | */ |
1197 | ||
cfa7f521 | 1198 | static int __devinit wbsd_alloc_mmc(struct device *dev) |
85bcc130 | 1199 | { |
cfa7f521 PO |
1200 | struct mmc_host *mmc; |
1201 | struct wbsd_host *host; | |
fecf92ba | 1202 | |
85bcc130 PO |
1203 | /* |
1204 | * Allocate MMC structure. | |
1205 | */ | |
1206 | mmc = mmc_alloc_host(sizeof(struct wbsd_host), dev); | |
1207 | if (!mmc) | |
1208 | return -ENOMEM; | |
fecf92ba | 1209 | |
85bcc130 PO |
1210 | host = mmc_priv(mmc); |
1211 | host->mmc = mmc; | |
1212 | ||
1213 | host->dma = -1; | |
1214 | ||
1215 | /* | |
1216 | * Set host parameters. | |
1217 | */ | |
1218 | mmc->ops = &wbsd_ops; | |
1219 | mmc->f_min = 375000; | |
1220 | mmc->f_max = 24000000; | |
cfa7f521 | 1221 | mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; |
23af6039 | 1222 | mmc->caps = MMC_CAP_4_BIT_DATA; |
fecf92ba | 1223 | |
85bcc130 | 1224 | spin_lock_init(&host->lock); |
fecf92ba | 1225 | |
6e6293dd | 1226 | /* |
1656fa57 | 1227 | * Set up timers |
6e6293dd | 1228 | */ |
1656fa57 PO |
1229 | init_timer(&host->ignore_timer); |
1230 | host->ignore_timer.data = (unsigned long)host; | |
1231 | host->ignore_timer.function = wbsd_reset_ignore; | |
fecf92ba | 1232 | |
85bcc130 PO |
1233 | /* |
1234 | * Maximum number of segments. Worst case is one sector per segment | |
1235 | * so this will be 64kB/512. | |
1236 | */ | |
1237 | mmc->max_hw_segs = 128; | |
1238 | mmc->max_phys_segs = 128; | |
fecf92ba | 1239 | |
85bcc130 | 1240 | /* |
55db890a | 1241 | * Maximum request size. Also limited by 64KiB buffer. |
85bcc130 | 1242 | */ |
55db890a | 1243 | mmc->max_req_size = 65536; |
fecf92ba | 1244 | |
85bcc130 PO |
1245 | /* |
1246 | * Maximum segment size. Could be one segment with the maximum number | |
55db890a | 1247 | * of bytes. |
85bcc130 | 1248 | */ |
55db890a | 1249 | mmc->max_seg_size = mmc->max_req_size; |
fecf92ba | 1250 | |
fe4a3c7a PO |
1251 | /* |
1252 | * Maximum block size. We have 12 bits (= 4095) but have to subtract | |
1253 | * space for CRC. So the maximum is 4095 - 4*2 = 4087. | |
1254 | */ | |
1255 | mmc->max_blk_size = 4087; | |
1256 | ||
55db890a PO |
1257 | /* |
1258 | * Maximum block count. There is no real limit so the maximum | |
1259 | * request size will be the only restriction. | |
1260 | */ | |
1261 | mmc->max_blk_count = mmc->max_req_size; | |
1262 | ||
85bcc130 | 1263 | dev_set_drvdata(dev, mmc); |
fecf92ba | 1264 | |
85bcc130 PO |
1265 | return 0; |
1266 | } | |
1267 | ||
b3627bb1 | 1268 | static void wbsd_free_mmc(struct device *dev) |
85bcc130 | 1269 | { |
cfa7f521 PO |
1270 | struct mmc_host *mmc; |
1271 | struct wbsd_host *host; | |
fecf92ba | 1272 | |
85bcc130 PO |
1273 | mmc = dev_get_drvdata(dev); |
1274 | if (!mmc) | |
1275 | return; | |
fecf92ba | 1276 | |
6e6293dd PO |
1277 | host = mmc_priv(mmc); |
1278 | BUG_ON(host == NULL); | |
fecf92ba | 1279 | |
1656fa57 | 1280 | del_timer_sync(&host->ignore_timer); |
fecf92ba | 1281 | |
85bcc130 | 1282 | mmc_free_host(mmc); |
fecf92ba | 1283 | |
85bcc130 PO |
1284 | dev_set_drvdata(dev, NULL); |
1285 | } | |
1286 | ||
1287 | /* | |
1288 | * Scan for known chip id:s | |
1289 | */ | |
1290 | ||
cfa7f521 | 1291 | static int __devinit wbsd_scan(struct wbsd_host *host) |
1da177e4 LT |
1292 | { |
1293 | int i, j, k; | |
1294 | int id; | |
fecf92ba | 1295 | |
1da177e4 LT |
1296 | /* |
1297 | * Iterate through all ports, all codes to | |
1298 | * find hardware that is in our known list. | |
1299 | */ | |
63648fb5 | 1300 | for (i = 0; i < ARRAY_SIZE(config_ports); i++) { |
1da177e4 LT |
1301 | if (!request_region(config_ports[i], 2, DRIVER_NAME)) |
1302 | continue; | |
fecf92ba | 1303 | |
63648fb5 | 1304 | for (j = 0; j < ARRAY_SIZE(unlock_codes); j++) { |
1da177e4 | 1305 | id = 0xFFFF; |
fecf92ba | 1306 | |
19c1f3ca PO |
1307 | host->config = config_ports[i]; |
1308 | host->unlock_code = unlock_codes[j]; | |
1309 | ||
1310 | wbsd_unlock_config(host); | |
fecf92ba | 1311 | |
1da177e4 LT |
1312 | outb(WBSD_CONF_ID_HI, config_ports[i]); |
1313 | id = inb(config_ports[i] + 1) << 8; | |
1314 | ||
1315 | outb(WBSD_CONF_ID_LO, config_ports[i]); | |
1316 | id |= inb(config_ports[i] + 1); | |
fecf92ba | 1317 | |
19c1f3ca PO |
1318 | wbsd_lock_config(host); |
1319 | ||
63648fb5 | 1320 | for (k = 0; k < ARRAY_SIZE(valid_ids); k++) { |
cfa7f521 | 1321 | if (id == valid_ids[k]) { |
1da177e4 | 1322 | host->chip_id = id; |
fecf92ba | 1323 | |
1da177e4 LT |
1324 | return 0; |
1325 | } | |
1326 | } | |
fecf92ba | 1327 | |
cfa7f521 | 1328 | if (id != 0xFFFF) { |
1da177e4 LT |
1329 | DBG("Unknown hardware (id %x) found at %x\n", |
1330 | id, config_ports[i]); | |
1331 | } | |
1da177e4 | 1332 | } |
fecf92ba | 1333 | |
1da177e4 LT |
1334 | release_region(config_ports[i], 2); |
1335 | } | |
fecf92ba | 1336 | |
19c1f3ca PO |
1337 | host->config = 0; |
1338 | host->unlock_code = 0; | |
1339 | ||
1da177e4 LT |
1340 | return -ENODEV; |
1341 | } | |
1342 | ||
85bcc130 PO |
1343 | /* |
1344 | * Allocate/free io port ranges | |
1345 | */ | |
1346 | ||
cfa7f521 | 1347 | static int __devinit wbsd_request_region(struct wbsd_host *host, int base) |
1da177e4 | 1348 | { |
916f3ac6 | 1349 | if (base & 0x7) |
1da177e4 | 1350 | return -EINVAL; |
fecf92ba | 1351 | |
85bcc130 | 1352 | if (!request_region(base, 8, DRIVER_NAME)) |
1da177e4 | 1353 | return -EIO; |
fecf92ba | 1354 | |
916f3ac6 | 1355 | host->base = base; |
fecf92ba | 1356 | |
1da177e4 LT |
1357 | return 0; |
1358 | } | |
1359 | ||
b3627bb1 | 1360 | static void wbsd_release_regions(struct wbsd_host *host) |
1da177e4 LT |
1361 | { |
1362 | if (host->base) | |
1363 | release_region(host->base, 8); | |
fecf92ba | 1364 | |
85bcc130 | 1365 | host->base = 0; |
1da177e4 LT |
1366 | |
1367 | if (host->config) | |
1368 | release_region(host->config, 2); | |
fecf92ba | 1369 | |
85bcc130 | 1370 | host->config = 0; |
1da177e4 LT |
1371 | } |
1372 | ||
85bcc130 PO |
1373 | /* |
1374 | * Allocate/free DMA port and buffer | |
1375 | */ | |
1376 | ||
cfa7f521 | 1377 | static void __devinit wbsd_request_dma(struct wbsd_host *host, int dma) |
1da177e4 | 1378 | { |
1da177e4 LT |
1379 | if (dma < 0) |
1380 | return; | |
fecf92ba | 1381 | |
1da177e4 LT |
1382 | if (request_dma(dma, DRIVER_NAME)) |
1383 | goto err; | |
fecf92ba | 1384 | |
1da177e4 LT |
1385 | /* |
1386 | * We need to allocate a special buffer in | |
1387 | * order for ISA to be able to DMA to it. | |
1388 | */ | |
85bcc130 | 1389 | host->dma_buffer = kmalloc(WBSD_DMA_SIZE, |
1da177e4 LT |
1390 | GFP_NOIO | GFP_DMA | __GFP_REPEAT | __GFP_NOWARN); |
1391 | if (!host->dma_buffer) | |
1392 | goto free; | |
1393 | ||
1394 | /* | |
1395 | * Translate the address to a physical address. | |
1396 | */ | |
fcaf71fd | 1397 | host->dma_addr = dma_map_single(mmc_dev(host->mmc), host->dma_buffer, |
85bcc130 | 1398 | WBSD_DMA_SIZE, DMA_BIDIRECTIONAL); |
fecf92ba | 1399 | |
1da177e4 LT |
1400 | /* |
1401 | * ISA DMA must be aligned on a 64k basis. | |
1402 | */ | |
1403 | if ((host->dma_addr & 0xffff) != 0) | |
1404 | goto kfree; | |
1405 | /* | |
1406 | * ISA cannot access memory above 16 MB. | |
1407 | */ | |
1408 | else if (host->dma_addr >= 0x1000000) | |
1409 | goto kfree; | |
1410 | ||
1411 | host->dma = dma; | |
fecf92ba | 1412 | |
1da177e4 | 1413 | return; |
fecf92ba | 1414 | |
1da177e4 LT |
1415 | kfree: |
1416 | /* | |
1417 | * If we've gotten here then there is some kind of alignment bug | |
1418 | */ | |
1419 | BUG_ON(1); | |
fecf92ba | 1420 | |
fcaf71fd | 1421 | dma_unmap_single(mmc_dev(host->mmc), host->dma_addr, |
cfa7f521 | 1422 | WBSD_DMA_SIZE, DMA_BIDIRECTIONAL); |
97067d55 | 1423 | host->dma_addr = 0; |
fecf92ba | 1424 | |
1da177e4 LT |
1425 | kfree(host->dma_buffer); |
1426 | host->dma_buffer = NULL; | |
1427 | ||
1428 | free: | |
1429 | free_dma(dma); | |
1430 | ||
1431 | err: | |
1432 | printk(KERN_WARNING DRIVER_NAME ": Unable to allocate DMA %d. " | |
1433 | "Falling back on FIFO.\n", dma); | |
1434 | } | |
1435 | ||
b3627bb1 | 1436 | static void wbsd_release_dma(struct wbsd_host *host) |
85bcc130 | 1437 | { |
cfa7f521 | 1438 | if (host->dma_addr) { |
fcaf71fd | 1439 | dma_unmap_single(mmc_dev(host->mmc), host->dma_addr, |
cfa7f521 PO |
1440 | WBSD_DMA_SIZE, DMA_BIDIRECTIONAL); |
1441 | } | |
6044ec88 | 1442 | kfree(host->dma_buffer); |
85bcc130 PO |
1443 | if (host->dma >= 0) |
1444 | free_dma(host->dma); | |
fecf92ba | 1445 | |
85bcc130 PO |
1446 | host->dma = -1; |
1447 | host->dma_buffer = NULL; | |
97067d55 | 1448 | host->dma_addr = 0; |
85bcc130 | 1449 | } |
1da177e4 LT |
1450 | |
1451 | /* | |
85bcc130 | 1452 | * Allocate/free IRQ. |
1da177e4 LT |
1453 | */ |
1454 | ||
cfa7f521 | 1455 | static int __devinit wbsd_request_irq(struct wbsd_host *host, int irq) |
1da177e4 | 1456 | { |
1da177e4 | 1457 | int ret; |
fecf92ba | 1458 | |
1da177e4 | 1459 | /* |
cef33400 | 1460 | * Set up tasklets. Must be done before requesting interrupt. |
1da177e4 | 1461 | */ |
cfa7f521 PO |
1462 | tasklet_init(&host->card_tasklet, wbsd_tasklet_card, |
1463 | (unsigned long)host); | |
1464 | tasklet_init(&host->fifo_tasklet, wbsd_tasklet_fifo, | |
1465 | (unsigned long)host); | |
1466 | tasklet_init(&host->crc_tasklet, wbsd_tasklet_crc, | |
1467 | (unsigned long)host); | |
1468 | tasklet_init(&host->timeout_tasklet, wbsd_tasklet_timeout, | |
1469 | (unsigned long)host); | |
1470 | tasklet_init(&host->finish_tasklet, wbsd_tasklet_finish, | |
1471 | (unsigned long)host); | |
fecf92ba | 1472 | |
cef33400 CE |
1473 | /* |
1474 | * Allocate interrupt. | |
1475 | */ | |
1476 | ret = request_irq(irq, wbsd_irq, IRQF_SHARED, DRIVER_NAME, host); | |
1477 | if (ret) | |
1478 | return ret; | |
1479 | ||
1480 | host->irq = irq; | |
1481 | ||
85bcc130 PO |
1482 | return 0; |
1483 | } | |
1da177e4 | 1484 | |
b3627bb1 | 1485 | static void wbsd_release_irq(struct wbsd_host *host) |
85bcc130 PO |
1486 | { |
1487 | if (!host->irq) | |
1488 | return; | |
1da177e4 | 1489 | |
85bcc130 | 1490 | free_irq(host->irq, host); |
fecf92ba | 1491 | |
85bcc130 | 1492 | host->irq = 0; |
fecf92ba | 1493 | |
85bcc130 PO |
1494 | tasklet_kill(&host->card_tasklet); |
1495 | tasklet_kill(&host->fifo_tasklet); | |
1496 | tasklet_kill(&host->crc_tasklet); | |
1497 | tasklet_kill(&host->timeout_tasklet); | |
1498 | tasklet_kill(&host->finish_tasklet); | |
85bcc130 PO |
1499 | } |
1500 | ||
1501 | /* | |
1502 | * Allocate all resources for the host. | |
1503 | */ | |
1504 | ||
cfa7f521 | 1505 | static int __devinit wbsd_request_resources(struct wbsd_host *host, |
85bcc130 PO |
1506 | int base, int irq, int dma) |
1507 | { | |
1508 | int ret; | |
fecf92ba | 1509 | |
1da177e4 LT |
1510 | /* |
1511 | * Allocate I/O ports. | |
1512 | */ | |
85bcc130 | 1513 | ret = wbsd_request_region(host, base); |
1da177e4 | 1514 | if (ret) |
85bcc130 | 1515 | return ret; |
1da177e4 LT |
1516 | |
1517 | /* | |
85bcc130 | 1518 | * Allocate interrupt. |
1da177e4 | 1519 | */ |
85bcc130 PO |
1520 | ret = wbsd_request_irq(host, irq); |
1521 | if (ret) | |
1522 | return ret; | |
1523 | ||
1524 | /* | |
1525 | * Allocate DMA. | |
1526 | */ | |
1527 | wbsd_request_dma(host, dma); | |
fecf92ba | 1528 | |
85bcc130 PO |
1529 | return 0; |
1530 | } | |
1531 | ||
1532 | /* | |
1533 | * Release all resources for the host. | |
1534 | */ | |
1535 | ||
b3627bb1 | 1536 | static void wbsd_release_resources(struct wbsd_host *host) |
85bcc130 PO |
1537 | { |
1538 | wbsd_release_dma(host); | |
1539 | wbsd_release_irq(host); | |
1540 | wbsd_release_regions(host); | |
1541 | } | |
1542 | ||
1543 | /* | |
1544 | * Configure the resources the chip should use. | |
1545 | */ | |
1546 | ||
cfa7f521 | 1547 | static void wbsd_chip_config(struct wbsd_host *host) |
85bcc130 | 1548 | { |
19c1f3ca PO |
1549 | wbsd_unlock_config(host); |
1550 | ||
85bcc130 PO |
1551 | /* |
1552 | * Reset the chip. | |
fecf92ba | 1553 | */ |
85bcc130 PO |
1554 | wbsd_write_config(host, WBSD_CONF_SWRST, 1); |
1555 | wbsd_write_config(host, WBSD_CONF_SWRST, 0); | |
1da177e4 LT |
1556 | |
1557 | /* | |
1558 | * Select SD/MMC function. | |
1559 | */ | |
1560 | wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD); | |
fecf92ba | 1561 | |
1da177e4 LT |
1562 | /* |
1563 | * Set up card detection. | |
1564 | */ | |
85bcc130 | 1565 | wbsd_write_config(host, WBSD_CONF_PINS, WBSD_PINS_DETECT_GP11); |
fecf92ba | 1566 | |
1da177e4 | 1567 | /* |
85bcc130 | 1568 | * Configure chip |
1da177e4 LT |
1569 | */ |
1570 | wbsd_write_config(host, WBSD_CONF_PORT_HI, host->base >> 8); | |
1571 | wbsd_write_config(host, WBSD_CONF_PORT_LO, host->base & 0xff); | |
fecf92ba | 1572 | |
85bcc130 | 1573 | wbsd_write_config(host, WBSD_CONF_IRQ, host->irq); |
fecf92ba | 1574 | |
85bcc130 PO |
1575 | if (host->dma >= 0) |
1576 | wbsd_write_config(host, WBSD_CONF_DRQ, host->dma); | |
fecf92ba | 1577 | |
1da177e4 | 1578 | /* |
85bcc130 | 1579 | * Enable and power up chip. |
1da177e4 | 1580 | */ |
85bcc130 PO |
1581 | wbsd_write_config(host, WBSD_CONF_ENABLE, 1); |
1582 | wbsd_write_config(host, WBSD_CONF_POWER, 0x20); | |
19c1f3ca PO |
1583 | |
1584 | wbsd_lock_config(host); | |
85bcc130 PO |
1585 | } |
1586 | ||
1587 | /* | |
1588 | * Check that configured resources are correct. | |
1589 | */ | |
fecf92ba | 1590 | |
cfa7f521 | 1591 | static int wbsd_chip_validate(struct wbsd_host *host) |
85bcc130 PO |
1592 | { |
1593 | int base, irq, dma; | |
fecf92ba | 1594 | |
19c1f3ca PO |
1595 | wbsd_unlock_config(host); |
1596 | ||
1da177e4 | 1597 | /* |
85bcc130 | 1598 | * Select SD/MMC function. |
1da177e4 | 1599 | */ |
85bcc130 | 1600 | wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD); |
fecf92ba | 1601 | |
1da177e4 | 1602 | /* |
85bcc130 | 1603 | * Read configuration. |
1da177e4 | 1604 | */ |
85bcc130 PO |
1605 | base = wbsd_read_config(host, WBSD_CONF_PORT_HI) << 8; |
1606 | base |= wbsd_read_config(host, WBSD_CONF_PORT_LO); | |
fecf92ba | 1607 | |
85bcc130 | 1608 | irq = wbsd_read_config(host, WBSD_CONF_IRQ); |
fecf92ba | 1609 | |
85bcc130 | 1610 | dma = wbsd_read_config(host, WBSD_CONF_DRQ); |
fecf92ba | 1611 | |
19c1f3ca PO |
1612 | wbsd_lock_config(host); |
1613 | ||
1da177e4 | 1614 | /* |
85bcc130 | 1615 | * Validate against given configuration. |
1da177e4 | 1616 | */ |
85bcc130 PO |
1617 | if (base != host->base) |
1618 | return 0; | |
1619 | if (irq != host->irq) | |
1620 | return 0; | |
1621 | if ((dma != host->dma) && (host->dma != -1)) | |
1622 | return 0; | |
fecf92ba | 1623 | |
85bcc130 PO |
1624 | return 1; |
1625 | } | |
1626 | ||
19c1f3ca PO |
1627 | /* |
1628 | * Powers down the SD function | |
1629 | */ | |
1630 | ||
cfa7f521 | 1631 | static void wbsd_chip_poweroff(struct wbsd_host *host) |
19c1f3ca PO |
1632 | { |
1633 | wbsd_unlock_config(host); | |
1634 | ||
1635 | wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD); | |
1636 | wbsd_write_config(host, WBSD_CONF_ENABLE, 0); | |
1637 | ||
1638 | wbsd_lock_config(host); | |
1639 | } | |
1640 | ||
85bcc130 PO |
1641 | /*****************************************************************************\ |
1642 | * * | |
1643 | * Devices setup and shutdown * | |
1644 | * * | |
1645 | \*****************************************************************************/ | |
1646 | ||
cfa7f521 | 1647 | static int __devinit wbsd_init(struct device *dev, int base, int irq, int dma, |
85bcc130 PO |
1648 | int pnp) |
1649 | { | |
cfa7f521 PO |
1650 | struct wbsd_host *host = NULL; |
1651 | struct mmc_host *mmc = NULL; | |
85bcc130 | 1652 | int ret; |
fecf92ba | 1653 | |
85bcc130 PO |
1654 | ret = wbsd_alloc_mmc(dev); |
1655 | if (ret) | |
1656 | return ret; | |
fecf92ba | 1657 | |
85bcc130 PO |
1658 | mmc = dev_get_drvdata(dev); |
1659 | host = mmc_priv(mmc); | |
fecf92ba | 1660 | |
1da177e4 | 1661 | /* |
85bcc130 | 1662 | * Scan for hardware. |
1da177e4 | 1663 | */ |
85bcc130 | 1664 | ret = wbsd_scan(host); |
cfa7f521 PO |
1665 | if (ret) { |
1666 | if (pnp && (ret == -ENODEV)) { | |
85bcc130 PO |
1667 | printk(KERN_WARNING DRIVER_NAME |
1668 | ": Unable to confirm device presence. You may " | |
1669 | "experience lock-ups.\n"); | |
cfa7f521 | 1670 | } else { |
85bcc130 PO |
1671 | wbsd_free_mmc(dev); |
1672 | return ret; | |
1673 | } | |
1674 | } | |
fecf92ba | 1675 | |
1da177e4 | 1676 | /* |
85bcc130 | 1677 | * Request resources. |
1da177e4 | 1678 | */ |
dd2c609c | 1679 | ret = wbsd_request_resources(host, base, irq, dma); |
cfa7f521 | 1680 | if (ret) { |
85bcc130 PO |
1681 | wbsd_release_resources(host); |
1682 | wbsd_free_mmc(dev); | |
1683 | return ret; | |
1684 | } | |
fecf92ba | 1685 | |
1da177e4 | 1686 | /* |
85bcc130 | 1687 | * See if chip needs to be configured. |
1da177e4 | 1688 | */ |
cfa7f521 PO |
1689 | if (pnp) { |
1690 | if ((host->config != 0) && !wbsd_chip_validate(host)) { | |
85bcc130 PO |
1691 | printk(KERN_WARNING DRIVER_NAME |
1692 | ": PnP active but chip not configured! " | |
1693 | "You probably have a buggy BIOS. " | |
1694 | "Configuring chip manually.\n"); | |
1695 | wbsd_chip_config(host); | |
1696 | } | |
cfa7f521 | 1697 | } else |
85bcc130 | 1698 | wbsd_chip_config(host); |
fecf92ba | 1699 | |
1da177e4 LT |
1700 | /* |
1701 | * Power Management stuff. No idea how this works. | |
1702 | * Not tested. | |
1703 | */ | |
1704 | #ifdef CONFIG_PM | |
cfa7f521 | 1705 | if (host->config) { |
19c1f3ca | 1706 | wbsd_unlock_config(host); |
85bcc130 | 1707 | wbsd_write_config(host, WBSD_CONF_PME, 0xA0); |
19c1f3ca PO |
1708 | wbsd_lock_config(host); |
1709 | } | |
1da177e4 | 1710 | #endif |
85bcc130 PO |
1711 | /* |
1712 | * Allow device to initialise itself properly. | |
1713 | */ | |
1714 | mdelay(5); | |
1da177e4 LT |
1715 | |
1716 | /* | |
1717 | * Reset the chip into a known state. | |
1718 | */ | |
1719 | wbsd_init_device(host); | |
fecf92ba | 1720 | |
1da177e4 LT |
1721 | mmc_add_host(mmc); |
1722 | ||
d366b643 | 1723 | printk(KERN_INFO "%s: W83L51xD", mmc_hostname(mmc)); |
85bcc130 PO |
1724 | if (host->chip_id != 0) |
1725 | printk(" id %x", (int)host->chip_id); | |
1726 | printk(" at 0x%x irq %d", (int)host->base, (int)host->irq); | |
1727 | if (host->dma >= 0) | |
1728 | printk(" dma %d", (int)host->dma); | |
1729 | else | |
1730 | printk(" FIFO"); | |
1731 | if (pnp) | |
1732 | printk(" PnP"); | |
1733 | printk("\n"); | |
1da177e4 LT |
1734 | |
1735 | return 0; | |
1da177e4 LT |
1736 | } |
1737 | ||
cfa7f521 | 1738 | static void __devexit wbsd_shutdown(struct device *dev, int pnp) |
1da177e4 | 1739 | { |
cfa7f521 PO |
1740 | struct mmc_host *mmc = dev_get_drvdata(dev); |
1741 | struct wbsd_host *host; | |
fecf92ba | 1742 | |
1da177e4 | 1743 | if (!mmc) |
85bcc130 | 1744 | return; |
1da177e4 LT |
1745 | |
1746 | host = mmc_priv(mmc); | |
fecf92ba | 1747 | |
1da177e4 LT |
1748 | mmc_remove_host(mmc); |
1749 | ||
19c1f3ca PO |
1750 | /* |
1751 | * Power down the SD/MMC function. | |
1752 | */ | |
85bcc130 | 1753 | if (!pnp) |
19c1f3ca | 1754 | wbsd_chip_poweroff(host); |
fecf92ba | 1755 | |
85bcc130 | 1756 | wbsd_release_resources(host); |
fecf92ba | 1757 | |
85bcc130 PO |
1758 | wbsd_free_mmc(dev); |
1759 | } | |
1da177e4 | 1760 | |
85bcc130 PO |
1761 | /* |
1762 | * Non-PnP | |
1763 | */ | |
1764 | ||
cfa7f521 | 1765 | static int __devinit wbsd_probe(struct platform_device *dev) |
85bcc130 | 1766 | { |
dd2c609c | 1767 | /* Use the module parameters for resources */ |
9eeebd22 | 1768 | return wbsd_init(&dev->dev, param_io, param_irq, param_dma, 0); |
85bcc130 PO |
1769 | } |
1770 | ||
cfa7f521 | 1771 | static int __devexit wbsd_remove(struct platform_device *dev) |
85bcc130 | 1772 | { |
3ae5eaec | 1773 | wbsd_shutdown(&dev->dev, 0); |
85bcc130 PO |
1774 | |
1775 | return 0; | |
1776 | } | |
1777 | ||
1778 | /* | |
1779 | * PnP | |
1780 | */ | |
1781 | ||
1782 | #ifdef CONFIG_PNP | |
1783 | ||
1784 | static int __devinit | |
cfa7f521 | 1785 | wbsd_pnp_probe(struct pnp_dev *pnpdev, const struct pnp_device_id *dev_id) |
85bcc130 PO |
1786 | { |
1787 | int io, irq, dma; | |
fecf92ba | 1788 | |
85bcc130 PO |
1789 | /* |
1790 | * Get resources from PnP layer. | |
1791 | */ | |
1792 | io = pnp_port_start(pnpdev, 0); | |
1793 | irq = pnp_irq(pnpdev, 0); | |
1794 | if (pnp_dma_valid(pnpdev, 0)) | |
1795 | dma = pnp_dma(pnpdev, 0); | |
1796 | else | |
1797 | dma = -1; | |
fecf92ba | 1798 | |
85bcc130 | 1799 | DBGF("PnP resources: port %3x irq %d dma %d\n", io, irq, dma); |
fecf92ba | 1800 | |
85bcc130 PO |
1801 | return wbsd_init(&pnpdev->dev, io, irq, dma, 1); |
1802 | } | |
1da177e4 | 1803 | |
cfa7f521 | 1804 | static void __devexit wbsd_pnp_remove(struct pnp_dev *dev) |
85bcc130 PO |
1805 | { |
1806 | wbsd_shutdown(&dev->dev, 1); | |
1da177e4 LT |
1807 | } |
1808 | ||
85bcc130 PO |
1809 | #endif /* CONFIG_PNP */ |
1810 | ||
1da177e4 LT |
1811 | /* |
1812 | * Power management | |
1813 | */ | |
1814 | ||
1815 | #ifdef CONFIG_PM | |
19c1f3ca | 1816 | |
5e68d95d PO |
1817 | static int wbsd_suspend(struct wbsd_host *host, pm_message_t state) |
1818 | { | |
1819 | BUG_ON(host == NULL); | |
1820 | ||
1821 | return mmc_suspend_host(host->mmc, state); | |
1822 | } | |
1823 | ||
1824 | static int wbsd_resume(struct wbsd_host *host) | |
1825 | { | |
1826 | BUG_ON(host == NULL); | |
1827 | ||
1828 | wbsd_init_device(host); | |
1829 | ||
1830 | return mmc_resume_host(host->mmc); | |
1831 | } | |
1832 | ||
cfa7f521 PO |
1833 | static int wbsd_platform_suspend(struct platform_device *dev, |
1834 | pm_message_t state) | |
1da177e4 | 1835 | { |
3ae5eaec | 1836 | struct mmc_host *mmc = platform_get_drvdata(dev); |
19c1f3ca PO |
1837 | struct wbsd_host *host; |
1838 | int ret; | |
1839 | ||
5e68d95d | 1840 | if (mmc == NULL) |
19c1f3ca PO |
1841 | return 0; |
1842 | ||
5e68d95d | 1843 | DBGF("Suspending...\n"); |
19c1f3ca PO |
1844 | |
1845 | host = mmc_priv(mmc); | |
1846 | ||
5e68d95d PO |
1847 | ret = wbsd_suspend(host, state); |
1848 | if (ret) | |
1849 | return ret; | |
1850 | ||
19c1f3ca | 1851 | wbsd_chip_poweroff(host); |
1da177e4 LT |
1852 | |
1853 | return 0; | |
1854 | } | |
1855 | ||
5e68d95d | 1856 | static int wbsd_platform_resume(struct platform_device *dev) |
1da177e4 | 1857 | { |
3ae5eaec | 1858 | struct mmc_host *mmc = platform_get_drvdata(dev); |
19c1f3ca | 1859 | struct wbsd_host *host; |
1da177e4 | 1860 | |
5e68d95d | 1861 | if (mmc == NULL) |
19c1f3ca PO |
1862 | return 0; |
1863 | ||
5e68d95d | 1864 | DBGF("Resuming...\n"); |
19c1f3ca PO |
1865 | |
1866 | host = mmc_priv(mmc); | |
1867 | ||
1868 | wbsd_chip_config(host); | |
1869 | ||
1870 | /* | |
1871 | * Allow device to initialise itself properly. | |
1872 | */ | |
1873 | mdelay(5); | |
1874 | ||
5e68d95d PO |
1875 | return wbsd_resume(host); |
1876 | } | |
1877 | ||
1878 | #ifdef CONFIG_PNP | |
1879 | ||
1880 | static int wbsd_pnp_suspend(struct pnp_dev *pnp_dev, pm_message_t state) | |
1881 | { | |
1882 | struct mmc_host *mmc = dev_get_drvdata(&pnp_dev->dev); | |
1883 | struct wbsd_host *host; | |
1884 | ||
1885 | if (mmc == NULL) | |
1886 | return 0; | |
19c1f3ca | 1887 | |
5e68d95d PO |
1888 | DBGF("Suspending...\n"); |
1889 | ||
1890 | host = mmc_priv(mmc); | |
1891 | ||
1892 | return wbsd_suspend(host, state); | |
1da177e4 | 1893 | } |
19c1f3ca | 1894 | |
5e68d95d PO |
1895 | static int wbsd_pnp_resume(struct pnp_dev *pnp_dev) |
1896 | { | |
1897 | struct mmc_host *mmc = dev_get_drvdata(&pnp_dev->dev); | |
1898 | struct wbsd_host *host; | |
1899 | ||
1900 | if (mmc == NULL) | |
1901 | return 0; | |
1902 | ||
1903 | DBGF("Resuming...\n"); | |
1904 | ||
1905 | host = mmc_priv(mmc); | |
1906 | ||
1907 | /* | |
1908 | * See if chip needs to be configured. | |
1909 | */ | |
cfa7f521 PO |
1910 | if (host->config != 0) { |
1911 | if (!wbsd_chip_validate(host)) { | |
5e68d95d PO |
1912 | printk(KERN_WARNING DRIVER_NAME |
1913 | ": PnP active but chip not configured! " | |
1914 | "You probably have a buggy BIOS. " | |
1915 | "Configuring chip manually.\n"); | |
1916 | wbsd_chip_config(host); | |
1917 | } | |
1918 | } | |
1919 | ||
1920 | /* | |
1921 | * Allow device to initialise itself properly. | |
1922 | */ | |
1923 | mdelay(5); | |
1924 | ||
1925 | return wbsd_resume(host); | |
1926 | } | |
1927 | ||
1928 | #endif /* CONFIG_PNP */ | |
1929 | ||
19c1f3ca PO |
1930 | #else /* CONFIG_PM */ |
1931 | ||
5e68d95d PO |
1932 | #define wbsd_platform_suspend NULL |
1933 | #define wbsd_platform_resume NULL | |
1934 | ||
1935 | #define wbsd_pnp_suspend NULL | |
1936 | #define wbsd_pnp_resume NULL | |
19c1f3ca PO |
1937 | |
1938 | #endif /* CONFIG_PM */ | |
1da177e4 | 1939 | |
85bcc130 | 1940 | static struct platform_device *wbsd_device; |
1da177e4 | 1941 | |
3ae5eaec | 1942 | static struct platform_driver wbsd_driver = { |
1da177e4 | 1943 | .probe = wbsd_probe, |
93968d75 | 1944 | .remove = __devexit_p(wbsd_remove), |
fecf92ba | 1945 | |
5e68d95d PO |
1946 | .suspend = wbsd_platform_suspend, |
1947 | .resume = wbsd_platform_resume, | |
3ae5eaec RK |
1948 | .driver = { |
1949 | .name = DRIVER_NAME, | |
bc65c724 | 1950 | .owner = THIS_MODULE, |
3ae5eaec | 1951 | }, |
1da177e4 LT |
1952 | }; |
1953 | ||
85bcc130 PO |
1954 | #ifdef CONFIG_PNP |
1955 | ||
1956 | static struct pnp_driver wbsd_pnp_driver = { | |
1957 | .name = DRIVER_NAME, | |
1958 | .id_table = pnp_dev_table, | |
1959 | .probe = wbsd_pnp_probe, | |
93968d75 | 1960 | .remove = __devexit_p(wbsd_pnp_remove), |
5e68d95d PO |
1961 | |
1962 | .suspend = wbsd_pnp_suspend, | |
1963 | .resume = wbsd_pnp_resume, | |
85bcc130 PO |
1964 | }; |
1965 | ||
1966 | #endif /* CONFIG_PNP */ | |
1967 | ||
1da177e4 LT |
1968 | /* |
1969 | * Module loading/unloading | |
1970 | */ | |
1971 | ||
1972 | static int __init wbsd_drv_init(void) | |
1973 | { | |
1974 | int result; | |
fecf92ba | 1975 | |
1da177e4 | 1976 | printk(KERN_INFO DRIVER_NAME |
1615cc22 | 1977 | ": Winbond W83L51xD SD/MMC card interface driver\n"); |
1da177e4 | 1978 | printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n"); |
1da177e4 | 1979 | |
85bcc130 PO |
1980 | #ifdef CONFIG_PNP |
1981 | ||
9eeebd22 | 1982 | if (!param_nopnp) { |
85bcc130 PO |
1983 | result = pnp_register_driver(&wbsd_pnp_driver); |
1984 | if (result < 0) | |
1985 | return result; | |
1986 | } | |
fecf92ba PO |
1987 | #endif /* CONFIG_PNP */ |
1988 | ||
9eeebd22 | 1989 | if (param_nopnp) { |
3ae5eaec | 1990 | result = platform_driver_register(&wbsd_driver); |
85bcc130 PO |
1991 | if (result < 0) |
1992 | return result; | |
1993 | ||
21500bb3 | 1994 | wbsd_device = platform_device_alloc(DRIVER_NAME, -1); |
cfa7f521 | 1995 | if (!wbsd_device) { |
21500bb3 DT |
1996 | platform_driver_unregister(&wbsd_driver); |
1997 | return -ENOMEM; | |
1998 | } | |
1999 | ||
2000 | result = platform_device_add(wbsd_device); | |
cfa7f521 | 2001 | if (result) { |
21500bb3 DT |
2002 | platform_device_put(wbsd_device); |
2003 | platform_driver_unregister(&wbsd_driver); | |
2004 | return result; | |
2005 | } | |
85bcc130 | 2006 | } |
1da177e4 LT |
2007 | |
2008 | return 0; | |
2009 | } | |
2010 | ||
2011 | static void __exit wbsd_drv_exit(void) | |
2012 | { | |
85bcc130 PO |
2013 | #ifdef CONFIG_PNP |
2014 | ||
9eeebd22 | 2015 | if (!param_nopnp) |
85bcc130 | 2016 | pnp_unregister_driver(&wbsd_pnp_driver); |
fecf92ba PO |
2017 | |
2018 | #endif /* CONFIG_PNP */ | |
85bcc130 | 2019 | |
9eeebd22 | 2020 | if (param_nopnp) { |
85bcc130 | 2021 | platform_device_unregister(wbsd_device); |
fecf92ba | 2022 | |
3ae5eaec | 2023 | platform_driver_unregister(&wbsd_driver); |
85bcc130 | 2024 | } |
1da177e4 LT |
2025 | |
2026 | DBG("unloaded\n"); | |
2027 | } | |
2028 | ||
2029 | module_init(wbsd_drv_init); | |
2030 | module_exit(wbsd_drv_exit); | |
85bcc130 | 2031 | #ifdef CONFIG_PNP |
9eeebd22 | 2032 | module_param_named(nopnp, param_nopnp, uint, 0444); |
85bcc130 | 2033 | #endif |
9eeebd22 TW |
2034 | module_param_named(io, param_io, uint, 0444); |
2035 | module_param_named(irq, param_irq, uint, 0444); | |
2036 | module_param_named(dma, param_dma, int, 0444); | |
1da177e4 LT |
2037 | |
2038 | MODULE_LICENSE("GPL"); | |
32710e8f | 2039 | MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>"); |
1da177e4 | 2040 | MODULE_DESCRIPTION("Winbond W83L51xD SD/MMC card interface driver"); |
1da177e4 | 2041 | |
85bcc130 PO |
2042 | #ifdef CONFIG_PNP |
2043 | MODULE_PARM_DESC(nopnp, "Scan for device instead of relying on PNP. (default 0)"); | |
2044 | #endif | |
1da177e4 LT |
2045 | MODULE_PARM_DESC(io, "I/O base to allocate. Must be 8 byte aligned. (default 0x248)"); |
2046 | MODULE_PARM_DESC(irq, "IRQ to allocate. (default 6)"); | |
2047 | MODULE_PARM_DESC(dma, "DMA channel to allocate. -1 for no DMA. (default 2)"); |