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Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
70f10482 | 2 | * linux/drivers/mmc/host/wbsd.c - Winbond W83L51xD SD/MMC driver |
1da177e4 | 3 | * |
14d836e7 | 4 | * Copyright (C) 2004-2007 Pierre Ossman, All Rights Reserved. |
1da177e4 LT |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
643f720c PO |
7 | * it under the terms of the GNU General Public License as published by |
8 | * the Free Software Foundation; either version 2 of the License, or (at | |
9 | * your option) any later version. | |
1da177e4 LT |
10 | * |
11 | * | |
12 | * Warning! | |
13 | * | |
14 | * Changes to the FIFO system should be done with extreme care since | |
15 | * the hardware is full of bugs related to the FIFO. Known issues are: | |
16 | * | |
17 | * - FIFO size field in FSR is always zero. | |
18 | * | |
19 | * - FIFO interrupts tend not to work as they should. Interrupts are | |
20 | * triggered only for full/empty events, not for threshold values. | |
21 | * | |
22 | * - On APIC systems the FIFO empty interrupt is sometimes lost. | |
23 | */ | |
24 | ||
1da177e4 LT |
25 | #include <linux/module.h> |
26 | #include <linux/moduleparam.h> | |
27 | #include <linux/init.h> | |
28 | #include <linux/ioport.h> | |
d052d1be | 29 | #include <linux/platform_device.h> |
1da177e4 | 30 | #include <linux/interrupt.h> |
85bcc130 | 31 | #include <linux/dma-mapping.h> |
1da177e4 | 32 | #include <linux/delay.h> |
85bcc130 | 33 | #include <linux/pnp.h> |
1da177e4 LT |
34 | #include <linux/highmem.h> |
35 | #include <linux/mmc/host.h> | |
1da177e4 LT |
36 | |
37 | #include <asm/io.h> | |
38 | #include <asm/dma.h> | |
39 | #include <asm/scatterlist.h> | |
40 | ||
41 | #include "wbsd.h" | |
42 | ||
43 | #define DRIVER_NAME "wbsd" | |
1da177e4 | 44 | |
1da177e4 | 45 | #define DBG(x...) \ |
c6563178 | 46 | pr_debug(DRIVER_NAME ": " x) |
1da177e4 | 47 | #define DBGF(f, x...) \ |
c6563178 | 48 | pr_debug(DRIVER_NAME " [%s()]: " f, __func__ , ##x) |
1da177e4 | 49 | |
85bcc130 PO |
50 | /* |
51 | * Device resources | |
52 | */ | |
53 | ||
54 | #ifdef CONFIG_PNP | |
55 | ||
56 | static const struct pnp_device_id pnp_dev_table[] = { | |
57 | { "WEC0517", 0 }, | |
58 | { "WEC0518", 0 }, | |
59 | { "", 0 }, | |
60 | }; | |
61 | ||
62 | MODULE_DEVICE_TABLE(pnp, pnp_dev_table); | |
63 | ||
64 | #endif /* CONFIG_PNP */ | |
65 | ||
3eee0d03 AB |
66 | static const int config_ports[] = { 0x2E, 0x4E }; |
67 | static const int unlock_codes[] = { 0x83, 0x87 }; | |
68 | ||
69 | static const int valid_ids[] = { | |
70 | 0x7112, | |
71 | }; | |
72 | ||
85bcc130 PO |
73 | #ifdef CONFIG_PNP |
74 | static unsigned int nopnp = 0; | |
75 | #else | |
76 | static const unsigned int nopnp = 1; | |
77 | #endif | |
78 | static unsigned int io = 0x248; | |
79 | static unsigned int irq = 6; | |
80 | static int dma = 2; | |
81 | ||
1da177e4 LT |
82 | /* |
83 | * Basic functions | |
84 | */ | |
85 | ||
cfa7f521 | 86 | static inline void wbsd_unlock_config(struct wbsd_host *host) |
1da177e4 | 87 | { |
85bcc130 | 88 | BUG_ON(host->config == 0); |
fecf92ba | 89 | |
1da177e4 LT |
90 | outb(host->unlock_code, host->config); |
91 | outb(host->unlock_code, host->config); | |
92 | } | |
93 | ||
cfa7f521 | 94 | static inline void wbsd_lock_config(struct wbsd_host *host) |
1da177e4 | 95 | { |
85bcc130 | 96 | BUG_ON(host->config == 0); |
fecf92ba | 97 | |
1da177e4 LT |
98 | outb(LOCK_CODE, host->config); |
99 | } | |
100 | ||
cfa7f521 | 101 | static inline void wbsd_write_config(struct wbsd_host *host, u8 reg, u8 value) |
1da177e4 | 102 | { |
85bcc130 | 103 | BUG_ON(host->config == 0); |
fecf92ba | 104 | |
1da177e4 LT |
105 | outb(reg, host->config); |
106 | outb(value, host->config + 1); | |
107 | } | |
108 | ||
cfa7f521 | 109 | static inline u8 wbsd_read_config(struct wbsd_host *host, u8 reg) |
1da177e4 | 110 | { |
85bcc130 | 111 | BUG_ON(host->config == 0); |
fecf92ba | 112 | |
1da177e4 LT |
113 | outb(reg, host->config); |
114 | return inb(host->config + 1); | |
115 | } | |
116 | ||
cfa7f521 | 117 | static inline void wbsd_write_index(struct wbsd_host *host, u8 index, u8 value) |
1da177e4 LT |
118 | { |
119 | outb(index, host->base + WBSD_IDXR); | |
120 | outb(value, host->base + WBSD_DATAR); | |
121 | } | |
122 | ||
cfa7f521 | 123 | static inline u8 wbsd_read_index(struct wbsd_host *host, u8 index) |
1da177e4 LT |
124 | { |
125 | outb(index, host->base + WBSD_IDXR); | |
126 | return inb(host->base + WBSD_DATAR); | |
127 | } | |
128 | ||
129 | /* | |
130 | * Common routines | |
131 | */ | |
132 | ||
cfa7f521 | 133 | static void wbsd_init_device(struct wbsd_host *host) |
1da177e4 LT |
134 | { |
135 | u8 setup, ier; | |
fecf92ba | 136 | |
1da177e4 LT |
137 | /* |
138 | * Reset chip (SD/MMC part) and fifo. | |
139 | */ | |
140 | setup = wbsd_read_index(host, WBSD_IDX_SETUP); | |
141 | setup |= WBSD_FIFO_RESET | WBSD_SOFT_RESET; | |
142 | wbsd_write_index(host, WBSD_IDX_SETUP, setup); | |
fecf92ba | 143 | |
85bcc130 PO |
144 | /* |
145 | * Set DAT3 to input | |
146 | */ | |
147 | setup &= ~WBSD_DAT3_H; | |
148 | wbsd_write_index(host, WBSD_IDX_SETUP, setup); | |
149 | host->flags &= ~WBSD_FIGNORE_DETECT; | |
fecf92ba | 150 | |
1da177e4 LT |
151 | /* |
152 | * Read back default clock. | |
153 | */ | |
154 | host->clk = wbsd_read_index(host, WBSD_IDX_CLK); | |
155 | ||
156 | /* | |
157 | * Power down port. | |
158 | */ | |
159 | outb(WBSD_POWER_N, host->base + WBSD_CSR); | |
fecf92ba | 160 | |
1da177e4 LT |
161 | /* |
162 | * Set maximum timeout. | |
163 | */ | |
164 | wbsd_write_index(host, WBSD_IDX_TAAC, 0x7F); | |
fecf92ba | 165 | |
85bcc130 PO |
166 | /* |
167 | * Test for card presence | |
168 | */ | |
169 | if (inb(host->base + WBSD_CSR) & WBSD_CARDPRESENT) | |
170 | host->flags |= WBSD_FCARD_PRESENT; | |
171 | else | |
172 | host->flags &= ~WBSD_FCARD_PRESENT; | |
fecf92ba | 173 | |
1da177e4 LT |
174 | /* |
175 | * Enable interesting interrupts. | |
176 | */ | |
177 | ier = 0; | |
178 | ier |= WBSD_EINT_CARD; | |
179 | ier |= WBSD_EINT_FIFO_THRE; | |
1da177e4 | 180 | ier |= WBSD_EINT_CRC; |
5721dbf2 | 181 | ier |= WBSD_EINT_TIMEOUT; |
1da177e4 LT |
182 | ier |= WBSD_EINT_TC; |
183 | ||
184 | outb(ier, host->base + WBSD_EIR); | |
185 | ||
186 | /* | |
187 | * Clear interrupts. | |
188 | */ | |
189 | inb(host->base + WBSD_ISR); | |
190 | } | |
191 | ||
cfa7f521 | 192 | static void wbsd_reset(struct wbsd_host *host) |
1da177e4 LT |
193 | { |
194 | u8 setup; | |
fecf92ba | 195 | |
d191634f | 196 | printk(KERN_ERR "%s: Resetting chip\n", mmc_hostname(host->mmc)); |
fecf92ba | 197 | |
1da177e4 LT |
198 | /* |
199 | * Soft reset of chip (SD/MMC part). | |
200 | */ | |
201 | setup = wbsd_read_index(host, WBSD_IDX_SETUP); | |
202 | setup |= WBSD_SOFT_RESET; | |
203 | wbsd_write_index(host, WBSD_IDX_SETUP, setup); | |
204 | } | |
205 | ||
cfa7f521 | 206 | static void wbsd_request_end(struct wbsd_host *host, struct mmc_request *mrq) |
1da177e4 LT |
207 | { |
208 | unsigned long dmaflags; | |
fecf92ba | 209 | |
cfa7f521 | 210 | if (host->dma >= 0) { |
1da177e4 LT |
211 | /* |
212 | * Release ISA DMA controller. | |
213 | */ | |
214 | dmaflags = claim_dma_lock(); | |
215 | disable_dma(host->dma); | |
216 | clear_dma_ff(host->dma); | |
217 | release_dma_lock(dmaflags); | |
218 | ||
219 | /* | |
220 | * Disable DMA on host. | |
221 | */ | |
222 | wbsd_write_index(host, WBSD_IDX_DMA, 0); | |
223 | } | |
fecf92ba | 224 | |
1da177e4 LT |
225 | host->mrq = NULL; |
226 | ||
227 | /* | |
228 | * MMC layer might call back into the driver so first unlock. | |
229 | */ | |
230 | spin_unlock(&host->lock); | |
231 | mmc_request_done(host->mmc, mrq); | |
232 | spin_lock(&host->lock); | |
233 | } | |
234 | ||
235 | /* | |
236 | * Scatter/gather functions | |
237 | */ | |
238 | ||
cfa7f521 | 239 | static inline void wbsd_init_sg(struct wbsd_host *host, struct mmc_data *data) |
1da177e4 LT |
240 | { |
241 | /* | |
242 | * Get info. about SG list from data structure. | |
243 | */ | |
244 | host->cur_sg = data->sg; | |
245 | host->num_sg = data->sg_len; | |
246 | ||
247 | host->offset = 0; | |
248 | host->remain = host->cur_sg->length; | |
249 | } | |
250 | ||
cfa7f521 | 251 | static inline int wbsd_next_sg(struct wbsd_host *host) |
1da177e4 LT |
252 | { |
253 | /* | |
254 | * Skip to next SG entry. | |
255 | */ | |
256 | host->cur_sg++; | |
257 | host->num_sg--; | |
258 | ||
259 | /* | |
260 | * Any entries left? | |
261 | */ | |
cfa7f521 PO |
262 | if (host->num_sg > 0) { |
263 | host->offset = 0; | |
264 | host->remain = host->cur_sg->length; | |
265 | } | |
fecf92ba | 266 | |
1da177e4 LT |
267 | return host->num_sg; |
268 | } | |
269 | ||
4a0ddbd2 | 270 | static inline char *wbsd_sg_to_buffer(struct wbsd_host *host) |
1da177e4 | 271 | { |
4a0ddbd2 | 272 | return page_address(host->cur_sg->page) + host->cur_sg->offset; |
1da177e4 LT |
273 | } |
274 | ||
cfa7f521 | 275 | static inline void wbsd_sg_to_dma(struct wbsd_host *host, struct mmc_data *data) |
1da177e4 | 276 | { |
14d836e7 | 277 | unsigned int len, i; |
cfa7f521 PO |
278 | struct scatterlist *sg; |
279 | char *dmabuf = host->dma_buffer; | |
280 | char *sgbuf; | |
fecf92ba | 281 | |
1da177e4 LT |
282 | sg = data->sg; |
283 | len = data->sg_len; | |
fecf92ba | 284 | |
cfa7f521 | 285 | for (i = 0; i < len; i++) { |
4a0ddbd2 | 286 | sgbuf = page_address(sg[i].page) + sg[i].offset; |
14d836e7 | 287 | memcpy(dmabuf, sgbuf, sg[i].length); |
1da177e4 | 288 | dmabuf += sg[i].length; |
1da177e4 | 289 | } |
1da177e4 LT |
290 | } |
291 | ||
cfa7f521 | 292 | static inline void wbsd_dma_to_sg(struct wbsd_host *host, struct mmc_data *data) |
1da177e4 | 293 | { |
14d836e7 | 294 | unsigned int len, i; |
cfa7f521 PO |
295 | struct scatterlist *sg; |
296 | char *dmabuf = host->dma_buffer; | |
297 | char *sgbuf; | |
fecf92ba | 298 | |
1da177e4 LT |
299 | sg = data->sg; |
300 | len = data->sg_len; | |
fecf92ba | 301 | |
cfa7f521 | 302 | for (i = 0; i < len; i++) { |
4a0ddbd2 | 303 | sgbuf = page_address(sg[i].page) + sg[i].offset; |
14d836e7 | 304 | memcpy(sgbuf, dmabuf, sg[i].length); |
1da177e4 | 305 | dmabuf += sg[i].length; |
1da177e4 | 306 | } |
1da177e4 LT |
307 | } |
308 | ||
309 | /* | |
310 | * Command handling | |
311 | */ | |
fecf92ba | 312 | |
cfa7f521 PO |
313 | static inline void wbsd_get_short_reply(struct wbsd_host *host, |
314 | struct mmc_command *cmd) | |
1da177e4 LT |
315 | { |
316 | /* | |
317 | * Correct response type? | |
318 | */ | |
cfa7f521 | 319 | if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_SHORT) { |
1da177e4 LT |
320 | cmd->error = MMC_ERR_INVALID; |
321 | return; | |
322 | } | |
fecf92ba | 323 | |
cfa7f521 PO |
324 | cmd->resp[0] = wbsd_read_index(host, WBSD_IDX_RESP12) << 24; |
325 | cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP13) << 16; | |
326 | cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP14) << 8; | |
327 | cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP15) << 0; | |
328 | cmd->resp[1] = wbsd_read_index(host, WBSD_IDX_RESP16) << 24; | |
1da177e4 LT |
329 | } |
330 | ||
cfa7f521 PO |
331 | static inline void wbsd_get_long_reply(struct wbsd_host *host, |
332 | struct mmc_command *cmd) | |
1da177e4 LT |
333 | { |
334 | int i; | |
fecf92ba | 335 | |
1da177e4 LT |
336 | /* |
337 | * Correct response type? | |
338 | */ | |
cfa7f521 | 339 | if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_LONG) { |
1da177e4 LT |
340 | cmd->error = MMC_ERR_INVALID; |
341 | return; | |
342 | } | |
fecf92ba | 343 | |
cfa7f521 | 344 | for (i = 0; i < 4; i++) { |
1da177e4 LT |
345 | cmd->resp[i] = |
346 | wbsd_read_index(host, WBSD_IDX_RESP1 + i * 4) << 24; | |
347 | cmd->resp[i] |= | |
348 | wbsd_read_index(host, WBSD_IDX_RESP2 + i * 4) << 16; | |
349 | cmd->resp[i] |= | |
350 | wbsd_read_index(host, WBSD_IDX_RESP3 + i * 4) << 8; | |
351 | cmd->resp[i] |= | |
352 | wbsd_read_index(host, WBSD_IDX_RESP4 + i * 4) << 0; | |
353 | } | |
354 | } | |
355 | ||
cfa7f521 | 356 | static void wbsd_send_command(struct wbsd_host *host, struct mmc_command *cmd) |
1da177e4 LT |
357 | { |
358 | int i; | |
359 | u8 status, isr; | |
fecf92ba | 360 | |
1da177e4 LT |
361 | /* |
362 | * Clear accumulated ISR. The interrupt routine | |
363 | * will fill this one with events that occur during | |
364 | * transfer. | |
365 | */ | |
366 | host->isr = 0; | |
fecf92ba | 367 | |
1da177e4 LT |
368 | /* |
369 | * Send the command (CRC calculated by host). | |
370 | */ | |
371 | outb(cmd->opcode, host->base + WBSD_CMDR); | |
cfa7f521 | 372 | for (i = 3; i >= 0; i--) |
1da177e4 | 373 | outb((cmd->arg >> (i * 8)) & 0xff, host->base + WBSD_CMDR); |
fecf92ba | 374 | |
1da177e4 | 375 | cmd->error = MMC_ERR_NONE; |
fecf92ba | 376 | |
1da177e4 LT |
377 | /* |
378 | * Wait for the request to complete. | |
379 | */ | |
380 | do { | |
381 | status = wbsd_read_index(host, WBSD_IDX_STATUS); | |
382 | } while (status & WBSD_CARDTRAFFIC); | |
383 | ||
384 | /* | |
385 | * Do we expect a reply? | |
386 | */ | |
e9225176 | 387 | if (cmd->flags & MMC_RSP_PRESENT) { |
1da177e4 LT |
388 | /* |
389 | * Read back status. | |
390 | */ | |
391 | isr = host->isr; | |
fecf92ba | 392 | |
1da177e4 LT |
393 | /* Card removed? */ |
394 | if (isr & WBSD_INT_CARD) | |
395 | cmd->error = MMC_ERR_TIMEOUT; | |
396 | /* Timeout? */ | |
397 | else if (isr & WBSD_INT_TIMEOUT) | |
398 | cmd->error = MMC_ERR_TIMEOUT; | |
399 | /* CRC? */ | |
400 | else if ((cmd->flags & MMC_RSP_CRC) && (isr & WBSD_INT_CRC)) | |
401 | cmd->error = MMC_ERR_BADCRC; | |
402 | /* All ok */ | |
cfa7f521 | 403 | else { |
e9225176 | 404 | if (cmd->flags & MMC_RSP_136) |
1da177e4 | 405 | wbsd_get_long_reply(host, cmd); |
e9225176 RK |
406 | else |
407 | wbsd_get_short_reply(host, cmd); | |
1da177e4 LT |
408 | } |
409 | } | |
1da177e4 LT |
410 | } |
411 | ||
412 | /* | |
413 | * Data functions | |
414 | */ | |
415 | ||
cfa7f521 | 416 | static void wbsd_empty_fifo(struct wbsd_host *host) |
1da177e4 | 417 | { |
cfa7f521 PO |
418 | struct mmc_data *data = host->mrq->cmd->data; |
419 | char *buffer; | |
1da177e4 | 420 | int i, fsr, fifo; |
fecf92ba | 421 | |
1da177e4 LT |
422 | /* |
423 | * Handle excessive data. | |
424 | */ | |
14d836e7 | 425 | if (host->num_sg == 0) |
1da177e4 | 426 | return; |
fecf92ba | 427 | |
4a0ddbd2 | 428 | buffer = wbsd_sg_to_buffer(host) + host->offset; |
1da177e4 LT |
429 | |
430 | /* | |
431 | * Drain the fifo. This has a tendency to loop longer | |
432 | * than the FIFO length (usually one block). | |
433 | */ | |
cfa7f521 | 434 | while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_EMPTY)) { |
1da177e4 LT |
435 | /* |
436 | * The size field in the FSR is broken so we have to | |
437 | * do some guessing. | |
fecf92ba | 438 | */ |
1da177e4 LT |
439 | if (fsr & WBSD_FIFO_FULL) |
440 | fifo = 16; | |
441 | else if (fsr & WBSD_FIFO_FUTHRE) | |
442 | fifo = 8; | |
443 | else | |
444 | fifo = 1; | |
fecf92ba | 445 | |
cfa7f521 | 446 | for (i = 0; i < fifo; i++) { |
1da177e4 LT |
447 | *buffer = inb(host->base + WBSD_DFR); |
448 | buffer++; | |
449 | host->offset++; | |
450 | host->remain--; | |
451 | ||
452 | data->bytes_xfered++; | |
fecf92ba | 453 | |
1da177e4 LT |
454 | /* |
455 | * End of scatter list entry? | |
456 | */ | |
cfa7f521 | 457 | if (host->remain == 0) { |
1da177e4 LT |
458 | /* |
459 | * Get next entry. Check if last. | |
460 | */ | |
14d836e7 | 461 | if (!wbsd_next_sg(host)) |
1da177e4 | 462 | return; |
fecf92ba | 463 | |
4a0ddbd2 | 464 | buffer = wbsd_sg_to_buffer(host); |
1da177e4 LT |
465 | } |
466 | } | |
467 | } | |
fecf92ba | 468 | |
1da177e4 LT |
469 | /* |
470 | * This is a very dirty hack to solve a | |
471 | * hardware problem. The chip doesn't trigger | |
472 | * FIFO threshold interrupts properly. | |
473 | */ | |
14d836e7 | 474 | if ((data->blocks * data->blksz - data->bytes_xfered) < 16) |
1da177e4 LT |
475 | tasklet_schedule(&host->fifo_tasklet); |
476 | } | |
477 | ||
cfa7f521 | 478 | static void wbsd_fill_fifo(struct wbsd_host *host) |
1da177e4 | 479 | { |
cfa7f521 PO |
480 | struct mmc_data *data = host->mrq->cmd->data; |
481 | char *buffer; | |
1da177e4 | 482 | int i, fsr, fifo; |
fecf92ba | 483 | |
1da177e4 LT |
484 | /* |
485 | * Check that we aren't being called after the | |
486 | * entire buffer has been transfered. | |
487 | */ | |
14d836e7 | 488 | if (host->num_sg == 0) |
1da177e4 LT |
489 | return; |
490 | ||
4a0ddbd2 | 491 | buffer = wbsd_sg_to_buffer(host) + host->offset; |
1da177e4 LT |
492 | |
493 | /* | |
494 | * Fill the fifo. This has a tendency to loop longer | |
495 | * than the FIFO length (usually one block). | |
496 | */ | |
cfa7f521 | 497 | while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_FULL)) { |
1da177e4 LT |
498 | /* |
499 | * The size field in the FSR is broken so we have to | |
500 | * do some guessing. | |
fecf92ba | 501 | */ |
1da177e4 LT |
502 | if (fsr & WBSD_FIFO_EMPTY) |
503 | fifo = 0; | |
504 | else if (fsr & WBSD_FIFO_EMTHRE) | |
505 | fifo = 8; | |
506 | else | |
507 | fifo = 15; | |
508 | ||
cfa7f521 | 509 | for (i = 16; i > fifo; i--) { |
1da177e4 LT |
510 | outb(*buffer, host->base + WBSD_DFR); |
511 | buffer++; | |
512 | host->offset++; | |
513 | host->remain--; | |
fecf92ba | 514 | |
1da177e4 | 515 | data->bytes_xfered++; |
fecf92ba | 516 | |
1da177e4 LT |
517 | /* |
518 | * End of scatter list entry? | |
519 | */ | |
cfa7f521 | 520 | if (host->remain == 0) { |
1da177e4 LT |
521 | /* |
522 | * Get next entry. Check if last. | |
523 | */ | |
14d836e7 | 524 | if (!wbsd_next_sg(host)) |
1da177e4 | 525 | return; |
fecf92ba | 526 | |
4a0ddbd2 | 527 | buffer = wbsd_sg_to_buffer(host); |
1da177e4 LT |
528 | } |
529 | } | |
530 | } | |
fecf92ba | 531 | |
85bcc130 PO |
532 | /* |
533 | * The controller stops sending interrupts for | |
534 | * 'FIFO empty' under certain conditions. So we | |
535 | * need to be a bit more pro-active. | |
536 | */ | |
537 | tasklet_schedule(&host->fifo_tasklet); | |
1da177e4 LT |
538 | } |
539 | ||
cfa7f521 | 540 | static void wbsd_prepare_data(struct wbsd_host *host, struct mmc_data *data) |
1da177e4 LT |
541 | { |
542 | u16 blksize; | |
543 | u8 setup; | |
544 | unsigned long dmaflags; | |
14d836e7 | 545 | unsigned int size; |
1da177e4 | 546 | |
1da177e4 LT |
547 | /* |
548 | * Calculate size. | |
549 | */ | |
14d836e7 | 550 | size = data->blocks * data->blksz; |
1da177e4 LT |
551 | |
552 | /* | |
553 | * Check timeout values for overflow. | |
554 | * (Yes, some cards cause this value to overflow). | |
555 | */ | |
556 | if (data->timeout_ns > 127000000) | |
557 | wbsd_write_index(host, WBSD_IDX_TAAC, 127); | |
cfa7f521 PO |
558 | else { |
559 | wbsd_write_index(host, WBSD_IDX_TAAC, | |
560 | data->timeout_ns / 1000000); | |
561 | } | |
fecf92ba | 562 | |
1da177e4 LT |
563 | if (data->timeout_clks > 255) |
564 | wbsd_write_index(host, WBSD_IDX_NSAC, 255); | |
565 | else | |
566 | wbsd_write_index(host, WBSD_IDX_NSAC, data->timeout_clks); | |
fecf92ba | 567 | |
1da177e4 LT |
568 | /* |
569 | * Inform the chip of how large blocks will be | |
570 | * sent. It needs this to determine when to | |
571 | * calculate CRC. | |
572 | * | |
573 | * Space for CRC must be included in the size. | |
65ae2118 | 574 | * Two bytes are needed for each data line. |
1da177e4 | 575 | */ |
cfa7f521 | 576 | if (host->bus_width == MMC_BUS_WIDTH_1) { |
2c171bf1 | 577 | blksize = data->blksz + 2; |
65ae2118 PO |
578 | |
579 | wbsd_write_index(host, WBSD_IDX_PBSMSB, (blksize >> 4) & 0xF0); | |
580 | wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF); | |
cfa7f521 | 581 | } else if (host->bus_width == MMC_BUS_WIDTH_4) { |
2c171bf1 | 582 | blksize = data->blksz + 2 * 4; |
fecf92ba | 583 | |
cfa7f521 PO |
584 | wbsd_write_index(host, WBSD_IDX_PBSMSB, |
585 | ((blksize >> 4) & 0xF0) | WBSD_DATA_WIDTH); | |
65ae2118 | 586 | wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF); |
cfa7f521 | 587 | } else { |
65ae2118 PO |
588 | data->error = MMC_ERR_INVALID; |
589 | return; | |
590 | } | |
1da177e4 LT |
591 | |
592 | /* | |
593 | * Clear the FIFO. This is needed even for DMA | |
594 | * transfers since the chip still uses the FIFO | |
595 | * internally. | |
596 | */ | |
597 | setup = wbsd_read_index(host, WBSD_IDX_SETUP); | |
598 | setup |= WBSD_FIFO_RESET; | |
599 | wbsd_write_index(host, WBSD_IDX_SETUP, setup); | |
fecf92ba | 600 | |
1da177e4 LT |
601 | /* |
602 | * DMA transfer? | |
603 | */ | |
cfa7f521 | 604 | if (host->dma >= 0) { |
1da177e4 LT |
605 | /* |
606 | * The buffer for DMA is only 64 kB. | |
607 | */ | |
14d836e7 AD |
608 | BUG_ON(size > 0x10000); |
609 | if (size > 0x10000) { | |
1da177e4 LT |
610 | data->error = MMC_ERR_INVALID; |
611 | return; | |
612 | } | |
fecf92ba | 613 | |
1da177e4 LT |
614 | /* |
615 | * Transfer data from the SG list to | |
616 | * the DMA buffer. | |
617 | */ | |
618 | if (data->flags & MMC_DATA_WRITE) | |
619 | wbsd_sg_to_dma(host, data); | |
fecf92ba | 620 | |
1da177e4 LT |
621 | /* |
622 | * Initialise the ISA DMA controller. | |
fecf92ba | 623 | */ |
1da177e4 LT |
624 | dmaflags = claim_dma_lock(); |
625 | disable_dma(host->dma); | |
626 | clear_dma_ff(host->dma); | |
627 | if (data->flags & MMC_DATA_READ) | |
628 | set_dma_mode(host->dma, DMA_MODE_READ & ~0x40); | |
629 | else | |
630 | set_dma_mode(host->dma, DMA_MODE_WRITE & ~0x40); | |
631 | set_dma_addr(host->dma, host->dma_addr); | |
14d836e7 | 632 | set_dma_count(host->dma, size); |
1da177e4 LT |
633 | |
634 | enable_dma(host->dma); | |
635 | release_dma_lock(dmaflags); | |
636 | ||
637 | /* | |
638 | * Enable DMA on the host. | |
639 | */ | |
640 | wbsd_write_index(host, WBSD_IDX_DMA, WBSD_DMA_ENABLE); | |
cfa7f521 | 641 | } else { |
1da177e4 LT |
642 | /* |
643 | * This flag is used to keep printk | |
644 | * output to a minimum. | |
645 | */ | |
646 | host->firsterr = 1; | |
fecf92ba | 647 | |
1da177e4 LT |
648 | /* |
649 | * Initialise the SG list. | |
650 | */ | |
651 | wbsd_init_sg(host, data); | |
fecf92ba | 652 | |
1da177e4 LT |
653 | /* |
654 | * Turn off DMA. | |
655 | */ | |
656 | wbsd_write_index(host, WBSD_IDX_DMA, 0); | |
fecf92ba | 657 | |
1da177e4 LT |
658 | /* |
659 | * Set up FIFO threshold levels (and fill | |
660 | * buffer if doing a write). | |
661 | */ | |
cfa7f521 | 662 | if (data->flags & MMC_DATA_READ) { |
1da177e4 LT |
663 | wbsd_write_index(host, WBSD_IDX_FIFOEN, |
664 | WBSD_FIFOEN_FULL | 8); | |
cfa7f521 | 665 | } else { |
1da177e4 LT |
666 | wbsd_write_index(host, WBSD_IDX_FIFOEN, |
667 | WBSD_FIFOEN_EMPTY | 8); | |
668 | wbsd_fill_fifo(host); | |
669 | } | |
fecf92ba PO |
670 | } |
671 | ||
1da177e4 LT |
672 | data->error = MMC_ERR_NONE; |
673 | } | |
674 | ||
cfa7f521 | 675 | static void wbsd_finish_data(struct wbsd_host *host, struct mmc_data *data) |
1da177e4 LT |
676 | { |
677 | unsigned long dmaflags; | |
678 | int count; | |
679 | u8 status; | |
fecf92ba | 680 | |
1da177e4 LT |
681 | WARN_ON(host->mrq == NULL); |
682 | ||
683 | /* | |
684 | * Send a stop command if needed. | |
685 | */ | |
686 | if (data->stop) | |
687 | wbsd_send_command(host, data->stop); | |
688 | ||
689 | /* | |
690 | * Wait for the controller to leave data | |
691 | * transfer state. | |
692 | */ | |
cfa7f521 | 693 | do { |
1da177e4 LT |
694 | status = wbsd_read_index(host, WBSD_IDX_STATUS); |
695 | } while (status & (WBSD_BLOCK_READ | WBSD_BLOCK_WRITE)); | |
fecf92ba | 696 | |
1da177e4 LT |
697 | /* |
698 | * DMA transfer? | |
699 | */ | |
cfa7f521 | 700 | if (host->dma >= 0) { |
1da177e4 LT |
701 | /* |
702 | * Disable DMA on the host. | |
703 | */ | |
704 | wbsd_write_index(host, WBSD_IDX_DMA, 0); | |
fecf92ba | 705 | |
1da177e4 LT |
706 | /* |
707 | * Turn of ISA DMA controller. | |
708 | */ | |
709 | dmaflags = claim_dma_lock(); | |
710 | disable_dma(host->dma); | |
711 | clear_dma_ff(host->dma); | |
712 | count = get_dma_residue(host->dma); | |
713 | release_dma_lock(dmaflags); | |
fecf92ba | 714 | |
14d836e7 AD |
715 | data->bytes_xfered = host->mrq->data->blocks * |
716 | host->mrq->data->blksz - count; | |
717 | data->bytes_xfered -= data->bytes_xfered % data->blksz; | |
718 | ||
1da177e4 LT |
719 | /* |
720 | * Any leftover data? | |
721 | */ | |
cfa7f521 | 722 | if (count) { |
d191634f PO |
723 | printk(KERN_ERR "%s: Incomplete DMA transfer. " |
724 | "%d bytes left.\n", | |
725 | mmc_hostname(host->mmc), count); | |
fecf92ba | 726 | |
14d836e7 AD |
727 | if (data->error == MMC_ERR_NONE) |
728 | data->error = MMC_ERR_FAILED; | |
cfa7f521 | 729 | } else { |
1da177e4 LT |
730 | /* |
731 | * Transfer data from DMA buffer to | |
732 | * SG list. | |
733 | */ | |
734 | if (data->flags & MMC_DATA_READ) | |
735 | wbsd_dma_to_sg(host, data); | |
14d836e7 | 736 | } |
fecf92ba | 737 | |
14d836e7 AD |
738 | if (data->error != MMC_ERR_NONE) { |
739 | if (data->bytes_xfered) | |
740 | data->bytes_xfered -= data->blksz; | |
1da177e4 LT |
741 | } |
742 | } | |
fecf92ba | 743 | |
1da177e4 LT |
744 | wbsd_request_end(host, host->mrq); |
745 | } | |
746 | ||
85bcc130 PO |
747 | /*****************************************************************************\ |
748 | * * | |
749 | * MMC layer callbacks * | |
750 | * * | |
751 | \*****************************************************************************/ | |
1da177e4 | 752 | |
cfa7f521 | 753 | static void wbsd_request(struct mmc_host *mmc, struct mmc_request *mrq) |
1da177e4 | 754 | { |
cfa7f521 PO |
755 | struct wbsd_host *host = mmc_priv(mmc); |
756 | struct mmc_command *cmd; | |
1da177e4 LT |
757 | |
758 | /* | |
759 | * Disable tasklets to avoid a deadlock. | |
760 | */ | |
761 | spin_lock_bh(&host->lock); | |
762 | ||
763 | BUG_ON(host->mrq != NULL); | |
764 | ||
765 | cmd = mrq->cmd; | |
766 | ||
767 | host->mrq = mrq; | |
fecf92ba | 768 | |
1da177e4 LT |
769 | /* |
770 | * If there is no card in the slot then | |
771 | * timeout immediatly. | |
772 | */ | |
cfa7f521 | 773 | if (!(host->flags & WBSD_FCARD_PRESENT)) { |
1da177e4 LT |
774 | cmd->error = MMC_ERR_TIMEOUT; |
775 | goto done; | |
776 | } | |
777 | ||
cfa7f521 | 778 | if (cmd->data) { |
5ba593a9 PO |
779 | /* |
780 | * The hardware is so delightfully stupid that it has a list | |
781 | * of "data" commands. If a command isn't on this list, it'll | |
782 | * just go back to the idle state and won't send any data | |
783 | * interrupts. | |
784 | */ | |
785 | switch (cmd->opcode) { | |
786 | case 11: | |
787 | case 17: | |
788 | case 18: | |
789 | case 20: | |
790 | case 24: | |
791 | case 25: | |
792 | case 26: | |
793 | case 27: | |
794 | case 30: | |
795 | case 42: | |
796 | case 56: | |
797 | break; | |
798 | ||
799 | /* ACMDs. We don't keep track of state, so we just treat them | |
800 | * like any other command. */ | |
801 | case 51: | |
802 | break; | |
803 | ||
804 | default: | |
805 | #ifdef CONFIG_MMC_DEBUG | |
806 | printk(KERN_WARNING "%s: Data command %d is not " | |
807 | "supported by this controller.\n", | |
808 | mmc_hostname(host->mmc), cmd->opcode); | |
809 | #endif | |
b2670b1c | 810 | cmd->error = MMC_ERR_INVALID; |
5ba593a9 PO |
811 | |
812 | goto done; | |
813 | }; | |
b2670b1c | 814 | } |
5ba593a9 | 815 | |
b2670b1c PO |
816 | /* |
817 | * Does the request include data? | |
818 | */ | |
819 | if (cmd->data) { | |
820 | wbsd_prepare_data(host, cmd->data); | |
821 | ||
822 | if (cmd->data->error != MMC_ERR_NONE) | |
823 | goto done; | |
824 | } | |
825 | ||
826 | wbsd_send_command(host, cmd); | |
827 | ||
828 | /* | |
829 | * If this is a data transfer the request | |
830 | * will be finished after the data has | |
831 | * transfered. | |
832 | */ | |
833 | if (cmd->data && (cmd->error == MMC_ERR_NONE)) { | |
1da177e4 LT |
834 | /* |
835 | * Dirty fix for hardware bug. | |
836 | */ | |
837 | if (host->dma == -1) | |
838 | tasklet_schedule(&host->fifo_tasklet); | |
839 | ||
840 | spin_unlock_bh(&host->lock); | |
841 | ||
842 | return; | |
843 | } | |
fecf92ba | 844 | |
1da177e4 LT |
845 | done: |
846 | wbsd_request_end(host, mrq); | |
847 | ||
848 | spin_unlock_bh(&host->lock); | |
849 | } | |
850 | ||
cfa7f521 | 851 | static void wbsd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) |
1da177e4 | 852 | { |
cfa7f521 | 853 | struct wbsd_host *host = mmc_priv(mmc); |
1da177e4 | 854 | u8 clk, setup, pwr; |
fecf92ba | 855 | |
1da177e4 LT |
856 | spin_lock_bh(&host->lock); |
857 | ||
858 | /* | |
859 | * Reset the chip on each power off. | |
860 | * Should clear out any weird states. | |
861 | */ | |
862 | if (ios->power_mode == MMC_POWER_OFF) | |
863 | wbsd_init_device(host); | |
fecf92ba | 864 | |
1da177e4 LT |
865 | if (ios->clock >= 24000000) |
866 | clk = WBSD_CLK_24M; | |
867 | else if (ios->clock >= 16000000) | |
868 | clk = WBSD_CLK_16M; | |
869 | else if (ios->clock >= 12000000) | |
870 | clk = WBSD_CLK_12M; | |
871 | else | |
872 | clk = WBSD_CLK_375K; | |
873 | ||
874 | /* | |
875 | * Only write to the clock register when | |
876 | * there is an actual change. | |
877 | */ | |
cfa7f521 | 878 | if (clk != host->clk) { |
1da177e4 LT |
879 | wbsd_write_index(host, WBSD_IDX_CLK, clk); |
880 | host->clk = clk; | |
881 | } | |
882 | ||
85bcc130 PO |
883 | /* |
884 | * Power up card. | |
885 | */ | |
cfa7f521 | 886 | if (ios->power_mode != MMC_POWER_OFF) { |
1da177e4 LT |
887 | pwr = inb(host->base + WBSD_CSR); |
888 | pwr &= ~WBSD_POWER_N; | |
889 | outb(pwr, host->base + WBSD_CSR); | |
1da177e4 LT |
890 | } |
891 | ||
85bcc130 PO |
892 | /* |
893 | * MMC cards need to have pin 1 high during init. | |
85bcc130 | 894 | * It wreaks havoc with the card detection though so |
1656fa57 | 895 | * that needs to be disabled. |
85bcc130 PO |
896 | */ |
897 | setup = wbsd_read_index(host, WBSD_IDX_SETUP); | |
cfa7f521 | 898 | if (ios->chip_select == MMC_CS_HIGH) { |
65ae2118 | 899 | BUG_ON(ios->bus_width != MMC_BUS_WIDTH_1); |
85bcc130 PO |
900 | setup |= WBSD_DAT3_H; |
901 | host->flags |= WBSD_FIGNORE_DETECT; | |
cfa7f521 PO |
902 | } else { |
903 | if (setup & WBSD_DAT3_H) { | |
19c1f3ca | 904 | setup &= ~WBSD_DAT3_H; |
1656fa57 | 905 | |
19c1f3ca PO |
906 | /* |
907 | * We cannot resume card detection immediatly | |
908 | * because of capacitance and delays in the chip. | |
909 | */ | |
cfa7f521 | 910 | mod_timer(&host->ignore_timer, jiffies + HZ / 100); |
19c1f3ca | 911 | } |
85bcc130 PO |
912 | } |
913 | wbsd_write_index(host, WBSD_IDX_SETUP, setup); | |
fecf92ba | 914 | |
65ae2118 PO |
915 | /* |
916 | * Store bus width for later. Will be used when | |
917 | * setting up the data transfer. | |
918 | */ | |
919 | host->bus_width = ios->bus_width; | |
920 | ||
1da177e4 LT |
921 | spin_unlock_bh(&host->lock); |
922 | } | |
923 | ||
cfa7f521 | 924 | static int wbsd_get_ro(struct mmc_host *mmc) |
65ae2118 | 925 | { |
cfa7f521 | 926 | struct wbsd_host *host = mmc_priv(mmc); |
65ae2118 PO |
927 | u8 csr; |
928 | ||
929 | spin_lock_bh(&host->lock); | |
930 | ||
931 | csr = inb(host->base + WBSD_CSR); | |
932 | csr |= WBSD_MSLED; | |
933 | outb(csr, host->base + WBSD_CSR); | |
934 | ||
935 | mdelay(1); | |
936 | ||
937 | csr = inb(host->base + WBSD_CSR); | |
938 | csr &= ~WBSD_MSLED; | |
939 | outb(csr, host->base + WBSD_CSR); | |
940 | ||
941 | spin_unlock_bh(&host->lock); | |
942 | ||
943 | return csr & WBSD_WRPT; | |
944 | } | |
945 | ||
ab7aefd0 | 946 | static const struct mmc_host_ops wbsd_ops = { |
85bcc130 PO |
947 | .request = wbsd_request, |
948 | .set_ios = wbsd_set_ios, | |
65ae2118 | 949 | .get_ro = wbsd_get_ro, |
85bcc130 PO |
950 | }; |
951 | ||
952 | /*****************************************************************************\ | |
953 | * * | |
954 | * Interrupt handling * | |
955 | * * | |
956 | \*****************************************************************************/ | |
957 | ||
1656fa57 PO |
958 | /* |
959 | * Helper function to reset detection ignore | |
960 | */ | |
961 | ||
962 | static void wbsd_reset_ignore(unsigned long data) | |
963 | { | |
cfa7f521 | 964 | struct wbsd_host *host = (struct wbsd_host *)data; |
1656fa57 PO |
965 | |
966 | BUG_ON(host == NULL); | |
967 | ||
968 | DBG("Resetting card detection ignore\n"); | |
969 | ||
970 | spin_lock_bh(&host->lock); | |
971 | ||
972 | host->flags &= ~WBSD_FIGNORE_DETECT; | |
973 | ||
974 | /* | |
975 | * Card status might have changed during the | |
976 | * blackout. | |
977 | */ | |
978 | tasklet_schedule(&host->card_tasklet); | |
979 | ||
980 | spin_unlock_bh(&host->lock); | |
981 | } | |
982 | ||
1da177e4 LT |
983 | /* |
984 | * Tasklets | |
985 | */ | |
986 | ||
cfa7f521 | 987 | static inline struct mmc_data *wbsd_get_data(struct wbsd_host *host) |
1da177e4 LT |
988 | { |
989 | WARN_ON(!host->mrq); | |
990 | if (!host->mrq) | |
991 | return NULL; | |
992 | ||
993 | WARN_ON(!host->mrq->cmd); | |
994 | if (!host->mrq->cmd) | |
995 | return NULL; | |
996 | ||
997 | WARN_ON(!host->mrq->cmd->data); | |
998 | if (!host->mrq->cmd->data) | |
999 | return NULL; | |
fecf92ba | 1000 | |
1da177e4 LT |
1001 | return host->mrq->cmd->data; |
1002 | } | |
1003 | ||
1004 | static void wbsd_tasklet_card(unsigned long param) | |
1005 | { | |
cfa7f521 | 1006 | struct wbsd_host *host = (struct wbsd_host *)param; |
1da177e4 | 1007 | u8 csr; |
210ce2a7 | 1008 | int delay = -1; |
fecf92ba | 1009 | |
1da177e4 | 1010 | spin_lock(&host->lock); |
fecf92ba | 1011 | |
cfa7f521 | 1012 | if (host->flags & WBSD_FIGNORE_DETECT) { |
85bcc130 PO |
1013 | spin_unlock(&host->lock); |
1014 | return; | |
1015 | } | |
fecf92ba | 1016 | |
1da177e4 LT |
1017 | csr = inb(host->base + WBSD_CSR); |
1018 | WARN_ON(csr == 0xff); | |
fecf92ba | 1019 | |
cfa7f521 PO |
1020 | if (csr & WBSD_CARDPRESENT) { |
1021 | if (!(host->flags & WBSD_FCARD_PRESENT)) { | |
85bcc130 PO |
1022 | DBG("Card inserted\n"); |
1023 | host->flags |= WBSD_FCARD_PRESENT; | |
fecf92ba | 1024 | |
210ce2a7 | 1025 | delay = 500; |
85bcc130 | 1026 | } |
cfa7f521 | 1027 | } else if (host->flags & WBSD_FCARD_PRESENT) { |
1da177e4 | 1028 | DBG("Card removed\n"); |
85bcc130 | 1029 | host->flags &= ~WBSD_FCARD_PRESENT; |
fecf92ba | 1030 | |
cfa7f521 | 1031 | if (host->mrq) { |
d191634f PO |
1032 | printk(KERN_ERR "%s: Card removed during transfer!\n", |
1033 | mmc_hostname(host->mmc)); | |
1da177e4 | 1034 | wbsd_reset(host); |
fecf92ba | 1035 | |
1da177e4 LT |
1036 | host->mrq->cmd->error = MMC_ERR_FAILED; |
1037 | tasklet_schedule(&host->finish_tasklet); | |
1038 | } | |
fecf92ba | 1039 | |
210ce2a7 | 1040 | delay = 0; |
6e6293dd | 1041 | } |
210ce2a7 PO |
1042 | |
1043 | /* | |
1044 | * Unlock first since we might get a call back. | |
1045 | */ | |
1046 | ||
1047 | spin_unlock(&host->lock); | |
1048 | ||
1049 | if (delay != -1) | |
1050 | mmc_detect_change(host->mmc, msecs_to_jiffies(delay)); | |
1da177e4 LT |
1051 | } |
1052 | ||
1053 | static void wbsd_tasklet_fifo(unsigned long param) | |
1054 | { | |
cfa7f521 PO |
1055 | struct wbsd_host *host = (struct wbsd_host *)param; |
1056 | struct mmc_data *data; | |
fecf92ba | 1057 | |
1da177e4 | 1058 | spin_lock(&host->lock); |
fecf92ba | 1059 | |
1da177e4 LT |
1060 | if (!host->mrq) |
1061 | goto end; | |
fecf92ba | 1062 | |
1da177e4 LT |
1063 | data = wbsd_get_data(host); |
1064 | if (!data) | |
1065 | goto end; | |
1066 | ||
1067 | if (data->flags & MMC_DATA_WRITE) | |
1068 | wbsd_fill_fifo(host); | |
1069 | else | |
1070 | wbsd_empty_fifo(host); | |
1071 | ||
1072 | /* | |
1073 | * Done? | |
1074 | */ | |
14d836e7 | 1075 | if (host->num_sg == 0) { |
1da177e4 LT |
1076 | wbsd_write_index(host, WBSD_IDX_FIFOEN, 0); |
1077 | tasklet_schedule(&host->finish_tasklet); | |
1078 | } | |
1079 | ||
fecf92ba | 1080 | end: |
1da177e4 LT |
1081 | spin_unlock(&host->lock); |
1082 | } | |
1083 | ||
1084 | static void wbsd_tasklet_crc(unsigned long param) | |
1085 | { | |
cfa7f521 PO |
1086 | struct wbsd_host *host = (struct wbsd_host *)param; |
1087 | struct mmc_data *data; | |
fecf92ba | 1088 | |
1da177e4 | 1089 | spin_lock(&host->lock); |
fecf92ba | 1090 | |
1da177e4 LT |
1091 | if (!host->mrq) |
1092 | goto end; | |
fecf92ba | 1093 | |
1da177e4 LT |
1094 | data = wbsd_get_data(host); |
1095 | if (!data) | |
1096 | goto end; | |
fecf92ba | 1097 | |
1da177e4 LT |
1098 | DBGF("CRC error\n"); |
1099 | ||
1100 | data->error = MMC_ERR_BADCRC; | |
fecf92ba | 1101 | |
1da177e4 LT |
1102 | tasklet_schedule(&host->finish_tasklet); |
1103 | ||
fecf92ba | 1104 | end: |
1da177e4 LT |
1105 | spin_unlock(&host->lock); |
1106 | } | |
1107 | ||
1108 | static void wbsd_tasklet_timeout(unsigned long param) | |
1109 | { | |
cfa7f521 PO |
1110 | struct wbsd_host *host = (struct wbsd_host *)param; |
1111 | struct mmc_data *data; | |
fecf92ba | 1112 | |
1da177e4 | 1113 | spin_lock(&host->lock); |
fecf92ba | 1114 | |
1da177e4 LT |
1115 | if (!host->mrq) |
1116 | goto end; | |
fecf92ba | 1117 | |
1da177e4 LT |
1118 | data = wbsd_get_data(host); |
1119 | if (!data) | |
1120 | goto end; | |
fecf92ba | 1121 | |
1da177e4 LT |
1122 | DBGF("Timeout\n"); |
1123 | ||
1124 | data->error = MMC_ERR_TIMEOUT; | |
fecf92ba | 1125 | |
1da177e4 LT |
1126 | tasklet_schedule(&host->finish_tasklet); |
1127 | ||
fecf92ba | 1128 | end: |
1da177e4 LT |
1129 | spin_unlock(&host->lock); |
1130 | } | |
1131 | ||
1132 | static void wbsd_tasklet_finish(unsigned long param) | |
1133 | { | |
cfa7f521 PO |
1134 | struct wbsd_host *host = (struct wbsd_host *)param; |
1135 | struct mmc_data *data; | |
fecf92ba | 1136 | |
1da177e4 | 1137 | spin_lock(&host->lock); |
fecf92ba | 1138 | |
1da177e4 LT |
1139 | WARN_ON(!host->mrq); |
1140 | if (!host->mrq) | |
1141 | goto end; | |
fecf92ba | 1142 | |
1da177e4 LT |
1143 | data = wbsd_get_data(host); |
1144 | if (!data) | |
1145 | goto end; | |
1146 | ||
1147 | wbsd_finish_data(host, data); | |
fecf92ba PO |
1148 | |
1149 | end: | |
1da177e4 LT |
1150 | spin_unlock(&host->lock); |
1151 | } | |
1152 | ||
1da177e4 LT |
1153 | /* |
1154 | * Interrupt handling | |
1155 | */ | |
1156 | ||
7d12e780 | 1157 | static irqreturn_t wbsd_irq(int irq, void *dev_id) |
1da177e4 | 1158 | { |
cfa7f521 | 1159 | struct wbsd_host *host = dev_id; |
1da177e4 | 1160 | int isr; |
fecf92ba | 1161 | |
1da177e4 LT |
1162 | isr = inb(host->base + WBSD_ISR); |
1163 | ||
1164 | /* | |
1165 | * Was it actually our hardware that caused the interrupt? | |
1166 | */ | |
1167 | if (isr == 0xff || isr == 0x00) | |
1168 | return IRQ_NONE; | |
fecf92ba | 1169 | |
1da177e4 LT |
1170 | host->isr |= isr; |
1171 | ||
1172 | /* | |
1173 | * Schedule tasklets as needed. | |
1174 | */ | |
1175 | if (isr & WBSD_INT_CARD) | |
1176 | tasklet_schedule(&host->card_tasklet); | |
1177 | if (isr & WBSD_INT_FIFO_THRE) | |
1178 | tasklet_schedule(&host->fifo_tasklet); | |
1179 | if (isr & WBSD_INT_CRC) | |
1180 | tasklet_hi_schedule(&host->crc_tasklet); | |
1181 | if (isr & WBSD_INT_TIMEOUT) | |
1182 | tasklet_hi_schedule(&host->timeout_tasklet); | |
1da177e4 LT |
1183 | if (isr & WBSD_INT_TC) |
1184 | tasklet_schedule(&host->finish_tasklet); | |
fecf92ba | 1185 | |
1da177e4 LT |
1186 | return IRQ_HANDLED; |
1187 | } | |
1188 | ||
85bcc130 PO |
1189 | /*****************************************************************************\ |
1190 | * * | |
1191 | * Device initialisation and shutdown * | |
1192 | * * | |
1193 | \*****************************************************************************/ | |
1194 | ||
1da177e4 | 1195 | /* |
85bcc130 | 1196 | * Allocate/free MMC structure. |
1da177e4 LT |
1197 | */ |
1198 | ||
cfa7f521 | 1199 | static int __devinit wbsd_alloc_mmc(struct device *dev) |
85bcc130 | 1200 | { |
cfa7f521 PO |
1201 | struct mmc_host *mmc; |
1202 | struct wbsd_host *host; | |
fecf92ba | 1203 | |
85bcc130 PO |
1204 | /* |
1205 | * Allocate MMC structure. | |
1206 | */ | |
1207 | mmc = mmc_alloc_host(sizeof(struct wbsd_host), dev); | |
1208 | if (!mmc) | |
1209 | return -ENOMEM; | |
fecf92ba | 1210 | |
85bcc130 PO |
1211 | host = mmc_priv(mmc); |
1212 | host->mmc = mmc; | |
1213 | ||
1214 | host->dma = -1; | |
1215 | ||
1216 | /* | |
1217 | * Set host parameters. | |
1218 | */ | |
1219 | mmc->ops = &wbsd_ops; | |
1220 | mmc->f_min = 375000; | |
1221 | mmc->f_max = 24000000; | |
cfa7f521 | 1222 | mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; |
42431acb | 1223 | mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_MULTIWRITE | MMC_CAP_BYTEBLOCK; |
fecf92ba | 1224 | |
85bcc130 | 1225 | spin_lock_init(&host->lock); |
fecf92ba | 1226 | |
6e6293dd | 1227 | /* |
1656fa57 | 1228 | * Set up timers |
6e6293dd | 1229 | */ |
1656fa57 PO |
1230 | init_timer(&host->ignore_timer); |
1231 | host->ignore_timer.data = (unsigned long)host; | |
1232 | host->ignore_timer.function = wbsd_reset_ignore; | |
fecf92ba | 1233 | |
85bcc130 PO |
1234 | /* |
1235 | * Maximum number of segments. Worst case is one sector per segment | |
1236 | * so this will be 64kB/512. | |
1237 | */ | |
1238 | mmc->max_hw_segs = 128; | |
1239 | mmc->max_phys_segs = 128; | |
fecf92ba | 1240 | |
85bcc130 | 1241 | /* |
55db890a | 1242 | * Maximum request size. Also limited by 64KiB buffer. |
85bcc130 | 1243 | */ |
55db890a | 1244 | mmc->max_req_size = 65536; |
fecf92ba | 1245 | |
85bcc130 PO |
1246 | /* |
1247 | * Maximum segment size. Could be one segment with the maximum number | |
55db890a | 1248 | * of bytes. |
85bcc130 | 1249 | */ |
55db890a | 1250 | mmc->max_seg_size = mmc->max_req_size; |
fecf92ba | 1251 | |
fe4a3c7a PO |
1252 | /* |
1253 | * Maximum block size. We have 12 bits (= 4095) but have to subtract | |
1254 | * space for CRC. So the maximum is 4095 - 4*2 = 4087. | |
1255 | */ | |
1256 | mmc->max_blk_size = 4087; | |
1257 | ||
55db890a PO |
1258 | /* |
1259 | * Maximum block count. There is no real limit so the maximum | |
1260 | * request size will be the only restriction. | |
1261 | */ | |
1262 | mmc->max_blk_count = mmc->max_req_size; | |
1263 | ||
85bcc130 | 1264 | dev_set_drvdata(dev, mmc); |
fecf92ba | 1265 | |
85bcc130 PO |
1266 | return 0; |
1267 | } | |
1268 | ||
b3627bb1 | 1269 | static void wbsd_free_mmc(struct device *dev) |
85bcc130 | 1270 | { |
cfa7f521 PO |
1271 | struct mmc_host *mmc; |
1272 | struct wbsd_host *host; | |
fecf92ba | 1273 | |
85bcc130 PO |
1274 | mmc = dev_get_drvdata(dev); |
1275 | if (!mmc) | |
1276 | return; | |
fecf92ba | 1277 | |
6e6293dd PO |
1278 | host = mmc_priv(mmc); |
1279 | BUG_ON(host == NULL); | |
fecf92ba | 1280 | |
1656fa57 | 1281 | del_timer_sync(&host->ignore_timer); |
fecf92ba | 1282 | |
85bcc130 | 1283 | mmc_free_host(mmc); |
fecf92ba | 1284 | |
85bcc130 PO |
1285 | dev_set_drvdata(dev, NULL); |
1286 | } | |
1287 | ||
1288 | /* | |
1289 | * Scan for known chip id:s | |
1290 | */ | |
1291 | ||
cfa7f521 | 1292 | static int __devinit wbsd_scan(struct wbsd_host *host) |
1da177e4 LT |
1293 | { |
1294 | int i, j, k; | |
1295 | int id; | |
fecf92ba | 1296 | |
1da177e4 LT |
1297 | /* |
1298 | * Iterate through all ports, all codes to | |
1299 | * find hardware that is in our known list. | |
1300 | */ | |
63648fb5 | 1301 | for (i = 0; i < ARRAY_SIZE(config_ports); i++) { |
1da177e4 LT |
1302 | if (!request_region(config_ports[i], 2, DRIVER_NAME)) |
1303 | continue; | |
fecf92ba | 1304 | |
63648fb5 | 1305 | for (j = 0; j < ARRAY_SIZE(unlock_codes); j++) { |
1da177e4 | 1306 | id = 0xFFFF; |
fecf92ba | 1307 | |
19c1f3ca PO |
1308 | host->config = config_ports[i]; |
1309 | host->unlock_code = unlock_codes[j]; | |
1310 | ||
1311 | wbsd_unlock_config(host); | |
fecf92ba | 1312 | |
1da177e4 LT |
1313 | outb(WBSD_CONF_ID_HI, config_ports[i]); |
1314 | id = inb(config_ports[i] + 1) << 8; | |
1315 | ||
1316 | outb(WBSD_CONF_ID_LO, config_ports[i]); | |
1317 | id |= inb(config_ports[i] + 1); | |
fecf92ba | 1318 | |
19c1f3ca PO |
1319 | wbsd_lock_config(host); |
1320 | ||
63648fb5 | 1321 | for (k = 0; k < ARRAY_SIZE(valid_ids); k++) { |
cfa7f521 | 1322 | if (id == valid_ids[k]) { |
1da177e4 | 1323 | host->chip_id = id; |
fecf92ba | 1324 | |
1da177e4 LT |
1325 | return 0; |
1326 | } | |
1327 | } | |
fecf92ba | 1328 | |
cfa7f521 | 1329 | if (id != 0xFFFF) { |
1da177e4 LT |
1330 | DBG("Unknown hardware (id %x) found at %x\n", |
1331 | id, config_ports[i]); | |
1332 | } | |
1da177e4 | 1333 | } |
fecf92ba | 1334 | |
1da177e4 LT |
1335 | release_region(config_ports[i], 2); |
1336 | } | |
fecf92ba | 1337 | |
19c1f3ca PO |
1338 | host->config = 0; |
1339 | host->unlock_code = 0; | |
1340 | ||
1da177e4 LT |
1341 | return -ENODEV; |
1342 | } | |
1343 | ||
85bcc130 PO |
1344 | /* |
1345 | * Allocate/free io port ranges | |
1346 | */ | |
1347 | ||
cfa7f521 | 1348 | static int __devinit wbsd_request_region(struct wbsd_host *host, int base) |
1da177e4 | 1349 | { |
916f3ac6 | 1350 | if (base & 0x7) |
1da177e4 | 1351 | return -EINVAL; |
fecf92ba | 1352 | |
85bcc130 | 1353 | if (!request_region(base, 8, DRIVER_NAME)) |
1da177e4 | 1354 | return -EIO; |
fecf92ba | 1355 | |
916f3ac6 | 1356 | host->base = base; |
fecf92ba | 1357 | |
1da177e4 LT |
1358 | return 0; |
1359 | } | |
1360 | ||
b3627bb1 | 1361 | static void wbsd_release_regions(struct wbsd_host *host) |
1da177e4 LT |
1362 | { |
1363 | if (host->base) | |
1364 | release_region(host->base, 8); | |
fecf92ba | 1365 | |
85bcc130 | 1366 | host->base = 0; |
1da177e4 LT |
1367 | |
1368 | if (host->config) | |
1369 | release_region(host->config, 2); | |
fecf92ba | 1370 | |
85bcc130 | 1371 | host->config = 0; |
1da177e4 LT |
1372 | } |
1373 | ||
85bcc130 PO |
1374 | /* |
1375 | * Allocate/free DMA port and buffer | |
1376 | */ | |
1377 | ||
cfa7f521 | 1378 | static void __devinit wbsd_request_dma(struct wbsd_host *host, int dma) |
1da177e4 | 1379 | { |
1da177e4 LT |
1380 | if (dma < 0) |
1381 | return; | |
fecf92ba | 1382 | |
1da177e4 LT |
1383 | if (request_dma(dma, DRIVER_NAME)) |
1384 | goto err; | |
fecf92ba | 1385 | |
1da177e4 LT |
1386 | /* |
1387 | * We need to allocate a special buffer in | |
1388 | * order for ISA to be able to DMA to it. | |
1389 | */ | |
85bcc130 | 1390 | host->dma_buffer = kmalloc(WBSD_DMA_SIZE, |
1da177e4 LT |
1391 | GFP_NOIO | GFP_DMA | __GFP_REPEAT | __GFP_NOWARN); |
1392 | if (!host->dma_buffer) | |
1393 | goto free; | |
1394 | ||
1395 | /* | |
1396 | * Translate the address to a physical address. | |
1397 | */ | |
fcaf71fd | 1398 | host->dma_addr = dma_map_single(mmc_dev(host->mmc), host->dma_buffer, |
85bcc130 | 1399 | WBSD_DMA_SIZE, DMA_BIDIRECTIONAL); |
fecf92ba | 1400 | |
1da177e4 LT |
1401 | /* |
1402 | * ISA DMA must be aligned on a 64k basis. | |
1403 | */ | |
1404 | if ((host->dma_addr & 0xffff) != 0) | |
1405 | goto kfree; | |
1406 | /* | |
1407 | * ISA cannot access memory above 16 MB. | |
1408 | */ | |
1409 | else if (host->dma_addr >= 0x1000000) | |
1410 | goto kfree; | |
1411 | ||
1412 | host->dma = dma; | |
fecf92ba | 1413 | |
1da177e4 | 1414 | return; |
fecf92ba | 1415 | |
1da177e4 LT |
1416 | kfree: |
1417 | /* | |
1418 | * If we've gotten here then there is some kind of alignment bug | |
1419 | */ | |
1420 | BUG_ON(1); | |
fecf92ba | 1421 | |
fcaf71fd | 1422 | dma_unmap_single(mmc_dev(host->mmc), host->dma_addr, |
cfa7f521 | 1423 | WBSD_DMA_SIZE, DMA_BIDIRECTIONAL); |
85bcc130 | 1424 | host->dma_addr = (dma_addr_t)NULL; |
fecf92ba | 1425 | |
1da177e4 LT |
1426 | kfree(host->dma_buffer); |
1427 | host->dma_buffer = NULL; | |
1428 | ||
1429 | free: | |
1430 | free_dma(dma); | |
1431 | ||
1432 | err: | |
1433 | printk(KERN_WARNING DRIVER_NAME ": Unable to allocate DMA %d. " | |
1434 | "Falling back on FIFO.\n", dma); | |
1435 | } | |
1436 | ||
b3627bb1 | 1437 | static void wbsd_release_dma(struct wbsd_host *host) |
85bcc130 | 1438 | { |
cfa7f521 | 1439 | if (host->dma_addr) { |
fcaf71fd | 1440 | dma_unmap_single(mmc_dev(host->mmc), host->dma_addr, |
cfa7f521 PO |
1441 | WBSD_DMA_SIZE, DMA_BIDIRECTIONAL); |
1442 | } | |
6044ec88 | 1443 | kfree(host->dma_buffer); |
85bcc130 PO |
1444 | if (host->dma >= 0) |
1445 | free_dma(host->dma); | |
fecf92ba | 1446 | |
85bcc130 PO |
1447 | host->dma = -1; |
1448 | host->dma_buffer = NULL; | |
1449 | host->dma_addr = (dma_addr_t)NULL; | |
1450 | } | |
1da177e4 LT |
1451 | |
1452 | /* | |
85bcc130 | 1453 | * Allocate/free IRQ. |
1da177e4 LT |
1454 | */ |
1455 | ||
cfa7f521 | 1456 | static int __devinit wbsd_request_irq(struct wbsd_host *host, int irq) |
1da177e4 | 1457 | { |
1da177e4 | 1458 | int ret; |
fecf92ba | 1459 | |
1da177e4 | 1460 | /* |
85bcc130 | 1461 | * Allocate interrupt. |
1da177e4 | 1462 | */ |
85bcc130 | 1463 | |
dace1453 | 1464 | ret = request_irq(irq, wbsd_irq, IRQF_SHARED, DRIVER_NAME, host); |
85bcc130 PO |
1465 | if (ret) |
1466 | return ret; | |
fecf92ba | 1467 | |
85bcc130 PO |
1468 | host->irq = irq; |
1469 | ||
1da177e4 | 1470 | /* |
85bcc130 | 1471 | * Set up tasklets. |
1da177e4 | 1472 | */ |
cfa7f521 PO |
1473 | tasklet_init(&host->card_tasklet, wbsd_tasklet_card, |
1474 | (unsigned long)host); | |
1475 | tasklet_init(&host->fifo_tasklet, wbsd_tasklet_fifo, | |
1476 | (unsigned long)host); | |
1477 | tasklet_init(&host->crc_tasklet, wbsd_tasklet_crc, | |
1478 | (unsigned long)host); | |
1479 | tasklet_init(&host->timeout_tasklet, wbsd_tasklet_timeout, | |
1480 | (unsigned long)host); | |
1481 | tasklet_init(&host->finish_tasklet, wbsd_tasklet_finish, | |
1482 | (unsigned long)host); | |
fecf92ba | 1483 | |
85bcc130 PO |
1484 | return 0; |
1485 | } | |
1da177e4 | 1486 | |
b3627bb1 | 1487 | static void wbsd_release_irq(struct wbsd_host *host) |
85bcc130 PO |
1488 | { |
1489 | if (!host->irq) | |
1490 | return; | |
1da177e4 | 1491 | |
85bcc130 | 1492 | free_irq(host->irq, host); |
fecf92ba | 1493 | |
85bcc130 | 1494 | host->irq = 0; |
fecf92ba | 1495 | |
85bcc130 PO |
1496 | tasklet_kill(&host->card_tasklet); |
1497 | tasklet_kill(&host->fifo_tasklet); | |
1498 | tasklet_kill(&host->crc_tasklet); | |
1499 | tasklet_kill(&host->timeout_tasklet); | |
1500 | tasklet_kill(&host->finish_tasklet); | |
85bcc130 PO |
1501 | } |
1502 | ||
1503 | /* | |
1504 | * Allocate all resources for the host. | |
1505 | */ | |
1506 | ||
cfa7f521 | 1507 | static int __devinit wbsd_request_resources(struct wbsd_host *host, |
85bcc130 PO |
1508 | int base, int irq, int dma) |
1509 | { | |
1510 | int ret; | |
fecf92ba | 1511 | |
1da177e4 LT |
1512 | /* |
1513 | * Allocate I/O ports. | |
1514 | */ | |
85bcc130 | 1515 | ret = wbsd_request_region(host, base); |
1da177e4 | 1516 | if (ret) |
85bcc130 | 1517 | return ret; |
1da177e4 LT |
1518 | |
1519 | /* | |
85bcc130 | 1520 | * Allocate interrupt. |
1da177e4 | 1521 | */ |
85bcc130 PO |
1522 | ret = wbsd_request_irq(host, irq); |
1523 | if (ret) | |
1524 | return ret; | |
1525 | ||
1526 | /* | |
1527 | * Allocate DMA. | |
1528 | */ | |
1529 | wbsd_request_dma(host, dma); | |
fecf92ba | 1530 | |
85bcc130 PO |
1531 | return 0; |
1532 | } | |
1533 | ||
1534 | /* | |
1535 | * Release all resources for the host. | |
1536 | */ | |
1537 | ||
b3627bb1 | 1538 | static void wbsd_release_resources(struct wbsd_host *host) |
85bcc130 PO |
1539 | { |
1540 | wbsd_release_dma(host); | |
1541 | wbsd_release_irq(host); | |
1542 | wbsd_release_regions(host); | |
1543 | } | |
1544 | ||
1545 | /* | |
1546 | * Configure the resources the chip should use. | |
1547 | */ | |
1548 | ||
cfa7f521 | 1549 | static void wbsd_chip_config(struct wbsd_host *host) |
85bcc130 | 1550 | { |
19c1f3ca PO |
1551 | wbsd_unlock_config(host); |
1552 | ||
85bcc130 PO |
1553 | /* |
1554 | * Reset the chip. | |
fecf92ba | 1555 | */ |
85bcc130 PO |
1556 | wbsd_write_config(host, WBSD_CONF_SWRST, 1); |
1557 | wbsd_write_config(host, WBSD_CONF_SWRST, 0); | |
1da177e4 LT |
1558 | |
1559 | /* | |
1560 | * Select SD/MMC function. | |
1561 | */ | |
1562 | wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD); | |
fecf92ba | 1563 | |
1da177e4 LT |
1564 | /* |
1565 | * Set up card detection. | |
1566 | */ | |
85bcc130 | 1567 | wbsd_write_config(host, WBSD_CONF_PINS, WBSD_PINS_DETECT_GP11); |
fecf92ba | 1568 | |
1da177e4 | 1569 | /* |
85bcc130 | 1570 | * Configure chip |
1da177e4 LT |
1571 | */ |
1572 | wbsd_write_config(host, WBSD_CONF_PORT_HI, host->base >> 8); | |
1573 | wbsd_write_config(host, WBSD_CONF_PORT_LO, host->base & 0xff); | |
fecf92ba | 1574 | |
85bcc130 | 1575 | wbsd_write_config(host, WBSD_CONF_IRQ, host->irq); |
fecf92ba | 1576 | |
85bcc130 PO |
1577 | if (host->dma >= 0) |
1578 | wbsd_write_config(host, WBSD_CONF_DRQ, host->dma); | |
fecf92ba | 1579 | |
1da177e4 | 1580 | /* |
85bcc130 | 1581 | * Enable and power up chip. |
1da177e4 | 1582 | */ |
85bcc130 PO |
1583 | wbsd_write_config(host, WBSD_CONF_ENABLE, 1); |
1584 | wbsd_write_config(host, WBSD_CONF_POWER, 0x20); | |
19c1f3ca PO |
1585 | |
1586 | wbsd_lock_config(host); | |
85bcc130 PO |
1587 | } |
1588 | ||
1589 | /* | |
1590 | * Check that configured resources are correct. | |
1591 | */ | |
fecf92ba | 1592 | |
cfa7f521 | 1593 | static int wbsd_chip_validate(struct wbsd_host *host) |
85bcc130 PO |
1594 | { |
1595 | int base, irq, dma; | |
fecf92ba | 1596 | |
19c1f3ca PO |
1597 | wbsd_unlock_config(host); |
1598 | ||
1da177e4 | 1599 | /* |
85bcc130 | 1600 | * Select SD/MMC function. |
1da177e4 | 1601 | */ |
85bcc130 | 1602 | wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD); |
fecf92ba | 1603 | |
1da177e4 | 1604 | /* |
85bcc130 | 1605 | * Read configuration. |
1da177e4 | 1606 | */ |
85bcc130 PO |
1607 | base = wbsd_read_config(host, WBSD_CONF_PORT_HI) << 8; |
1608 | base |= wbsd_read_config(host, WBSD_CONF_PORT_LO); | |
fecf92ba | 1609 | |
85bcc130 | 1610 | irq = wbsd_read_config(host, WBSD_CONF_IRQ); |
fecf92ba | 1611 | |
85bcc130 | 1612 | dma = wbsd_read_config(host, WBSD_CONF_DRQ); |
fecf92ba | 1613 | |
19c1f3ca PO |
1614 | wbsd_lock_config(host); |
1615 | ||
1da177e4 | 1616 | /* |
85bcc130 | 1617 | * Validate against given configuration. |
1da177e4 | 1618 | */ |
85bcc130 PO |
1619 | if (base != host->base) |
1620 | return 0; | |
1621 | if (irq != host->irq) | |
1622 | return 0; | |
1623 | if ((dma != host->dma) && (host->dma != -1)) | |
1624 | return 0; | |
fecf92ba | 1625 | |
85bcc130 PO |
1626 | return 1; |
1627 | } | |
1628 | ||
19c1f3ca PO |
1629 | /* |
1630 | * Powers down the SD function | |
1631 | */ | |
1632 | ||
cfa7f521 | 1633 | static void wbsd_chip_poweroff(struct wbsd_host *host) |
19c1f3ca PO |
1634 | { |
1635 | wbsd_unlock_config(host); | |
1636 | ||
1637 | wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD); | |
1638 | wbsd_write_config(host, WBSD_CONF_ENABLE, 0); | |
1639 | ||
1640 | wbsd_lock_config(host); | |
1641 | } | |
1642 | ||
85bcc130 PO |
1643 | /*****************************************************************************\ |
1644 | * * | |
1645 | * Devices setup and shutdown * | |
1646 | * * | |
1647 | \*****************************************************************************/ | |
1648 | ||
cfa7f521 | 1649 | static int __devinit wbsd_init(struct device *dev, int base, int irq, int dma, |
85bcc130 PO |
1650 | int pnp) |
1651 | { | |
cfa7f521 PO |
1652 | struct wbsd_host *host = NULL; |
1653 | struct mmc_host *mmc = NULL; | |
85bcc130 | 1654 | int ret; |
fecf92ba | 1655 | |
85bcc130 PO |
1656 | ret = wbsd_alloc_mmc(dev); |
1657 | if (ret) | |
1658 | return ret; | |
fecf92ba | 1659 | |
85bcc130 PO |
1660 | mmc = dev_get_drvdata(dev); |
1661 | host = mmc_priv(mmc); | |
fecf92ba | 1662 | |
1da177e4 | 1663 | /* |
85bcc130 | 1664 | * Scan for hardware. |
1da177e4 | 1665 | */ |
85bcc130 | 1666 | ret = wbsd_scan(host); |
cfa7f521 PO |
1667 | if (ret) { |
1668 | if (pnp && (ret == -ENODEV)) { | |
85bcc130 PO |
1669 | printk(KERN_WARNING DRIVER_NAME |
1670 | ": Unable to confirm device presence. You may " | |
1671 | "experience lock-ups.\n"); | |
cfa7f521 | 1672 | } else { |
85bcc130 PO |
1673 | wbsd_free_mmc(dev); |
1674 | return ret; | |
1675 | } | |
1676 | } | |
fecf92ba | 1677 | |
1da177e4 | 1678 | /* |
85bcc130 | 1679 | * Request resources. |
1da177e4 | 1680 | */ |
dd2c609c | 1681 | ret = wbsd_request_resources(host, base, irq, dma); |
cfa7f521 | 1682 | if (ret) { |
85bcc130 PO |
1683 | wbsd_release_resources(host); |
1684 | wbsd_free_mmc(dev); | |
1685 | return ret; | |
1686 | } | |
fecf92ba | 1687 | |
1da177e4 | 1688 | /* |
85bcc130 | 1689 | * See if chip needs to be configured. |
1da177e4 | 1690 | */ |
cfa7f521 PO |
1691 | if (pnp) { |
1692 | if ((host->config != 0) && !wbsd_chip_validate(host)) { | |
85bcc130 PO |
1693 | printk(KERN_WARNING DRIVER_NAME |
1694 | ": PnP active but chip not configured! " | |
1695 | "You probably have a buggy BIOS. " | |
1696 | "Configuring chip manually.\n"); | |
1697 | wbsd_chip_config(host); | |
1698 | } | |
cfa7f521 | 1699 | } else |
85bcc130 | 1700 | wbsd_chip_config(host); |
fecf92ba | 1701 | |
1da177e4 LT |
1702 | /* |
1703 | * Power Management stuff. No idea how this works. | |
1704 | * Not tested. | |
1705 | */ | |
1706 | #ifdef CONFIG_PM | |
cfa7f521 | 1707 | if (host->config) { |
19c1f3ca | 1708 | wbsd_unlock_config(host); |
85bcc130 | 1709 | wbsd_write_config(host, WBSD_CONF_PME, 0xA0); |
19c1f3ca PO |
1710 | wbsd_lock_config(host); |
1711 | } | |
1da177e4 | 1712 | #endif |
85bcc130 PO |
1713 | /* |
1714 | * Allow device to initialise itself properly. | |
1715 | */ | |
1716 | mdelay(5); | |
1da177e4 LT |
1717 | |
1718 | /* | |
1719 | * Reset the chip into a known state. | |
1720 | */ | |
1721 | wbsd_init_device(host); | |
fecf92ba | 1722 | |
1da177e4 LT |
1723 | mmc_add_host(mmc); |
1724 | ||
d366b643 | 1725 | printk(KERN_INFO "%s: W83L51xD", mmc_hostname(mmc)); |
85bcc130 PO |
1726 | if (host->chip_id != 0) |
1727 | printk(" id %x", (int)host->chip_id); | |
1728 | printk(" at 0x%x irq %d", (int)host->base, (int)host->irq); | |
1729 | if (host->dma >= 0) | |
1730 | printk(" dma %d", (int)host->dma); | |
1731 | else | |
1732 | printk(" FIFO"); | |
1733 | if (pnp) | |
1734 | printk(" PnP"); | |
1735 | printk("\n"); | |
1da177e4 LT |
1736 | |
1737 | return 0; | |
1da177e4 LT |
1738 | } |
1739 | ||
cfa7f521 | 1740 | static void __devexit wbsd_shutdown(struct device *dev, int pnp) |
1da177e4 | 1741 | { |
cfa7f521 PO |
1742 | struct mmc_host *mmc = dev_get_drvdata(dev); |
1743 | struct wbsd_host *host; | |
fecf92ba | 1744 | |
1da177e4 | 1745 | if (!mmc) |
85bcc130 | 1746 | return; |
1da177e4 LT |
1747 | |
1748 | host = mmc_priv(mmc); | |
fecf92ba | 1749 | |
1da177e4 LT |
1750 | mmc_remove_host(mmc); |
1751 | ||
19c1f3ca PO |
1752 | /* |
1753 | * Power down the SD/MMC function. | |
1754 | */ | |
85bcc130 | 1755 | if (!pnp) |
19c1f3ca | 1756 | wbsd_chip_poweroff(host); |
fecf92ba | 1757 | |
85bcc130 | 1758 | wbsd_release_resources(host); |
fecf92ba | 1759 | |
85bcc130 PO |
1760 | wbsd_free_mmc(dev); |
1761 | } | |
1da177e4 | 1762 | |
85bcc130 PO |
1763 | /* |
1764 | * Non-PnP | |
1765 | */ | |
1766 | ||
cfa7f521 | 1767 | static int __devinit wbsd_probe(struct platform_device *dev) |
85bcc130 | 1768 | { |
dd2c609c | 1769 | /* Use the module parameters for resources */ |
3ae5eaec | 1770 | return wbsd_init(&dev->dev, io, irq, dma, 0); |
85bcc130 PO |
1771 | } |
1772 | ||
cfa7f521 | 1773 | static int __devexit wbsd_remove(struct platform_device *dev) |
85bcc130 | 1774 | { |
3ae5eaec | 1775 | wbsd_shutdown(&dev->dev, 0); |
85bcc130 PO |
1776 | |
1777 | return 0; | |
1778 | } | |
1779 | ||
1780 | /* | |
1781 | * PnP | |
1782 | */ | |
1783 | ||
1784 | #ifdef CONFIG_PNP | |
1785 | ||
1786 | static int __devinit | |
cfa7f521 | 1787 | wbsd_pnp_probe(struct pnp_dev *pnpdev, const struct pnp_device_id *dev_id) |
85bcc130 PO |
1788 | { |
1789 | int io, irq, dma; | |
fecf92ba | 1790 | |
85bcc130 PO |
1791 | /* |
1792 | * Get resources from PnP layer. | |
1793 | */ | |
1794 | io = pnp_port_start(pnpdev, 0); | |
1795 | irq = pnp_irq(pnpdev, 0); | |
1796 | if (pnp_dma_valid(pnpdev, 0)) | |
1797 | dma = pnp_dma(pnpdev, 0); | |
1798 | else | |
1799 | dma = -1; | |
fecf92ba | 1800 | |
85bcc130 | 1801 | DBGF("PnP resources: port %3x irq %d dma %d\n", io, irq, dma); |
fecf92ba | 1802 | |
85bcc130 PO |
1803 | return wbsd_init(&pnpdev->dev, io, irq, dma, 1); |
1804 | } | |
1da177e4 | 1805 | |
cfa7f521 | 1806 | static void __devexit wbsd_pnp_remove(struct pnp_dev *dev) |
85bcc130 PO |
1807 | { |
1808 | wbsd_shutdown(&dev->dev, 1); | |
1da177e4 LT |
1809 | } |
1810 | ||
85bcc130 PO |
1811 | #endif /* CONFIG_PNP */ |
1812 | ||
1da177e4 LT |
1813 | /* |
1814 | * Power management | |
1815 | */ | |
1816 | ||
1817 | #ifdef CONFIG_PM | |
19c1f3ca | 1818 | |
5e68d95d PO |
1819 | static int wbsd_suspend(struct wbsd_host *host, pm_message_t state) |
1820 | { | |
1821 | BUG_ON(host == NULL); | |
1822 | ||
1823 | return mmc_suspend_host(host->mmc, state); | |
1824 | } | |
1825 | ||
1826 | static int wbsd_resume(struct wbsd_host *host) | |
1827 | { | |
1828 | BUG_ON(host == NULL); | |
1829 | ||
1830 | wbsd_init_device(host); | |
1831 | ||
1832 | return mmc_resume_host(host->mmc); | |
1833 | } | |
1834 | ||
cfa7f521 PO |
1835 | static int wbsd_platform_suspend(struct platform_device *dev, |
1836 | pm_message_t state) | |
1da177e4 | 1837 | { |
3ae5eaec | 1838 | struct mmc_host *mmc = platform_get_drvdata(dev); |
19c1f3ca PO |
1839 | struct wbsd_host *host; |
1840 | int ret; | |
1841 | ||
5e68d95d | 1842 | if (mmc == NULL) |
19c1f3ca PO |
1843 | return 0; |
1844 | ||
5e68d95d | 1845 | DBGF("Suspending...\n"); |
19c1f3ca PO |
1846 | |
1847 | host = mmc_priv(mmc); | |
1848 | ||
5e68d95d PO |
1849 | ret = wbsd_suspend(host, state); |
1850 | if (ret) | |
1851 | return ret; | |
1852 | ||
19c1f3ca | 1853 | wbsd_chip_poweroff(host); |
1da177e4 LT |
1854 | |
1855 | return 0; | |
1856 | } | |
1857 | ||
5e68d95d | 1858 | static int wbsd_platform_resume(struct platform_device *dev) |
1da177e4 | 1859 | { |
3ae5eaec | 1860 | struct mmc_host *mmc = platform_get_drvdata(dev); |
19c1f3ca | 1861 | struct wbsd_host *host; |
1da177e4 | 1862 | |
5e68d95d | 1863 | if (mmc == NULL) |
19c1f3ca PO |
1864 | return 0; |
1865 | ||
5e68d95d | 1866 | DBGF("Resuming...\n"); |
19c1f3ca PO |
1867 | |
1868 | host = mmc_priv(mmc); | |
1869 | ||
1870 | wbsd_chip_config(host); | |
1871 | ||
1872 | /* | |
1873 | * Allow device to initialise itself properly. | |
1874 | */ | |
1875 | mdelay(5); | |
1876 | ||
5e68d95d PO |
1877 | return wbsd_resume(host); |
1878 | } | |
1879 | ||
1880 | #ifdef CONFIG_PNP | |
1881 | ||
1882 | static int wbsd_pnp_suspend(struct pnp_dev *pnp_dev, pm_message_t state) | |
1883 | { | |
1884 | struct mmc_host *mmc = dev_get_drvdata(&pnp_dev->dev); | |
1885 | struct wbsd_host *host; | |
1886 | ||
1887 | if (mmc == NULL) | |
1888 | return 0; | |
19c1f3ca | 1889 | |
5e68d95d PO |
1890 | DBGF("Suspending...\n"); |
1891 | ||
1892 | host = mmc_priv(mmc); | |
1893 | ||
1894 | return wbsd_suspend(host, state); | |
1da177e4 | 1895 | } |
19c1f3ca | 1896 | |
5e68d95d PO |
1897 | static int wbsd_pnp_resume(struct pnp_dev *pnp_dev) |
1898 | { | |
1899 | struct mmc_host *mmc = dev_get_drvdata(&pnp_dev->dev); | |
1900 | struct wbsd_host *host; | |
1901 | ||
1902 | if (mmc == NULL) | |
1903 | return 0; | |
1904 | ||
1905 | DBGF("Resuming...\n"); | |
1906 | ||
1907 | host = mmc_priv(mmc); | |
1908 | ||
1909 | /* | |
1910 | * See if chip needs to be configured. | |
1911 | */ | |
cfa7f521 PO |
1912 | if (host->config != 0) { |
1913 | if (!wbsd_chip_validate(host)) { | |
5e68d95d PO |
1914 | printk(KERN_WARNING DRIVER_NAME |
1915 | ": PnP active but chip not configured! " | |
1916 | "You probably have a buggy BIOS. " | |
1917 | "Configuring chip manually.\n"); | |
1918 | wbsd_chip_config(host); | |
1919 | } | |
1920 | } | |
1921 | ||
1922 | /* | |
1923 | * Allow device to initialise itself properly. | |
1924 | */ | |
1925 | mdelay(5); | |
1926 | ||
1927 | return wbsd_resume(host); | |
1928 | } | |
1929 | ||
1930 | #endif /* CONFIG_PNP */ | |
1931 | ||
19c1f3ca PO |
1932 | #else /* CONFIG_PM */ |
1933 | ||
5e68d95d PO |
1934 | #define wbsd_platform_suspend NULL |
1935 | #define wbsd_platform_resume NULL | |
1936 | ||
1937 | #define wbsd_pnp_suspend NULL | |
1938 | #define wbsd_pnp_resume NULL | |
19c1f3ca PO |
1939 | |
1940 | #endif /* CONFIG_PM */ | |
1da177e4 | 1941 | |
85bcc130 | 1942 | static struct platform_device *wbsd_device; |
1da177e4 | 1943 | |
3ae5eaec | 1944 | static struct platform_driver wbsd_driver = { |
1da177e4 | 1945 | .probe = wbsd_probe, |
93968d75 | 1946 | .remove = __devexit_p(wbsd_remove), |
fecf92ba | 1947 | |
5e68d95d PO |
1948 | .suspend = wbsd_platform_suspend, |
1949 | .resume = wbsd_platform_resume, | |
3ae5eaec RK |
1950 | .driver = { |
1951 | .name = DRIVER_NAME, | |
1952 | }, | |
1da177e4 LT |
1953 | }; |
1954 | ||
85bcc130 PO |
1955 | #ifdef CONFIG_PNP |
1956 | ||
1957 | static struct pnp_driver wbsd_pnp_driver = { | |
1958 | .name = DRIVER_NAME, | |
1959 | .id_table = pnp_dev_table, | |
1960 | .probe = wbsd_pnp_probe, | |
93968d75 | 1961 | .remove = __devexit_p(wbsd_pnp_remove), |
5e68d95d PO |
1962 | |
1963 | .suspend = wbsd_pnp_suspend, | |
1964 | .resume = wbsd_pnp_resume, | |
85bcc130 PO |
1965 | }; |
1966 | ||
1967 | #endif /* CONFIG_PNP */ | |
1968 | ||
1da177e4 LT |
1969 | /* |
1970 | * Module loading/unloading | |
1971 | */ | |
1972 | ||
1973 | static int __init wbsd_drv_init(void) | |
1974 | { | |
1975 | int result; | |
fecf92ba | 1976 | |
1da177e4 | 1977 | printk(KERN_INFO DRIVER_NAME |
1615cc22 | 1978 | ": Winbond W83L51xD SD/MMC card interface driver\n"); |
1da177e4 | 1979 | printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n"); |
1da177e4 | 1980 | |
85bcc130 PO |
1981 | #ifdef CONFIG_PNP |
1982 | ||
cfa7f521 | 1983 | if (!nopnp) { |
85bcc130 PO |
1984 | result = pnp_register_driver(&wbsd_pnp_driver); |
1985 | if (result < 0) | |
1986 | return result; | |
1987 | } | |
fecf92ba PO |
1988 | #endif /* CONFIG_PNP */ |
1989 | ||
cfa7f521 | 1990 | if (nopnp) { |
3ae5eaec | 1991 | result = platform_driver_register(&wbsd_driver); |
85bcc130 PO |
1992 | if (result < 0) |
1993 | return result; | |
1994 | ||
21500bb3 | 1995 | wbsd_device = platform_device_alloc(DRIVER_NAME, -1); |
cfa7f521 | 1996 | if (!wbsd_device) { |
21500bb3 DT |
1997 | platform_driver_unregister(&wbsd_driver); |
1998 | return -ENOMEM; | |
1999 | } | |
2000 | ||
2001 | result = platform_device_add(wbsd_device); | |
cfa7f521 | 2002 | if (result) { |
21500bb3 DT |
2003 | platform_device_put(wbsd_device); |
2004 | platform_driver_unregister(&wbsd_driver); | |
2005 | return result; | |
2006 | } | |
85bcc130 | 2007 | } |
1da177e4 LT |
2008 | |
2009 | return 0; | |
2010 | } | |
2011 | ||
2012 | static void __exit wbsd_drv_exit(void) | |
2013 | { | |
85bcc130 PO |
2014 | #ifdef CONFIG_PNP |
2015 | ||
2016 | if (!nopnp) | |
2017 | pnp_unregister_driver(&wbsd_pnp_driver); | |
fecf92ba PO |
2018 | |
2019 | #endif /* CONFIG_PNP */ | |
85bcc130 | 2020 | |
cfa7f521 | 2021 | if (nopnp) { |
85bcc130 | 2022 | platform_device_unregister(wbsd_device); |
fecf92ba | 2023 | |
3ae5eaec | 2024 | platform_driver_unregister(&wbsd_driver); |
85bcc130 | 2025 | } |
1da177e4 LT |
2026 | |
2027 | DBG("unloaded\n"); | |
2028 | } | |
2029 | ||
2030 | module_init(wbsd_drv_init); | |
2031 | module_exit(wbsd_drv_exit); | |
85bcc130 PO |
2032 | #ifdef CONFIG_PNP |
2033 | module_param(nopnp, uint, 0444); | |
2034 | #endif | |
1da177e4 LT |
2035 | module_param(io, uint, 0444); |
2036 | module_param(irq, uint, 0444); | |
2037 | module_param(dma, int, 0444); | |
2038 | ||
2039 | MODULE_LICENSE("GPL"); | |
de1d09e3 | 2040 | MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>"); |
1da177e4 | 2041 | MODULE_DESCRIPTION("Winbond W83L51xD SD/MMC card interface driver"); |
1da177e4 | 2042 | |
85bcc130 PO |
2043 | #ifdef CONFIG_PNP |
2044 | MODULE_PARM_DESC(nopnp, "Scan for device instead of relying on PNP. (default 0)"); | |
2045 | #endif | |
1da177e4 LT |
2046 | MODULE_PARM_DESC(io, "I/O base to allocate. Must be 8 byte aligned. (default 0x248)"); |
2047 | MODULE_PARM_DESC(irq, "IRQ to allocate. (default 6)"); | |
2048 | MODULE_PARM_DESC(dma, "DMA channel to allocate. -1 for no DMA. (default 2)"); |