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[MMC] sdhci: proper timeout handling
[mirror_ubuntu-artful-kernel.git] / drivers / mmc / sdhci.c
CommitLineData
d129bceb
PO		 1/*
2 * linux/drivers/mmc/sdhci.c - Secure Digital Host Controller Interface driver
3 *
4 * Copyright (C) 2005-2006 Pierre Ossman, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11 /*
12 * Note that PIO transfer is rather crappy atm. The buffer full/empty
13 * interrupts aren't reliable so we currently transfer the entire buffer
14 * directly. Patches to solve the problem are welcome.
15 */
16
17#include <linux/delay.h>
18#include <linux/highmem.h>
19#include <linux/pci.h>
20#include <linux/dma-mapping.h>
21
22#include <linux/mmc/host.h>
23#include <linux/mmc/protocol.h>
24
25#include <asm/scatterlist.h>
26
27#include "sdhci.h"
28
29#define DRIVER_NAME "sdhci"
30#define DRIVER_VERSION "0.11"
31
32#define BUGMAIL "<sdhci-devel@list.drzeus.cx>"
33
d129bceb 34#define DBG(f, x...) \
c6563178 35 pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
d129bceb
PO		 36
37static const struct pci_device_id pci_ids[] __devinitdata = {
38 /* handle any SD host controller */
39 {PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)},
40 { /* end: all zeroes */ },
41};
42
43MODULE_DEVICE_TABLE(pci, pci_ids);
44
45static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *);
46static void sdhci_finish_data(struct sdhci_host *);
47
48static void sdhci_send_command(struct sdhci_host *, struct mmc_command *);
49static void sdhci_finish_command(struct sdhci_host *);
50
51static void sdhci_dumpregs(struct sdhci_host *host)
52{
53 printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n");
54
55 printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version: 0x%08x\n",
56 readl(host->ioaddr + SDHCI_DMA_ADDRESS),
57 readw(host->ioaddr + SDHCI_HOST_VERSION));
58 printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt: 0x%08x\n",
59 readw(host->ioaddr + SDHCI_BLOCK_SIZE),
60 readw(host->ioaddr + SDHCI_BLOCK_COUNT));
61 printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
62 readl(host->ioaddr + SDHCI_ARGUMENT),
63 readw(host->ioaddr + SDHCI_TRANSFER_MODE));
64 printk(KERN_DEBUG DRIVER_NAME ": Present: 0x%08x | Host ctl: 0x%08x\n",
65 readl(host->ioaddr + SDHCI_PRESENT_STATE),
66 readb(host->ioaddr + SDHCI_HOST_CONTROL));
67 printk(KERN_DEBUG DRIVER_NAME ": Power: 0x%08x | Blk gap: 0x%08x\n",
68 readb(host->ioaddr + SDHCI_POWER_CONTROL),
69 readb(host->ioaddr + SDHCI_BLOCK_GAP_CONTROL));
70 printk(KERN_DEBUG DRIVER_NAME ": Wake-up: 0x%08x | Clock: 0x%08x\n",
71 readb(host->ioaddr + SDHCI_WALK_UP_CONTROL),
72 readw(host->ioaddr + SDHCI_CLOCK_CONTROL));
73 printk(KERN_DEBUG DRIVER_NAME ": Timeout: 0x%08x | Int stat: 0x%08x\n",
74 readb(host->ioaddr + SDHCI_TIMEOUT_CONTROL),
75 readl(host->ioaddr + SDHCI_INT_STATUS));
76 printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
77 readl(host->ioaddr + SDHCI_INT_ENABLE),
78 readl(host->ioaddr + SDHCI_SIGNAL_ENABLE));
79 printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
80 readw(host->ioaddr + SDHCI_ACMD12_ERR),
81 readw(host->ioaddr + SDHCI_SLOT_INT_STATUS));
82 printk(KERN_DEBUG DRIVER_NAME ": Caps: 0x%08x | Max curr: 0x%08x\n",
83 readl(host->ioaddr + SDHCI_CAPABILITIES),
84 readl(host->ioaddr + SDHCI_MAX_CURRENT));
85
86 printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n");
87}
88
89/*****************************************************************************\
90 * *
91 * Low level functions *
92 * *
93\*****************************************************************************/
94
95static void sdhci_reset(struct sdhci_host *host, u8 mask)
96{
e16514d8
PO		 97 unsigned long timeout;
98
d129bceb
PO		 99 writeb(mask, host->ioaddr + SDHCI_SOFTWARE_RESET);
100
e16514d8 101 if (mask & SDHCI_RESET_ALL)
d129bceb
PO		 102 host->clock = 0;
103
e16514d8
PO		 104 /* Wait max 100 ms */
105 timeout = 100;
106
107 /* hw clears the bit when it's done */
108 while (readb(host->ioaddr + SDHCI_SOFTWARE_RESET) & mask) {
109 if (timeout == 0) {
110 printk(KERN_ERR "%s: Reset 0x%x never completed. "
111 "Please report this to " BUGMAIL ".\n",
112 mmc_hostname(host->mmc), (int)mask);
113 sdhci_dumpregs(host);
114 return;
115 }
116 timeout--;
117 mdelay(1);
d129bceb
PO		 118 }
119}
120
121static void sdhci_init(struct sdhci_host *host)
122{
123 u32 intmask;
124
125 sdhci_reset(host, SDHCI_RESET_ALL);
126
127 intmask = ~(SDHCI_INT_CARD_INT | SDHCI_INT_BUF_EMPTY | SDHCI_INT_BUF_FULL);
128
129 writel(intmask, host->ioaddr + SDHCI_INT_ENABLE);
130 writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE);
d129bceb
PO		 131}
132
133static void sdhci_activate_led(struct sdhci_host *host)
134{
135 u8 ctrl;
136
137 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
138 ctrl |= SDHCI_CTRL_LED;
139 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
140}
141
142static void sdhci_deactivate_led(struct sdhci_host *host)
143{
144 u8 ctrl;
145
146 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
147 ctrl &= ~SDHCI_CTRL_LED;
148 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
149}
150
151/*****************************************************************************\
152 * *
153 * Core functions *
154 * *
155\*****************************************************************************/
156
157static inline char* sdhci_kmap_sg(struct sdhci_host* host)
158{
159 host->mapped_sg = kmap_atomic(host->cur_sg->page, KM_BIO_SRC_IRQ);
160 return host->mapped_sg + host->cur_sg->offset;
161}
162
163static inline void sdhci_kunmap_sg(struct sdhci_host* host)
164{
165 kunmap_atomic(host->mapped_sg, KM_BIO_SRC_IRQ);
166}
167
168static inline int sdhci_next_sg(struct sdhci_host* host)
169{
170 /*
171 * Skip to next SG entry.
172 */
173 host->cur_sg++;
174 host->num_sg--;
175
176 /*
177 * Any entries left?
178 */
179 if (host->num_sg > 0) {
180 host->offset = 0;
181 host->remain = host->cur_sg->length;
182 }
183
184 return host->num_sg;
185}
186
187static void sdhci_transfer_pio(struct sdhci_host *host)
188{
189 char *buffer;
190 u32 mask;
191 int bytes, size;
192 unsigned long max_jiffies;
193
194 BUG_ON(!host->data);
195
196 if (host->num_sg == 0)
197 return;
198
199 bytes = 0;
200 if (host->data->flags & MMC_DATA_READ)
201 mask = SDHCI_DATA_AVAILABLE;
202 else
203 mask = SDHCI_SPACE_AVAILABLE;
204
205 buffer = sdhci_kmap_sg(host) + host->offset;
206
207 /* Transfer shouldn't take more than 5 s */
208 max_jiffies = jiffies + HZ * 5;
209
210 while (host->size > 0) {
211 if (time_after(jiffies, max_jiffies)) {
212 printk(KERN_ERR "%s: PIO transfer stalled. "
213 "Please report this to "
214 BUGMAIL ".\n", mmc_hostname(host->mmc));
215 sdhci_dumpregs(host);
216
217 sdhci_kunmap_sg(host);
218
219 host->data->error = MMC_ERR_FAILED;
220 sdhci_finish_data(host);
221 return;
222 }
223
224 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask))
225 continue;
226
227 size = min(host->size, host->remain);
228
229 if (size >= 4) {
230 if (host->data->flags & MMC_DATA_READ)
231 *(u32*)buffer = readl(host->ioaddr + SDHCI_BUFFER);
232 else
233 writel(*(u32*)buffer, host->ioaddr + SDHCI_BUFFER);
234 size = 4;
235 } else if (size >= 2) {
236 if (host->data->flags & MMC_DATA_READ)
237 *(u16*)buffer = readw(host->ioaddr + SDHCI_BUFFER);
238 else
239 writew(*(u16*)buffer, host->ioaddr + SDHCI_BUFFER);
240 size = 2;
241 } else {
242 if (host->data->flags & MMC_DATA_READ)
243 *(u8*)buffer = readb(host->ioaddr + SDHCI_BUFFER);
244 else
245 writeb(*(u8*)buffer, host->ioaddr + SDHCI_BUFFER);
246 size = 1;
247 }
248
249 buffer += size;
250 host->offset += size;
251 host->remain -= size;
252
253 bytes += size;
254 host->size -= size;
255
256 if (host->remain == 0) {
257 sdhci_kunmap_sg(host);
258 if (sdhci_next_sg(host) == 0) {
259 DBG("PIO transfer: %d bytes\n", bytes);
260 return;
261 }
262 buffer = sdhci_kmap_sg(host);
263 }
264 }
265
266 sdhci_kunmap_sg(host);
267
268 DBG("PIO transfer: %d bytes\n", bytes);
269}
270
271static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data)
272{
273 u16 mode;
1c8cde92
PO		 274 u8 count;
275 unsigned target_timeout, current_timeout;
d129bceb
PO		 276
277 WARN_ON(host->data);
278
279 if (data == NULL) {
280 writew(0, host->ioaddr + SDHCI_TRANSFER_MODE);
281 return;
282 }
283
284 DBG("blksz %04x blks %04x flags %08x\n",
a3fd4a1b 285 data->blksz, data->blocks, data->flags);
d129bceb
PO		 286 DBG("tsac %d ms nsac %d clk\n",
287 data->timeout_ns / 1000000, data->timeout_clks);
288
1c8cde92
PO		 289 /* timeout in us */
290 target_timeout = data->timeout_ns / 1000 +
291 data->timeout_clks / host->clock;
292
293 /*
294 * Figure out needed cycles.
295 * We do this in steps in order to fit inside a 32 bit int.
296 * The first step is the minimum timeout, which will have a
297 * minimum resolution of 6 bits:
298 * (1) 2^13*1000 > 2^22,
299 * (2) host->timeout_clk < 2^16
300 * =>
301 * (1) / (2) > 2^6
302 */
303 count = 0;
304 current_timeout = (1 << 13) * 1000 / host->timeout_clk;
305 while (current_timeout < target_timeout) {
306 count++;
307 current_timeout <<= 1;
308 if (count >= 0xF)
309 break;
310 }
311
312 if (count >= 0xF) {
313 printk(KERN_WARNING "%s: Too large timeout requested!\n",
314 mmc_hostname(host->mmc));
315 count = 0xE;
316 }
317
318 writeb(count, host->ioaddr + SDHCI_TIMEOUT_CONTROL);
319
d129bceb
PO		 320 mode = SDHCI_TRNS_BLK_CNT_EN;
321 if (data->blocks > 1)
322 mode |= SDHCI_TRNS_MULTI;
323 if (data->flags & MMC_DATA_READ)
324 mode |= SDHCI_TRNS_READ;
325 if (host->flags & SDHCI_USE_DMA)
326 mode |= SDHCI_TRNS_DMA;
327
328 writew(mode, host->ioaddr + SDHCI_TRANSFER_MODE);
329
a3fd4a1b 330 writew(data->blksz, host->ioaddr + SDHCI_BLOCK_SIZE);
d129bceb
PO		 331 writew(data->blocks, host->ioaddr + SDHCI_BLOCK_COUNT);
332
333 if (host->flags & SDHCI_USE_DMA) {
334 int count;
335
336 count = pci_map_sg(host->chip->pdev, data->sg, data->sg_len,
337 (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
338 BUG_ON(count != 1);
339
340 writel(sg_dma_address(data->sg), host->ioaddr + SDHCI_DMA_ADDRESS);
341 } else {
a3fd4a1b 342 host->size = data->blksz * data->blocks;
d129bceb
PO		 343
344 host->cur_sg = data->sg;
345 host->num_sg = data->sg_len;
346
347 host->offset = 0;
348 host->remain = host->cur_sg->length;
349 }
350}
351
352static void sdhci_finish_data(struct sdhci_host *host)
353{
354 struct mmc_data *data;
355 u32 intmask;
356 u16 blocks;
357
358 BUG_ON(!host->data);
359
360 data = host->data;
361 host->data = NULL;
362
363 if (host->flags & SDHCI_USE_DMA) {
364 pci_unmap_sg(host->chip->pdev, data->sg, data->sg_len,
365 (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
366 } else {
367 intmask = readl(host->ioaddr + SDHCI_SIGNAL_ENABLE);
368 intmask &= ~(SDHCI_INT_BUF_EMPTY | SDHCI_INT_BUF_FULL);
369 writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE);
370
371 intmask = readl(host->ioaddr + SDHCI_INT_ENABLE);
372 intmask &= ~(SDHCI_INT_BUF_EMPTY | SDHCI_INT_BUF_FULL);
373 writel(intmask, host->ioaddr + SDHCI_INT_ENABLE);
374 }
375
376 /*
377 * Controller doesn't count down when in single block mode.
378 */
379 if ((data->blocks == 1) && (data->error == MMC_ERR_NONE))
380 blocks = 0;
381 else
382 blocks = readw(host->ioaddr + SDHCI_BLOCK_COUNT);
a3fd4a1b 383 data->bytes_xfered = data->blksz * (data->blocks - blocks);
d129bceb
PO		 384
385 if ((data->error == MMC_ERR_NONE) && blocks) {
386 printk(KERN_ERR "%s: Controller signalled completion even "
387 "though there were blocks left. Please report this "
388 "to " BUGMAIL ".\n", mmc_hostname(host->mmc));
389 data->error = MMC_ERR_FAILED;
390 }
391
392 if (host->size != 0) {
393 printk(KERN_ERR "%s: %d bytes were left untransferred. "
394 "Please report this to " BUGMAIL ".\n",
395 mmc_hostname(host->mmc), host->size);
396 data->error = MMC_ERR_FAILED;
397 }
398
399 DBG("Ending data transfer (%d bytes)\n", data->bytes_xfered);
400
401 if (data->stop) {
402 /*
403 * The controller needs a reset of internal state machines
404 * upon error conditions.
405 */
406 if (data->error != MMC_ERR_NONE) {
407 sdhci_reset(host, SDHCI_RESET_CMD);
408 sdhci_reset(host, SDHCI_RESET_DATA);
409 }
410
411 sdhci_send_command(host, data->stop);
412 } else
413 tasklet_schedule(&host->finish_tasklet);
414}
415
416static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
417{
418 int flags;
7cb2c76f 419 unsigned long timeout;
d129bceb
PO		 420
421 WARN_ON(host->cmd);
422
423 DBG("Sending cmd (%x)\n", cmd->opcode);
424
425 /* Wait max 10 ms */
7cb2c76f
PO		 426 timeout = 10;
427 while (readl(host->ioaddr + SDHCI_PRESENT_STATE) &
428 (SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT)) {
429 if (timeout == 0) {
d129bceb
PO		 430 printk(KERN_ERR "%s: Controller never released "
431 "inhibit bits. Please report this to "
432 BUGMAIL ".\n", mmc_hostname(host->mmc));
433 sdhci_dumpregs(host);
434 cmd->error = MMC_ERR_FAILED;
435 tasklet_schedule(&host->finish_tasklet);
436 return;
437 }
7cb2c76f
PO		 438 timeout--;
439 mdelay(1);
440 }
d129bceb
PO		 441
442 mod_timer(&host->timer, jiffies + 10 * HZ);
443
444 host->cmd = cmd;
445
446 sdhci_prepare_data(host, cmd->data);
447
448 writel(cmd->arg, host->ioaddr + SDHCI_ARGUMENT);
449
450 if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
451 printk(KERN_ERR "%s: Unsupported response type! "
452 "Please report this to " BUGMAIL ".\n",
453 mmc_hostname(host->mmc));
454 cmd->error = MMC_ERR_INVALID;
455 tasklet_schedule(&host->finish_tasklet);
456 return;
457 }
458
459 if (!(cmd->flags & MMC_RSP_PRESENT))
460 flags = SDHCI_CMD_RESP_NONE;
461 else if (cmd->flags & MMC_RSP_136)
462 flags = SDHCI_CMD_RESP_LONG;
463 else if (cmd->flags & MMC_RSP_BUSY)
464 flags = SDHCI_CMD_RESP_SHORT_BUSY;
465 else
466 flags = SDHCI_CMD_RESP_SHORT;
467
468 if (cmd->flags & MMC_RSP_CRC)
469 flags |= SDHCI_CMD_CRC;
470 if (cmd->flags & MMC_RSP_OPCODE)
471 flags |= SDHCI_CMD_INDEX;
472 if (cmd->data)
473 flags |= SDHCI_CMD_DATA;
474
475 writel(SDHCI_MAKE_CMD(cmd->opcode, flags),
476 host->ioaddr + SDHCI_COMMAND);
477}
478
479static void sdhci_finish_command(struct sdhci_host *host)
480{
481 int i;
482
483 BUG_ON(host->cmd == NULL);
484
485 if (host->cmd->flags & MMC_RSP_PRESENT) {
486 if (host->cmd->flags & MMC_RSP_136) {
487 /* CRC is stripped so we need to do some shifting. */
488 for (i = 0;i < 4;i++) {
489 host->cmd->resp[i] = readl(host->ioaddr +
490 SDHCI_RESPONSE + (3-i)*4) << 8;
491 if (i != 3)
492 host->cmd->resp[i] |=
493 readb(host->ioaddr +
494 SDHCI_RESPONSE + (3-i)*4-1);
495 }
496 } else {
497 host->cmd->resp[0] = readl(host->ioaddr + SDHCI_RESPONSE);
498 }
499 }
500
501 host->cmd->error = MMC_ERR_NONE;
502
503 DBG("Ending cmd (%x)\n", host->cmd->opcode);
504
505 if (host->cmd->data) {
506 u32 intmask;
507
508 host->data = host->cmd->data;
509
510 if (!(host->flags & SDHCI_USE_DMA)) {
511 /*
512 * Don't enable the interrupts until now to make sure we
513 * get stable handling of the FIFO.
514 */
515 intmask = readl(host->ioaddr + SDHCI_INT_ENABLE);
516 intmask |= SDHCI_INT_BUF_EMPTY | SDHCI_INT_BUF_FULL;
517 writel(intmask, host->ioaddr + SDHCI_INT_ENABLE);
518
519 intmask = readl(host->ioaddr + SDHCI_SIGNAL_ENABLE);
520 intmask |= SDHCI_INT_BUF_EMPTY | SDHCI_INT_BUF_FULL;
521 writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE);
522
523 /*
524 * The buffer interrupts are to unreliable so we
525 * start the transfer immediatly.
526 */
527 sdhci_transfer_pio(host);
528 }
529 } else
530 tasklet_schedule(&host->finish_tasklet);
531
532 host->cmd = NULL;
533}
534
535static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
536{
537 int div;
538 u16 clk;
7cb2c76f 539 unsigned long timeout;
d129bceb
PO		 540
541 if (clock == host->clock)
542 return;
543
544 writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
545
546 if (clock == 0)
547 goto out;
548
549 for (div = 1;div < 256;div *= 2) {
550 if ((host->max_clk / div) <= clock)
551 break;
552 }
553 div >>= 1;
554
555 clk = div << SDHCI_DIVIDER_SHIFT;
556 clk |= SDHCI_CLOCK_INT_EN;
557 writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
558
559 /* Wait max 10 ms */
7cb2c76f
PO		 560 timeout = 10;
561 while (!((clk = readw(host->ioaddr + SDHCI_CLOCK_CONTROL))
562 & SDHCI_CLOCK_INT_STABLE)) {
563 if (timeout == 0) {
d129bceb
PO		 564 printk(KERN_ERR "%s: Internal clock never stabilised. "
565 "Please report this to " BUGMAIL ".\n",
566 mmc_hostname(host->mmc));
567 sdhci_dumpregs(host);
568 return;
569 }
7cb2c76f
PO		 570 timeout--;
571 mdelay(1);
572 }
d129bceb
PO		 573
574 clk |= SDHCI_CLOCK_CARD_EN;
575 writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
576
577out:
578 host->clock = clock;
579}
580
146ad66e
PO		 581static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
582{
583 u8 pwr;
584
585 if (host->power == power)
586 return;
587
588 writeb(0, host->ioaddr + SDHCI_POWER_CONTROL);
589
590 if (power == (unsigned short)-1)
591 goto out;
592
593 pwr = SDHCI_POWER_ON;
594
595 switch (power) {
596 case MMC_VDD_170:
597 case MMC_VDD_180:
598 case MMC_VDD_190:
599 pwr |= SDHCI_POWER_180;
600 break;
601 case MMC_VDD_290:
602 case MMC_VDD_300:
603 case MMC_VDD_310:
604 pwr |= SDHCI_POWER_300;
605 break;
606 case MMC_VDD_320:
607 case MMC_VDD_330:
608 case MMC_VDD_340:
609 pwr |= SDHCI_POWER_330;
610 break;
611 default:
612 BUG();
613 }
614
615 writeb(pwr, host->ioaddr + SDHCI_POWER_CONTROL);
616
617out:
618 host->power = power;
619}
620
d129bceb
PO		 621/*****************************************************************************\
622 * *
623 * MMC callbacks *
624 * *
625\*****************************************************************************/
626
627static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq)
628{
629 struct sdhci_host *host;
630 unsigned long flags;
631
632 host = mmc_priv(mmc);
633
634 spin_lock_irqsave(&host->lock, flags);
635
636 WARN_ON(host->mrq != NULL);
637
638 sdhci_activate_led(host);
639
640 host->mrq = mrq;
641
642 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
643 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
644 tasklet_schedule(&host->finish_tasklet);
645 } else
646 sdhci_send_command(host, mrq->cmd);
647
648 spin_unlock_irqrestore(&host->lock, flags);
649}
650
651static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
652{
653 struct sdhci_host *host;
654 unsigned long flags;
655 u8 ctrl;
656
657 host = mmc_priv(mmc);
658
659 spin_lock_irqsave(&host->lock, flags);
660
d129bceb
PO		 661 /*
662 * Reset the chip on each power off.
663 * Should clear out any weird states.
664 */
665 if (ios->power_mode == MMC_POWER_OFF) {
666 writel(0, host->ioaddr + SDHCI_SIGNAL_ENABLE);
d129bceb 667 sdhci_init(host);
d129bceb
PO		 668 }
669
670 sdhci_set_clock(host, ios->clock);
671
672 if (ios->power_mode == MMC_POWER_OFF)
146ad66e 673 sdhci_set_power(host, -1);
d129bceb 674 else
146ad66e 675 sdhci_set_power(host, ios->vdd);
d129bceb
PO		 676
677 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
678 if (ios->bus_width == MMC_BUS_WIDTH_4)
679 ctrl |= SDHCI_CTRL_4BITBUS;
680 else
681 ctrl &= ~SDHCI_CTRL_4BITBUS;
682 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
683
684 spin_unlock_irqrestore(&host->lock, flags);
685}
686
687static int sdhci_get_ro(struct mmc_host *mmc)
688{
689 struct sdhci_host *host;
690 unsigned long flags;
691 int present;
692
693 host = mmc_priv(mmc);
694
695 spin_lock_irqsave(&host->lock, flags);
696
697 present = readl(host->ioaddr + SDHCI_PRESENT_STATE);
698
699 spin_unlock_irqrestore(&host->lock, flags);
700
701 return !(present & SDHCI_WRITE_PROTECT);
702}
703
704static struct mmc_host_ops sdhci_ops = {
705 .request = sdhci_request,
706 .set_ios = sdhci_set_ios,
707 .get_ro = sdhci_get_ro,
708};
709
710/*****************************************************************************\
711 * *
712 * Tasklets *
713 * *
714\*****************************************************************************/
715
716static void sdhci_tasklet_card(unsigned long param)
717{
718 struct sdhci_host *host;
719 unsigned long flags;
720
721 host = (struct sdhci_host*)param;
722
723 spin_lock_irqsave(&host->lock, flags);
724
725 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
726 if (host->mrq) {
727 printk(KERN_ERR "%s: Card removed during transfer!\n",
728 mmc_hostname(host->mmc));
729 printk(KERN_ERR "%s: Resetting controller.\n",
730 mmc_hostname(host->mmc));
731
732 sdhci_reset(host, SDHCI_RESET_CMD);
733 sdhci_reset(host, SDHCI_RESET_DATA);
734
735 host->mrq->cmd->error = MMC_ERR_FAILED;
736 tasklet_schedule(&host->finish_tasklet);
737 }
738 }
739
740 spin_unlock_irqrestore(&host->lock, flags);
741
742 mmc_detect_change(host->mmc, msecs_to_jiffies(500));
743}
744
745static void sdhci_tasklet_finish(unsigned long param)
746{
747 struct sdhci_host *host;
748 unsigned long flags;
749 struct mmc_request *mrq;
750
751 host = (struct sdhci_host*)param;
752
753 spin_lock_irqsave(&host->lock, flags);
754
755 del_timer(&host->timer);
756
757 mrq = host->mrq;
758
759 DBG("Ending request, cmd (%x)\n", mrq->cmd->opcode);
760
761 /*
762 * The controller needs a reset of internal state machines
763 * upon error conditions.
764 */
765 if ((mrq->cmd->error != MMC_ERR_NONE) ||
766 (mrq->data && ((mrq->data->error != MMC_ERR_NONE) ||
767 (mrq->data->stop && (mrq->data->stop->error != MMC_ERR_NONE))))) {
768 sdhci_reset(host, SDHCI_RESET_CMD);
769 sdhci_reset(host, SDHCI_RESET_DATA);
770 }
771
772 host->mrq = NULL;
773 host->cmd = NULL;
774 host->data = NULL;
775
776 sdhci_deactivate_led(host);
777
778 spin_unlock_irqrestore(&host->lock, flags);
779
780 mmc_request_done(host->mmc, mrq);
781}
782
783static void sdhci_timeout_timer(unsigned long data)
784{
785 struct sdhci_host *host;
786 unsigned long flags;
787
788 host = (struct sdhci_host*)data;
789
790 spin_lock_irqsave(&host->lock, flags);
791
792 if (host->mrq) {
793 printk(KERN_ERR "%s: Timeout waiting for hardware interrupt. "
794 "Please report this to " BUGMAIL ".\n",
795 mmc_hostname(host->mmc));
796 sdhci_dumpregs(host);
797
798 if (host->data) {
799 host->data->error = MMC_ERR_TIMEOUT;
800 sdhci_finish_data(host);
801 } else {
802 if (host->cmd)
803 host->cmd->error = MMC_ERR_TIMEOUT;
804 else
805 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
806
807 tasklet_schedule(&host->finish_tasklet);
808 }
809 }
810
811 spin_unlock_irqrestore(&host->lock, flags);
812}
813
814/*****************************************************************************\
815 * *
816 * Interrupt handling *
817 * *
818\*****************************************************************************/
819
820static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
821{
822 BUG_ON(intmask == 0);
823
824 if (!host->cmd) {
825 printk(KERN_ERR "%s: Got command interrupt even though no "
826 "command operation was in progress.\n",
827 mmc_hostname(host->mmc));
828 printk(KERN_ERR "%s: Please report this to " BUGMAIL ".\n",
829 mmc_hostname(host->mmc));
830 sdhci_dumpregs(host);
831 return;
832 }
833
834 if (intmask & SDHCI_INT_RESPONSE)
835 sdhci_finish_command(host);
836 else {
837 if (intmask & SDHCI_INT_TIMEOUT)
838 host->cmd->error = MMC_ERR_TIMEOUT;
839 else if (intmask & SDHCI_INT_CRC)
840 host->cmd->error = MMC_ERR_BADCRC;
841 else if (intmask & (SDHCI_INT_END_BIT | SDHCI_INT_INDEX))
842 host->cmd->error = MMC_ERR_FAILED;
843 else
844 host->cmd->error = MMC_ERR_INVALID;
845
846 tasklet_schedule(&host->finish_tasklet);
847 }
848}
849
850static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
851{
852 BUG_ON(intmask == 0);
853
854 if (!host->data) {
855 /*
856 * A data end interrupt is sent together with the response
857 * for the stop command.
858 */
859 if (intmask & SDHCI_INT_DATA_END)
860 return;
861
862 printk(KERN_ERR "%s: Got data interrupt even though no "
863 "data operation was in progress.\n",
864 mmc_hostname(host->mmc));
865 printk(KERN_ERR "%s: Please report this to " BUGMAIL ".\n",
866 mmc_hostname(host->mmc));
867 sdhci_dumpregs(host);
868
869 return;
870 }
871
872 if (intmask & SDHCI_INT_DATA_TIMEOUT)
873 host->data->error = MMC_ERR_TIMEOUT;
874 else if (intmask & SDHCI_INT_DATA_CRC)
875 host->data->error = MMC_ERR_BADCRC;
876 else if (intmask & SDHCI_INT_DATA_END_BIT)
877 host->data->error = MMC_ERR_FAILED;
878
879 if (host->data->error != MMC_ERR_NONE)
880 sdhci_finish_data(host);
881 else {
882 if (intmask & (SDHCI_INT_BUF_FULL | SDHCI_INT_BUF_EMPTY))
883 sdhci_transfer_pio(host);
884
885 if (intmask & SDHCI_INT_DATA_END)
886 sdhci_finish_data(host);
887 }
888}
889
890static irqreturn_t sdhci_irq(int irq, void *dev_id, struct pt_regs *regs)
891{
892 irqreturn_t result;
893 struct sdhci_host* host = dev_id;
894 u32 intmask;
895
896 spin_lock(&host->lock);
897
898 intmask = readl(host->ioaddr + SDHCI_INT_STATUS);
899
900 if (!intmask) {
901 result = IRQ_NONE;
902 goto out;
903 }
904
905 DBG("*** %s got interrupt: 0x%08x\n", host->slot_descr, intmask);
906
907 if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE))
908 tasklet_schedule(&host->card_tasklet);
909
910 if (intmask & SDHCI_INT_CMD_MASK) {
911 sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
912
913 writel(intmask & SDHCI_INT_CMD_MASK,
914 host->ioaddr + SDHCI_INT_STATUS);
915 }
916
917 if (intmask & SDHCI_INT_DATA_MASK) {
918 sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
919
920 writel(intmask & SDHCI_INT_DATA_MASK,
921 host->ioaddr + SDHCI_INT_STATUS);
922 }
923
924 intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK);
925
926 if (intmask & SDHCI_INT_CARD_INT) {
927 printk(KERN_ERR "%s: Unexpected card interrupt. Please "
928 "report this to " BUGMAIL ".\n",
929 mmc_hostname(host->mmc));
930 sdhci_dumpregs(host);
931 }
932
933 if (intmask & SDHCI_INT_BUS_POWER) {
934 printk(KERN_ERR "%s: Unexpected bus power interrupt. Please "
935 "report this to " BUGMAIL ".\n",
936 mmc_hostname(host->mmc));
937 sdhci_dumpregs(host);
938 }
939
940 if (intmask & SDHCI_INT_ACMD12ERR) {
941 printk(KERN_ERR "%s: Unexpected auto CMD12 error. Please "
942 "report this to " BUGMAIL ".\n",
943 mmc_hostname(host->mmc));
944 sdhci_dumpregs(host);
945
946 writew(~0, host->ioaddr + SDHCI_ACMD12_ERR);
947 }
948
949 if (intmask)
950 writel(intmask, host->ioaddr + SDHCI_INT_STATUS);
951
952 result = IRQ_HANDLED;
953
954out:
955 spin_unlock(&host->lock);
956
957 return result;
958}
959
960/*****************************************************************************\
961 * *
962 * Suspend/resume *
963 * *
964\*****************************************************************************/
965
966#ifdef CONFIG_PM
967
968static int sdhci_suspend (struct pci_dev *pdev, pm_message_t state)
969{
970 struct sdhci_chip *chip;
971 int i, ret;
972
973 chip = pci_get_drvdata(pdev);
974 if (!chip)
975 return 0;
976
977 DBG("Suspending...\n");
978
979 for (i = 0;i < chip->num_slots;i++) {
980 if (!chip->hosts[i])
981 continue;
982 ret = mmc_suspend_host(chip->hosts[i]->mmc, state);
983 if (ret) {
984 for (i--;i >= 0;i--)
985 mmc_resume_host(chip->hosts[i]->mmc);
986 return ret;
987 }
988 }
989
990 pci_save_state(pdev);
991 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
992 pci_disable_device(pdev);
993 pci_set_power_state(pdev, pci_choose_state(pdev, state));
994
995 return 0;
996}
997
998static int sdhci_resume (struct pci_dev *pdev)
999{
1000 struct sdhci_chip *chip;
1001 int i, ret;
1002
1003 chip = pci_get_drvdata(pdev);
1004 if (!chip)
1005 return 0;
1006
1007 DBG("Resuming...\n");
1008
1009 pci_set_power_state(pdev, PCI_D0);
1010 pci_restore_state(pdev);
1011 pci_enable_device(pdev);
1012
1013 for (i = 0;i < chip->num_slots;i++) {
1014 if (!chip->hosts[i])
1015 continue;
1016 if (chip->hosts[i]->flags & SDHCI_USE_DMA)
1017 pci_set_master(pdev);
1018 sdhci_init(chip->hosts[i]);
1019 ret = mmc_resume_host(chip->hosts[i]->mmc);
1020 if (ret)
1021 return ret;
1022 }
1023
1024 return 0;
1025}
1026
1027#else /* CONFIG_PM */
1028
1029#define sdhci_suspend NULL
1030#define sdhci_resume NULL
1031
1032#endif /* CONFIG_PM */
1033
1034/*****************************************************************************\
1035 * *
1036 * Device probing/removal *
1037 * *
1038\*****************************************************************************/
1039
1040static int __devinit sdhci_probe_slot(struct pci_dev *pdev, int slot)
1041{
1042 int ret;
1043 struct sdhci_chip *chip;
1044 struct mmc_host *mmc;
1045 struct sdhci_host *host;
1046
1047 u8 first_bar;
1048 unsigned int caps;
1049
1050 chip = pci_get_drvdata(pdev);
1051 BUG_ON(!chip);
1052
1053 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1054 if (ret)
1055 return ret;
1056
1057 first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1058
1059 if (first_bar > 5) {
1060 printk(KERN_ERR DRIVER_NAME ": Invalid first BAR. Aborting.\n");
1061 return -ENODEV;
1062 }
1063
1064 if (!(pci_resource_flags(pdev, first_bar + slot) & IORESOURCE_MEM)) {
1065 printk(KERN_ERR DRIVER_NAME ": BAR is not iomem. Aborting.\n");
1066 return -ENODEV;
1067 }
1068
1069 if (pci_resource_len(pdev, first_bar + slot) != 0x100) {
1070 printk(KERN_ERR DRIVER_NAME ": Invalid iomem size. Aborting.\n");
1071 return -ENODEV;
1072 }
1073
1074 mmc = mmc_alloc_host(sizeof(struct sdhci_host), &pdev->dev);
1075 if (!mmc)
1076 return -ENOMEM;
1077
1078 host = mmc_priv(mmc);
1079 host->mmc = mmc;
1080
1081 host->bar = first_bar + slot;
1082
1083 host->addr = pci_resource_start(pdev, host->bar);
1084 host->irq = pdev->irq;
1085
1086 DBG("slot %d at 0x%08lx, irq %d\n", slot, host->addr, host->irq);
1087
1088 snprintf(host->slot_descr, 20, "sdhci:slot%d", slot);
1089
1090 ret = pci_request_region(pdev, host->bar, host->slot_descr);
1091 if (ret)
1092 goto free;
1093
1094 host->ioaddr = ioremap_nocache(host->addr,
1095 pci_resource_len(pdev, host->bar));
1096 if (!host->ioaddr) {
1097 ret = -ENOMEM;
1098 goto release;
1099 }
1100
1101 caps = readl(host->ioaddr + SDHCI_CAPABILITIES);
1102
1103 if ((caps & SDHCI_CAN_DO_DMA) && ((pdev->class & 0x0000FF) == 0x01))
1104 host->flags |= SDHCI_USE_DMA;
1105
1106 if (host->flags & SDHCI_USE_DMA) {
1107 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
1108 printk(KERN_WARNING "%s: No suitable DMA available. "
1109 "Falling back to PIO.\n", host->slot_descr);
1110 host->flags &= ~SDHCI_USE_DMA;
1111 }
1112 }
1113
1114 if (host->flags & SDHCI_USE_DMA)
1115 pci_set_master(pdev);
1116 else /* XXX: Hack to get MMC layer to avoid highmem */
1117 pdev->dma_mask = 0;
1118
8ef1a143
PO		 1119 host->max_clk =
1120 (caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
1121 if (host->max_clk == 0) {
1122 printk(KERN_ERR "%s: Hardware doesn't specify base clock "
1123 "frequency.\n", host->slot_descr);
1124 ret = -ENODEV;
1125 goto unmap;
1126 }
d129bceb 1127 host->max_clk *= 1000000;
1c8cde92
PO		 1128
1129 host->timeout_clk =
1130 (caps & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT;
1131 if (host->timeout_clk == 0) {
1132 printk(KERN_ERR "%s: Hardware doesn't specify timeout clock "
1133 "frequency.\n", host->slot_descr);
1134 ret = -ENODEV;
1135 goto unmap;
1136 }
1137 if (caps & SDHCI_TIMEOUT_CLK_UNIT)
1138 host->timeout_clk *= 1000;
d129bceb
PO		 1139
1140 /*
1141 * Set host parameters.
1142 */
1143 mmc->ops = &sdhci_ops;
1144 mmc->f_min = host->max_clk / 256;
1145 mmc->f_max = host->max_clk;
d129bceb
PO		 1146 mmc->caps = MMC_CAP_4_BIT_DATA;
1147
146ad66e
PO		 1148 mmc->ocr_avail = 0;
1149 if (caps & SDHCI_CAN_VDD_330)
1150 mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34;
1151 else if (caps & SDHCI_CAN_VDD_300)
1152 mmc->ocr_avail |= MMC_VDD_29_30|MMC_VDD_30_31;
1153 else if (caps & SDHCI_CAN_VDD_180)
1154 mmc->ocr_avail |= MMC_VDD_17_18|MMC_VDD_18_19;
1155
1156 if (mmc->ocr_avail == 0) {
1157 printk(KERN_ERR "%s: Hardware doesn't report any "
1158 "support voltages.\n", host->slot_descr);
1159 ret = -ENODEV;
1160 goto unmap;
1161 }
1162
d129bceb
PO		 1163 spin_lock_init(&host->lock);
1164
1165 /*
1166 * Maximum number of segments. Hardware cannot do scatter lists.
1167 */
1168 if (host->flags & SDHCI_USE_DMA)
1169 mmc->max_hw_segs = 1;
1170 else
1171 mmc->max_hw_segs = 16;
1172 mmc->max_phys_segs = 16;
1173
1174 /*
1175 * Maximum number of sectors in one transfer. Limited by sector
1176 * count register.
1177 */
1178 mmc->max_sectors = 0x3FFF;
1179
1180 /*
1181 * Maximum segment size. Could be one segment with the maximum number
1182 * of sectors.
1183 */
1184 mmc->max_seg_size = mmc->max_sectors * 512;
1185
1186 /*
1187 * Init tasklets.
1188 */
1189 tasklet_init(&host->card_tasklet,
1190 sdhci_tasklet_card, (unsigned long)host);
1191 tasklet_init(&host->finish_tasklet,
1192 sdhci_tasklet_finish, (unsigned long)host);
1193
e474c66b 1194 setup_timer(&host->timer, sdhci_timeout_timer, (long)host);
d129bceb
PO		 1195
1196 ret = request_irq(host->irq, sdhci_irq, SA_SHIRQ,
1197 host->slot_descr, host);
1198 if (ret)
8ef1a143 1199 goto untasklet;
d129bceb
PO		 1200
1201 sdhci_init(host);
1202
1203#ifdef CONFIG_MMC_DEBUG
1204 sdhci_dumpregs(host);
1205#endif
1206
1207 host->chip = chip;
1208 chip->hosts[slot] = host;
1209
1210 mmc_add_host(mmc);
1211
1212 printk(KERN_INFO "%s: SDHCI at 0x%08lx irq %d %s\n", mmc_hostname(mmc),
1213 host->addr, host->irq,
1214 (host->flags & SDHCI_USE_DMA)?"DMA":"PIO");
1215
1216 return 0;
1217
8ef1a143 1218untasklet:
d129bceb
PO		 1219 tasklet_kill(&host->card_tasklet);
1220 tasklet_kill(&host->finish_tasklet);
8ef1a143 1221unmap:
d129bceb
PO		 1222 iounmap(host->ioaddr);
1223release:
1224 pci_release_region(pdev, host->bar);
1225free:
1226 mmc_free_host(mmc);
1227
1228 return ret;
1229}
1230
1231static void sdhci_remove_slot(struct pci_dev *pdev, int slot)
1232{
1233 struct sdhci_chip *chip;
1234 struct mmc_host *mmc;
1235 struct sdhci_host *host;
1236
1237 chip = pci_get_drvdata(pdev);
1238 host = chip->hosts[slot];
1239 mmc = host->mmc;
1240
1241 chip->hosts[slot] = NULL;
1242
1243 mmc_remove_host(mmc);
1244
1245 sdhci_reset(host, SDHCI_RESET_ALL);
1246
1247 free_irq(host->irq, host);
1248
1249 del_timer_sync(&host->timer);
1250
1251 tasklet_kill(&host->card_tasklet);
1252 tasklet_kill(&host->finish_tasklet);
1253
1254 iounmap(host->ioaddr);
1255
1256 pci_release_region(pdev, host->bar);
1257
1258 mmc_free_host(mmc);
1259}
1260
1261static int __devinit sdhci_probe(struct pci_dev *pdev,
1262 const struct pci_device_id *ent)
1263{
1264 int ret, i;
51f82bc0 1265 u8 slots, rev;
d129bceb
PO		 1266 struct sdhci_chip *chip;
1267
1268 BUG_ON(pdev == NULL);
1269 BUG_ON(ent == NULL);
1270
51f82bc0
PO		 1271 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev);
1272
1273 printk(KERN_INFO DRIVER_NAME
1274 ": SDHCI controller found at %s [%04x:%04x] (rev %x)\n",
1275 pci_name(pdev), (int)pdev->vendor, (int)pdev->device,
1276 (int)rev);
d129bceb
PO		 1277
1278 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1279 if (ret)
1280 return ret;
1281
1282 slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1283 DBG("found %d slot(s)\n", slots);
1284 if (slots == 0)
1285 return -ENODEV;
1286
1287 ret = pci_enable_device(pdev);
1288 if (ret)
1289 return ret;
1290
1291 chip = kzalloc(sizeof(struct sdhci_chip) +
1292 sizeof(struct sdhci_host*) * slots, GFP_KERNEL);
1293 if (!chip) {
1294 ret = -ENOMEM;
1295 goto err;
1296 }
1297
1298 chip->pdev = pdev;
1299
1300 chip->num_slots = slots;
1301 pci_set_drvdata(pdev, chip);
1302
1303 for (i = 0;i < slots;i++) {
1304 ret = sdhci_probe_slot(pdev, i);
1305 if (ret) {
1306 for (i--;i >= 0;i--)
1307 sdhci_remove_slot(pdev, i);
1308 goto free;
1309 }
1310 }
1311
1312 return 0;
1313
1314free:
1315 pci_set_drvdata(pdev, NULL);
1316 kfree(chip);
1317
1318err:
1319 pci_disable_device(pdev);
1320 return ret;
1321}
1322
1323static void __devexit sdhci_remove(struct pci_dev *pdev)
1324{
1325 int i;
1326 struct sdhci_chip *chip;
1327
1328 chip = pci_get_drvdata(pdev);
1329
1330 if (chip) {
1331 for (i = 0;i < chip->num_slots;i++)
1332 sdhci_remove_slot(pdev, i);
1333
1334 pci_set_drvdata(pdev, NULL);
1335
1336 kfree(chip);
1337 }
1338
1339 pci_disable_device(pdev);
1340}
1341
1342static struct pci_driver sdhci_driver = {
1343 .name = DRIVER_NAME,
1344 .id_table = pci_ids,
1345 .probe = sdhci_probe,
1346 .remove = __devexit_p(sdhci_remove),
1347 .suspend = sdhci_suspend,
1348 .resume = sdhci_resume,
1349};
1350
1351/*****************************************************************************\
1352 * *
1353 * Driver init/exit *
1354 * *
1355\*****************************************************************************/
1356
1357static int __init sdhci_drv_init(void)
1358{
1359 printk(KERN_INFO DRIVER_NAME
1360 ": Secure Digital Host Controller Interface driver, "
1361 DRIVER_VERSION "\n");
1362 printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
1363
1364 return pci_register_driver(&sdhci_driver);
1365}
1366
1367static void __exit sdhci_drv_exit(void)
1368{
1369 DBG("Exiting\n");
1370
1371 pci_unregister_driver(&sdhci_driver);
1372}
1373
1374module_init(sdhci_drv_init);
1375module_exit(sdhci_drv_exit);
1376
1377MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
1378MODULE_DESCRIPTION("Secure Digital Host Controller Interface driver");
1379MODULE_VERSION(DRIVER_VERSION);
1380MODULE_LICENSE("GPL");
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