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[MMC] sdhci: fix interrupt handling
[mirror_ubuntu-artful-kernel.git] / drivers / mmc / sdhci.c
CommitLineData
d129bceb
PO		 1/*
2 * linux/drivers/mmc/sdhci.c - Secure Digital Host Controller Interface driver
3 *
4 * Copyright (C) 2005-2006 Pierre Ossman, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11 /*
12 * Note that PIO transfer is rather crappy atm. The buffer full/empty
13 * interrupts aren't reliable so we currently transfer the entire buffer
14 * directly. Patches to solve the problem are welcome.
15 */
16
17#include <linux/delay.h>
18#include <linux/highmem.h>
19#include <linux/pci.h>
20#include <linux/dma-mapping.h>
21
22#include <linux/mmc/host.h>
23#include <linux/mmc/protocol.h>
24
25#include <asm/scatterlist.h>
26
27#include "sdhci.h"
28
29#define DRIVER_NAME "sdhci"
30#define DRIVER_VERSION "0.11"
31
32#define BUGMAIL "<sdhci-devel@list.drzeus.cx>"
33
d129bceb 34#define DBG(f, x...) \
c6563178 35 pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
d129bceb
PO		 36
37static const struct pci_device_id pci_ids[] __devinitdata = {
38 /* handle any SD host controller */
39 {PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)},
40 { /* end: all zeroes */ },
41};
42
43MODULE_DEVICE_TABLE(pci, pci_ids);
44
45static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *);
46static void sdhci_finish_data(struct sdhci_host *);
47
48static void sdhci_send_command(struct sdhci_host *, struct mmc_command *);
49static void sdhci_finish_command(struct sdhci_host *);
50
51static void sdhci_dumpregs(struct sdhci_host *host)
52{
53 printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n");
54
55 printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version: 0x%08x\n",
56 readl(host->ioaddr + SDHCI_DMA_ADDRESS),
57 readw(host->ioaddr + SDHCI_HOST_VERSION));
58 printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt: 0x%08x\n",
59 readw(host->ioaddr + SDHCI_BLOCK_SIZE),
60 readw(host->ioaddr + SDHCI_BLOCK_COUNT));
61 printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
62 readl(host->ioaddr + SDHCI_ARGUMENT),
63 readw(host->ioaddr + SDHCI_TRANSFER_MODE));
64 printk(KERN_DEBUG DRIVER_NAME ": Present: 0x%08x | Host ctl: 0x%08x\n",
65 readl(host->ioaddr + SDHCI_PRESENT_STATE),
66 readb(host->ioaddr + SDHCI_HOST_CONTROL));
67 printk(KERN_DEBUG DRIVER_NAME ": Power: 0x%08x | Blk gap: 0x%08x\n",
68 readb(host->ioaddr + SDHCI_POWER_CONTROL),
69 readb(host->ioaddr + SDHCI_BLOCK_GAP_CONTROL));
70 printk(KERN_DEBUG DRIVER_NAME ": Wake-up: 0x%08x | Clock: 0x%08x\n",
71 readb(host->ioaddr + SDHCI_WALK_UP_CONTROL),
72 readw(host->ioaddr + SDHCI_CLOCK_CONTROL));
73 printk(KERN_DEBUG DRIVER_NAME ": Timeout: 0x%08x | Int stat: 0x%08x\n",
74 readb(host->ioaddr + SDHCI_TIMEOUT_CONTROL),
75 readl(host->ioaddr + SDHCI_INT_STATUS));
76 printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
77 readl(host->ioaddr + SDHCI_INT_ENABLE),
78 readl(host->ioaddr + SDHCI_SIGNAL_ENABLE));
79 printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
80 readw(host->ioaddr + SDHCI_ACMD12_ERR),
81 readw(host->ioaddr + SDHCI_SLOT_INT_STATUS));
82 printk(KERN_DEBUG DRIVER_NAME ": Caps: 0x%08x | Max curr: 0x%08x\n",
83 readl(host->ioaddr + SDHCI_CAPABILITIES),
84 readl(host->ioaddr + SDHCI_MAX_CURRENT));
85
86 printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n");
87}
88
89/*****************************************************************************\
90 * *
91 * Low level functions *
92 * *
93\*****************************************************************************/
94
95static void sdhci_reset(struct sdhci_host *host, u8 mask)
96{
e16514d8
PO		 97 unsigned long timeout;
98
d129bceb
PO		 99 writeb(mask, host->ioaddr + SDHCI_SOFTWARE_RESET);
100
e16514d8 101 if (mask & SDHCI_RESET_ALL)
d129bceb
PO		 102 host->clock = 0;
103
e16514d8
PO		 104 /* Wait max 100 ms */
105 timeout = 100;
106
107 /* hw clears the bit when it's done */
108 while (readb(host->ioaddr + SDHCI_SOFTWARE_RESET) & mask) {
109 if (timeout == 0) {
110 printk(KERN_ERR "%s: Reset 0x%x never completed. "
111 "Please report this to " BUGMAIL ".\n",
112 mmc_hostname(host->mmc), (int)mask);
113 sdhci_dumpregs(host);
114 return;
115 }
116 timeout--;
117 mdelay(1);
d129bceb
PO		 118 }
119}
120
121static void sdhci_init(struct sdhci_host *host)
122{
123 u32 intmask;
124
125 sdhci_reset(host, SDHCI_RESET_ALL);
126
3192a28f
PO		 127 intmask = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT |
128 SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX |
129 SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT |
130 SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT |
131 SDHCI_INT_BUF_EMPTY | SDHCI_INT_BUF_FULL |
132 SDHCI_INT_DMA_END | SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE;
d129bceb
PO		 133
134 writel(intmask, host->ioaddr + SDHCI_INT_ENABLE);
135 writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE);
d129bceb
PO		 136}
137
138static void sdhci_activate_led(struct sdhci_host *host)
139{
140 u8 ctrl;
141
142 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
143 ctrl |= SDHCI_CTRL_LED;
144 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
145}
146
147static void sdhci_deactivate_led(struct sdhci_host *host)
148{
149 u8 ctrl;
150
151 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
152 ctrl &= ~SDHCI_CTRL_LED;
153 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
154}
155
156/*****************************************************************************\
157 * *
158 * Core functions *
159 * *
160\*****************************************************************************/
161
162static inline char* sdhci_kmap_sg(struct sdhci_host* host)
163{
164 host->mapped_sg = kmap_atomic(host->cur_sg->page, KM_BIO_SRC_IRQ);
165 return host->mapped_sg + host->cur_sg->offset;
166}
167
168static inline void sdhci_kunmap_sg(struct sdhci_host* host)
169{
170 kunmap_atomic(host->mapped_sg, KM_BIO_SRC_IRQ);
171}
172
173static inline int sdhci_next_sg(struct sdhci_host* host)
174{
175 /*
176 * Skip to next SG entry.
177 */
178 host->cur_sg++;
179 host->num_sg--;
180
181 /*
182 * Any entries left?
183 */
184 if (host->num_sg > 0) {
185 host->offset = 0;
186 host->remain = host->cur_sg->length;
187 }
188
189 return host->num_sg;
190}
191
192static void sdhci_transfer_pio(struct sdhci_host *host)
193{
194 char *buffer;
195 u32 mask;
196 int bytes, size;
197 unsigned long max_jiffies;
198
199 BUG_ON(!host->data);
200
201 if (host->num_sg == 0)
202 return;
203
204 bytes = 0;
205 if (host->data->flags & MMC_DATA_READ)
206 mask = SDHCI_DATA_AVAILABLE;
207 else
208 mask = SDHCI_SPACE_AVAILABLE;
209
210 buffer = sdhci_kmap_sg(host) + host->offset;
211
212 /* Transfer shouldn't take more than 5 s */
213 max_jiffies = jiffies + HZ * 5;
214
215 while (host->size > 0) {
216 if (time_after(jiffies, max_jiffies)) {
217 printk(KERN_ERR "%s: PIO transfer stalled. "
218 "Please report this to "
219 BUGMAIL ".\n", mmc_hostname(host->mmc));
220 sdhci_dumpregs(host);
221
222 sdhci_kunmap_sg(host);
223
224 host->data->error = MMC_ERR_FAILED;
225 sdhci_finish_data(host);
226 return;
227 }
228
229 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask))
230 continue;
231
232 size = min(host->size, host->remain);
233
234 if (size >= 4) {
235 if (host->data->flags & MMC_DATA_READ)
236 *(u32*)buffer = readl(host->ioaddr + SDHCI_BUFFER);
237 else
238 writel(*(u32*)buffer, host->ioaddr + SDHCI_BUFFER);
239 size = 4;
240 } else if (size >= 2) {
241 if (host->data->flags & MMC_DATA_READ)
242 *(u16*)buffer = readw(host->ioaddr + SDHCI_BUFFER);
243 else
244 writew(*(u16*)buffer, host->ioaddr + SDHCI_BUFFER);
245 size = 2;
246 } else {
247 if (host->data->flags & MMC_DATA_READ)
248 *(u8*)buffer = readb(host->ioaddr + SDHCI_BUFFER);
249 else
250 writeb(*(u8*)buffer, host->ioaddr + SDHCI_BUFFER);
251 size = 1;
252 }
253
254 buffer += size;
255 host->offset += size;
256 host->remain -= size;
257
258 bytes += size;
259 host->size -= size;
260
261 if (host->remain == 0) {
262 sdhci_kunmap_sg(host);
263 if (sdhci_next_sg(host) == 0) {
264 DBG("PIO transfer: %d bytes\n", bytes);
265 return;
266 }
267 buffer = sdhci_kmap_sg(host);
268 }
269 }
270
271 sdhci_kunmap_sg(host);
272
273 DBG("PIO transfer: %d bytes\n", bytes);
274}
275
276static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data)
277{
1c8cde92
PO		 278 u8 count;
279 unsigned target_timeout, current_timeout;
d129bceb
PO		 280
281 WARN_ON(host->data);
282
c7fa9963 283 if (data == NULL)
d129bceb 284 return;
d129bceb
PO		 285
286 DBG("blksz %04x blks %04x flags %08x\n",
a3fd4a1b 287 data->blksz, data->blocks, data->flags);
d129bceb
PO		 288 DBG("tsac %d ms nsac %d clk\n",
289 data->timeout_ns / 1000000, data->timeout_clks);
290
1c8cde92
PO		 291 /* timeout in us */
292 target_timeout = data->timeout_ns / 1000 +
293 data->timeout_clks / host->clock;
294
295 /*
296 * Figure out needed cycles.
297 * We do this in steps in order to fit inside a 32 bit int.
298 * The first step is the minimum timeout, which will have a
299 * minimum resolution of 6 bits:
300 * (1) 2^13*1000 > 2^22,
301 * (2) host->timeout_clk < 2^16
302 * =>
303 * (1) / (2) > 2^6
304 */
305 count = 0;
306 current_timeout = (1 << 13) * 1000 / host->timeout_clk;
307 while (current_timeout < target_timeout) {
308 count++;
309 current_timeout <<= 1;
310 if (count >= 0xF)
311 break;
312 }
313
314 if (count >= 0xF) {
315 printk(KERN_WARNING "%s: Too large timeout requested!\n",
316 mmc_hostname(host->mmc));
317 count = 0xE;
318 }
319
320 writeb(count, host->ioaddr + SDHCI_TIMEOUT_CONTROL);
321
d129bceb
PO		 322 if (host->flags & SDHCI_USE_DMA) {
323 int count;
324
325 count = pci_map_sg(host->chip->pdev, data->sg, data->sg_len,
326 (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
327 BUG_ON(count != 1);
328
329 writel(sg_dma_address(data->sg), host->ioaddr + SDHCI_DMA_ADDRESS);
330 } else {
a3fd4a1b 331 host->size = data->blksz * data->blocks;
d129bceb
PO		 332
333 host->cur_sg = data->sg;
334 host->num_sg = data->sg_len;
335
336 host->offset = 0;
337 host->remain = host->cur_sg->length;
338 }
c7fa9963
PO		 339
340 writew(data->blksz, host->ioaddr + SDHCI_BLOCK_SIZE);
341 writew(data->blocks, host->ioaddr + SDHCI_BLOCK_COUNT);
342}
343
344static void sdhci_set_transfer_mode(struct sdhci_host *host,
345 struct mmc_data *data)
346{
347 u16 mode;
348
349 WARN_ON(host->data);
350
351 if (data == NULL)
352 return;
353
354 mode = SDHCI_TRNS_BLK_CNT_EN;
355 if (data->blocks > 1)
356 mode |= SDHCI_TRNS_MULTI;
357 if (data->flags & MMC_DATA_READ)
358 mode |= SDHCI_TRNS_READ;
359 if (host->flags & SDHCI_USE_DMA)
360 mode |= SDHCI_TRNS_DMA;
361
362 writew(mode, host->ioaddr + SDHCI_TRANSFER_MODE);
d129bceb
PO		 363}
364
365static void sdhci_finish_data(struct sdhci_host *host)
366{
367 struct mmc_data *data;
d129bceb
PO		 368 u16 blocks;
369
370 BUG_ON(!host->data);
371
372 data = host->data;
373 host->data = NULL;
374
375 if (host->flags & SDHCI_USE_DMA) {
376 pci_unmap_sg(host->chip->pdev, data->sg, data->sg_len,
377 (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
d129bceb
PO		 378 }
379
380 /*
381 * Controller doesn't count down when in single block mode.
382 */
383 if ((data->blocks == 1) && (data->error == MMC_ERR_NONE))
384 blocks = 0;
385 else
386 blocks = readw(host->ioaddr + SDHCI_BLOCK_COUNT);
a3fd4a1b 387 data->bytes_xfered = data->blksz * (data->blocks - blocks);
d129bceb
PO		 388
389 if ((data->error == MMC_ERR_NONE) && blocks) {
390 printk(KERN_ERR "%s: Controller signalled completion even "
391 "though there were blocks left. Please report this "
392 "to " BUGMAIL ".\n", mmc_hostname(host->mmc));
393 data->error = MMC_ERR_FAILED;
394 }
395
396 if (host->size != 0) {
397 printk(KERN_ERR "%s: %d bytes were left untransferred. "
398 "Please report this to " BUGMAIL ".\n",
399 mmc_hostname(host->mmc), host->size);
400 data->error = MMC_ERR_FAILED;
401 }
402
403 DBG("Ending data transfer (%d bytes)\n", data->bytes_xfered);
404
405 if (data->stop) {
406 /*
407 * The controller needs a reset of internal state machines
408 * upon error conditions.
409 */
410 if (data->error != MMC_ERR_NONE) {
411 sdhci_reset(host, SDHCI_RESET_CMD);
412 sdhci_reset(host, SDHCI_RESET_DATA);
413 }
414
415 sdhci_send_command(host, data->stop);
416 } else
417 tasklet_schedule(&host->finish_tasklet);
418}
419
420static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
421{
422 int flags;
7cb2c76f 423 unsigned long timeout;
d129bceb
PO		 424
425 WARN_ON(host->cmd);
426
427 DBG("Sending cmd (%x)\n", cmd->opcode);
428
429 /* Wait max 10 ms */
7cb2c76f
PO		 430 timeout = 10;
431 while (readl(host->ioaddr + SDHCI_PRESENT_STATE) &
432 (SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT)) {
433 if (timeout == 0) {
d129bceb
PO		 434 printk(KERN_ERR "%s: Controller never released "
435 "inhibit bits. Please report this to "
436 BUGMAIL ".\n", mmc_hostname(host->mmc));
437 sdhci_dumpregs(host);
438 cmd->error = MMC_ERR_FAILED;
439 tasklet_schedule(&host->finish_tasklet);
440 return;
441 }
7cb2c76f
PO		 442 timeout--;
443 mdelay(1);
444 }
d129bceb
PO		 445
446 mod_timer(&host->timer, jiffies + 10 * HZ);
447
448 host->cmd = cmd;
449
450 sdhci_prepare_data(host, cmd->data);
451
452 writel(cmd->arg, host->ioaddr + SDHCI_ARGUMENT);
453
c7fa9963
PO		 454 sdhci_set_transfer_mode(host, cmd->data);
455
d129bceb
PO		 456 if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
457 printk(KERN_ERR "%s: Unsupported response type! "
458 "Please report this to " BUGMAIL ".\n",
459 mmc_hostname(host->mmc));
460 cmd->error = MMC_ERR_INVALID;
461 tasklet_schedule(&host->finish_tasklet);
462 return;
463 }
464
465 if (!(cmd->flags & MMC_RSP_PRESENT))
466 flags = SDHCI_CMD_RESP_NONE;
467 else if (cmd->flags & MMC_RSP_136)
468 flags = SDHCI_CMD_RESP_LONG;
469 else if (cmd->flags & MMC_RSP_BUSY)
470 flags = SDHCI_CMD_RESP_SHORT_BUSY;
471 else
472 flags = SDHCI_CMD_RESP_SHORT;
473
474 if (cmd->flags & MMC_RSP_CRC)
475 flags |= SDHCI_CMD_CRC;
476 if (cmd->flags & MMC_RSP_OPCODE)
477 flags |= SDHCI_CMD_INDEX;
478 if (cmd->data)
479 flags |= SDHCI_CMD_DATA;
480
481 writel(SDHCI_MAKE_CMD(cmd->opcode, flags),
482 host->ioaddr + SDHCI_COMMAND);
483}
484
485static void sdhci_finish_command(struct sdhci_host *host)
486{
487 int i;
488
489 BUG_ON(host->cmd == NULL);
490
491 if (host->cmd->flags & MMC_RSP_PRESENT) {
492 if (host->cmd->flags & MMC_RSP_136) {
493 /* CRC is stripped so we need to do some shifting. */
494 for (i = 0;i < 4;i++) {
495 host->cmd->resp[i] = readl(host->ioaddr +
496 SDHCI_RESPONSE + (3-i)*4) << 8;
497 if (i != 3)
498 host->cmd->resp[i] |=
499 readb(host->ioaddr +
500 SDHCI_RESPONSE + (3-i)*4-1);
501 }
502 } else {
503 host->cmd->resp[0] = readl(host->ioaddr + SDHCI_RESPONSE);
504 }
505 }
506
507 host->cmd->error = MMC_ERR_NONE;
508
509 DBG("Ending cmd (%x)\n", host->cmd->opcode);
510
3192a28f 511 if (host->cmd->data)
d129bceb 512 host->data = host->cmd->data;
3192a28f 513 else
d129bceb
PO		 514 tasklet_schedule(&host->finish_tasklet);
515
516 host->cmd = NULL;
517}
518
519static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
520{
521 int div;
522 u16 clk;
7cb2c76f 523 unsigned long timeout;
d129bceb
PO		 524
525 if (clock == host->clock)
526 return;
527
528 writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
529
530 if (clock == 0)
531 goto out;
532
533 for (div = 1;div < 256;div *= 2) {
534 if ((host->max_clk / div) <= clock)
535 break;
536 }
537 div >>= 1;
538
539 clk = div << SDHCI_DIVIDER_SHIFT;
540 clk |= SDHCI_CLOCK_INT_EN;
541 writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
542
543 /* Wait max 10 ms */
7cb2c76f
PO		 544 timeout = 10;
545 while (!((clk = readw(host->ioaddr + SDHCI_CLOCK_CONTROL))
546 & SDHCI_CLOCK_INT_STABLE)) {
547 if (timeout == 0) {
d129bceb
PO		 548 printk(KERN_ERR "%s: Internal clock never stabilised. "
549 "Please report this to " BUGMAIL ".\n",
550 mmc_hostname(host->mmc));
551 sdhci_dumpregs(host);
552 return;
553 }
7cb2c76f
PO		 554 timeout--;
555 mdelay(1);
556 }
d129bceb
PO		 557
558 clk |= SDHCI_CLOCK_CARD_EN;
559 writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
560
561out:
562 host->clock = clock;
563}
564
146ad66e
PO		 565static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
566{
567 u8 pwr;
568
569 if (host->power == power)
570 return;
571
572 writeb(0, host->ioaddr + SDHCI_POWER_CONTROL);
573
574 if (power == (unsigned short)-1)
575 goto out;
576
577 pwr = SDHCI_POWER_ON;
578
579 switch (power) {
580 case MMC_VDD_170:
581 case MMC_VDD_180:
582 case MMC_VDD_190:
583 pwr |= SDHCI_POWER_180;
584 break;
585 case MMC_VDD_290:
586 case MMC_VDD_300:
587 case MMC_VDD_310:
588 pwr |= SDHCI_POWER_300;
589 break;
590 case MMC_VDD_320:
591 case MMC_VDD_330:
592 case MMC_VDD_340:
593 pwr |= SDHCI_POWER_330;
594 break;
595 default:
596 BUG();
597 }
598
599 writeb(pwr, host->ioaddr + SDHCI_POWER_CONTROL);
600
601out:
602 host->power = power;
603}
604
d129bceb
PO		 605/*****************************************************************************\
606 * *
607 * MMC callbacks *
608 * *
609\*****************************************************************************/
610
611static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq)
612{
613 struct sdhci_host *host;
614 unsigned long flags;
615
616 host = mmc_priv(mmc);
617
618 spin_lock_irqsave(&host->lock, flags);
619
620 WARN_ON(host->mrq != NULL);
621
622 sdhci_activate_led(host);
623
624 host->mrq = mrq;
625
626 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
627 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
628 tasklet_schedule(&host->finish_tasklet);
629 } else
630 sdhci_send_command(host, mrq->cmd);
631
632 spin_unlock_irqrestore(&host->lock, flags);
633}
634
635static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
636{
637 struct sdhci_host *host;
638 unsigned long flags;
639 u8 ctrl;
640
641 host = mmc_priv(mmc);
642
643 spin_lock_irqsave(&host->lock, flags);
644
d129bceb
PO		 645 /*
646 * Reset the chip on each power off.
647 * Should clear out any weird states.
648 */
649 if (ios->power_mode == MMC_POWER_OFF) {
650 writel(0, host->ioaddr + SDHCI_SIGNAL_ENABLE);
d129bceb 651 sdhci_init(host);
d129bceb
PO		 652 }
653
654 sdhci_set_clock(host, ios->clock);
655
656 if (ios->power_mode == MMC_POWER_OFF)
146ad66e 657 sdhci_set_power(host, -1);
d129bceb 658 else
146ad66e 659 sdhci_set_power(host, ios->vdd);
d129bceb
PO		 660
661 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
662 if (ios->bus_width == MMC_BUS_WIDTH_4)
663 ctrl |= SDHCI_CTRL_4BITBUS;
664 else
665 ctrl &= ~SDHCI_CTRL_4BITBUS;
666 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
667
668 spin_unlock_irqrestore(&host->lock, flags);
669}
670
671static int sdhci_get_ro(struct mmc_host *mmc)
672{
673 struct sdhci_host *host;
674 unsigned long flags;
675 int present;
676
677 host = mmc_priv(mmc);
678
679 spin_lock_irqsave(&host->lock, flags);
680
681 present = readl(host->ioaddr + SDHCI_PRESENT_STATE);
682
683 spin_unlock_irqrestore(&host->lock, flags);
684
685 return !(present & SDHCI_WRITE_PROTECT);
686}
687
688static struct mmc_host_ops sdhci_ops = {
689 .request = sdhci_request,
690 .set_ios = sdhci_set_ios,
691 .get_ro = sdhci_get_ro,
692};
693
694/*****************************************************************************\
695 * *
696 * Tasklets *
697 * *
698\*****************************************************************************/
699
700static void sdhci_tasklet_card(unsigned long param)
701{
702 struct sdhci_host *host;
703 unsigned long flags;
704
705 host = (struct sdhci_host*)param;
706
707 spin_lock_irqsave(&host->lock, flags);
708
709 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
710 if (host->mrq) {
711 printk(KERN_ERR "%s: Card removed during transfer!\n",
712 mmc_hostname(host->mmc));
713 printk(KERN_ERR "%s: Resetting controller.\n",
714 mmc_hostname(host->mmc));
715
716 sdhci_reset(host, SDHCI_RESET_CMD);
717 sdhci_reset(host, SDHCI_RESET_DATA);
718
719 host->mrq->cmd->error = MMC_ERR_FAILED;
720 tasklet_schedule(&host->finish_tasklet);
721 }
722 }
723
724 spin_unlock_irqrestore(&host->lock, flags);
725
726 mmc_detect_change(host->mmc, msecs_to_jiffies(500));
727}
728
729static void sdhci_tasklet_finish(unsigned long param)
730{
731 struct sdhci_host *host;
732 unsigned long flags;
733 struct mmc_request *mrq;
734
735 host = (struct sdhci_host*)param;
736
737 spin_lock_irqsave(&host->lock, flags);
738
739 del_timer(&host->timer);
740
741 mrq = host->mrq;
742
743 DBG("Ending request, cmd (%x)\n", mrq->cmd->opcode);
744
745 /*
746 * The controller needs a reset of internal state machines
747 * upon error conditions.
748 */
749 if ((mrq->cmd->error != MMC_ERR_NONE) ||
750 (mrq->data && ((mrq->data->error != MMC_ERR_NONE) ||
751 (mrq->data->stop && (mrq->data->stop->error != MMC_ERR_NONE))))) {
752 sdhci_reset(host, SDHCI_RESET_CMD);
753 sdhci_reset(host, SDHCI_RESET_DATA);
754 }
755
756 host->mrq = NULL;
757 host->cmd = NULL;
758 host->data = NULL;
759
760 sdhci_deactivate_led(host);
761
762 spin_unlock_irqrestore(&host->lock, flags);
763
764 mmc_request_done(host->mmc, mrq);
765}
766
767static void sdhci_timeout_timer(unsigned long data)
768{
769 struct sdhci_host *host;
770 unsigned long flags;
771
772 host = (struct sdhci_host*)data;
773
774 spin_lock_irqsave(&host->lock, flags);
775
776 if (host->mrq) {
777 printk(KERN_ERR "%s: Timeout waiting for hardware interrupt. "
778 "Please report this to " BUGMAIL ".\n",
779 mmc_hostname(host->mmc));
780 sdhci_dumpregs(host);
781
782 if (host->data) {
783 host->data->error = MMC_ERR_TIMEOUT;
784 sdhci_finish_data(host);
785 } else {
786 if (host->cmd)
787 host->cmd->error = MMC_ERR_TIMEOUT;
788 else
789 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
790
791 tasklet_schedule(&host->finish_tasklet);
792 }
793 }
794
795 spin_unlock_irqrestore(&host->lock, flags);
796}
797
798/*****************************************************************************\
799 * *
800 * Interrupt handling *
801 * *
802\*****************************************************************************/
803
804static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
805{
806 BUG_ON(intmask == 0);
807
808 if (!host->cmd) {
809 printk(KERN_ERR "%s: Got command interrupt even though no "
810 "command operation was in progress.\n",
811 mmc_hostname(host->mmc));
812 printk(KERN_ERR "%s: Please report this to " BUGMAIL ".\n",
813 mmc_hostname(host->mmc));
814 sdhci_dumpregs(host);
815 return;
816 }
817
818 if (intmask & SDHCI_INT_RESPONSE)
819 sdhci_finish_command(host);
820 else {
821 if (intmask & SDHCI_INT_TIMEOUT)
822 host->cmd->error = MMC_ERR_TIMEOUT;
823 else if (intmask & SDHCI_INT_CRC)
824 host->cmd->error = MMC_ERR_BADCRC;
825 else if (intmask & (SDHCI_INT_END_BIT | SDHCI_INT_INDEX))
826 host->cmd->error = MMC_ERR_FAILED;
827 else
828 host->cmd->error = MMC_ERR_INVALID;
829
830 tasklet_schedule(&host->finish_tasklet);
831 }
832}
833
834static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
835{
836 BUG_ON(intmask == 0);
837
838 if (!host->data) {
839 /*
840 * A data end interrupt is sent together with the response
841 * for the stop command.
842 */
843 if (intmask & SDHCI_INT_DATA_END)
844 return;
845
846 printk(KERN_ERR "%s: Got data interrupt even though no "
847 "data operation was in progress.\n",
848 mmc_hostname(host->mmc));
849 printk(KERN_ERR "%s: Please report this to " BUGMAIL ".\n",
850 mmc_hostname(host->mmc));
851 sdhci_dumpregs(host);
852
853 return;
854 }
855
856 if (intmask & SDHCI_INT_DATA_TIMEOUT)
857 host->data->error = MMC_ERR_TIMEOUT;
858 else if (intmask & SDHCI_INT_DATA_CRC)
859 host->data->error = MMC_ERR_BADCRC;
860 else if (intmask & SDHCI_INT_DATA_END_BIT)
861 host->data->error = MMC_ERR_FAILED;
862
863 if (host->data->error != MMC_ERR_NONE)
864 sdhci_finish_data(host);
865 else {
866 if (intmask & (SDHCI_INT_BUF_FULL | SDHCI_INT_BUF_EMPTY))
867 sdhci_transfer_pio(host);
868
869 if (intmask & SDHCI_INT_DATA_END)
870 sdhci_finish_data(host);
871 }
872}
873
874static irqreturn_t sdhci_irq(int irq, void *dev_id, struct pt_regs *regs)
875{
876 irqreturn_t result;
877 struct sdhci_host* host = dev_id;
878 u32 intmask;
879
880 spin_lock(&host->lock);
881
882 intmask = readl(host->ioaddr + SDHCI_INT_STATUS);
883
884 if (!intmask) {
885 result = IRQ_NONE;
886 goto out;
887 }
888
889 DBG("*** %s got interrupt: 0x%08x\n", host->slot_descr, intmask);
890
3192a28f
PO		 891 if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) {
892 writel(intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE),
893 host->ioaddr + SDHCI_INT_STATUS);
d129bceb 894 tasklet_schedule(&host->card_tasklet);
3192a28f 895 }
d129bceb 896
3192a28f 897 intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE);
d129bceb 898
3192a28f 899 if (intmask & SDHCI_INT_CMD_MASK) {
d129bceb
PO		 900 writel(intmask & SDHCI_INT_CMD_MASK,
901 host->ioaddr + SDHCI_INT_STATUS);
3192a28f 902 sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
d129bceb
PO		 903 }
904
905 if (intmask & SDHCI_INT_DATA_MASK) {
d129bceb
PO		 906 writel(intmask & SDHCI_INT_DATA_MASK,
907 host->ioaddr + SDHCI_INT_STATUS);
3192a28f 908 sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
d129bceb
PO		 909 }
910
911 intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK);
912
d129bceb 913 if (intmask & SDHCI_INT_BUS_POWER) {
3192a28f 914 printk(KERN_ERR "%s: Card is consuming too much power!\n",
d129bceb 915 mmc_hostname(host->mmc));
3192a28f 916 writel(SDHCI_INT_BUS_POWER, host->ioaddr + SDHCI_INT_STATUS);
d129bceb
PO		 917 }
918
3192a28f
PO		 919 intmask &= SDHCI_INT_BUS_POWER;
920
921 if (intmask) {
922 printk(KERN_ERR "%s: Unexpected interrupt 0x%08x. Please "
d129bceb 923 "report this to " BUGMAIL ".\n",
3192a28f 924 mmc_hostname(host->mmc), intmask);
d129bceb
PO		 925 sdhci_dumpregs(host);
926
d129bceb 927 writel(intmask, host->ioaddr + SDHCI_INT_STATUS);
3192a28f 928 }
d129bceb
PO		 929
930 result = IRQ_HANDLED;
931
932out:
933 spin_unlock(&host->lock);
934
935 return result;
936}
937
938/*****************************************************************************\
939 * *
940 * Suspend/resume *
941 * *
942\*****************************************************************************/
943
944#ifdef CONFIG_PM
945
946static int sdhci_suspend (struct pci_dev *pdev, pm_message_t state)
947{
948 struct sdhci_chip *chip;
949 int i, ret;
950
951 chip = pci_get_drvdata(pdev);
952 if (!chip)
953 return 0;
954
955 DBG("Suspending...\n");
956
957 for (i = 0;i < chip->num_slots;i++) {
958 if (!chip->hosts[i])
959 continue;
960 ret = mmc_suspend_host(chip->hosts[i]->mmc, state);
961 if (ret) {
962 for (i--;i >= 0;i--)
963 mmc_resume_host(chip->hosts[i]->mmc);
964 return ret;
965 }
966 }
967
968 pci_save_state(pdev);
969 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
970 pci_disable_device(pdev);
971 pci_set_power_state(pdev, pci_choose_state(pdev, state));
972
973 return 0;
974}
975
976static int sdhci_resume (struct pci_dev *pdev)
977{
978 struct sdhci_chip *chip;
979 int i, ret;
980
981 chip = pci_get_drvdata(pdev);
982 if (!chip)
983 return 0;
984
985 DBG("Resuming...\n");
986
987 pci_set_power_state(pdev, PCI_D0);
988 pci_restore_state(pdev);
989 pci_enable_device(pdev);
990
991 for (i = 0;i < chip->num_slots;i++) {
992 if (!chip->hosts[i])
993 continue;
994 if (chip->hosts[i]->flags & SDHCI_USE_DMA)
995 pci_set_master(pdev);
996 sdhci_init(chip->hosts[i]);
997 ret = mmc_resume_host(chip->hosts[i]->mmc);
998 if (ret)
999 return ret;
1000 }
1001
1002 return 0;
1003}
1004
1005#else /* CONFIG_PM */
1006
1007#define sdhci_suspend NULL
1008#define sdhci_resume NULL
1009
1010#endif /* CONFIG_PM */
1011
1012/*****************************************************************************\
1013 * *
1014 * Device probing/removal *
1015 * *
1016\*****************************************************************************/
1017
1018static int __devinit sdhci_probe_slot(struct pci_dev *pdev, int slot)
1019{
1020 int ret;
1021 struct sdhci_chip *chip;
1022 struct mmc_host *mmc;
1023 struct sdhci_host *host;
1024
1025 u8 first_bar;
1026 unsigned int caps;
1027
1028 chip = pci_get_drvdata(pdev);
1029 BUG_ON(!chip);
1030
1031 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1032 if (ret)
1033 return ret;
1034
1035 first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1036
1037 if (first_bar > 5) {
1038 printk(KERN_ERR DRIVER_NAME ": Invalid first BAR. Aborting.\n");
1039 return -ENODEV;
1040 }
1041
1042 if (!(pci_resource_flags(pdev, first_bar + slot) & IORESOURCE_MEM)) {
1043 printk(KERN_ERR DRIVER_NAME ": BAR is not iomem. Aborting.\n");
1044 return -ENODEV;
1045 }
1046
1047 if (pci_resource_len(pdev, first_bar + slot) != 0x100) {
1048 printk(KERN_ERR DRIVER_NAME ": Invalid iomem size. Aborting.\n");
1049 return -ENODEV;
1050 }
1051
1052 mmc = mmc_alloc_host(sizeof(struct sdhci_host), &pdev->dev);
1053 if (!mmc)
1054 return -ENOMEM;
1055
1056 host = mmc_priv(mmc);
1057 host->mmc = mmc;
1058
1059 host->bar = first_bar + slot;
1060
1061 host->addr = pci_resource_start(pdev, host->bar);
1062 host->irq = pdev->irq;
1063
1064 DBG("slot %d at 0x%08lx, irq %d\n", slot, host->addr, host->irq);
1065
1066 snprintf(host->slot_descr, 20, "sdhci:slot%d", slot);
1067
1068 ret = pci_request_region(pdev, host->bar, host->slot_descr);
1069 if (ret)
1070 goto free;
1071
1072 host->ioaddr = ioremap_nocache(host->addr,
1073 pci_resource_len(pdev, host->bar));
1074 if (!host->ioaddr) {
1075 ret = -ENOMEM;
1076 goto release;
1077 }
1078
1079 caps = readl(host->ioaddr + SDHCI_CAPABILITIES);
1080
1081 if ((caps & SDHCI_CAN_DO_DMA) && ((pdev->class & 0x0000FF) == 0x01))
1082 host->flags |= SDHCI_USE_DMA;
1083
1084 if (host->flags & SDHCI_USE_DMA) {
1085 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
1086 printk(KERN_WARNING "%s: No suitable DMA available. "
1087 "Falling back to PIO.\n", host->slot_descr);
1088 host->flags &= ~SDHCI_USE_DMA;
1089 }
1090 }
1091
1092 if (host->flags & SDHCI_USE_DMA)
1093 pci_set_master(pdev);
1094 else /* XXX: Hack to get MMC layer to avoid highmem */
1095 pdev->dma_mask = 0;
1096
8ef1a143
PO		 1097 host->max_clk =
1098 (caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
1099 if (host->max_clk == 0) {
1100 printk(KERN_ERR "%s: Hardware doesn't specify base clock "
1101 "frequency.\n", host->slot_descr);
1102 ret = -ENODEV;
1103 goto unmap;
1104 }
d129bceb 1105 host->max_clk *= 1000000;
1c8cde92
PO		 1106
1107 host->timeout_clk =
1108 (caps & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT;
1109 if (host->timeout_clk == 0) {
1110 printk(KERN_ERR "%s: Hardware doesn't specify timeout clock "
1111 "frequency.\n", host->slot_descr);
1112 ret = -ENODEV;
1113 goto unmap;
1114 }
1115 if (caps & SDHCI_TIMEOUT_CLK_UNIT)
1116 host->timeout_clk *= 1000;
d129bceb
PO		 1117
1118 /*
1119 * Set host parameters.
1120 */
1121 mmc->ops = &sdhci_ops;
1122 mmc->f_min = host->max_clk / 256;
1123 mmc->f_max = host->max_clk;
d129bceb
PO		 1124 mmc->caps = MMC_CAP_4_BIT_DATA;
1125
146ad66e
PO		 1126 mmc->ocr_avail = 0;
1127 if (caps & SDHCI_CAN_VDD_330)
1128 mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34;
1129 else if (caps & SDHCI_CAN_VDD_300)
1130 mmc->ocr_avail |= MMC_VDD_29_30|MMC_VDD_30_31;
1131 else if (caps & SDHCI_CAN_VDD_180)
1132 mmc->ocr_avail |= MMC_VDD_17_18|MMC_VDD_18_19;
1133
1134 if (mmc->ocr_avail == 0) {
1135 printk(KERN_ERR "%s: Hardware doesn't report any "
1136 "support voltages.\n", host->slot_descr);
1137 ret = -ENODEV;
1138 goto unmap;
1139 }
1140
d129bceb
PO		 1141 spin_lock_init(&host->lock);
1142
1143 /*
1144 * Maximum number of segments. Hardware cannot do scatter lists.
1145 */
1146 if (host->flags & SDHCI_USE_DMA)
1147 mmc->max_hw_segs = 1;
1148 else
1149 mmc->max_hw_segs = 16;
1150 mmc->max_phys_segs = 16;
1151
1152 /*
1153 * Maximum number of sectors in one transfer. Limited by sector
1154 * count register.
1155 */
1156 mmc->max_sectors = 0x3FFF;
1157
1158 /*
1159 * Maximum segment size. Could be one segment with the maximum number
1160 * of sectors.
1161 */
1162 mmc->max_seg_size = mmc->max_sectors * 512;
1163
1164 /*
1165 * Init tasklets.
1166 */
1167 tasklet_init(&host->card_tasklet,
1168 sdhci_tasklet_card, (unsigned long)host);
1169 tasklet_init(&host->finish_tasklet,
1170 sdhci_tasklet_finish, (unsigned long)host);
1171
e474c66b 1172 setup_timer(&host->timer, sdhci_timeout_timer, (long)host);
d129bceb
PO		 1173
1174 ret = request_irq(host->irq, sdhci_irq, SA_SHIRQ,
1175 host->slot_descr, host);
1176 if (ret)
8ef1a143 1177 goto untasklet;
d129bceb
PO		 1178
1179 sdhci_init(host);
1180
1181#ifdef CONFIG_MMC_DEBUG
1182 sdhci_dumpregs(host);
1183#endif
1184
1185 host->chip = chip;
1186 chip->hosts[slot] = host;
1187
1188 mmc_add_host(mmc);
1189
1190 printk(KERN_INFO "%s: SDHCI at 0x%08lx irq %d %s\n", mmc_hostname(mmc),
1191 host->addr, host->irq,
1192 (host->flags & SDHCI_USE_DMA)?"DMA":"PIO");
1193
1194 return 0;
1195
8ef1a143 1196untasklet:
d129bceb
PO		 1197 tasklet_kill(&host->card_tasklet);
1198 tasklet_kill(&host->finish_tasklet);
8ef1a143 1199unmap:
d129bceb
PO		 1200 iounmap(host->ioaddr);
1201release:
1202 pci_release_region(pdev, host->bar);
1203free:
1204 mmc_free_host(mmc);
1205
1206 return ret;
1207}
1208
1209static void sdhci_remove_slot(struct pci_dev *pdev, int slot)
1210{
1211 struct sdhci_chip *chip;
1212 struct mmc_host *mmc;
1213 struct sdhci_host *host;
1214
1215 chip = pci_get_drvdata(pdev);
1216 host = chip->hosts[slot];
1217 mmc = host->mmc;
1218
1219 chip->hosts[slot] = NULL;
1220
1221 mmc_remove_host(mmc);
1222
1223 sdhci_reset(host, SDHCI_RESET_ALL);
1224
1225 free_irq(host->irq, host);
1226
1227 del_timer_sync(&host->timer);
1228
1229 tasklet_kill(&host->card_tasklet);
1230 tasklet_kill(&host->finish_tasklet);
1231
1232 iounmap(host->ioaddr);
1233
1234 pci_release_region(pdev, host->bar);
1235
1236 mmc_free_host(mmc);
1237}
1238
1239static int __devinit sdhci_probe(struct pci_dev *pdev,
1240 const struct pci_device_id *ent)
1241{
1242 int ret, i;
51f82bc0 1243 u8 slots, rev;
d129bceb
PO		 1244 struct sdhci_chip *chip;
1245
1246 BUG_ON(pdev == NULL);
1247 BUG_ON(ent == NULL);
1248
51f82bc0
PO		 1249 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev);
1250
1251 printk(KERN_INFO DRIVER_NAME
1252 ": SDHCI controller found at %s [%04x:%04x] (rev %x)\n",
1253 pci_name(pdev), (int)pdev->vendor, (int)pdev->device,
1254 (int)rev);
d129bceb
PO		 1255
1256 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1257 if (ret)
1258 return ret;
1259
1260 slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1261 DBG("found %d slot(s)\n", slots);
1262 if (slots == 0)
1263 return -ENODEV;
1264
1265 ret = pci_enable_device(pdev);
1266 if (ret)
1267 return ret;
1268
1269 chip = kzalloc(sizeof(struct sdhci_chip) +
1270 sizeof(struct sdhci_host*) * slots, GFP_KERNEL);
1271 if (!chip) {
1272 ret = -ENOMEM;
1273 goto err;
1274 }
1275
1276 chip->pdev = pdev;
1277
1278 chip->num_slots = slots;
1279 pci_set_drvdata(pdev, chip);
1280
1281 for (i = 0;i < slots;i++) {
1282 ret = sdhci_probe_slot(pdev, i);
1283 if (ret) {
1284 for (i--;i >= 0;i--)
1285 sdhci_remove_slot(pdev, i);
1286 goto free;
1287 }
1288 }
1289
1290 return 0;
1291
1292free:
1293 pci_set_drvdata(pdev, NULL);
1294 kfree(chip);
1295
1296err:
1297 pci_disable_device(pdev);
1298 return ret;
1299}
1300
1301static void __devexit sdhci_remove(struct pci_dev *pdev)
1302{
1303 int i;
1304 struct sdhci_chip *chip;
1305
1306 chip = pci_get_drvdata(pdev);
1307
1308 if (chip) {
1309 for (i = 0;i < chip->num_slots;i++)
1310 sdhci_remove_slot(pdev, i);
1311
1312 pci_set_drvdata(pdev, NULL);
1313
1314 kfree(chip);
1315 }
1316
1317 pci_disable_device(pdev);
1318}
1319
1320static struct pci_driver sdhci_driver = {
1321 .name = DRIVER_NAME,
1322 .id_table = pci_ids,
1323 .probe = sdhci_probe,
1324 .remove = __devexit_p(sdhci_remove),
1325 .suspend = sdhci_suspend,
1326 .resume = sdhci_resume,
1327};
1328
1329/*****************************************************************************\
1330 * *
1331 * Driver init/exit *
1332 * *
1333\*****************************************************************************/
1334
1335static int __init sdhci_drv_init(void)
1336{
1337 printk(KERN_INFO DRIVER_NAME
1338 ": Secure Digital Host Controller Interface driver, "
1339 DRIVER_VERSION "\n");
1340 printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
1341
1342 return pci_register_driver(&sdhci_driver);
1343}
1344
1345static void __exit sdhci_drv_exit(void)
1346{
1347 DBG("Exiting\n");
1348
1349 pci_unregister_driver(&sdhci_driver);
1350}
1351
1352module_init(sdhci_drv_init);
1353module_exit(sdhci_drv_exit);
1354
1355MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
1356MODULE_DESCRIPTION("Secure Digital Host Controller Interface driver");
1357MODULE_VERSION(DRIVER_VERSION);
1358MODULE_LICENSE("GPL");
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