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[MMC] Fix chip config in wbsd
[mirror_ubuntu-artful-kernel.git] / drivers / mmc / wbsd.c
CommitLineData
1da177e4
LT
1/*
2 * linux/drivers/mmc/wbsd.c - Winbond W83L51xD SD/MMC driver
3 *
4 * Copyright (C) 2004-2005 Pierre Ossman, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 *
11 * Warning!
12 *
13 * Changes to the FIFO system should be done with extreme care since
14 * the hardware is full of bugs related to the FIFO. Known issues are:
15 *
16 * - FIFO size field in FSR is always zero.
17 *
18 * - FIFO interrupts tend not to work as they should. Interrupts are
19 * triggered only for full/empty events, not for threshold values.
20 *
21 * - On APIC systems the FIFO empty interrupt is sometimes lost.
22 */
23
24#include <linux/config.h>
25#include <linux/module.h>
26#include <linux/moduleparam.h>
27#include <linux/init.h>
28#include <linux/ioport.h>
d052d1be 29#include <linux/platform_device.h>
1da177e4 30#include <linux/interrupt.h>
85bcc130 31#include <linux/dma-mapping.h>
1da177e4 32#include <linux/delay.h>
85bcc130 33#include <linux/pnp.h>
1da177e4
LT
34#include <linux/highmem.h>
35#include <linux/mmc/host.h>
36#include <linux/mmc/protocol.h>
37
38#include <asm/io.h>
39#include <asm/dma.h>
40#include <asm/scatterlist.h>
41
42#include "wbsd.h"
43
44#define DRIVER_NAME "wbsd"
1656fa57 45#define DRIVER_VERSION "1.4"
1da177e4
LT
46
47#ifdef CONFIG_MMC_DEBUG
48#define DBG(x...) \
49 printk(KERN_DEBUG DRIVER_NAME ": " x)
50#define DBGF(f, x...) \
51 printk(KERN_DEBUG DRIVER_NAME " [%s()]: " f, __func__ , ##x)
52#else
53#define DBG(x...) do { } while (0)
54#define DBGF(x...) do { } while (0)
55#endif
56
85bcc130
PO
57/*
58 * Device resources
59 */
60
61#ifdef CONFIG_PNP
62
63static const struct pnp_device_id pnp_dev_table[] = {
64 { "WEC0517", 0 },
65 { "WEC0518", 0 },
66 { "", 0 },
67};
68
69MODULE_DEVICE_TABLE(pnp, pnp_dev_table);
70
71#endif /* CONFIG_PNP */
72
3eee0d03
AB
73static const int config_ports[] = { 0x2E, 0x4E };
74static const int unlock_codes[] = { 0x83, 0x87 };
75
76static const int valid_ids[] = {
77 0x7112,
78 };
79
85bcc130
PO
80#ifdef CONFIG_PNP
81static unsigned int nopnp = 0;
82#else
83static const unsigned int nopnp = 1;
84#endif
85static unsigned int io = 0x248;
86static unsigned int irq = 6;
87static int dma = 2;
88
1da177e4
LT
89/*
90 * Basic functions
91 */
92
93static inline void wbsd_unlock_config(struct wbsd_host* host)
94{
85bcc130 95 BUG_ON(host->config == 0);
fecf92ba 96
1da177e4
LT
97 outb(host->unlock_code, host->config);
98 outb(host->unlock_code, host->config);
99}
100
101static inline void wbsd_lock_config(struct wbsd_host* host)
102{
85bcc130 103 BUG_ON(host->config == 0);
fecf92ba 104
1da177e4
LT
105 outb(LOCK_CODE, host->config);
106}
107
108static inline void wbsd_write_config(struct wbsd_host* host, u8 reg, u8 value)
109{
85bcc130 110 BUG_ON(host->config == 0);
fecf92ba 111
1da177e4
LT
112 outb(reg, host->config);
113 outb(value, host->config + 1);
114}
115
116static inline u8 wbsd_read_config(struct wbsd_host* host, u8 reg)
117{
85bcc130 118 BUG_ON(host->config == 0);
fecf92ba 119
1da177e4
LT
120 outb(reg, host->config);
121 return inb(host->config + 1);
122}
123
124static inline void wbsd_write_index(struct wbsd_host* host, u8 index, u8 value)
125{
126 outb(index, host->base + WBSD_IDXR);
127 outb(value, host->base + WBSD_DATAR);
128}
129
130static inline u8 wbsd_read_index(struct wbsd_host* host, u8 index)
131{
132 outb(index, host->base + WBSD_IDXR);
133 return inb(host->base + WBSD_DATAR);
134}
135
136/*
137 * Common routines
138 */
139
140static void wbsd_init_device(struct wbsd_host* host)
141{
142 u8 setup, ier;
fecf92ba 143
1da177e4
LT
144 /*
145 * Reset chip (SD/MMC part) and fifo.
146 */
147 setup = wbsd_read_index(host, WBSD_IDX_SETUP);
148 setup |= WBSD_FIFO_RESET | WBSD_SOFT_RESET;
149 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
fecf92ba 150
85bcc130
PO
151 /*
152 * Set DAT3 to input
153 */
154 setup &= ~WBSD_DAT3_H;
155 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
156 host->flags &= ~WBSD_FIGNORE_DETECT;
fecf92ba 157
1da177e4
LT
158 /*
159 * Read back default clock.
160 */
161 host->clk = wbsd_read_index(host, WBSD_IDX_CLK);
162
163 /*
164 * Power down port.
165 */
166 outb(WBSD_POWER_N, host->base + WBSD_CSR);
fecf92ba 167
1da177e4
LT
168 /*
169 * Set maximum timeout.
170 */
171 wbsd_write_index(host, WBSD_IDX_TAAC, 0x7F);
fecf92ba 172
85bcc130
PO
173 /*
174 * Test for card presence
175 */
176 if (inb(host->base + WBSD_CSR) & WBSD_CARDPRESENT)
177 host->flags |= WBSD_FCARD_PRESENT;
178 else
179 host->flags &= ~WBSD_FCARD_PRESENT;
fecf92ba 180
1da177e4
LT
181 /*
182 * Enable interesting interrupts.
183 */
184 ier = 0;
185 ier |= WBSD_EINT_CARD;
186 ier |= WBSD_EINT_FIFO_THRE;
187 ier |= WBSD_EINT_CCRC;
188 ier |= WBSD_EINT_TIMEOUT;
189 ier |= WBSD_EINT_CRC;
190 ier |= WBSD_EINT_TC;
191
192 outb(ier, host->base + WBSD_EIR);
193
194 /*
195 * Clear interrupts.
196 */
197 inb(host->base + WBSD_ISR);
198}
199
200static void wbsd_reset(struct wbsd_host* host)
201{
202 u8 setup;
fecf92ba 203
1da177e4 204 printk(KERN_ERR DRIVER_NAME ": Resetting chip\n");
fecf92ba 205
1da177e4
LT
206 /*
207 * Soft reset of chip (SD/MMC part).
208 */
209 setup = wbsd_read_index(host, WBSD_IDX_SETUP);
210 setup |= WBSD_SOFT_RESET;
211 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
212}
213
214static void wbsd_request_end(struct wbsd_host* host, struct mmc_request* mrq)
215{
216 unsigned long dmaflags;
fecf92ba 217
1da177e4 218 DBGF("Ending request, cmd (%x)\n", mrq->cmd->opcode);
fecf92ba 219
1da177e4
LT
220 if (host->dma >= 0)
221 {
222 /*
223 * Release ISA DMA controller.
224 */
225 dmaflags = claim_dma_lock();
226 disable_dma(host->dma);
227 clear_dma_ff(host->dma);
228 release_dma_lock(dmaflags);
229
230 /*
231 * Disable DMA on host.
232 */
233 wbsd_write_index(host, WBSD_IDX_DMA, 0);
234 }
fecf92ba 235
1da177e4
LT
236 host->mrq = NULL;
237
238 /*
239 * MMC layer might call back into the driver so first unlock.
240 */
241 spin_unlock(&host->lock);
242 mmc_request_done(host->mmc, mrq);
243 spin_lock(&host->lock);
244}
245
246/*
247 * Scatter/gather functions
248 */
249
250static inline void wbsd_init_sg(struct wbsd_host* host, struct mmc_data* data)
251{
252 /*
253 * Get info. about SG list from data structure.
254 */
255 host->cur_sg = data->sg;
256 host->num_sg = data->sg_len;
257
258 host->offset = 0;
259 host->remain = host->cur_sg->length;
260}
261
262static inline int wbsd_next_sg(struct wbsd_host* host)
263{
264 /*
265 * Skip to next SG entry.
266 */
267 host->cur_sg++;
268 host->num_sg--;
269
270 /*
271 * Any entries left?
272 */
273 if (host->num_sg > 0)
274 {
275 host->offset = 0;
276 host->remain = host->cur_sg->length;
277 }
fecf92ba 278
1da177e4
LT
279 return host->num_sg;
280}
281
282static inline char* wbsd_kmap_sg(struct wbsd_host* host)
283{
284 host->mapped_sg = kmap_atomic(host->cur_sg->page, KM_BIO_SRC_IRQ) +
285 host->cur_sg->offset;
286 return host->mapped_sg;
287}
288
289static inline void wbsd_kunmap_sg(struct wbsd_host* host)
290{
291 kunmap_atomic(host->mapped_sg, KM_BIO_SRC_IRQ);
292}
293
294static inline void wbsd_sg_to_dma(struct wbsd_host* host, struct mmc_data* data)
295{
296 unsigned int len, i, size;
297 struct scatterlist* sg;
298 char* dmabuf = host->dma_buffer;
299 char* sgbuf;
fecf92ba 300
1da177e4 301 size = host->size;
fecf92ba 302
1da177e4
LT
303 sg = data->sg;
304 len = data->sg_len;
fecf92ba 305
1da177e4
LT
306 /*
307 * Just loop through all entries. Size might not
308 * be the entire list though so make sure that
309 * we do not transfer too much.
310 */
311 for (i = 0;i < len;i++)
312 {
313 sgbuf = kmap_atomic(sg[i].page, KM_BIO_SRC_IRQ) + sg[i].offset;
314 if (size < sg[i].length)
315 memcpy(dmabuf, sgbuf, size);
316 else
317 memcpy(dmabuf, sgbuf, sg[i].length);
318 kunmap_atomic(sgbuf, KM_BIO_SRC_IRQ);
319 dmabuf += sg[i].length;
fecf92ba 320
1da177e4
LT
321 if (size < sg[i].length)
322 size = 0;
323 else
324 size -= sg[i].length;
fecf92ba 325
1da177e4
LT
326 if (size == 0)
327 break;
328 }
fecf92ba 329
1da177e4
LT
330 /*
331 * Check that we didn't get a request to transfer
332 * more data than can fit into the SG list.
333 */
fecf92ba 334
1da177e4 335 BUG_ON(size != 0);
fecf92ba 336
1da177e4
LT
337 host->size -= size;
338}
339
340static inline void wbsd_dma_to_sg(struct wbsd_host* host, struct mmc_data* data)
341{
342 unsigned int len, i, size;
343 struct scatterlist* sg;
344 char* dmabuf = host->dma_buffer;
345 char* sgbuf;
fecf92ba 346
1da177e4 347 size = host->size;
fecf92ba 348
1da177e4
LT
349 sg = data->sg;
350 len = data->sg_len;
fecf92ba 351
1da177e4
LT
352 /*
353 * Just loop through all entries. Size might not
354 * be the entire list though so make sure that
355 * we do not transfer too much.
356 */
357 for (i = 0;i < len;i++)
358 {
359 sgbuf = kmap_atomic(sg[i].page, KM_BIO_SRC_IRQ) + sg[i].offset;
360 if (size < sg[i].length)
361 memcpy(sgbuf, dmabuf, size);
362 else
363 memcpy(sgbuf, dmabuf, sg[i].length);
364 kunmap_atomic(sgbuf, KM_BIO_SRC_IRQ);
365 dmabuf += sg[i].length;
fecf92ba 366
1da177e4
LT
367 if (size < sg[i].length)
368 size = 0;
369 else
370 size -= sg[i].length;
fecf92ba 371
1da177e4
LT
372 if (size == 0)
373 break;
374 }
fecf92ba 375
1da177e4
LT
376 /*
377 * Check that we didn't get a request to transfer
378 * more data than can fit into the SG list.
379 */
fecf92ba 380
1da177e4 381 BUG_ON(size != 0);
fecf92ba 382
1da177e4
LT
383 host->size -= size;
384}
385
386/*
387 * Command handling
388 */
fecf92ba 389
1da177e4
LT
390static inline void wbsd_get_short_reply(struct wbsd_host* host,
391 struct mmc_command* cmd)
392{
393 /*
394 * Correct response type?
395 */
396 if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_SHORT)
397 {
398 cmd->error = MMC_ERR_INVALID;
399 return;
400 }
fecf92ba 401
1da177e4
LT
402 cmd->resp[0] =
403 wbsd_read_index(host, WBSD_IDX_RESP12) << 24;
404 cmd->resp[0] |=
405 wbsd_read_index(host, WBSD_IDX_RESP13) << 16;
406 cmd->resp[0] |=
407 wbsd_read_index(host, WBSD_IDX_RESP14) << 8;
408 cmd->resp[0] |=
409 wbsd_read_index(host, WBSD_IDX_RESP15) << 0;
410 cmd->resp[1] =
411 wbsd_read_index(host, WBSD_IDX_RESP16) << 24;
412}
413
414static inline void wbsd_get_long_reply(struct wbsd_host* host,
415 struct mmc_command* cmd)
416{
417 int i;
fecf92ba 418
1da177e4
LT
419 /*
420 * Correct response type?
421 */
422 if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_LONG)
423 {
424 cmd->error = MMC_ERR_INVALID;
425 return;
426 }
fecf92ba 427
1da177e4
LT
428 for (i = 0;i < 4;i++)
429 {
430 cmd->resp[i] =
431 wbsd_read_index(host, WBSD_IDX_RESP1 + i * 4) << 24;
432 cmd->resp[i] |=
433 wbsd_read_index(host, WBSD_IDX_RESP2 + i * 4) << 16;
434 cmd->resp[i] |=
435 wbsd_read_index(host, WBSD_IDX_RESP3 + i * 4) << 8;
436 cmd->resp[i] |=
437 wbsd_read_index(host, WBSD_IDX_RESP4 + i * 4) << 0;
438 }
439}
440
1da177e4
LT
441static void wbsd_send_command(struct wbsd_host* host, struct mmc_command* cmd)
442{
443 int i;
444 u8 status, isr;
fecf92ba 445
1da177e4
LT
446 DBGF("Sending cmd (%x)\n", cmd->opcode);
447
448 /*
449 * Clear accumulated ISR. The interrupt routine
450 * will fill this one with events that occur during
451 * transfer.
452 */
453 host->isr = 0;
fecf92ba 454
1da177e4
LT
455 /*
456 * Send the command (CRC calculated by host).
457 */
458 outb(cmd->opcode, host->base + WBSD_CMDR);
459 for (i = 3;i >= 0;i--)
460 outb((cmd->arg >> (i * 8)) & 0xff, host->base + WBSD_CMDR);
fecf92ba 461
1da177e4 462 cmd->error = MMC_ERR_NONE;
fecf92ba 463
1da177e4
LT
464 /*
465 * Wait for the request to complete.
466 */
467 do {
468 status = wbsd_read_index(host, WBSD_IDX_STATUS);
469 } while (status & WBSD_CARDTRAFFIC);
470
471 /*
472 * Do we expect a reply?
473 */
474 if ((cmd->flags & MMC_RSP_MASK) != MMC_RSP_NONE)
475 {
476 /*
477 * Read back status.
478 */
479 isr = host->isr;
fecf92ba 480
1da177e4
LT
481 /* Card removed? */
482 if (isr & WBSD_INT_CARD)
483 cmd->error = MMC_ERR_TIMEOUT;
484 /* Timeout? */
485 else if (isr & WBSD_INT_TIMEOUT)
486 cmd->error = MMC_ERR_TIMEOUT;
487 /* CRC? */
488 else if ((cmd->flags & MMC_RSP_CRC) && (isr & WBSD_INT_CRC))
489 cmd->error = MMC_ERR_BADCRC;
490 /* All ok */
491 else
492 {
493 if ((cmd->flags & MMC_RSP_MASK) == MMC_RSP_SHORT)
494 wbsd_get_short_reply(host, cmd);
495 else
496 wbsd_get_long_reply(host, cmd);
497 }
498 }
499
500 DBGF("Sent cmd (%x), res %d\n", cmd->opcode, cmd->error);
501}
502
503/*
504 * Data functions
505 */
506
507static void wbsd_empty_fifo(struct wbsd_host* host)
508{
509 struct mmc_data* data = host->mrq->cmd->data;
510 char* buffer;
511 int i, fsr, fifo;
fecf92ba 512
1da177e4
LT
513 /*
514 * Handle excessive data.
515 */
516 if (data->bytes_xfered == host->size)
517 return;
fecf92ba 518
1da177e4
LT
519 buffer = wbsd_kmap_sg(host) + host->offset;
520
521 /*
522 * Drain the fifo. This has a tendency to loop longer
523 * than the FIFO length (usually one block).
524 */
525 while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_EMPTY))
526 {
527 /*
528 * The size field in the FSR is broken so we have to
529 * do some guessing.
fecf92ba 530 */
1da177e4
LT
531 if (fsr & WBSD_FIFO_FULL)
532 fifo = 16;
533 else if (fsr & WBSD_FIFO_FUTHRE)
534 fifo = 8;
535 else
536 fifo = 1;
fecf92ba 537
1da177e4
LT
538 for (i = 0;i < fifo;i++)
539 {
540 *buffer = inb(host->base + WBSD_DFR);
541 buffer++;
542 host->offset++;
543 host->remain--;
544
545 data->bytes_xfered++;
fecf92ba 546
1da177e4
LT
547 /*
548 * Transfer done?
549 */
550 if (data->bytes_xfered == host->size)
551 {
fecf92ba 552 wbsd_kunmap_sg(host);
1da177e4
LT
553 return;
554 }
fecf92ba 555
1da177e4
LT
556 /*
557 * End of scatter list entry?
558 */
559 if (host->remain == 0)
560 {
561 wbsd_kunmap_sg(host);
fecf92ba 562
1da177e4
LT
563 /*
564 * Get next entry. Check if last.
565 */
566 if (!wbsd_next_sg(host))
567 {
568 /*
569 * We should never reach this point.
570 * It means that we're trying to
571 * transfer more blocks than can fit
572 * into the scatter list.
573 */
574 BUG_ON(1);
fecf92ba 575
1da177e4 576 host->size = data->bytes_xfered;
fecf92ba 577
1da177e4
LT
578 return;
579 }
fecf92ba 580
1da177e4
LT
581 buffer = wbsd_kmap_sg(host);
582 }
583 }
584 }
fecf92ba 585
1da177e4
LT
586 wbsd_kunmap_sg(host);
587
588 /*
589 * This is a very dirty hack to solve a
590 * hardware problem. The chip doesn't trigger
591 * FIFO threshold interrupts properly.
592 */
593 if ((host->size - data->bytes_xfered) < 16)
594 tasklet_schedule(&host->fifo_tasklet);
595}
596
597static void wbsd_fill_fifo(struct wbsd_host* host)
598{
599 struct mmc_data* data = host->mrq->cmd->data;
600 char* buffer;
601 int i, fsr, fifo;
fecf92ba 602
1da177e4
LT
603 /*
604 * Check that we aren't being called after the
605 * entire buffer has been transfered.
606 */
607 if (data->bytes_xfered == host->size)
608 return;
609
610 buffer = wbsd_kmap_sg(host) + host->offset;
611
612 /*
613 * Fill the fifo. This has a tendency to loop longer
614 * than the FIFO length (usually one block).
615 */
616 while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_FULL))
617 {
618 /*
619 * The size field in the FSR is broken so we have to
620 * do some guessing.
fecf92ba 621 */
1da177e4
LT
622 if (fsr & WBSD_FIFO_EMPTY)
623 fifo = 0;
624 else if (fsr & WBSD_FIFO_EMTHRE)
625 fifo = 8;
626 else
627 fifo = 15;
628
629 for (i = 16;i > fifo;i--)
630 {
631 outb(*buffer, host->base + WBSD_DFR);
632 buffer++;
633 host->offset++;
634 host->remain--;
fecf92ba 635
1da177e4 636 data->bytes_xfered++;
fecf92ba 637
1da177e4
LT
638 /*
639 * Transfer done?
640 */
641 if (data->bytes_xfered == host->size)
642 {
643 wbsd_kunmap_sg(host);
644 return;
645 }
646
647 /*
648 * End of scatter list entry?
649 */
650 if (host->remain == 0)
651 {
652 wbsd_kunmap_sg(host);
fecf92ba 653
1da177e4
LT
654 /*
655 * Get next entry. Check if last.
656 */
657 if (!wbsd_next_sg(host))
658 {
659 /*
660 * We should never reach this point.
661 * It means that we're trying to
662 * transfer more blocks than can fit
663 * into the scatter list.
664 */
665 BUG_ON(1);
fecf92ba 666
1da177e4 667 host->size = data->bytes_xfered;
fecf92ba 668
1da177e4
LT
669 return;
670 }
fecf92ba 671
1da177e4
LT
672 buffer = wbsd_kmap_sg(host);
673 }
674 }
675 }
fecf92ba 676
1da177e4 677 wbsd_kunmap_sg(host);
fecf92ba 678
85bcc130
PO
679 /*
680 * The controller stops sending interrupts for
681 * 'FIFO empty' under certain conditions. So we
682 * need to be a bit more pro-active.
683 */
684 tasklet_schedule(&host->fifo_tasklet);
1da177e4
LT
685}
686
687static void wbsd_prepare_data(struct wbsd_host* host, struct mmc_data* data)
688{
689 u16 blksize;
690 u8 setup;
691 unsigned long dmaflags;
692
693 DBGF("blksz %04x blks %04x flags %08x\n",
694 1 << data->blksz_bits, data->blocks, data->flags);
695 DBGF("tsac %d ms nsac %d clk\n",
696 data->timeout_ns / 1000000, data->timeout_clks);
fecf92ba 697
1da177e4
LT
698 /*
699 * Calculate size.
700 */
701 host->size = data->blocks << data->blksz_bits;
702
703 /*
704 * Check timeout values for overflow.
705 * (Yes, some cards cause this value to overflow).
706 */
707 if (data->timeout_ns > 127000000)
708 wbsd_write_index(host, WBSD_IDX_TAAC, 127);
709 else
710 wbsd_write_index(host, WBSD_IDX_TAAC, data->timeout_ns/1000000);
fecf92ba 711
1da177e4
LT
712 if (data->timeout_clks > 255)
713 wbsd_write_index(host, WBSD_IDX_NSAC, 255);
714 else
715 wbsd_write_index(host, WBSD_IDX_NSAC, data->timeout_clks);
fecf92ba 716
1da177e4
LT
717 /*
718 * Inform the chip of how large blocks will be
719 * sent. It needs this to determine when to
720 * calculate CRC.
721 *
722 * Space for CRC must be included in the size.
65ae2118 723 * Two bytes are needed for each data line.
1da177e4 724 */
65ae2118
PO
725 if (host->bus_width == MMC_BUS_WIDTH_1)
726 {
727 blksize = (1 << data->blksz_bits) + 2;
728
729 wbsd_write_index(host, WBSD_IDX_PBSMSB, (blksize >> 4) & 0xF0);
730 wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF);
731 }
732 else if (host->bus_width == MMC_BUS_WIDTH_4)
733 {
734 blksize = (1 << data->blksz_bits) + 2 * 4;
fecf92ba 735
65ae2118
PO
736 wbsd_write_index(host, WBSD_IDX_PBSMSB, ((blksize >> 4) & 0xF0)
737 | WBSD_DATA_WIDTH);
738 wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF);
739 }
740 else
741 {
742 data->error = MMC_ERR_INVALID;
743 return;
744 }
1da177e4
LT
745
746 /*
747 * Clear the FIFO. This is needed even for DMA
748 * transfers since the chip still uses the FIFO
749 * internally.
750 */
751 setup = wbsd_read_index(host, WBSD_IDX_SETUP);
752 setup |= WBSD_FIFO_RESET;
753 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
fecf92ba 754
1da177e4
LT
755 /*
756 * DMA transfer?
757 */
758 if (host->dma >= 0)
fecf92ba 759 {
1da177e4
LT
760 /*
761 * The buffer for DMA is only 64 kB.
762 */
763 BUG_ON(host->size > 0x10000);
764 if (host->size > 0x10000)
765 {
766 data->error = MMC_ERR_INVALID;
767 return;
768 }
fecf92ba 769
1da177e4
LT
770 /*
771 * Transfer data from the SG list to
772 * the DMA buffer.
773 */
774 if (data->flags & MMC_DATA_WRITE)
775 wbsd_sg_to_dma(host, data);
fecf92ba 776
1da177e4
LT
777 /*
778 * Initialise the ISA DMA controller.
fecf92ba 779 */
1da177e4
LT
780 dmaflags = claim_dma_lock();
781 disable_dma(host->dma);
782 clear_dma_ff(host->dma);
783 if (data->flags & MMC_DATA_READ)
784 set_dma_mode(host->dma, DMA_MODE_READ & ~0x40);
785 else
786 set_dma_mode(host->dma, DMA_MODE_WRITE & ~0x40);
787 set_dma_addr(host->dma, host->dma_addr);
788 set_dma_count(host->dma, host->size);
789
790 enable_dma(host->dma);
791 release_dma_lock(dmaflags);
792
793 /*
794 * Enable DMA on the host.
795 */
796 wbsd_write_index(host, WBSD_IDX_DMA, WBSD_DMA_ENABLE);
797 }
798 else
799 {
800 /*
801 * This flag is used to keep printk
802 * output to a minimum.
803 */
804 host->firsterr = 1;
fecf92ba 805
1da177e4
LT
806 /*
807 * Initialise the SG list.
808 */
809 wbsd_init_sg(host, data);
fecf92ba 810
1da177e4
LT
811 /*
812 * Turn off DMA.
813 */
814 wbsd_write_index(host, WBSD_IDX_DMA, 0);
fecf92ba 815
1da177e4
LT
816 /*
817 * Set up FIFO threshold levels (and fill
818 * buffer if doing a write).
819 */
820 if (data->flags & MMC_DATA_READ)
821 {
822 wbsd_write_index(host, WBSD_IDX_FIFOEN,
823 WBSD_FIFOEN_FULL | 8);
824 }
825 else
826 {
827 wbsd_write_index(host, WBSD_IDX_FIFOEN,
828 WBSD_FIFOEN_EMPTY | 8);
829 wbsd_fill_fifo(host);
830 }
fecf92ba
PO
831 }
832
1da177e4
LT
833 data->error = MMC_ERR_NONE;
834}
835
836static void wbsd_finish_data(struct wbsd_host* host, struct mmc_data* data)
837{
838 unsigned long dmaflags;
839 int count;
840 u8 status;
fecf92ba 841
1da177e4
LT
842 WARN_ON(host->mrq == NULL);
843
844 /*
845 * Send a stop command if needed.
846 */
847 if (data->stop)
848 wbsd_send_command(host, data->stop);
849
850 /*
851 * Wait for the controller to leave data
852 * transfer state.
853 */
854 do
855 {
856 status = wbsd_read_index(host, WBSD_IDX_STATUS);
857 } while (status & (WBSD_BLOCK_READ | WBSD_BLOCK_WRITE));
fecf92ba 858
1da177e4
LT
859 /*
860 * DMA transfer?
861 */
862 if (host->dma >= 0)
863 {
864 /*
865 * Disable DMA on the host.
866 */
867 wbsd_write_index(host, WBSD_IDX_DMA, 0);
fecf92ba 868
1da177e4
LT
869 /*
870 * Turn of ISA DMA controller.
871 */
872 dmaflags = claim_dma_lock();
873 disable_dma(host->dma);
874 clear_dma_ff(host->dma);
875 count = get_dma_residue(host->dma);
876 release_dma_lock(dmaflags);
fecf92ba 877
1da177e4
LT
878 /*
879 * Any leftover data?
880 */
881 if (count)
882 {
883 printk(KERN_ERR DRIVER_NAME ": Incomplete DMA "
884 "transfer. %d bytes left.\n", count);
fecf92ba 885
1da177e4
LT
886 data->error = MMC_ERR_FAILED;
887 }
888 else
889 {
890 /*
891 * Transfer data from DMA buffer to
892 * SG list.
893 */
894 if (data->flags & MMC_DATA_READ)
895 wbsd_dma_to_sg(host, data);
fecf92ba 896
1da177e4
LT
897 data->bytes_xfered = host->size;
898 }
899 }
fecf92ba 900
1da177e4 901 DBGF("Ending data transfer (%d bytes)\n", data->bytes_xfered);
fecf92ba 902
1da177e4
LT
903 wbsd_request_end(host, host->mrq);
904}
905
85bcc130
PO
906/*****************************************************************************\
907 * *
908 * MMC layer callbacks *
909 * *
910\*****************************************************************************/
1da177e4
LT
911
912static void wbsd_request(struct mmc_host* mmc, struct mmc_request* mrq)
913{
914 struct wbsd_host* host = mmc_priv(mmc);
915 struct mmc_command* cmd;
916
917 /*
918 * Disable tasklets to avoid a deadlock.
919 */
920 spin_lock_bh(&host->lock);
921
922 BUG_ON(host->mrq != NULL);
923
924 cmd = mrq->cmd;
925
926 host->mrq = mrq;
fecf92ba 927
1da177e4
LT
928 /*
929 * If there is no card in the slot then
930 * timeout immediatly.
931 */
85bcc130 932 if (!(host->flags & WBSD_FCARD_PRESENT))
1da177e4
LT
933 {
934 cmd->error = MMC_ERR_TIMEOUT;
935 goto done;
936 }
937
938 /*
939 * Does the request include data?
940 */
941 if (cmd->data)
942 {
943 wbsd_prepare_data(host, cmd->data);
fecf92ba 944
1da177e4
LT
945 if (cmd->data->error != MMC_ERR_NONE)
946 goto done;
947 }
fecf92ba 948
1da177e4
LT
949 wbsd_send_command(host, cmd);
950
951 /*
952 * If this is a data transfer the request
953 * will be finished after the data has
954 * transfered.
fecf92ba 955 */
1da177e4
LT
956 if (cmd->data && (cmd->error == MMC_ERR_NONE))
957 {
958 /*
959 * Dirty fix for hardware bug.
960 */
961 if (host->dma == -1)
962 tasklet_schedule(&host->fifo_tasklet);
963
964 spin_unlock_bh(&host->lock);
965
966 return;
967 }
fecf92ba 968
1da177e4
LT
969done:
970 wbsd_request_end(host, mrq);
971
972 spin_unlock_bh(&host->lock);
973}
974
975static void wbsd_set_ios(struct mmc_host* mmc, struct mmc_ios* ios)
976{
977 struct wbsd_host* host = mmc_priv(mmc);
978 u8 clk, setup, pwr;
fecf92ba 979
65ae2118
PO
980 DBGF("clock %uHz busmode %u powermode %u cs %u Vdd %u width %u\n",
981 ios->clock, ios->bus_mode, ios->power_mode, ios->chip_select,
982 ios->vdd, ios->bus_width);
1da177e4
LT
983
984 spin_lock_bh(&host->lock);
985
986 /*
987 * Reset the chip on each power off.
988 * Should clear out any weird states.
989 */
990 if (ios->power_mode == MMC_POWER_OFF)
991 wbsd_init_device(host);
fecf92ba 992
1da177e4
LT
993 if (ios->clock >= 24000000)
994 clk = WBSD_CLK_24M;
995 else if (ios->clock >= 16000000)
996 clk = WBSD_CLK_16M;
997 else if (ios->clock >= 12000000)
998 clk = WBSD_CLK_12M;
999 else
1000 clk = WBSD_CLK_375K;
1001
1002 /*
1003 * Only write to the clock register when
1004 * there is an actual change.
1005 */
1006 if (clk != host->clk)
1007 {
1008 wbsd_write_index(host, WBSD_IDX_CLK, clk);
1009 host->clk = clk;
1010 }
1011
85bcc130
PO
1012 /*
1013 * Power up card.
1014 */
1da177e4
LT
1015 if (ios->power_mode != MMC_POWER_OFF)
1016 {
1da177e4
LT
1017 pwr = inb(host->base + WBSD_CSR);
1018 pwr &= ~WBSD_POWER_N;
1019 outb(pwr, host->base + WBSD_CSR);
1da177e4
LT
1020 }
1021
85bcc130
PO
1022 /*
1023 * MMC cards need to have pin 1 high during init.
85bcc130 1024 * It wreaks havoc with the card detection though so
1656fa57 1025 * that needs to be disabled.
85bcc130
PO
1026 */
1027 setup = wbsd_read_index(host, WBSD_IDX_SETUP);
1656fa57 1028 if (ios->chip_select == MMC_CS_HIGH)
85bcc130 1029 {
65ae2118 1030 BUG_ON(ios->bus_width != MMC_BUS_WIDTH_1);
85bcc130
PO
1031 setup |= WBSD_DAT3_H;
1032 host->flags |= WBSD_FIGNORE_DETECT;
1033 }
1034 else
1035 {
19c1f3ca
PO
1036 if (setup & WBSD_DAT3_H)
1037 {
1038 setup &= ~WBSD_DAT3_H;
1656fa57 1039
19c1f3ca
PO
1040 /*
1041 * We cannot resume card detection immediatly
1042 * because of capacitance and delays in the chip.
1043 */
1044 mod_timer(&host->ignore_timer, jiffies + HZ/100);
1045 }
85bcc130
PO
1046 }
1047 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
fecf92ba 1048
65ae2118
PO
1049 /*
1050 * Store bus width for later. Will be used when
1051 * setting up the data transfer.
1052 */
1053 host->bus_width = ios->bus_width;
1054
1da177e4
LT
1055 spin_unlock_bh(&host->lock);
1056}
1057
65ae2118
PO
1058static int wbsd_get_ro(struct mmc_host* mmc)
1059{
1060 struct wbsd_host* host = mmc_priv(mmc);
1061 u8 csr;
1062
1063 spin_lock_bh(&host->lock);
1064
1065 csr = inb(host->base + WBSD_CSR);
1066 csr |= WBSD_MSLED;
1067 outb(csr, host->base + WBSD_CSR);
1068
1069 mdelay(1);
1070
1071 csr = inb(host->base + WBSD_CSR);
1072 csr &= ~WBSD_MSLED;
1073 outb(csr, host->base + WBSD_CSR);
1074
1075 spin_unlock_bh(&host->lock);
1076
1077 return csr & WBSD_WRPT;
1078}
1079
85bcc130
PO
1080static struct mmc_host_ops wbsd_ops = {
1081 .request = wbsd_request,
1082 .set_ios = wbsd_set_ios,
65ae2118 1083 .get_ro = wbsd_get_ro,
85bcc130
PO
1084};
1085
1086/*****************************************************************************\
1087 * *
1088 * Interrupt handling *
1089 * *
1090\*****************************************************************************/
1091
1656fa57
PO
1092/*
1093 * Helper function to reset detection ignore
1094 */
1095
1096static void wbsd_reset_ignore(unsigned long data)
1097{
1098 struct wbsd_host *host = (struct wbsd_host*)data;
1099
1100 BUG_ON(host == NULL);
1101
1102 DBG("Resetting card detection ignore\n");
1103
1104 spin_lock_bh(&host->lock);
1105
1106 host->flags &= ~WBSD_FIGNORE_DETECT;
1107
1108 /*
1109 * Card status might have changed during the
1110 * blackout.
1111 */
1112 tasklet_schedule(&host->card_tasklet);
1113
1114 spin_unlock_bh(&host->lock);
1115}
1116
1da177e4
LT
1117/*
1118 * Tasklets
1119 */
1120
77933d72 1121static inline struct mmc_data* wbsd_get_data(struct wbsd_host* host)
1da177e4
LT
1122{
1123 WARN_ON(!host->mrq);
1124 if (!host->mrq)
1125 return NULL;
1126
1127 WARN_ON(!host->mrq->cmd);
1128 if (!host->mrq->cmd)
1129 return NULL;
1130
1131 WARN_ON(!host->mrq->cmd->data);
1132 if (!host->mrq->cmd->data)
1133 return NULL;
fecf92ba 1134
1da177e4
LT
1135 return host->mrq->cmd->data;
1136}
1137
1138static void wbsd_tasklet_card(unsigned long param)
1139{
1140 struct wbsd_host* host = (struct wbsd_host*)param;
1141 u8 csr;
210ce2a7 1142 int delay = -1;
fecf92ba 1143
1da177e4 1144 spin_lock(&host->lock);
fecf92ba 1145
85bcc130
PO
1146 if (host->flags & WBSD_FIGNORE_DETECT)
1147 {
1148 spin_unlock(&host->lock);
1149 return;
1150 }
fecf92ba 1151
1da177e4
LT
1152 csr = inb(host->base + WBSD_CSR);
1153 WARN_ON(csr == 0xff);
fecf92ba 1154
1da177e4 1155 if (csr & WBSD_CARDPRESENT)
85bcc130
PO
1156 {
1157 if (!(host->flags & WBSD_FCARD_PRESENT))
1158 {
1159 DBG("Card inserted\n");
1160 host->flags |= WBSD_FCARD_PRESENT;
fecf92ba 1161
210ce2a7 1162 delay = 500;
85bcc130
PO
1163 }
1164 }
1165 else if (host->flags & WBSD_FCARD_PRESENT)
1da177e4
LT
1166 {
1167 DBG("Card removed\n");
85bcc130 1168 host->flags &= ~WBSD_FCARD_PRESENT;
fecf92ba 1169
1da177e4
LT
1170 if (host->mrq)
1171 {
1172 printk(KERN_ERR DRIVER_NAME
1173 ": Card removed during transfer!\n");
1174 wbsd_reset(host);
fecf92ba 1175
1da177e4
LT
1176 host->mrq->cmd->error = MMC_ERR_FAILED;
1177 tasklet_schedule(&host->finish_tasklet);
1178 }
fecf92ba 1179
210ce2a7 1180 delay = 0;
6e6293dd 1181 }
210ce2a7
PO
1182
1183 /*
1184 * Unlock first since we might get a call back.
1185 */
1186
1187 spin_unlock(&host->lock);
1188
1189 if (delay != -1)
1190 mmc_detect_change(host->mmc, msecs_to_jiffies(delay));
1da177e4
LT
1191}
1192
1193static void wbsd_tasklet_fifo(unsigned long param)
1194{
1195 struct wbsd_host* host = (struct wbsd_host*)param;
1196 struct mmc_data* data;
fecf92ba 1197
1da177e4 1198 spin_lock(&host->lock);
fecf92ba 1199
1da177e4
LT
1200 if (!host->mrq)
1201 goto end;
fecf92ba 1202
1da177e4
LT
1203 data = wbsd_get_data(host);
1204 if (!data)
1205 goto end;
1206
1207 if (data->flags & MMC_DATA_WRITE)
1208 wbsd_fill_fifo(host);
1209 else
1210 wbsd_empty_fifo(host);
1211
1212 /*
1213 * Done?
1214 */
1215 if (host->size == data->bytes_xfered)
1216 {
1217 wbsd_write_index(host, WBSD_IDX_FIFOEN, 0);
1218 tasklet_schedule(&host->finish_tasklet);
1219 }
1220
fecf92ba 1221end:
1da177e4
LT
1222 spin_unlock(&host->lock);
1223}
1224
1225static void wbsd_tasklet_crc(unsigned long param)
1226{
1227 struct wbsd_host* host = (struct wbsd_host*)param;
1228 struct mmc_data* data;
fecf92ba 1229
1da177e4 1230 spin_lock(&host->lock);
fecf92ba 1231
1da177e4
LT
1232 if (!host->mrq)
1233 goto end;
fecf92ba 1234
1da177e4
LT
1235 data = wbsd_get_data(host);
1236 if (!data)
1237 goto end;
fecf92ba 1238
1da177e4
LT
1239 DBGF("CRC error\n");
1240
1241 data->error = MMC_ERR_BADCRC;
fecf92ba 1242
1da177e4
LT
1243 tasklet_schedule(&host->finish_tasklet);
1244
fecf92ba 1245end:
1da177e4
LT
1246 spin_unlock(&host->lock);
1247}
1248
1249static void wbsd_tasklet_timeout(unsigned long param)
1250{
1251 struct wbsd_host* host = (struct wbsd_host*)param;
1252 struct mmc_data* data;
fecf92ba 1253
1da177e4 1254 spin_lock(&host->lock);
fecf92ba 1255
1da177e4
LT
1256 if (!host->mrq)
1257 goto end;
fecf92ba 1258
1da177e4
LT
1259 data = wbsd_get_data(host);
1260 if (!data)
1261 goto end;
fecf92ba 1262
1da177e4
LT
1263 DBGF("Timeout\n");
1264
1265 data->error = MMC_ERR_TIMEOUT;
fecf92ba 1266
1da177e4
LT
1267 tasklet_schedule(&host->finish_tasklet);
1268
fecf92ba 1269end:
1da177e4
LT
1270 spin_unlock(&host->lock);
1271}
1272
1273static void wbsd_tasklet_finish(unsigned long param)
1274{
1275 struct wbsd_host* host = (struct wbsd_host*)param;
1276 struct mmc_data* data;
fecf92ba 1277
1da177e4 1278 spin_lock(&host->lock);
fecf92ba 1279
1da177e4
LT
1280 WARN_ON(!host->mrq);
1281 if (!host->mrq)
1282 goto end;
fecf92ba 1283
1da177e4
LT
1284 data = wbsd_get_data(host);
1285 if (!data)
1286 goto end;
1287
1288 wbsd_finish_data(host, data);
fecf92ba
PO
1289
1290end:
1da177e4
LT
1291 spin_unlock(&host->lock);
1292}
1293
1294static void wbsd_tasklet_block(unsigned long param)
1295{
1296 struct wbsd_host* host = (struct wbsd_host*)param;
1297 struct mmc_data* data;
fecf92ba 1298
1da177e4
LT
1299 spin_lock(&host->lock);
1300
1301 if ((wbsd_read_index(host, WBSD_IDX_CRCSTATUS) & WBSD_CRC_MASK) !=
1302 WBSD_CRC_OK)
1303 {
1304 data = wbsd_get_data(host);
1305 if (!data)
1306 goto end;
fecf92ba 1307
1da177e4
LT
1308 DBGF("CRC error\n");
1309
1310 data->error = MMC_ERR_BADCRC;
fecf92ba 1311
1da177e4
LT
1312 tasklet_schedule(&host->finish_tasklet);
1313 }
1314
fecf92ba 1315end:
1da177e4
LT
1316 spin_unlock(&host->lock);
1317}
1318
1319/*
1320 * Interrupt handling
1321 */
1322
1323static irqreturn_t wbsd_irq(int irq, void *dev_id, struct pt_regs *regs)
1324{
1325 struct wbsd_host* host = dev_id;
1326 int isr;
fecf92ba 1327
1da177e4
LT
1328 isr = inb(host->base + WBSD_ISR);
1329
1330 /*
1331 * Was it actually our hardware that caused the interrupt?
1332 */
1333 if (isr == 0xff || isr == 0x00)
1334 return IRQ_NONE;
fecf92ba 1335
1da177e4
LT
1336 host->isr |= isr;
1337
1338 /*
1339 * Schedule tasklets as needed.
1340 */
1341 if (isr & WBSD_INT_CARD)
1342 tasklet_schedule(&host->card_tasklet);
1343 if (isr & WBSD_INT_FIFO_THRE)
1344 tasklet_schedule(&host->fifo_tasklet);
1345 if (isr & WBSD_INT_CRC)
1346 tasklet_hi_schedule(&host->crc_tasklet);
1347 if (isr & WBSD_INT_TIMEOUT)
1348 tasklet_hi_schedule(&host->timeout_tasklet);
1349 if (isr & WBSD_INT_BUSYEND)
1350 tasklet_hi_schedule(&host->block_tasklet);
1351 if (isr & WBSD_INT_TC)
1352 tasklet_schedule(&host->finish_tasklet);
fecf92ba 1353
1da177e4
LT
1354 return IRQ_HANDLED;
1355}
1356
85bcc130
PO
1357/*****************************************************************************\
1358 * *
1359 * Device initialisation and shutdown *
1360 * *
1361\*****************************************************************************/
1362
1da177e4 1363/*
85bcc130 1364 * Allocate/free MMC structure.
1da177e4
LT
1365 */
1366
85bcc130
PO
1367static int __devinit wbsd_alloc_mmc(struct device* dev)
1368{
1369 struct mmc_host* mmc;
1370 struct wbsd_host* host;
fecf92ba 1371
85bcc130
PO
1372 /*
1373 * Allocate MMC structure.
1374 */
1375 mmc = mmc_alloc_host(sizeof(struct wbsd_host), dev);
1376 if (!mmc)
1377 return -ENOMEM;
fecf92ba 1378
85bcc130
PO
1379 host = mmc_priv(mmc);
1380 host->mmc = mmc;
1381
1382 host->dma = -1;
1383
1384 /*
1385 * Set host parameters.
1386 */
1387 mmc->ops = &wbsd_ops;
1388 mmc->f_min = 375000;
1389 mmc->f_max = 24000000;
1390 mmc->ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34;
65ae2118 1391 mmc->caps = MMC_CAP_4_BIT_DATA;
fecf92ba 1392
85bcc130 1393 spin_lock_init(&host->lock);
fecf92ba 1394
6e6293dd 1395 /*
1656fa57 1396 * Set up timers
6e6293dd 1397 */
1656fa57
PO
1398 init_timer(&host->ignore_timer);
1399 host->ignore_timer.data = (unsigned long)host;
1400 host->ignore_timer.function = wbsd_reset_ignore;
fecf92ba 1401
85bcc130
PO
1402 /*
1403 * Maximum number of segments. Worst case is one sector per segment
1404 * so this will be 64kB/512.
1405 */
1406 mmc->max_hw_segs = 128;
1407 mmc->max_phys_segs = 128;
fecf92ba 1408
85bcc130
PO
1409 /*
1410 * Maximum number of sectors in one transfer. Also limited by 64kB
1411 * buffer.
1412 */
1413 mmc->max_sectors = 128;
fecf92ba 1414
85bcc130
PO
1415 /*
1416 * Maximum segment size. Could be one segment with the maximum number
1417 * of segments.
1418 */
1419 mmc->max_seg_size = mmc->max_sectors * 512;
fecf92ba 1420
85bcc130 1421 dev_set_drvdata(dev, mmc);
fecf92ba 1422
85bcc130
PO
1423 return 0;
1424}
1425
1426static void __devexit wbsd_free_mmc(struct device* dev)
1427{
1428 struct mmc_host* mmc;
6e6293dd 1429 struct wbsd_host* host;
fecf92ba 1430
85bcc130
PO
1431 mmc = dev_get_drvdata(dev);
1432 if (!mmc)
1433 return;
fecf92ba 1434
6e6293dd
PO
1435 host = mmc_priv(mmc);
1436 BUG_ON(host == NULL);
fecf92ba 1437
1656fa57 1438 del_timer_sync(&host->ignore_timer);
fecf92ba 1439
85bcc130 1440 mmc_free_host(mmc);
fecf92ba 1441
85bcc130
PO
1442 dev_set_drvdata(dev, NULL);
1443}
1444
1445/*
1446 * Scan for known chip id:s
1447 */
1448
1449static int __devinit wbsd_scan(struct wbsd_host* host)
1da177e4
LT
1450{
1451 int i, j, k;
1452 int id;
fecf92ba 1453
1da177e4
LT
1454 /*
1455 * Iterate through all ports, all codes to
1456 * find hardware that is in our known list.
1457 */
1458 for (i = 0;i < sizeof(config_ports)/sizeof(int);i++)
1459 {
1460 if (!request_region(config_ports[i], 2, DRIVER_NAME))
1461 continue;
fecf92ba 1462
1da177e4
LT
1463 for (j = 0;j < sizeof(unlock_codes)/sizeof(int);j++)
1464 {
1465 id = 0xFFFF;
fecf92ba 1466
19c1f3ca
PO
1467 host->config = config_ports[i];
1468 host->unlock_code = unlock_codes[j];
1469
1470 wbsd_unlock_config(host);
fecf92ba 1471
1da177e4
LT
1472 outb(WBSD_CONF_ID_HI, config_ports[i]);
1473 id = inb(config_ports[i] + 1) << 8;
1474
1475 outb(WBSD_CONF_ID_LO, config_ports[i]);
1476 id |= inb(config_ports[i] + 1);
fecf92ba 1477
19c1f3ca
PO
1478 wbsd_lock_config(host);
1479
1da177e4
LT
1480 for (k = 0;k < sizeof(valid_ids)/sizeof(int);k++)
1481 {
1482 if (id == valid_ids[k])
fecf92ba 1483 {
1da177e4 1484 host->chip_id = id;
fecf92ba 1485
1da177e4
LT
1486 return 0;
1487 }
1488 }
fecf92ba 1489
1da177e4
LT
1490 if (id != 0xFFFF)
1491 {
1492 DBG("Unknown hardware (id %x) found at %x\n",
1493 id, config_ports[i]);
1494 }
1da177e4 1495 }
fecf92ba 1496
1da177e4
LT
1497 release_region(config_ports[i], 2);
1498 }
fecf92ba 1499
19c1f3ca
PO
1500 host->config = 0;
1501 host->unlock_code = 0;
1502
1da177e4
LT
1503 return -ENODEV;
1504}
1505
85bcc130
PO
1506/*
1507 * Allocate/free io port ranges
1508 */
1509
1510static int __devinit wbsd_request_region(struct wbsd_host* host, int base)
1da177e4
LT
1511{
1512 if (io & 0x7)
1513 return -EINVAL;
fecf92ba 1514
85bcc130 1515 if (!request_region(base, 8, DRIVER_NAME))
1da177e4 1516 return -EIO;
fecf92ba 1517
1da177e4 1518 host->base = io;
fecf92ba 1519
1da177e4
LT
1520 return 0;
1521}
1522
85bcc130 1523static void __devexit wbsd_release_regions(struct wbsd_host* host)
1da177e4
LT
1524{
1525 if (host->base)
1526 release_region(host->base, 8);
fecf92ba 1527
85bcc130 1528 host->base = 0;
1da177e4
LT
1529
1530 if (host->config)
1531 release_region(host->config, 2);
fecf92ba 1532
85bcc130 1533 host->config = 0;
1da177e4
LT
1534}
1535
85bcc130
PO
1536/*
1537 * Allocate/free DMA port and buffer
1538 */
1539
1540static void __devinit wbsd_request_dma(struct wbsd_host* host, int dma)
1da177e4 1541{
1da177e4
LT
1542 if (dma < 0)
1543 return;
fecf92ba 1544
1da177e4
LT
1545 if (request_dma(dma, DRIVER_NAME))
1546 goto err;
fecf92ba 1547
1da177e4
LT
1548 /*
1549 * We need to allocate a special buffer in
1550 * order for ISA to be able to DMA to it.
1551 */
85bcc130 1552 host->dma_buffer = kmalloc(WBSD_DMA_SIZE,
1da177e4
LT
1553 GFP_NOIO | GFP_DMA | __GFP_REPEAT | __GFP_NOWARN);
1554 if (!host->dma_buffer)
1555 goto free;
1556
1557 /*
1558 * Translate the address to a physical address.
1559 */
85bcc130
PO
1560 host->dma_addr = dma_map_single(host->mmc->dev, host->dma_buffer,
1561 WBSD_DMA_SIZE, DMA_BIDIRECTIONAL);
fecf92ba 1562
1da177e4
LT
1563 /*
1564 * ISA DMA must be aligned on a 64k basis.
1565 */
1566 if ((host->dma_addr & 0xffff) != 0)
1567 goto kfree;
1568 /*
1569 * ISA cannot access memory above 16 MB.
1570 */
1571 else if (host->dma_addr >= 0x1000000)
1572 goto kfree;
1573
1574 host->dma = dma;
fecf92ba 1575
1da177e4 1576 return;
fecf92ba 1577
1da177e4
LT
1578kfree:
1579 /*
1580 * If we've gotten here then there is some kind of alignment bug
1581 */
1582 BUG_ON(1);
fecf92ba 1583
85bcc130
PO
1584 dma_unmap_single(host->mmc->dev, host->dma_addr, WBSD_DMA_SIZE,
1585 DMA_BIDIRECTIONAL);
1586 host->dma_addr = (dma_addr_t)NULL;
fecf92ba 1587
1da177e4
LT
1588 kfree(host->dma_buffer);
1589 host->dma_buffer = NULL;
1590
1591free:
1592 free_dma(dma);
1593
1594err:
1595 printk(KERN_WARNING DRIVER_NAME ": Unable to allocate DMA %d. "
1596 "Falling back on FIFO.\n", dma);
1597}
1598
85bcc130
PO
1599static void __devexit wbsd_release_dma(struct wbsd_host* host)
1600{
1601 if (host->dma_addr)
1602 dma_unmap_single(host->mmc->dev, host->dma_addr, WBSD_DMA_SIZE,
1603 DMA_BIDIRECTIONAL);
1604 if (host->dma_buffer)
1605 kfree(host->dma_buffer);
1606 if (host->dma >= 0)
1607 free_dma(host->dma);
fecf92ba 1608
85bcc130
PO
1609 host->dma = -1;
1610 host->dma_buffer = NULL;
1611 host->dma_addr = (dma_addr_t)NULL;
1612}
1da177e4
LT
1613
1614/*
85bcc130 1615 * Allocate/free IRQ.
1da177e4
LT
1616 */
1617
85bcc130 1618static int __devinit wbsd_request_irq(struct wbsd_host* host, int irq)
1da177e4 1619{
1da177e4 1620 int ret;
fecf92ba 1621
1da177e4 1622 /*
85bcc130 1623 * Allocate interrupt.
1da177e4 1624 */
85bcc130
PO
1625
1626 ret = request_irq(irq, wbsd_irq, SA_SHIRQ, DRIVER_NAME, host);
1627 if (ret)
1628 return ret;
fecf92ba 1629
85bcc130
PO
1630 host->irq = irq;
1631
1da177e4 1632 /*
85bcc130 1633 * Set up tasklets.
1da177e4 1634 */
85bcc130
PO
1635 tasklet_init(&host->card_tasklet, wbsd_tasklet_card, (unsigned long)host);
1636 tasklet_init(&host->fifo_tasklet, wbsd_tasklet_fifo, (unsigned long)host);
1637 tasklet_init(&host->crc_tasklet, wbsd_tasklet_crc, (unsigned long)host);
1638 tasklet_init(&host->timeout_tasklet, wbsd_tasklet_timeout, (unsigned long)host);
1639 tasklet_init(&host->finish_tasklet, wbsd_tasklet_finish, (unsigned long)host);
1640 tasklet_init(&host->block_tasklet, wbsd_tasklet_block, (unsigned long)host);
fecf92ba 1641
85bcc130
PO
1642 return 0;
1643}
1da177e4 1644
85bcc130
PO
1645static void __devexit wbsd_release_irq(struct wbsd_host* host)
1646{
1647 if (!host->irq)
1648 return;
1da177e4 1649
85bcc130 1650 free_irq(host->irq, host);
fecf92ba 1651
85bcc130 1652 host->irq = 0;
fecf92ba 1653
85bcc130
PO
1654 tasklet_kill(&host->card_tasklet);
1655 tasklet_kill(&host->fifo_tasklet);
1656 tasklet_kill(&host->crc_tasklet);
1657 tasklet_kill(&host->timeout_tasklet);
1658 tasklet_kill(&host->finish_tasklet);
1659 tasklet_kill(&host->block_tasklet);
1660}
1661
1662/*
1663 * Allocate all resources for the host.
1664 */
1665
1666static int __devinit wbsd_request_resources(struct wbsd_host* host,
1667 int base, int irq, int dma)
1668{
1669 int ret;
fecf92ba 1670
1da177e4
LT
1671 /*
1672 * Allocate I/O ports.
1673 */
85bcc130 1674 ret = wbsd_request_region(host, base);
1da177e4 1675 if (ret)
85bcc130 1676 return ret;
1da177e4
LT
1677
1678 /*
85bcc130 1679 * Allocate interrupt.
1da177e4 1680 */
85bcc130
PO
1681 ret = wbsd_request_irq(host, irq);
1682 if (ret)
1683 return ret;
1684
1685 /*
1686 * Allocate DMA.
1687 */
1688 wbsd_request_dma(host, dma);
fecf92ba 1689
85bcc130
PO
1690 return 0;
1691}
1692
1693/*
1694 * Release all resources for the host.
1695 */
1696
1697static void __devexit wbsd_release_resources(struct wbsd_host* host)
1698{
1699 wbsd_release_dma(host);
1700 wbsd_release_irq(host);
1701 wbsd_release_regions(host);
1702}
1703
1704/*
1705 * Configure the resources the chip should use.
1706 */
1707
19c1f3ca 1708static void wbsd_chip_config(struct wbsd_host* host)
85bcc130 1709{
19c1f3ca
PO
1710 wbsd_unlock_config(host);
1711
85bcc130
PO
1712 /*
1713 * Reset the chip.
fecf92ba 1714 */
85bcc130
PO
1715 wbsd_write_config(host, WBSD_CONF_SWRST, 1);
1716 wbsd_write_config(host, WBSD_CONF_SWRST, 0);
1da177e4
LT
1717
1718 /*
1719 * Select SD/MMC function.
1720 */
1721 wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD);
fecf92ba 1722
1da177e4
LT
1723 /*
1724 * Set up card detection.
1725 */
85bcc130 1726 wbsd_write_config(host, WBSD_CONF_PINS, WBSD_PINS_DETECT_GP11);
fecf92ba 1727
1da177e4 1728 /*
85bcc130 1729 * Configure chip
1da177e4
LT
1730 */
1731 wbsd_write_config(host, WBSD_CONF_PORT_HI, host->base >> 8);
1732 wbsd_write_config(host, WBSD_CONF_PORT_LO, host->base & 0xff);
fecf92ba 1733
85bcc130 1734 wbsd_write_config(host, WBSD_CONF_IRQ, host->irq);
fecf92ba 1735
85bcc130
PO
1736 if (host->dma >= 0)
1737 wbsd_write_config(host, WBSD_CONF_DRQ, host->dma);
fecf92ba 1738
1da177e4 1739 /*
85bcc130 1740 * Enable and power up chip.
1da177e4 1741 */
85bcc130
PO
1742 wbsd_write_config(host, WBSD_CONF_ENABLE, 1);
1743 wbsd_write_config(host, WBSD_CONF_POWER, 0x20);
19c1f3ca
PO
1744
1745 wbsd_lock_config(host);
85bcc130
PO
1746}
1747
1748/*
1749 * Check that configured resources are correct.
1750 */
fecf92ba 1751
19c1f3ca 1752static int wbsd_chip_validate(struct wbsd_host* host)
85bcc130
PO
1753{
1754 int base, irq, dma;
fecf92ba 1755
19c1f3ca
PO
1756 wbsd_unlock_config(host);
1757
1da177e4 1758 /*
85bcc130 1759 * Select SD/MMC function.
1da177e4 1760 */
85bcc130 1761 wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD);
fecf92ba 1762
1da177e4 1763 /*
85bcc130 1764 * Read configuration.
1da177e4 1765 */
85bcc130
PO
1766 base = wbsd_read_config(host, WBSD_CONF_PORT_HI) << 8;
1767 base |= wbsd_read_config(host, WBSD_CONF_PORT_LO);
fecf92ba 1768
85bcc130 1769 irq = wbsd_read_config(host, WBSD_CONF_IRQ);
fecf92ba 1770
85bcc130 1771 dma = wbsd_read_config(host, WBSD_CONF_DRQ);
fecf92ba 1772
19c1f3ca
PO
1773 wbsd_lock_config(host);
1774
1da177e4 1775 /*
85bcc130 1776 * Validate against given configuration.
1da177e4 1777 */
85bcc130
PO
1778 if (base != host->base)
1779 return 0;
1780 if (irq != host->irq)
1781 return 0;
1782 if ((dma != host->dma) && (host->dma != -1))
1783 return 0;
fecf92ba 1784
85bcc130
PO
1785 return 1;
1786}
1787
19c1f3ca
PO
1788/*
1789 * Powers down the SD function
1790 */
1791
1792static void wbsd_chip_poweroff(struct wbsd_host* host)
1793{
1794 wbsd_unlock_config(host);
1795
1796 wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD);
1797 wbsd_write_config(host, WBSD_CONF_ENABLE, 0);
1798
1799 wbsd_lock_config(host);
1800}
1801
85bcc130
PO
1802/*****************************************************************************\
1803 * *
1804 * Devices setup and shutdown *
1805 * *
1806\*****************************************************************************/
1807
1808static int __devinit wbsd_init(struct device* dev, int base, int irq, int dma,
1809 int pnp)
1810{
1811 struct wbsd_host* host = NULL;
1812 struct mmc_host* mmc = NULL;
1813 int ret;
fecf92ba 1814
85bcc130
PO
1815 ret = wbsd_alloc_mmc(dev);
1816 if (ret)
1817 return ret;
fecf92ba 1818
85bcc130
PO
1819 mmc = dev_get_drvdata(dev);
1820 host = mmc_priv(mmc);
fecf92ba 1821
1da177e4 1822 /*
85bcc130 1823 * Scan for hardware.
1da177e4 1824 */
85bcc130
PO
1825 ret = wbsd_scan(host);
1826 if (ret)
1827 {
1828 if (pnp && (ret == -ENODEV))
1829 {
1830 printk(KERN_WARNING DRIVER_NAME
1831 ": Unable to confirm device presence. You may "
1832 "experience lock-ups.\n");
1833 }
1834 else
1835 {
1836 wbsd_free_mmc(dev);
1837 return ret;
1838 }
1839 }
fecf92ba 1840
1da177e4 1841 /*
85bcc130 1842 * Request resources.
1da177e4 1843 */
85bcc130
PO
1844 ret = wbsd_request_resources(host, io, irq, dma);
1845 if (ret)
1846 {
1847 wbsd_release_resources(host);
1848 wbsd_free_mmc(dev);
1849 return ret;
1850 }
fecf92ba 1851
1da177e4 1852 /*
85bcc130 1853 * See if chip needs to be configured.
1da177e4 1854 */
25cc5e5b 1855 if (pnp)
85bcc130 1856 {
25cc5e5b 1857 if ((host->config != 0) && !wbsd_chip_validate(host))
85bcc130
PO
1858 {
1859 printk(KERN_WARNING DRIVER_NAME
1860 ": PnP active but chip not configured! "
1861 "You probably have a buggy BIOS. "
1862 "Configuring chip manually.\n");
1863 wbsd_chip_config(host);
1864 }
1865 }
1866 else
1867 wbsd_chip_config(host);
fecf92ba 1868
1da177e4
LT
1869 /*
1870 * Power Management stuff. No idea how this works.
1871 * Not tested.
1872 */
1873#ifdef CONFIG_PM
85bcc130 1874 if (host->config)
19c1f3ca
PO
1875 {
1876 wbsd_unlock_config(host);
85bcc130 1877 wbsd_write_config(host, WBSD_CONF_PME, 0xA0);
19c1f3ca
PO
1878 wbsd_lock_config(host);
1879 }
1da177e4 1880#endif
85bcc130
PO
1881 /*
1882 * Allow device to initialise itself properly.
1883 */
1884 mdelay(5);
1da177e4
LT
1885
1886 /*
1887 * Reset the chip into a known state.
1888 */
1889 wbsd_init_device(host);
fecf92ba 1890
1da177e4
LT
1891 mmc_add_host(mmc);
1892
d366b643 1893 printk(KERN_INFO "%s: W83L51xD", mmc_hostname(mmc));
85bcc130
PO
1894 if (host->chip_id != 0)
1895 printk(" id %x", (int)host->chip_id);
1896 printk(" at 0x%x irq %d", (int)host->base, (int)host->irq);
1897 if (host->dma >= 0)
1898 printk(" dma %d", (int)host->dma);
1899 else
1900 printk(" FIFO");
1901 if (pnp)
1902 printk(" PnP");
1903 printk("\n");
1da177e4
LT
1904
1905 return 0;
1da177e4
LT
1906}
1907
85bcc130 1908static void __devexit wbsd_shutdown(struct device* dev, int pnp)
1da177e4
LT
1909{
1910 struct mmc_host* mmc = dev_get_drvdata(dev);
1911 struct wbsd_host* host;
fecf92ba 1912
1da177e4 1913 if (!mmc)
85bcc130 1914 return;
1da177e4
LT
1915
1916 host = mmc_priv(mmc);
fecf92ba 1917
1da177e4
LT
1918 mmc_remove_host(mmc);
1919
19c1f3ca
PO
1920 /*
1921 * Power down the SD/MMC function.
1922 */
85bcc130 1923 if (!pnp)
19c1f3ca 1924 wbsd_chip_poweroff(host);
fecf92ba 1925
85bcc130 1926 wbsd_release_resources(host);
fecf92ba 1927
85bcc130
PO
1928 wbsd_free_mmc(dev);
1929}
1da177e4 1930
85bcc130
PO
1931/*
1932 * Non-PnP
1933 */
1934
1935static int __devinit wbsd_probe(struct device* dev)
1936{
1937 return wbsd_init(dev, io, irq, dma, 0);
1938}
1939
1940static int __devexit wbsd_remove(struct device* dev)
1941{
1942 wbsd_shutdown(dev, 0);
1943
1944 return 0;
1945}
1946
1947/*
1948 * PnP
1949 */
1950
1951#ifdef CONFIG_PNP
1952
1953static int __devinit
1954wbsd_pnp_probe(struct pnp_dev * pnpdev, const struct pnp_device_id *dev_id)
1955{
1956 int io, irq, dma;
fecf92ba 1957
85bcc130
PO
1958 /*
1959 * Get resources from PnP layer.
1960 */
1961 io = pnp_port_start(pnpdev, 0);
1962 irq = pnp_irq(pnpdev, 0);
1963 if (pnp_dma_valid(pnpdev, 0))
1964 dma = pnp_dma(pnpdev, 0);
1965 else
1966 dma = -1;
fecf92ba 1967
85bcc130 1968 DBGF("PnP resources: port %3x irq %d dma %d\n", io, irq, dma);
fecf92ba 1969
85bcc130
PO
1970 return wbsd_init(&pnpdev->dev, io, irq, dma, 1);
1971}
1da177e4 1972
85bcc130
PO
1973static void __devexit wbsd_pnp_remove(struct pnp_dev * dev)
1974{
1975 wbsd_shutdown(&dev->dev, 1);
1da177e4
LT
1976}
1977
85bcc130
PO
1978#endif /* CONFIG_PNP */
1979
1da177e4
LT
1980/*
1981 * Power management
1982 */
1983
1984#ifdef CONFIG_PM
19c1f3ca 1985
9480e307 1986static int wbsd_suspend(struct device *dev, pm_message_t state)
1da177e4 1987{
19c1f3ca
PO
1988 struct mmc_host *mmc = dev_get_drvdata(dev);
1989 struct wbsd_host *host;
1990 int ret;
1991
1992 if (!mmc)
1993 return 0;
1994
1995 DBG("Suspending...\n");
1996
1997 ret = mmc_suspend_host(mmc, state);
1998 if (!ret)
1999 return ret;
2000
2001 host = mmc_priv(mmc);
2002
2003 wbsd_chip_poweroff(host);
1da177e4
LT
2004
2005 return 0;
2006}
2007
9480e307 2008static int wbsd_resume(struct device *dev)
1da177e4 2009{
19c1f3ca
PO
2010 struct mmc_host *mmc = dev_get_drvdata(dev);
2011 struct wbsd_host *host;
1da177e4 2012
19c1f3ca
PO
2013 if (!mmc)
2014 return 0;
2015
2016 DBG("Resuming...\n");
2017
2018 host = mmc_priv(mmc);
2019
2020 wbsd_chip_config(host);
2021
2022 /*
2023 * Allow device to initialise itself properly.
2024 */
2025 mdelay(5);
2026
2027 wbsd_init_device(host);
2028
2029 return mmc_resume_host(mmc);
1da177e4 2030}
19c1f3ca
PO
2031
2032#else /* CONFIG_PM */
2033
1da177e4
LT
2034#define wbsd_suspend NULL
2035#define wbsd_resume NULL
19c1f3ca
PO
2036
2037#endif /* CONFIG_PM */
1da177e4 2038
85bcc130 2039static struct platform_device *wbsd_device;
1da177e4
LT
2040
2041static struct device_driver wbsd_driver = {
2042 .name = DRIVER_NAME,
2043 .bus = &platform_bus_type,
2044 .probe = wbsd_probe,
2045 .remove = wbsd_remove,
fecf92ba 2046
1da177e4
LT
2047 .suspend = wbsd_suspend,
2048 .resume = wbsd_resume,
2049};
2050
85bcc130
PO
2051#ifdef CONFIG_PNP
2052
2053static struct pnp_driver wbsd_pnp_driver = {
2054 .name = DRIVER_NAME,
2055 .id_table = pnp_dev_table,
2056 .probe = wbsd_pnp_probe,
2057 .remove = wbsd_pnp_remove,
2058};
2059
2060#endif /* CONFIG_PNP */
2061
1da177e4
LT
2062/*
2063 * Module loading/unloading
2064 */
2065
2066static int __init wbsd_drv_init(void)
2067{
2068 int result;
fecf92ba 2069
1da177e4
LT
2070 printk(KERN_INFO DRIVER_NAME
2071 ": Winbond W83L51xD SD/MMC card interface driver, "
2072 DRIVER_VERSION "\n");
2073 printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
1da177e4 2074
85bcc130
PO
2075#ifdef CONFIG_PNP
2076
2077 if (!nopnp)
2078 {
2079 result = pnp_register_driver(&wbsd_pnp_driver);
2080 if (result < 0)
2081 return result;
2082 }
2083
fecf92ba
PO
2084#endif /* CONFIG_PNP */
2085
85bcc130
PO
2086 if (nopnp)
2087 {
2088 result = driver_register(&wbsd_driver);
2089 if (result < 0)
2090 return result;
2091
2092 wbsd_device = platform_device_register_simple(DRIVER_NAME, -1,
2093 NULL, 0);
2094 if (IS_ERR(wbsd_device))
2095 return PTR_ERR(wbsd_device);
2096 }
1da177e4
LT
2097
2098 return 0;
2099}
2100
2101static void __exit wbsd_drv_exit(void)
2102{
85bcc130
PO
2103#ifdef CONFIG_PNP
2104
2105 if (!nopnp)
2106 pnp_unregister_driver(&wbsd_pnp_driver);
fecf92ba
PO
2107
2108#endif /* CONFIG_PNP */
85bcc130
PO
2109
2110 if (nopnp)
2111 {
2112 platform_device_unregister(wbsd_device);
fecf92ba 2113
85bcc130
PO
2114 driver_unregister(&wbsd_driver);
2115 }
1da177e4
LT
2116
2117 DBG("unloaded\n");
2118}
2119
2120module_init(wbsd_drv_init);
2121module_exit(wbsd_drv_exit);
85bcc130
PO
2122#ifdef CONFIG_PNP
2123module_param(nopnp, uint, 0444);
2124#endif
1da177e4
LT
2125module_param(io, uint, 0444);
2126module_param(irq, uint, 0444);
2127module_param(dma, int, 0444);
2128
2129MODULE_LICENSE("GPL");
2130MODULE_DESCRIPTION("Winbond W83L51xD SD/MMC card interface driver");
2131MODULE_VERSION(DRIVER_VERSION);
2132
85bcc130
PO
2133#ifdef CONFIG_PNP
2134MODULE_PARM_DESC(nopnp, "Scan for device instead of relying on PNP. (default 0)");
2135#endif
1da177e4
LT
2136MODULE_PARM_DESC(io, "I/O base to allocate. Must be 8 byte aligned. (default 0x248)");
2137MODULE_PARM_DESC(irq, "IRQ to allocate. (default 6)");
2138MODULE_PARM_DESC(dma, "DMA channel to allocate. -1 for no DMA. (default 2)");