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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/drivers/mmc/wbsd.c - Winbond W83L51xD SD/MMC driver | |
3 | * | |
14d836e7 | 4 | * Copyright (C) 2004-2007 Pierre Ossman, All Rights Reserved. |
1da177e4 LT |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
643f720c PO |
7 | * it under the terms of the GNU General Public License as published by |
8 | * the Free Software Foundation; either version 2 of the License, or (at | |
9 | * your option) any later version. | |
1da177e4 LT |
10 | * |
11 | * | |
12 | * Warning! | |
13 | * | |
14 | * Changes to the FIFO system should be done with extreme care since | |
15 | * the hardware is full of bugs related to the FIFO. Known issues are: | |
16 | * | |
17 | * - FIFO size field in FSR is always zero. | |
18 | * | |
19 | * - FIFO interrupts tend not to work as they should. Interrupts are | |
20 | * triggered only for full/empty events, not for threshold values. | |
21 | * | |
22 | * - On APIC systems the FIFO empty interrupt is sometimes lost. | |
23 | */ | |
24 | ||
1da177e4 LT |
25 | #include <linux/module.h> |
26 | #include <linux/moduleparam.h> | |
27 | #include <linux/init.h> | |
28 | #include <linux/ioport.h> | |
d052d1be | 29 | #include <linux/platform_device.h> |
1da177e4 | 30 | #include <linux/interrupt.h> |
85bcc130 | 31 | #include <linux/dma-mapping.h> |
1da177e4 | 32 | #include <linux/delay.h> |
85bcc130 | 33 | #include <linux/pnp.h> |
1da177e4 LT |
34 | #include <linux/highmem.h> |
35 | #include <linux/mmc/host.h> | |
36 | #include <linux/mmc/protocol.h> | |
37 | ||
38 | #include <asm/io.h> | |
39 | #include <asm/dma.h> | |
40 | #include <asm/scatterlist.h> | |
41 | ||
42 | #include "wbsd.h" | |
43 | ||
44 | #define DRIVER_NAME "wbsd" | |
1da177e4 | 45 | |
1da177e4 | 46 | #define DBG(x...) \ |
c6563178 | 47 | pr_debug(DRIVER_NAME ": " x) |
1da177e4 | 48 | #define DBGF(f, x...) \ |
c6563178 | 49 | pr_debug(DRIVER_NAME " [%s()]: " f, __func__ , ##x) |
1da177e4 | 50 | |
85bcc130 PO |
51 | /* |
52 | * Device resources | |
53 | */ | |
54 | ||
55 | #ifdef CONFIG_PNP | |
56 | ||
57 | static const struct pnp_device_id pnp_dev_table[] = { | |
58 | { "WEC0517", 0 }, | |
59 | { "WEC0518", 0 }, | |
60 | { "", 0 }, | |
61 | }; | |
62 | ||
63 | MODULE_DEVICE_TABLE(pnp, pnp_dev_table); | |
64 | ||
65 | #endif /* CONFIG_PNP */ | |
66 | ||
3eee0d03 AB |
67 | static const int config_ports[] = { 0x2E, 0x4E }; |
68 | static const int unlock_codes[] = { 0x83, 0x87 }; | |
69 | ||
70 | static const int valid_ids[] = { | |
71 | 0x7112, | |
72 | }; | |
73 | ||
85bcc130 PO |
74 | #ifdef CONFIG_PNP |
75 | static unsigned int nopnp = 0; | |
76 | #else | |
77 | static const unsigned int nopnp = 1; | |
78 | #endif | |
79 | static unsigned int io = 0x248; | |
80 | static unsigned int irq = 6; | |
81 | static int dma = 2; | |
82 | ||
1da177e4 LT |
83 | /* |
84 | * Basic functions | |
85 | */ | |
86 | ||
cfa7f521 | 87 | static inline void wbsd_unlock_config(struct wbsd_host *host) |
1da177e4 | 88 | { |
85bcc130 | 89 | BUG_ON(host->config == 0); |
fecf92ba | 90 | |
1da177e4 LT |
91 | outb(host->unlock_code, host->config); |
92 | outb(host->unlock_code, host->config); | |
93 | } | |
94 | ||
cfa7f521 | 95 | static inline void wbsd_lock_config(struct wbsd_host *host) |
1da177e4 | 96 | { |
85bcc130 | 97 | BUG_ON(host->config == 0); |
fecf92ba | 98 | |
1da177e4 LT |
99 | outb(LOCK_CODE, host->config); |
100 | } | |
101 | ||
cfa7f521 | 102 | static inline void wbsd_write_config(struct wbsd_host *host, u8 reg, u8 value) |
1da177e4 | 103 | { |
85bcc130 | 104 | BUG_ON(host->config == 0); |
fecf92ba | 105 | |
1da177e4 LT |
106 | outb(reg, host->config); |
107 | outb(value, host->config + 1); | |
108 | } | |
109 | ||
cfa7f521 | 110 | static inline u8 wbsd_read_config(struct wbsd_host *host, u8 reg) |
1da177e4 | 111 | { |
85bcc130 | 112 | BUG_ON(host->config == 0); |
fecf92ba | 113 | |
1da177e4 LT |
114 | outb(reg, host->config); |
115 | return inb(host->config + 1); | |
116 | } | |
117 | ||
cfa7f521 | 118 | static inline void wbsd_write_index(struct wbsd_host *host, u8 index, u8 value) |
1da177e4 LT |
119 | { |
120 | outb(index, host->base + WBSD_IDXR); | |
121 | outb(value, host->base + WBSD_DATAR); | |
122 | } | |
123 | ||
cfa7f521 | 124 | static inline u8 wbsd_read_index(struct wbsd_host *host, u8 index) |
1da177e4 LT |
125 | { |
126 | outb(index, host->base + WBSD_IDXR); | |
127 | return inb(host->base + WBSD_DATAR); | |
128 | } | |
129 | ||
130 | /* | |
131 | * Common routines | |
132 | */ | |
133 | ||
cfa7f521 | 134 | static void wbsd_init_device(struct wbsd_host *host) |
1da177e4 LT |
135 | { |
136 | u8 setup, ier; | |
fecf92ba | 137 | |
1da177e4 LT |
138 | /* |
139 | * Reset chip (SD/MMC part) and fifo. | |
140 | */ | |
141 | setup = wbsd_read_index(host, WBSD_IDX_SETUP); | |
142 | setup |= WBSD_FIFO_RESET | WBSD_SOFT_RESET; | |
143 | wbsd_write_index(host, WBSD_IDX_SETUP, setup); | |
fecf92ba | 144 | |
85bcc130 PO |
145 | /* |
146 | * Set DAT3 to input | |
147 | */ | |
148 | setup &= ~WBSD_DAT3_H; | |
149 | wbsd_write_index(host, WBSD_IDX_SETUP, setup); | |
150 | host->flags &= ~WBSD_FIGNORE_DETECT; | |
fecf92ba | 151 | |
1da177e4 LT |
152 | /* |
153 | * Read back default clock. | |
154 | */ | |
155 | host->clk = wbsd_read_index(host, WBSD_IDX_CLK); | |
156 | ||
157 | /* | |
158 | * Power down port. | |
159 | */ | |
160 | outb(WBSD_POWER_N, host->base + WBSD_CSR); | |
fecf92ba | 161 | |
1da177e4 LT |
162 | /* |
163 | * Set maximum timeout. | |
164 | */ | |
165 | wbsd_write_index(host, WBSD_IDX_TAAC, 0x7F); | |
fecf92ba | 166 | |
85bcc130 PO |
167 | /* |
168 | * Test for card presence | |
169 | */ | |
170 | if (inb(host->base + WBSD_CSR) & WBSD_CARDPRESENT) | |
171 | host->flags |= WBSD_FCARD_PRESENT; | |
172 | else | |
173 | host->flags &= ~WBSD_FCARD_PRESENT; | |
fecf92ba | 174 | |
1da177e4 LT |
175 | /* |
176 | * Enable interesting interrupts. | |
177 | */ | |
178 | ier = 0; | |
179 | ier |= WBSD_EINT_CARD; | |
180 | ier |= WBSD_EINT_FIFO_THRE; | |
181 | ier |= WBSD_EINT_CCRC; | |
182 | ier |= WBSD_EINT_TIMEOUT; | |
183 | ier |= WBSD_EINT_CRC; | |
184 | ier |= WBSD_EINT_TC; | |
185 | ||
186 | outb(ier, host->base + WBSD_EIR); | |
187 | ||
188 | /* | |
189 | * Clear interrupts. | |
190 | */ | |
191 | inb(host->base + WBSD_ISR); | |
192 | } | |
193 | ||
cfa7f521 | 194 | static void wbsd_reset(struct wbsd_host *host) |
1da177e4 LT |
195 | { |
196 | u8 setup; | |
fecf92ba | 197 | |
d191634f | 198 | printk(KERN_ERR "%s: Resetting chip\n", mmc_hostname(host->mmc)); |
fecf92ba | 199 | |
1da177e4 LT |
200 | /* |
201 | * Soft reset of chip (SD/MMC part). | |
202 | */ | |
203 | setup = wbsd_read_index(host, WBSD_IDX_SETUP); | |
204 | setup |= WBSD_SOFT_RESET; | |
205 | wbsd_write_index(host, WBSD_IDX_SETUP, setup); | |
206 | } | |
207 | ||
cfa7f521 | 208 | static void wbsd_request_end(struct wbsd_host *host, struct mmc_request *mrq) |
1da177e4 LT |
209 | { |
210 | unsigned long dmaflags; | |
fecf92ba | 211 | |
1da177e4 | 212 | DBGF("Ending request, cmd (%x)\n", mrq->cmd->opcode); |
fecf92ba | 213 | |
cfa7f521 | 214 | if (host->dma >= 0) { |
1da177e4 LT |
215 | /* |
216 | * Release ISA DMA controller. | |
217 | */ | |
218 | dmaflags = claim_dma_lock(); | |
219 | disable_dma(host->dma); | |
220 | clear_dma_ff(host->dma); | |
221 | release_dma_lock(dmaflags); | |
222 | ||
223 | /* | |
224 | * Disable DMA on host. | |
225 | */ | |
226 | wbsd_write_index(host, WBSD_IDX_DMA, 0); | |
227 | } | |
fecf92ba | 228 | |
1da177e4 LT |
229 | host->mrq = NULL; |
230 | ||
231 | /* | |
232 | * MMC layer might call back into the driver so first unlock. | |
233 | */ | |
234 | spin_unlock(&host->lock); | |
235 | mmc_request_done(host->mmc, mrq); | |
236 | spin_lock(&host->lock); | |
237 | } | |
238 | ||
239 | /* | |
240 | * Scatter/gather functions | |
241 | */ | |
242 | ||
cfa7f521 | 243 | static inline void wbsd_init_sg(struct wbsd_host *host, struct mmc_data *data) |
1da177e4 LT |
244 | { |
245 | /* | |
246 | * Get info. about SG list from data structure. | |
247 | */ | |
248 | host->cur_sg = data->sg; | |
249 | host->num_sg = data->sg_len; | |
250 | ||
251 | host->offset = 0; | |
252 | host->remain = host->cur_sg->length; | |
253 | } | |
254 | ||
cfa7f521 | 255 | static inline int wbsd_next_sg(struct wbsd_host *host) |
1da177e4 LT |
256 | { |
257 | /* | |
258 | * Skip to next SG entry. | |
259 | */ | |
260 | host->cur_sg++; | |
261 | host->num_sg--; | |
262 | ||
263 | /* | |
264 | * Any entries left? | |
265 | */ | |
cfa7f521 PO |
266 | if (host->num_sg > 0) { |
267 | host->offset = 0; | |
268 | host->remain = host->cur_sg->length; | |
269 | } | |
fecf92ba | 270 | |
1da177e4 LT |
271 | return host->num_sg; |
272 | } | |
273 | ||
4a0ddbd2 | 274 | static inline char *wbsd_sg_to_buffer(struct wbsd_host *host) |
1da177e4 | 275 | { |
4a0ddbd2 | 276 | return page_address(host->cur_sg->page) + host->cur_sg->offset; |
1da177e4 LT |
277 | } |
278 | ||
cfa7f521 | 279 | static inline void wbsd_sg_to_dma(struct wbsd_host *host, struct mmc_data *data) |
1da177e4 | 280 | { |
14d836e7 | 281 | unsigned int len, i; |
cfa7f521 PO |
282 | struct scatterlist *sg; |
283 | char *dmabuf = host->dma_buffer; | |
284 | char *sgbuf; | |
fecf92ba | 285 | |
1da177e4 LT |
286 | sg = data->sg; |
287 | len = data->sg_len; | |
fecf92ba | 288 | |
cfa7f521 | 289 | for (i = 0; i < len; i++) { |
4a0ddbd2 | 290 | sgbuf = page_address(sg[i].page) + sg[i].offset; |
14d836e7 | 291 | memcpy(dmabuf, sgbuf, sg[i].length); |
1da177e4 | 292 | dmabuf += sg[i].length; |
1da177e4 | 293 | } |
1da177e4 LT |
294 | } |
295 | ||
cfa7f521 | 296 | static inline void wbsd_dma_to_sg(struct wbsd_host *host, struct mmc_data *data) |
1da177e4 | 297 | { |
14d836e7 | 298 | unsigned int len, i; |
cfa7f521 PO |
299 | struct scatterlist *sg; |
300 | char *dmabuf = host->dma_buffer; | |
301 | char *sgbuf; | |
fecf92ba | 302 | |
1da177e4 LT |
303 | sg = data->sg; |
304 | len = data->sg_len; | |
fecf92ba | 305 | |
cfa7f521 | 306 | for (i = 0; i < len; i++) { |
4a0ddbd2 | 307 | sgbuf = page_address(sg[i].page) + sg[i].offset; |
14d836e7 | 308 | memcpy(sgbuf, dmabuf, sg[i].length); |
1da177e4 | 309 | dmabuf += sg[i].length; |
1da177e4 | 310 | } |
1da177e4 LT |
311 | } |
312 | ||
313 | /* | |
314 | * Command handling | |
315 | */ | |
fecf92ba | 316 | |
cfa7f521 PO |
317 | static inline void wbsd_get_short_reply(struct wbsd_host *host, |
318 | struct mmc_command *cmd) | |
1da177e4 LT |
319 | { |
320 | /* | |
321 | * Correct response type? | |
322 | */ | |
cfa7f521 | 323 | if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_SHORT) { |
1da177e4 LT |
324 | cmd->error = MMC_ERR_INVALID; |
325 | return; | |
326 | } | |
fecf92ba | 327 | |
cfa7f521 PO |
328 | cmd->resp[0] = wbsd_read_index(host, WBSD_IDX_RESP12) << 24; |
329 | cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP13) << 16; | |
330 | cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP14) << 8; | |
331 | cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP15) << 0; | |
332 | cmd->resp[1] = wbsd_read_index(host, WBSD_IDX_RESP16) << 24; | |
1da177e4 LT |
333 | } |
334 | ||
cfa7f521 PO |
335 | static inline void wbsd_get_long_reply(struct wbsd_host *host, |
336 | struct mmc_command *cmd) | |
1da177e4 LT |
337 | { |
338 | int i; | |
fecf92ba | 339 | |
1da177e4 LT |
340 | /* |
341 | * Correct response type? | |
342 | */ | |
cfa7f521 | 343 | if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_LONG) { |
1da177e4 LT |
344 | cmd->error = MMC_ERR_INVALID; |
345 | return; | |
346 | } | |
fecf92ba | 347 | |
cfa7f521 | 348 | for (i = 0; i < 4; i++) { |
1da177e4 LT |
349 | cmd->resp[i] = |
350 | wbsd_read_index(host, WBSD_IDX_RESP1 + i * 4) << 24; | |
351 | cmd->resp[i] |= | |
352 | wbsd_read_index(host, WBSD_IDX_RESP2 + i * 4) << 16; | |
353 | cmd->resp[i] |= | |
354 | wbsd_read_index(host, WBSD_IDX_RESP3 + i * 4) << 8; | |
355 | cmd->resp[i] |= | |
356 | wbsd_read_index(host, WBSD_IDX_RESP4 + i * 4) << 0; | |
357 | } | |
358 | } | |
359 | ||
cfa7f521 | 360 | static void wbsd_send_command(struct wbsd_host *host, struct mmc_command *cmd) |
1da177e4 LT |
361 | { |
362 | int i; | |
363 | u8 status, isr; | |
fecf92ba | 364 | |
1da177e4 LT |
365 | DBGF("Sending cmd (%x)\n", cmd->opcode); |
366 | ||
367 | /* | |
368 | * Clear accumulated ISR. The interrupt routine | |
369 | * will fill this one with events that occur during | |
370 | * transfer. | |
371 | */ | |
372 | host->isr = 0; | |
fecf92ba | 373 | |
1da177e4 LT |
374 | /* |
375 | * Send the command (CRC calculated by host). | |
376 | */ | |
377 | outb(cmd->opcode, host->base + WBSD_CMDR); | |
cfa7f521 | 378 | for (i = 3; i >= 0; i--) |
1da177e4 | 379 | outb((cmd->arg >> (i * 8)) & 0xff, host->base + WBSD_CMDR); |
fecf92ba | 380 | |
1da177e4 | 381 | cmd->error = MMC_ERR_NONE; |
fecf92ba | 382 | |
1da177e4 LT |
383 | /* |
384 | * Wait for the request to complete. | |
385 | */ | |
386 | do { | |
387 | status = wbsd_read_index(host, WBSD_IDX_STATUS); | |
388 | } while (status & WBSD_CARDTRAFFIC); | |
389 | ||
390 | /* | |
391 | * Do we expect a reply? | |
392 | */ | |
e9225176 | 393 | if (cmd->flags & MMC_RSP_PRESENT) { |
1da177e4 LT |
394 | /* |
395 | * Read back status. | |
396 | */ | |
397 | isr = host->isr; | |
fecf92ba | 398 | |
1da177e4 LT |
399 | /* Card removed? */ |
400 | if (isr & WBSD_INT_CARD) | |
401 | cmd->error = MMC_ERR_TIMEOUT; | |
402 | /* Timeout? */ | |
403 | else if (isr & WBSD_INT_TIMEOUT) | |
404 | cmd->error = MMC_ERR_TIMEOUT; | |
405 | /* CRC? */ | |
406 | else if ((cmd->flags & MMC_RSP_CRC) && (isr & WBSD_INT_CRC)) | |
407 | cmd->error = MMC_ERR_BADCRC; | |
408 | /* All ok */ | |
cfa7f521 | 409 | else { |
e9225176 | 410 | if (cmd->flags & MMC_RSP_136) |
1da177e4 | 411 | wbsd_get_long_reply(host, cmd); |
e9225176 RK |
412 | else |
413 | wbsd_get_short_reply(host, cmd); | |
1da177e4 LT |
414 | } |
415 | } | |
416 | ||
417 | DBGF("Sent cmd (%x), res %d\n", cmd->opcode, cmd->error); | |
418 | } | |
419 | ||
420 | /* | |
421 | * Data functions | |
422 | */ | |
423 | ||
cfa7f521 | 424 | static void wbsd_empty_fifo(struct wbsd_host *host) |
1da177e4 | 425 | { |
cfa7f521 PO |
426 | struct mmc_data *data = host->mrq->cmd->data; |
427 | char *buffer; | |
1da177e4 | 428 | int i, fsr, fifo; |
fecf92ba | 429 | |
1da177e4 LT |
430 | /* |
431 | * Handle excessive data. | |
432 | */ | |
14d836e7 | 433 | if (host->num_sg == 0) |
1da177e4 | 434 | return; |
fecf92ba | 435 | |
4a0ddbd2 | 436 | buffer = wbsd_sg_to_buffer(host) + host->offset; |
1da177e4 LT |
437 | |
438 | /* | |
439 | * Drain the fifo. This has a tendency to loop longer | |
440 | * than the FIFO length (usually one block). | |
441 | */ | |
cfa7f521 | 442 | while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_EMPTY)) { |
1da177e4 LT |
443 | /* |
444 | * The size field in the FSR is broken so we have to | |
445 | * do some guessing. | |
fecf92ba | 446 | */ |
1da177e4 LT |
447 | if (fsr & WBSD_FIFO_FULL) |
448 | fifo = 16; | |
449 | else if (fsr & WBSD_FIFO_FUTHRE) | |
450 | fifo = 8; | |
451 | else | |
452 | fifo = 1; | |
fecf92ba | 453 | |
cfa7f521 | 454 | for (i = 0; i < fifo; i++) { |
1da177e4 LT |
455 | *buffer = inb(host->base + WBSD_DFR); |
456 | buffer++; | |
457 | host->offset++; | |
458 | host->remain--; | |
459 | ||
460 | data->bytes_xfered++; | |
fecf92ba | 461 | |
1da177e4 LT |
462 | /* |
463 | * End of scatter list entry? | |
464 | */ | |
cfa7f521 | 465 | if (host->remain == 0) { |
1da177e4 LT |
466 | /* |
467 | * Get next entry. Check if last. | |
468 | */ | |
14d836e7 | 469 | if (!wbsd_next_sg(host)) |
1da177e4 | 470 | return; |
fecf92ba | 471 | |
4a0ddbd2 | 472 | buffer = wbsd_sg_to_buffer(host); |
1da177e4 LT |
473 | } |
474 | } | |
475 | } | |
fecf92ba | 476 | |
1da177e4 LT |
477 | /* |
478 | * This is a very dirty hack to solve a | |
479 | * hardware problem. The chip doesn't trigger | |
480 | * FIFO threshold interrupts properly. | |
481 | */ | |
14d836e7 | 482 | if ((data->blocks * data->blksz - data->bytes_xfered) < 16) |
1da177e4 LT |
483 | tasklet_schedule(&host->fifo_tasklet); |
484 | } | |
485 | ||
cfa7f521 | 486 | static void wbsd_fill_fifo(struct wbsd_host *host) |
1da177e4 | 487 | { |
cfa7f521 PO |
488 | struct mmc_data *data = host->mrq->cmd->data; |
489 | char *buffer; | |
1da177e4 | 490 | int i, fsr, fifo; |
fecf92ba | 491 | |
1da177e4 LT |
492 | /* |
493 | * Check that we aren't being called after the | |
494 | * entire buffer has been transfered. | |
495 | */ | |
14d836e7 | 496 | if (host->num_sg == 0) |
1da177e4 LT |
497 | return; |
498 | ||
4a0ddbd2 | 499 | buffer = wbsd_sg_to_buffer(host) + host->offset; |
1da177e4 LT |
500 | |
501 | /* | |
502 | * Fill the fifo. This has a tendency to loop longer | |
503 | * than the FIFO length (usually one block). | |
504 | */ | |
cfa7f521 | 505 | while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_FULL)) { |
1da177e4 LT |
506 | /* |
507 | * The size field in the FSR is broken so we have to | |
508 | * do some guessing. | |
fecf92ba | 509 | */ |
1da177e4 LT |
510 | if (fsr & WBSD_FIFO_EMPTY) |
511 | fifo = 0; | |
512 | else if (fsr & WBSD_FIFO_EMTHRE) | |
513 | fifo = 8; | |
514 | else | |
515 | fifo = 15; | |
516 | ||
cfa7f521 | 517 | for (i = 16; i > fifo; i--) { |
1da177e4 LT |
518 | outb(*buffer, host->base + WBSD_DFR); |
519 | buffer++; | |
520 | host->offset++; | |
521 | host->remain--; | |
fecf92ba | 522 | |
1da177e4 | 523 | data->bytes_xfered++; |
fecf92ba | 524 | |
1da177e4 LT |
525 | /* |
526 | * End of scatter list entry? | |
527 | */ | |
cfa7f521 | 528 | if (host->remain == 0) { |
1da177e4 LT |
529 | /* |
530 | * Get next entry. Check if last. | |
531 | */ | |
14d836e7 | 532 | if (!wbsd_next_sg(host)) |
1da177e4 | 533 | return; |
fecf92ba | 534 | |
4a0ddbd2 | 535 | buffer = wbsd_sg_to_buffer(host); |
1da177e4 LT |
536 | } |
537 | } | |
538 | } | |
fecf92ba | 539 | |
85bcc130 PO |
540 | /* |
541 | * The controller stops sending interrupts for | |
542 | * 'FIFO empty' under certain conditions. So we | |
543 | * need to be a bit more pro-active. | |
544 | */ | |
545 | tasklet_schedule(&host->fifo_tasklet); | |
1da177e4 LT |
546 | } |
547 | ||
cfa7f521 | 548 | static void wbsd_prepare_data(struct wbsd_host *host, struct mmc_data *data) |
1da177e4 LT |
549 | { |
550 | u16 blksize; | |
551 | u8 setup; | |
552 | unsigned long dmaflags; | |
14d836e7 | 553 | unsigned int size; |
1da177e4 LT |
554 | |
555 | DBGF("blksz %04x blks %04x flags %08x\n", | |
2c171bf1 | 556 | data->blksz, data->blocks, data->flags); |
1da177e4 LT |
557 | DBGF("tsac %d ms nsac %d clk\n", |
558 | data->timeout_ns / 1000000, data->timeout_clks); | |
fecf92ba | 559 | |
1da177e4 LT |
560 | /* |
561 | * Calculate size. | |
562 | */ | |
14d836e7 | 563 | size = data->blocks * data->blksz; |
1da177e4 LT |
564 | |
565 | /* | |
566 | * Check timeout values for overflow. | |
567 | * (Yes, some cards cause this value to overflow). | |
568 | */ | |
569 | if (data->timeout_ns > 127000000) | |
570 | wbsd_write_index(host, WBSD_IDX_TAAC, 127); | |
cfa7f521 PO |
571 | else { |
572 | wbsd_write_index(host, WBSD_IDX_TAAC, | |
573 | data->timeout_ns / 1000000); | |
574 | } | |
fecf92ba | 575 | |
1da177e4 LT |
576 | if (data->timeout_clks > 255) |
577 | wbsd_write_index(host, WBSD_IDX_NSAC, 255); | |
578 | else | |
579 | wbsd_write_index(host, WBSD_IDX_NSAC, data->timeout_clks); | |
fecf92ba | 580 | |
1da177e4 LT |
581 | /* |
582 | * Inform the chip of how large blocks will be | |
583 | * sent. It needs this to determine when to | |
584 | * calculate CRC. | |
585 | * | |
586 | * Space for CRC must be included in the size. | |
65ae2118 | 587 | * Two bytes are needed for each data line. |
1da177e4 | 588 | */ |
cfa7f521 | 589 | if (host->bus_width == MMC_BUS_WIDTH_1) { |
2c171bf1 | 590 | blksize = data->blksz + 2; |
65ae2118 PO |
591 | |
592 | wbsd_write_index(host, WBSD_IDX_PBSMSB, (blksize >> 4) & 0xF0); | |
593 | wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF); | |
cfa7f521 | 594 | } else if (host->bus_width == MMC_BUS_WIDTH_4) { |
2c171bf1 | 595 | blksize = data->blksz + 2 * 4; |
fecf92ba | 596 | |
cfa7f521 PO |
597 | wbsd_write_index(host, WBSD_IDX_PBSMSB, |
598 | ((blksize >> 4) & 0xF0) | WBSD_DATA_WIDTH); | |
65ae2118 | 599 | wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF); |
cfa7f521 | 600 | } else { |
65ae2118 PO |
601 | data->error = MMC_ERR_INVALID; |
602 | return; | |
603 | } | |
1da177e4 LT |
604 | |
605 | /* | |
606 | * Clear the FIFO. This is needed even for DMA | |
607 | * transfers since the chip still uses the FIFO | |
608 | * internally. | |
609 | */ | |
610 | setup = wbsd_read_index(host, WBSD_IDX_SETUP); | |
611 | setup |= WBSD_FIFO_RESET; | |
612 | wbsd_write_index(host, WBSD_IDX_SETUP, setup); | |
fecf92ba | 613 | |
1da177e4 LT |
614 | /* |
615 | * DMA transfer? | |
616 | */ | |
cfa7f521 | 617 | if (host->dma >= 0) { |
1da177e4 LT |
618 | /* |
619 | * The buffer for DMA is only 64 kB. | |
620 | */ | |
14d836e7 AD |
621 | BUG_ON(size > 0x10000); |
622 | if (size > 0x10000) { | |
1da177e4 LT |
623 | data->error = MMC_ERR_INVALID; |
624 | return; | |
625 | } | |
fecf92ba | 626 | |
1da177e4 LT |
627 | /* |
628 | * Transfer data from the SG list to | |
629 | * the DMA buffer. | |
630 | */ | |
631 | if (data->flags & MMC_DATA_WRITE) | |
632 | wbsd_sg_to_dma(host, data); | |
fecf92ba | 633 | |
1da177e4 LT |
634 | /* |
635 | * Initialise the ISA DMA controller. | |
fecf92ba | 636 | */ |
1da177e4 LT |
637 | dmaflags = claim_dma_lock(); |
638 | disable_dma(host->dma); | |
639 | clear_dma_ff(host->dma); | |
640 | if (data->flags & MMC_DATA_READ) | |
641 | set_dma_mode(host->dma, DMA_MODE_READ & ~0x40); | |
642 | else | |
643 | set_dma_mode(host->dma, DMA_MODE_WRITE & ~0x40); | |
644 | set_dma_addr(host->dma, host->dma_addr); | |
14d836e7 | 645 | set_dma_count(host->dma, size); |
1da177e4 LT |
646 | |
647 | enable_dma(host->dma); | |
648 | release_dma_lock(dmaflags); | |
649 | ||
650 | /* | |
651 | * Enable DMA on the host. | |
652 | */ | |
653 | wbsd_write_index(host, WBSD_IDX_DMA, WBSD_DMA_ENABLE); | |
cfa7f521 | 654 | } else { |
1da177e4 LT |
655 | /* |
656 | * This flag is used to keep printk | |
657 | * output to a minimum. | |
658 | */ | |
659 | host->firsterr = 1; | |
fecf92ba | 660 | |
1da177e4 LT |
661 | /* |
662 | * Initialise the SG list. | |
663 | */ | |
664 | wbsd_init_sg(host, data); | |
fecf92ba | 665 | |
1da177e4 LT |
666 | /* |
667 | * Turn off DMA. | |
668 | */ | |
669 | wbsd_write_index(host, WBSD_IDX_DMA, 0); | |
fecf92ba | 670 | |
1da177e4 LT |
671 | /* |
672 | * Set up FIFO threshold levels (and fill | |
673 | * buffer if doing a write). | |
674 | */ | |
cfa7f521 | 675 | if (data->flags & MMC_DATA_READ) { |
1da177e4 LT |
676 | wbsd_write_index(host, WBSD_IDX_FIFOEN, |
677 | WBSD_FIFOEN_FULL | 8); | |
cfa7f521 | 678 | } else { |
1da177e4 LT |
679 | wbsd_write_index(host, WBSD_IDX_FIFOEN, |
680 | WBSD_FIFOEN_EMPTY | 8); | |
681 | wbsd_fill_fifo(host); | |
682 | } | |
fecf92ba PO |
683 | } |
684 | ||
1da177e4 LT |
685 | data->error = MMC_ERR_NONE; |
686 | } | |
687 | ||
cfa7f521 | 688 | static void wbsd_finish_data(struct wbsd_host *host, struct mmc_data *data) |
1da177e4 LT |
689 | { |
690 | unsigned long dmaflags; | |
691 | int count; | |
692 | u8 status; | |
fecf92ba | 693 | |
1da177e4 LT |
694 | WARN_ON(host->mrq == NULL); |
695 | ||
696 | /* | |
697 | * Send a stop command if needed. | |
698 | */ | |
699 | if (data->stop) | |
700 | wbsd_send_command(host, data->stop); | |
701 | ||
702 | /* | |
703 | * Wait for the controller to leave data | |
704 | * transfer state. | |
705 | */ | |
cfa7f521 | 706 | do { |
1da177e4 LT |
707 | status = wbsd_read_index(host, WBSD_IDX_STATUS); |
708 | } while (status & (WBSD_BLOCK_READ | WBSD_BLOCK_WRITE)); | |
fecf92ba | 709 | |
1da177e4 LT |
710 | /* |
711 | * DMA transfer? | |
712 | */ | |
cfa7f521 | 713 | if (host->dma >= 0) { |
1da177e4 LT |
714 | /* |
715 | * Disable DMA on the host. | |
716 | */ | |
717 | wbsd_write_index(host, WBSD_IDX_DMA, 0); | |
fecf92ba | 718 | |
1da177e4 LT |
719 | /* |
720 | * Turn of ISA DMA controller. | |
721 | */ | |
722 | dmaflags = claim_dma_lock(); | |
723 | disable_dma(host->dma); | |
724 | clear_dma_ff(host->dma); | |
725 | count = get_dma_residue(host->dma); | |
726 | release_dma_lock(dmaflags); | |
fecf92ba | 727 | |
14d836e7 AD |
728 | data->bytes_xfered = host->mrq->data->blocks * |
729 | host->mrq->data->blksz - count; | |
730 | data->bytes_xfered -= data->bytes_xfered % data->blksz; | |
731 | ||
1da177e4 LT |
732 | /* |
733 | * Any leftover data? | |
734 | */ | |
cfa7f521 | 735 | if (count) { |
d191634f PO |
736 | printk(KERN_ERR "%s: Incomplete DMA transfer. " |
737 | "%d bytes left.\n", | |
738 | mmc_hostname(host->mmc), count); | |
fecf92ba | 739 | |
14d836e7 AD |
740 | if (data->error == MMC_ERR_NONE) |
741 | data->error = MMC_ERR_FAILED; | |
cfa7f521 | 742 | } else { |
1da177e4 LT |
743 | /* |
744 | * Transfer data from DMA buffer to | |
745 | * SG list. | |
746 | */ | |
747 | if (data->flags & MMC_DATA_READ) | |
748 | wbsd_dma_to_sg(host, data); | |
14d836e7 | 749 | } |
fecf92ba | 750 | |
14d836e7 AD |
751 | if (data->error != MMC_ERR_NONE) { |
752 | if (data->bytes_xfered) | |
753 | data->bytes_xfered -= data->blksz; | |
1da177e4 LT |
754 | } |
755 | } | |
fecf92ba | 756 | |
1da177e4 | 757 | DBGF("Ending data transfer (%d bytes)\n", data->bytes_xfered); |
fecf92ba | 758 | |
1da177e4 LT |
759 | wbsd_request_end(host, host->mrq); |
760 | } | |
761 | ||
85bcc130 PO |
762 | /*****************************************************************************\ |
763 | * * | |
764 | * MMC layer callbacks * | |
765 | * * | |
766 | \*****************************************************************************/ | |
1da177e4 | 767 | |
cfa7f521 | 768 | static void wbsd_request(struct mmc_host *mmc, struct mmc_request *mrq) |
1da177e4 | 769 | { |
cfa7f521 PO |
770 | struct wbsd_host *host = mmc_priv(mmc); |
771 | struct mmc_command *cmd; | |
1da177e4 LT |
772 | |
773 | /* | |
774 | * Disable tasklets to avoid a deadlock. | |
775 | */ | |
776 | spin_lock_bh(&host->lock); | |
777 | ||
778 | BUG_ON(host->mrq != NULL); | |
779 | ||
780 | cmd = mrq->cmd; | |
781 | ||
782 | host->mrq = mrq; | |
fecf92ba | 783 | |
1da177e4 LT |
784 | /* |
785 | * If there is no card in the slot then | |
786 | * timeout immediatly. | |
787 | */ | |
cfa7f521 | 788 | if (!(host->flags & WBSD_FCARD_PRESENT)) { |
1da177e4 LT |
789 | cmd->error = MMC_ERR_TIMEOUT; |
790 | goto done; | |
791 | } | |
792 | ||
793 | /* | |
794 | * Does the request include data? | |
795 | */ | |
cfa7f521 | 796 | if (cmd->data) { |
1da177e4 | 797 | wbsd_prepare_data(host, cmd->data); |
fecf92ba | 798 | |
1da177e4 LT |
799 | if (cmd->data->error != MMC_ERR_NONE) |
800 | goto done; | |
801 | } | |
fecf92ba | 802 | |
1da177e4 LT |
803 | wbsd_send_command(host, cmd); |
804 | ||
805 | /* | |
806 | * If this is a data transfer the request | |
807 | * will be finished after the data has | |
808 | * transfered. | |
fecf92ba | 809 | */ |
cfa7f521 | 810 | if (cmd->data && (cmd->error == MMC_ERR_NONE)) { |
5ba593a9 PO |
811 | /* |
812 | * The hardware is so delightfully stupid that it has a list | |
813 | * of "data" commands. If a command isn't on this list, it'll | |
814 | * just go back to the idle state and won't send any data | |
815 | * interrupts. | |
816 | */ | |
817 | switch (cmd->opcode) { | |
818 | case 11: | |
819 | case 17: | |
820 | case 18: | |
821 | case 20: | |
822 | case 24: | |
823 | case 25: | |
824 | case 26: | |
825 | case 27: | |
826 | case 30: | |
827 | case 42: | |
828 | case 56: | |
829 | break; | |
830 | ||
831 | /* ACMDs. We don't keep track of state, so we just treat them | |
832 | * like any other command. */ | |
833 | case 51: | |
834 | break; | |
835 | ||
836 | default: | |
837 | #ifdef CONFIG_MMC_DEBUG | |
838 | printk(KERN_WARNING "%s: Data command %d is not " | |
839 | "supported by this controller.\n", | |
840 | mmc_hostname(host->mmc), cmd->opcode); | |
841 | #endif | |
842 | cmd->data->error = MMC_ERR_INVALID; | |
843 | ||
844 | if (cmd->data->stop) | |
845 | wbsd_send_command(host, cmd->data->stop); | |
846 | ||
847 | goto done; | |
848 | }; | |
849 | ||
1da177e4 LT |
850 | /* |
851 | * Dirty fix for hardware bug. | |
852 | */ | |
853 | if (host->dma == -1) | |
854 | tasklet_schedule(&host->fifo_tasklet); | |
855 | ||
856 | spin_unlock_bh(&host->lock); | |
857 | ||
858 | return; | |
859 | } | |
fecf92ba | 860 | |
1da177e4 LT |
861 | done: |
862 | wbsd_request_end(host, mrq); | |
863 | ||
864 | spin_unlock_bh(&host->lock); | |
865 | } | |
866 | ||
cfa7f521 | 867 | static void wbsd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) |
1da177e4 | 868 | { |
cfa7f521 | 869 | struct wbsd_host *host = mmc_priv(mmc); |
1da177e4 | 870 | u8 clk, setup, pwr; |
fecf92ba | 871 | |
1da177e4 LT |
872 | spin_lock_bh(&host->lock); |
873 | ||
874 | /* | |
875 | * Reset the chip on each power off. | |
876 | * Should clear out any weird states. | |
877 | */ | |
878 | if (ios->power_mode == MMC_POWER_OFF) | |
879 | wbsd_init_device(host); | |
fecf92ba | 880 | |
1da177e4 LT |
881 | if (ios->clock >= 24000000) |
882 | clk = WBSD_CLK_24M; | |
883 | else if (ios->clock >= 16000000) | |
884 | clk = WBSD_CLK_16M; | |
885 | else if (ios->clock >= 12000000) | |
886 | clk = WBSD_CLK_12M; | |
887 | else | |
888 | clk = WBSD_CLK_375K; | |
889 | ||
890 | /* | |
891 | * Only write to the clock register when | |
892 | * there is an actual change. | |
893 | */ | |
cfa7f521 | 894 | if (clk != host->clk) { |
1da177e4 LT |
895 | wbsd_write_index(host, WBSD_IDX_CLK, clk); |
896 | host->clk = clk; | |
897 | } | |
898 | ||
85bcc130 PO |
899 | /* |
900 | * Power up card. | |
901 | */ | |
cfa7f521 | 902 | if (ios->power_mode != MMC_POWER_OFF) { |
1da177e4 LT |
903 | pwr = inb(host->base + WBSD_CSR); |
904 | pwr &= ~WBSD_POWER_N; | |
905 | outb(pwr, host->base + WBSD_CSR); | |
1da177e4 LT |
906 | } |
907 | ||
85bcc130 PO |
908 | /* |
909 | * MMC cards need to have pin 1 high during init. | |
85bcc130 | 910 | * It wreaks havoc with the card detection though so |
1656fa57 | 911 | * that needs to be disabled. |
85bcc130 PO |
912 | */ |
913 | setup = wbsd_read_index(host, WBSD_IDX_SETUP); | |
cfa7f521 | 914 | if (ios->chip_select == MMC_CS_HIGH) { |
65ae2118 | 915 | BUG_ON(ios->bus_width != MMC_BUS_WIDTH_1); |
85bcc130 PO |
916 | setup |= WBSD_DAT3_H; |
917 | host->flags |= WBSD_FIGNORE_DETECT; | |
cfa7f521 PO |
918 | } else { |
919 | if (setup & WBSD_DAT3_H) { | |
19c1f3ca | 920 | setup &= ~WBSD_DAT3_H; |
1656fa57 | 921 | |
19c1f3ca PO |
922 | /* |
923 | * We cannot resume card detection immediatly | |
924 | * because of capacitance and delays in the chip. | |
925 | */ | |
cfa7f521 | 926 | mod_timer(&host->ignore_timer, jiffies + HZ / 100); |
19c1f3ca | 927 | } |
85bcc130 PO |
928 | } |
929 | wbsd_write_index(host, WBSD_IDX_SETUP, setup); | |
fecf92ba | 930 | |
65ae2118 PO |
931 | /* |
932 | * Store bus width for later. Will be used when | |
933 | * setting up the data transfer. | |
934 | */ | |
935 | host->bus_width = ios->bus_width; | |
936 | ||
1da177e4 LT |
937 | spin_unlock_bh(&host->lock); |
938 | } | |
939 | ||
cfa7f521 | 940 | static int wbsd_get_ro(struct mmc_host *mmc) |
65ae2118 | 941 | { |
cfa7f521 | 942 | struct wbsd_host *host = mmc_priv(mmc); |
65ae2118 PO |
943 | u8 csr; |
944 | ||
945 | spin_lock_bh(&host->lock); | |
946 | ||
947 | csr = inb(host->base + WBSD_CSR); | |
948 | csr |= WBSD_MSLED; | |
949 | outb(csr, host->base + WBSD_CSR); | |
950 | ||
951 | mdelay(1); | |
952 | ||
953 | csr = inb(host->base + WBSD_CSR); | |
954 | csr &= ~WBSD_MSLED; | |
955 | outb(csr, host->base + WBSD_CSR); | |
956 | ||
957 | spin_unlock_bh(&host->lock); | |
958 | ||
959 | return csr & WBSD_WRPT; | |
960 | } | |
961 | ||
ab7aefd0 | 962 | static const struct mmc_host_ops wbsd_ops = { |
85bcc130 PO |
963 | .request = wbsd_request, |
964 | .set_ios = wbsd_set_ios, | |
65ae2118 | 965 | .get_ro = wbsd_get_ro, |
85bcc130 PO |
966 | }; |
967 | ||
968 | /*****************************************************************************\ | |
969 | * * | |
970 | * Interrupt handling * | |
971 | * * | |
972 | \*****************************************************************************/ | |
973 | ||
1656fa57 PO |
974 | /* |
975 | * Helper function to reset detection ignore | |
976 | */ | |
977 | ||
978 | static void wbsd_reset_ignore(unsigned long data) | |
979 | { | |
cfa7f521 | 980 | struct wbsd_host *host = (struct wbsd_host *)data; |
1656fa57 PO |
981 | |
982 | BUG_ON(host == NULL); | |
983 | ||
984 | DBG("Resetting card detection ignore\n"); | |
985 | ||
986 | spin_lock_bh(&host->lock); | |
987 | ||
988 | host->flags &= ~WBSD_FIGNORE_DETECT; | |
989 | ||
990 | /* | |
991 | * Card status might have changed during the | |
992 | * blackout. | |
993 | */ | |
994 | tasklet_schedule(&host->card_tasklet); | |
995 | ||
996 | spin_unlock_bh(&host->lock); | |
997 | } | |
998 | ||
1da177e4 LT |
999 | /* |
1000 | * Tasklets | |
1001 | */ | |
1002 | ||
cfa7f521 | 1003 | static inline struct mmc_data *wbsd_get_data(struct wbsd_host *host) |
1da177e4 LT |
1004 | { |
1005 | WARN_ON(!host->mrq); | |
1006 | if (!host->mrq) | |
1007 | return NULL; | |
1008 | ||
1009 | WARN_ON(!host->mrq->cmd); | |
1010 | if (!host->mrq->cmd) | |
1011 | return NULL; | |
1012 | ||
1013 | WARN_ON(!host->mrq->cmd->data); | |
1014 | if (!host->mrq->cmd->data) | |
1015 | return NULL; | |
fecf92ba | 1016 | |
1da177e4 LT |
1017 | return host->mrq->cmd->data; |
1018 | } | |
1019 | ||
1020 | static void wbsd_tasklet_card(unsigned long param) | |
1021 | { | |
cfa7f521 | 1022 | struct wbsd_host *host = (struct wbsd_host *)param; |
1da177e4 | 1023 | u8 csr; |
210ce2a7 | 1024 | int delay = -1; |
fecf92ba | 1025 | |
1da177e4 | 1026 | spin_lock(&host->lock); |
fecf92ba | 1027 | |
cfa7f521 | 1028 | if (host->flags & WBSD_FIGNORE_DETECT) { |
85bcc130 PO |
1029 | spin_unlock(&host->lock); |
1030 | return; | |
1031 | } | |
fecf92ba | 1032 | |
1da177e4 LT |
1033 | csr = inb(host->base + WBSD_CSR); |
1034 | WARN_ON(csr == 0xff); | |
fecf92ba | 1035 | |
cfa7f521 PO |
1036 | if (csr & WBSD_CARDPRESENT) { |
1037 | if (!(host->flags & WBSD_FCARD_PRESENT)) { | |
85bcc130 PO |
1038 | DBG("Card inserted\n"); |
1039 | host->flags |= WBSD_FCARD_PRESENT; | |
fecf92ba | 1040 | |
210ce2a7 | 1041 | delay = 500; |
85bcc130 | 1042 | } |
cfa7f521 | 1043 | } else if (host->flags & WBSD_FCARD_PRESENT) { |
1da177e4 | 1044 | DBG("Card removed\n"); |
85bcc130 | 1045 | host->flags &= ~WBSD_FCARD_PRESENT; |
fecf92ba | 1046 | |
cfa7f521 | 1047 | if (host->mrq) { |
d191634f PO |
1048 | printk(KERN_ERR "%s: Card removed during transfer!\n", |
1049 | mmc_hostname(host->mmc)); | |
1da177e4 | 1050 | wbsd_reset(host); |
fecf92ba | 1051 | |
1da177e4 LT |
1052 | host->mrq->cmd->error = MMC_ERR_FAILED; |
1053 | tasklet_schedule(&host->finish_tasklet); | |
1054 | } | |
fecf92ba | 1055 | |
210ce2a7 | 1056 | delay = 0; |
6e6293dd | 1057 | } |
210ce2a7 PO |
1058 | |
1059 | /* | |
1060 | * Unlock first since we might get a call back. | |
1061 | */ | |
1062 | ||
1063 | spin_unlock(&host->lock); | |
1064 | ||
1065 | if (delay != -1) | |
1066 | mmc_detect_change(host->mmc, msecs_to_jiffies(delay)); | |
1da177e4 LT |
1067 | } |
1068 | ||
1069 | static void wbsd_tasklet_fifo(unsigned long param) | |
1070 | { | |
cfa7f521 PO |
1071 | struct wbsd_host *host = (struct wbsd_host *)param; |
1072 | struct mmc_data *data; | |
fecf92ba | 1073 | |
1da177e4 | 1074 | spin_lock(&host->lock); |
fecf92ba | 1075 | |
1da177e4 LT |
1076 | if (!host->mrq) |
1077 | goto end; | |
fecf92ba | 1078 | |
1da177e4 LT |
1079 | data = wbsd_get_data(host); |
1080 | if (!data) | |
1081 | goto end; | |
1082 | ||
1083 | if (data->flags & MMC_DATA_WRITE) | |
1084 | wbsd_fill_fifo(host); | |
1085 | else | |
1086 | wbsd_empty_fifo(host); | |
1087 | ||
1088 | /* | |
1089 | * Done? | |
1090 | */ | |
14d836e7 | 1091 | if (host->num_sg == 0) { |
1da177e4 LT |
1092 | wbsd_write_index(host, WBSD_IDX_FIFOEN, 0); |
1093 | tasklet_schedule(&host->finish_tasklet); | |
1094 | } | |
1095 | ||
fecf92ba | 1096 | end: |
1da177e4 LT |
1097 | spin_unlock(&host->lock); |
1098 | } | |
1099 | ||
1100 | static void wbsd_tasklet_crc(unsigned long param) | |
1101 | { | |
cfa7f521 PO |
1102 | struct wbsd_host *host = (struct wbsd_host *)param; |
1103 | struct mmc_data *data; | |
fecf92ba | 1104 | |
1da177e4 | 1105 | spin_lock(&host->lock); |
fecf92ba | 1106 | |
1da177e4 LT |
1107 | if (!host->mrq) |
1108 | goto end; | |
fecf92ba | 1109 | |
1da177e4 LT |
1110 | data = wbsd_get_data(host); |
1111 | if (!data) | |
1112 | goto end; | |
fecf92ba | 1113 | |
1da177e4 LT |
1114 | DBGF("CRC error\n"); |
1115 | ||
1116 | data->error = MMC_ERR_BADCRC; | |
fecf92ba | 1117 | |
1da177e4 LT |
1118 | tasklet_schedule(&host->finish_tasklet); |
1119 | ||
fecf92ba | 1120 | end: |
1da177e4 LT |
1121 | spin_unlock(&host->lock); |
1122 | } | |
1123 | ||
1124 | static void wbsd_tasklet_timeout(unsigned long param) | |
1125 | { | |
cfa7f521 PO |
1126 | struct wbsd_host *host = (struct wbsd_host *)param; |
1127 | struct mmc_data *data; | |
fecf92ba | 1128 | |
1da177e4 | 1129 | spin_lock(&host->lock); |
fecf92ba | 1130 | |
1da177e4 LT |
1131 | if (!host->mrq) |
1132 | goto end; | |
fecf92ba | 1133 | |
1da177e4 LT |
1134 | data = wbsd_get_data(host); |
1135 | if (!data) | |
1136 | goto end; | |
fecf92ba | 1137 | |
1da177e4 LT |
1138 | DBGF("Timeout\n"); |
1139 | ||
1140 | data->error = MMC_ERR_TIMEOUT; | |
fecf92ba | 1141 | |
1da177e4 LT |
1142 | tasklet_schedule(&host->finish_tasklet); |
1143 | ||
fecf92ba | 1144 | end: |
1da177e4 LT |
1145 | spin_unlock(&host->lock); |
1146 | } | |
1147 | ||
1148 | static void wbsd_tasklet_finish(unsigned long param) | |
1149 | { | |
cfa7f521 PO |
1150 | struct wbsd_host *host = (struct wbsd_host *)param; |
1151 | struct mmc_data *data; | |
fecf92ba | 1152 | |
1da177e4 | 1153 | spin_lock(&host->lock); |
fecf92ba | 1154 | |
1da177e4 LT |
1155 | WARN_ON(!host->mrq); |
1156 | if (!host->mrq) | |
1157 | goto end; | |
fecf92ba | 1158 | |
1da177e4 LT |
1159 | data = wbsd_get_data(host); |
1160 | if (!data) | |
1161 | goto end; | |
1162 | ||
1163 | wbsd_finish_data(host, data); | |
fecf92ba PO |
1164 | |
1165 | end: | |
1da177e4 LT |
1166 | spin_unlock(&host->lock); |
1167 | } | |
1168 | ||
1169 | static void wbsd_tasklet_block(unsigned long param) | |
1170 | { | |
cfa7f521 PO |
1171 | struct wbsd_host *host = (struct wbsd_host *)param; |
1172 | struct mmc_data *data; | |
fecf92ba | 1173 | |
1da177e4 LT |
1174 | spin_lock(&host->lock); |
1175 | ||
1176 | if ((wbsd_read_index(host, WBSD_IDX_CRCSTATUS) & WBSD_CRC_MASK) != | |
cfa7f521 | 1177 | WBSD_CRC_OK) { |
1da177e4 LT |
1178 | data = wbsd_get_data(host); |
1179 | if (!data) | |
1180 | goto end; | |
fecf92ba | 1181 | |
1da177e4 LT |
1182 | DBGF("CRC error\n"); |
1183 | ||
1184 | data->error = MMC_ERR_BADCRC; | |
fecf92ba | 1185 | |
1da177e4 LT |
1186 | tasklet_schedule(&host->finish_tasklet); |
1187 | } | |
1188 | ||
fecf92ba | 1189 | end: |
1da177e4 LT |
1190 | spin_unlock(&host->lock); |
1191 | } | |
1192 | ||
1193 | /* | |
1194 | * Interrupt handling | |
1195 | */ | |
1196 | ||
7d12e780 | 1197 | static irqreturn_t wbsd_irq(int irq, void *dev_id) |
1da177e4 | 1198 | { |
cfa7f521 | 1199 | struct wbsd_host *host = dev_id; |
1da177e4 | 1200 | int isr; |
fecf92ba | 1201 | |
1da177e4 LT |
1202 | isr = inb(host->base + WBSD_ISR); |
1203 | ||
1204 | /* | |
1205 | * Was it actually our hardware that caused the interrupt? | |
1206 | */ | |
1207 | if (isr == 0xff || isr == 0x00) | |
1208 | return IRQ_NONE; | |
fecf92ba | 1209 | |
1da177e4 LT |
1210 | host->isr |= isr; |
1211 | ||
1212 | /* | |
1213 | * Schedule tasklets as needed. | |
1214 | */ | |
1215 | if (isr & WBSD_INT_CARD) | |
1216 | tasklet_schedule(&host->card_tasklet); | |
1217 | if (isr & WBSD_INT_FIFO_THRE) | |
1218 | tasklet_schedule(&host->fifo_tasklet); | |
1219 | if (isr & WBSD_INT_CRC) | |
1220 | tasklet_hi_schedule(&host->crc_tasklet); | |
1221 | if (isr & WBSD_INT_TIMEOUT) | |
1222 | tasklet_hi_schedule(&host->timeout_tasklet); | |
1223 | if (isr & WBSD_INT_BUSYEND) | |
1224 | tasklet_hi_schedule(&host->block_tasklet); | |
1225 | if (isr & WBSD_INT_TC) | |
1226 | tasklet_schedule(&host->finish_tasklet); | |
fecf92ba | 1227 | |
1da177e4 LT |
1228 | return IRQ_HANDLED; |
1229 | } | |
1230 | ||
85bcc130 PO |
1231 | /*****************************************************************************\ |
1232 | * * | |
1233 | * Device initialisation and shutdown * | |
1234 | * * | |
1235 | \*****************************************************************************/ | |
1236 | ||
1da177e4 | 1237 | /* |
85bcc130 | 1238 | * Allocate/free MMC structure. |
1da177e4 LT |
1239 | */ |
1240 | ||
cfa7f521 | 1241 | static int __devinit wbsd_alloc_mmc(struct device *dev) |
85bcc130 | 1242 | { |
cfa7f521 PO |
1243 | struct mmc_host *mmc; |
1244 | struct wbsd_host *host; | |
fecf92ba | 1245 | |
85bcc130 PO |
1246 | /* |
1247 | * Allocate MMC structure. | |
1248 | */ | |
1249 | mmc = mmc_alloc_host(sizeof(struct wbsd_host), dev); | |
1250 | if (!mmc) | |
1251 | return -ENOMEM; | |
fecf92ba | 1252 | |
85bcc130 PO |
1253 | host = mmc_priv(mmc); |
1254 | host->mmc = mmc; | |
1255 | ||
1256 | host->dma = -1; | |
1257 | ||
1258 | /* | |
1259 | * Set host parameters. | |
1260 | */ | |
1261 | mmc->ops = &wbsd_ops; | |
1262 | mmc->f_min = 375000; | |
1263 | mmc->f_max = 24000000; | |
cfa7f521 | 1264 | mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; |
42431acb | 1265 | mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_MULTIWRITE | MMC_CAP_BYTEBLOCK; |
fecf92ba | 1266 | |
85bcc130 | 1267 | spin_lock_init(&host->lock); |
fecf92ba | 1268 | |
6e6293dd | 1269 | /* |
1656fa57 | 1270 | * Set up timers |
6e6293dd | 1271 | */ |
1656fa57 PO |
1272 | init_timer(&host->ignore_timer); |
1273 | host->ignore_timer.data = (unsigned long)host; | |
1274 | host->ignore_timer.function = wbsd_reset_ignore; | |
fecf92ba | 1275 | |
85bcc130 PO |
1276 | /* |
1277 | * Maximum number of segments. Worst case is one sector per segment | |
1278 | * so this will be 64kB/512. | |
1279 | */ | |
1280 | mmc->max_hw_segs = 128; | |
1281 | mmc->max_phys_segs = 128; | |
fecf92ba | 1282 | |
85bcc130 | 1283 | /* |
55db890a | 1284 | * Maximum request size. Also limited by 64KiB buffer. |
85bcc130 | 1285 | */ |
55db890a | 1286 | mmc->max_req_size = 65536; |
fecf92ba | 1287 | |
85bcc130 PO |
1288 | /* |
1289 | * Maximum segment size. Could be one segment with the maximum number | |
55db890a | 1290 | * of bytes. |
85bcc130 | 1291 | */ |
55db890a | 1292 | mmc->max_seg_size = mmc->max_req_size; |
fecf92ba | 1293 | |
fe4a3c7a PO |
1294 | /* |
1295 | * Maximum block size. We have 12 bits (= 4095) but have to subtract | |
1296 | * space for CRC. So the maximum is 4095 - 4*2 = 4087. | |
1297 | */ | |
1298 | mmc->max_blk_size = 4087; | |
1299 | ||
55db890a PO |
1300 | /* |
1301 | * Maximum block count. There is no real limit so the maximum | |
1302 | * request size will be the only restriction. | |
1303 | */ | |
1304 | mmc->max_blk_count = mmc->max_req_size; | |
1305 | ||
85bcc130 | 1306 | dev_set_drvdata(dev, mmc); |
fecf92ba | 1307 | |
85bcc130 PO |
1308 | return 0; |
1309 | } | |
1310 | ||
cfa7f521 | 1311 | static void __devexit wbsd_free_mmc(struct device *dev) |
85bcc130 | 1312 | { |
cfa7f521 PO |
1313 | struct mmc_host *mmc; |
1314 | struct wbsd_host *host; | |
fecf92ba | 1315 | |
85bcc130 PO |
1316 | mmc = dev_get_drvdata(dev); |
1317 | if (!mmc) | |
1318 | return; | |
fecf92ba | 1319 | |
6e6293dd PO |
1320 | host = mmc_priv(mmc); |
1321 | BUG_ON(host == NULL); | |
fecf92ba | 1322 | |
1656fa57 | 1323 | del_timer_sync(&host->ignore_timer); |
fecf92ba | 1324 | |
85bcc130 | 1325 | mmc_free_host(mmc); |
fecf92ba | 1326 | |
85bcc130 PO |
1327 | dev_set_drvdata(dev, NULL); |
1328 | } | |
1329 | ||
1330 | /* | |
1331 | * Scan for known chip id:s | |
1332 | */ | |
1333 | ||
cfa7f521 | 1334 | static int __devinit wbsd_scan(struct wbsd_host *host) |
1da177e4 LT |
1335 | { |
1336 | int i, j, k; | |
1337 | int id; | |
fecf92ba | 1338 | |
1da177e4 LT |
1339 | /* |
1340 | * Iterate through all ports, all codes to | |
1341 | * find hardware that is in our known list. | |
1342 | */ | |
63648fb5 | 1343 | for (i = 0; i < ARRAY_SIZE(config_ports); i++) { |
1da177e4 LT |
1344 | if (!request_region(config_ports[i], 2, DRIVER_NAME)) |
1345 | continue; | |
fecf92ba | 1346 | |
63648fb5 | 1347 | for (j = 0; j < ARRAY_SIZE(unlock_codes); j++) { |
1da177e4 | 1348 | id = 0xFFFF; |
fecf92ba | 1349 | |
19c1f3ca PO |
1350 | host->config = config_ports[i]; |
1351 | host->unlock_code = unlock_codes[j]; | |
1352 | ||
1353 | wbsd_unlock_config(host); | |
fecf92ba | 1354 | |
1da177e4 LT |
1355 | outb(WBSD_CONF_ID_HI, config_ports[i]); |
1356 | id = inb(config_ports[i] + 1) << 8; | |
1357 | ||
1358 | outb(WBSD_CONF_ID_LO, config_ports[i]); | |
1359 | id |= inb(config_ports[i] + 1); | |
fecf92ba | 1360 | |
19c1f3ca PO |
1361 | wbsd_lock_config(host); |
1362 | ||
63648fb5 | 1363 | for (k = 0; k < ARRAY_SIZE(valid_ids); k++) { |
cfa7f521 | 1364 | if (id == valid_ids[k]) { |
1da177e4 | 1365 | host->chip_id = id; |
fecf92ba | 1366 | |
1da177e4 LT |
1367 | return 0; |
1368 | } | |
1369 | } | |
fecf92ba | 1370 | |
cfa7f521 | 1371 | if (id != 0xFFFF) { |
1da177e4 LT |
1372 | DBG("Unknown hardware (id %x) found at %x\n", |
1373 | id, config_ports[i]); | |
1374 | } | |
1da177e4 | 1375 | } |
fecf92ba | 1376 | |
1da177e4 LT |
1377 | release_region(config_ports[i], 2); |
1378 | } | |
fecf92ba | 1379 | |
19c1f3ca PO |
1380 | host->config = 0; |
1381 | host->unlock_code = 0; | |
1382 | ||
1da177e4 LT |
1383 | return -ENODEV; |
1384 | } | |
1385 | ||
85bcc130 PO |
1386 | /* |
1387 | * Allocate/free io port ranges | |
1388 | */ | |
1389 | ||
cfa7f521 | 1390 | static int __devinit wbsd_request_region(struct wbsd_host *host, int base) |
1da177e4 | 1391 | { |
916f3ac6 | 1392 | if (base & 0x7) |
1da177e4 | 1393 | return -EINVAL; |
fecf92ba | 1394 | |
85bcc130 | 1395 | if (!request_region(base, 8, DRIVER_NAME)) |
1da177e4 | 1396 | return -EIO; |
fecf92ba | 1397 | |
916f3ac6 | 1398 | host->base = base; |
fecf92ba | 1399 | |
1da177e4 LT |
1400 | return 0; |
1401 | } | |
1402 | ||
cfa7f521 | 1403 | static void __devexit wbsd_release_regions(struct wbsd_host *host) |
1da177e4 LT |
1404 | { |
1405 | if (host->base) | |
1406 | release_region(host->base, 8); | |
fecf92ba | 1407 | |
85bcc130 | 1408 | host->base = 0; |
1da177e4 LT |
1409 | |
1410 | if (host->config) | |
1411 | release_region(host->config, 2); | |
fecf92ba | 1412 | |
85bcc130 | 1413 | host->config = 0; |
1da177e4 LT |
1414 | } |
1415 | ||
85bcc130 PO |
1416 | /* |
1417 | * Allocate/free DMA port and buffer | |
1418 | */ | |
1419 | ||
cfa7f521 | 1420 | static void __devinit wbsd_request_dma(struct wbsd_host *host, int dma) |
1da177e4 | 1421 | { |
1da177e4 LT |
1422 | if (dma < 0) |
1423 | return; | |
fecf92ba | 1424 | |
1da177e4 LT |
1425 | if (request_dma(dma, DRIVER_NAME)) |
1426 | goto err; | |
fecf92ba | 1427 | |
1da177e4 LT |
1428 | /* |
1429 | * We need to allocate a special buffer in | |
1430 | * order for ISA to be able to DMA to it. | |
1431 | */ | |
85bcc130 | 1432 | host->dma_buffer = kmalloc(WBSD_DMA_SIZE, |
1da177e4 LT |
1433 | GFP_NOIO | GFP_DMA | __GFP_REPEAT | __GFP_NOWARN); |
1434 | if (!host->dma_buffer) | |
1435 | goto free; | |
1436 | ||
1437 | /* | |
1438 | * Translate the address to a physical address. | |
1439 | */ | |
fcaf71fd | 1440 | host->dma_addr = dma_map_single(mmc_dev(host->mmc), host->dma_buffer, |
85bcc130 | 1441 | WBSD_DMA_SIZE, DMA_BIDIRECTIONAL); |
fecf92ba | 1442 | |
1da177e4 LT |
1443 | /* |
1444 | * ISA DMA must be aligned on a 64k basis. | |
1445 | */ | |
1446 | if ((host->dma_addr & 0xffff) != 0) | |
1447 | goto kfree; | |
1448 | /* | |
1449 | * ISA cannot access memory above 16 MB. | |
1450 | */ | |
1451 | else if (host->dma_addr >= 0x1000000) | |
1452 | goto kfree; | |
1453 | ||
1454 | host->dma = dma; | |
fecf92ba | 1455 | |
1da177e4 | 1456 | return; |
fecf92ba | 1457 | |
1da177e4 LT |
1458 | kfree: |
1459 | /* | |
1460 | * If we've gotten here then there is some kind of alignment bug | |
1461 | */ | |
1462 | BUG_ON(1); | |
fecf92ba | 1463 | |
fcaf71fd | 1464 | dma_unmap_single(mmc_dev(host->mmc), host->dma_addr, |
cfa7f521 | 1465 | WBSD_DMA_SIZE, DMA_BIDIRECTIONAL); |
85bcc130 | 1466 | host->dma_addr = (dma_addr_t)NULL; |
fecf92ba | 1467 | |
1da177e4 LT |
1468 | kfree(host->dma_buffer); |
1469 | host->dma_buffer = NULL; | |
1470 | ||
1471 | free: | |
1472 | free_dma(dma); | |
1473 | ||
1474 | err: | |
1475 | printk(KERN_WARNING DRIVER_NAME ": Unable to allocate DMA %d. " | |
1476 | "Falling back on FIFO.\n", dma); | |
1477 | } | |
1478 | ||
cfa7f521 | 1479 | static void __devexit wbsd_release_dma(struct wbsd_host *host) |
85bcc130 | 1480 | { |
cfa7f521 | 1481 | if (host->dma_addr) { |
fcaf71fd | 1482 | dma_unmap_single(mmc_dev(host->mmc), host->dma_addr, |
cfa7f521 PO |
1483 | WBSD_DMA_SIZE, DMA_BIDIRECTIONAL); |
1484 | } | |
6044ec88 | 1485 | kfree(host->dma_buffer); |
85bcc130 PO |
1486 | if (host->dma >= 0) |
1487 | free_dma(host->dma); | |
fecf92ba | 1488 | |
85bcc130 PO |
1489 | host->dma = -1; |
1490 | host->dma_buffer = NULL; | |
1491 | host->dma_addr = (dma_addr_t)NULL; | |
1492 | } | |
1da177e4 LT |
1493 | |
1494 | /* | |
85bcc130 | 1495 | * Allocate/free IRQ. |
1da177e4 LT |
1496 | */ |
1497 | ||
cfa7f521 | 1498 | static int __devinit wbsd_request_irq(struct wbsd_host *host, int irq) |
1da177e4 | 1499 | { |
1da177e4 | 1500 | int ret; |
fecf92ba | 1501 | |
1da177e4 | 1502 | /* |
85bcc130 | 1503 | * Allocate interrupt. |
1da177e4 | 1504 | */ |
85bcc130 | 1505 | |
dace1453 | 1506 | ret = request_irq(irq, wbsd_irq, IRQF_SHARED, DRIVER_NAME, host); |
85bcc130 PO |
1507 | if (ret) |
1508 | return ret; | |
fecf92ba | 1509 | |
85bcc130 PO |
1510 | host->irq = irq; |
1511 | ||
1da177e4 | 1512 | /* |
85bcc130 | 1513 | * Set up tasklets. |
1da177e4 | 1514 | */ |
cfa7f521 PO |
1515 | tasklet_init(&host->card_tasklet, wbsd_tasklet_card, |
1516 | (unsigned long)host); | |
1517 | tasklet_init(&host->fifo_tasklet, wbsd_tasklet_fifo, | |
1518 | (unsigned long)host); | |
1519 | tasklet_init(&host->crc_tasklet, wbsd_tasklet_crc, | |
1520 | (unsigned long)host); | |
1521 | tasklet_init(&host->timeout_tasklet, wbsd_tasklet_timeout, | |
1522 | (unsigned long)host); | |
1523 | tasklet_init(&host->finish_tasklet, wbsd_tasklet_finish, | |
1524 | (unsigned long)host); | |
1525 | tasklet_init(&host->block_tasklet, wbsd_tasklet_block, | |
1526 | (unsigned long)host); | |
fecf92ba | 1527 | |
85bcc130 PO |
1528 | return 0; |
1529 | } | |
1da177e4 | 1530 | |
cfa7f521 | 1531 | static void __devexit wbsd_release_irq(struct wbsd_host *host) |
85bcc130 PO |
1532 | { |
1533 | if (!host->irq) | |
1534 | return; | |
1da177e4 | 1535 | |
85bcc130 | 1536 | free_irq(host->irq, host); |
fecf92ba | 1537 | |
85bcc130 | 1538 | host->irq = 0; |
fecf92ba | 1539 | |
85bcc130 PO |
1540 | tasklet_kill(&host->card_tasklet); |
1541 | tasklet_kill(&host->fifo_tasklet); | |
1542 | tasklet_kill(&host->crc_tasklet); | |
1543 | tasklet_kill(&host->timeout_tasklet); | |
1544 | tasklet_kill(&host->finish_tasklet); | |
1545 | tasklet_kill(&host->block_tasklet); | |
1546 | } | |
1547 | ||
1548 | /* | |
1549 | * Allocate all resources for the host. | |
1550 | */ | |
1551 | ||
cfa7f521 | 1552 | static int __devinit wbsd_request_resources(struct wbsd_host *host, |
85bcc130 PO |
1553 | int base, int irq, int dma) |
1554 | { | |
1555 | int ret; | |
fecf92ba | 1556 | |
1da177e4 LT |
1557 | /* |
1558 | * Allocate I/O ports. | |
1559 | */ | |
85bcc130 | 1560 | ret = wbsd_request_region(host, base); |
1da177e4 | 1561 | if (ret) |
85bcc130 | 1562 | return ret; |
1da177e4 LT |
1563 | |
1564 | /* | |
85bcc130 | 1565 | * Allocate interrupt. |
1da177e4 | 1566 | */ |
85bcc130 PO |
1567 | ret = wbsd_request_irq(host, irq); |
1568 | if (ret) | |
1569 | return ret; | |
1570 | ||
1571 | /* | |
1572 | * Allocate DMA. | |
1573 | */ | |
1574 | wbsd_request_dma(host, dma); | |
fecf92ba | 1575 | |
85bcc130 PO |
1576 | return 0; |
1577 | } | |
1578 | ||
1579 | /* | |
1580 | * Release all resources for the host. | |
1581 | */ | |
1582 | ||
cfa7f521 | 1583 | static void __devexit wbsd_release_resources(struct wbsd_host *host) |
85bcc130 PO |
1584 | { |
1585 | wbsd_release_dma(host); | |
1586 | wbsd_release_irq(host); | |
1587 | wbsd_release_regions(host); | |
1588 | } | |
1589 | ||
1590 | /* | |
1591 | * Configure the resources the chip should use. | |
1592 | */ | |
1593 | ||
cfa7f521 | 1594 | static void wbsd_chip_config(struct wbsd_host *host) |
85bcc130 | 1595 | { |
19c1f3ca PO |
1596 | wbsd_unlock_config(host); |
1597 | ||
85bcc130 PO |
1598 | /* |
1599 | * Reset the chip. | |
fecf92ba | 1600 | */ |
85bcc130 PO |
1601 | wbsd_write_config(host, WBSD_CONF_SWRST, 1); |
1602 | wbsd_write_config(host, WBSD_CONF_SWRST, 0); | |
1da177e4 LT |
1603 | |
1604 | /* | |
1605 | * Select SD/MMC function. | |
1606 | */ | |
1607 | wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD); | |
fecf92ba | 1608 | |
1da177e4 LT |
1609 | /* |
1610 | * Set up card detection. | |
1611 | */ | |
85bcc130 | 1612 | wbsd_write_config(host, WBSD_CONF_PINS, WBSD_PINS_DETECT_GP11); |
fecf92ba | 1613 | |
1da177e4 | 1614 | /* |
85bcc130 | 1615 | * Configure chip |
1da177e4 LT |
1616 | */ |
1617 | wbsd_write_config(host, WBSD_CONF_PORT_HI, host->base >> 8); | |
1618 | wbsd_write_config(host, WBSD_CONF_PORT_LO, host->base & 0xff); | |
fecf92ba | 1619 | |
85bcc130 | 1620 | wbsd_write_config(host, WBSD_CONF_IRQ, host->irq); |
fecf92ba | 1621 | |
85bcc130 PO |
1622 | if (host->dma >= 0) |
1623 | wbsd_write_config(host, WBSD_CONF_DRQ, host->dma); | |
fecf92ba | 1624 | |
1da177e4 | 1625 | /* |
85bcc130 | 1626 | * Enable and power up chip. |
1da177e4 | 1627 | */ |
85bcc130 PO |
1628 | wbsd_write_config(host, WBSD_CONF_ENABLE, 1); |
1629 | wbsd_write_config(host, WBSD_CONF_POWER, 0x20); | |
19c1f3ca PO |
1630 | |
1631 | wbsd_lock_config(host); | |
85bcc130 PO |
1632 | } |
1633 | ||
1634 | /* | |
1635 | * Check that configured resources are correct. | |
1636 | */ | |
fecf92ba | 1637 | |
cfa7f521 | 1638 | static int wbsd_chip_validate(struct wbsd_host *host) |
85bcc130 PO |
1639 | { |
1640 | int base, irq, dma; | |
fecf92ba | 1641 | |
19c1f3ca PO |
1642 | wbsd_unlock_config(host); |
1643 | ||
1da177e4 | 1644 | /* |
85bcc130 | 1645 | * Select SD/MMC function. |
1da177e4 | 1646 | */ |
85bcc130 | 1647 | wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD); |
fecf92ba | 1648 | |
1da177e4 | 1649 | /* |
85bcc130 | 1650 | * Read configuration. |
1da177e4 | 1651 | */ |
85bcc130 PO |
1652 | base = wbsd_read_config(host, WBSD_CONF_PORT_HI) << 8; |
1653 | base |= wbsd_read_config(host, WBSD_CONF_PORT_LO); | |
fecf92ba | 1654 | |
85bcc130 | 1655 | irq = wbsd_read_config(host, WBSD_CONF_IRQ); |
fecf92ba | 1656 | |
85bcc130 | 1657 | dma = wbsd_read_config(host, WBSD_CONF_DRQ); |
fecf92ba | 1658 | |
19c1f3ca PO |
1659 | wbsd_lock_config(host); |
1660 | ||
1da177e4 | 1661 | /* |
85bcc130 | 1662 | * Validate against given configuration. |
1da177e4 | 1663 | */ |
85bcc130 PO |
1664 | if (base != host->base) |
1665 | return 0; | |
1666 | if (irq != host->irq) | |
1667 | return 0; | |
1668 | if ((dma != host->dma) && (host->dma != -1)) | |
1669 | return 0; | |
fecf92ba | 1670 | |
85bcc130 PO |
1671 | return 1; |
1672 | } | |
1673 | ||
19c1f3ca PO |
1674 | /* |
1675 | * Powers down the SD function | |
1676 | */ | |
1677 | ||
cfa7f521 | 1678 | static void wbsd_chip_poweroff(struct wbsd_host *host) |
19c1f3ca PO |
1679 | { |
1680 | wbsd_unlock_config(host); | |
1681 | ||
1682 | wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD); | |
1683 | wbsd_write_config(host, WBSD_CONF_ENABLE, 0); | |
1684 | ||
1685 | wbsd_lock_config(host); | |
1686 | } | |
1687 | ||
85bcc130 PO |
1688 | /*****************************************************************************\ |
1689 | * * | |
1690 | * Devices setup and shutdown * | |
1691 | * * | |
1692 | \*****************************************************************************/ | |
1693 | ||
cfa7f521 | 1694 | static int __devinit wbsd_init(struct device *dev, int base, int irq, int dma, |
85bcc130 PO |
1695 | int pnp) |
1696 | { | |
cfa7f521 PO |
1697 | struct wbsd_host *host = NULL; |
1698 | struct mmc_host *mmc = NULL; | |
85bcc130 | 1699 | int ret; |
fecf92ba | 1700 | |
85bcc130 PO |
1701 | ret = wbsd_alloc_mmc(dev); |
1702 | if (ret) | |
1703 | return ret; | |
fecf92ba | 1704 | |
85bcc130 PO |
1705 | mmc = dev_get_drvdata(dev); |
1706 | host = mmc_priv(mmc); | |
fecf92ba | 1707 | |
1da177e4 | 1708 | /* |
85bcc130 | 1709 | * Scan for hardware. |
1da177e4 | 1710 | */ |
85bcc130 | 1711 | ret = wbsd_scan(host); |
cfa7f521 PO |
1712 | if (ret) { |
1713 | if (pnp && (ret == -ENODEV)) { | |
85bcc130 PO |
1714 | printk(KERN_WARNING DRIVER_NAME |
1715 | ": Unable to confirm device presence. You may " | |
1716 | "experience lock-ups.\n"); | |
cfa7f521 | 1717 | } else { |
85bcc130 PO |
1718 | wbsd_free_mmc(dev); |
1719 | return ret; | |
1720 | } | |
1721 | } | |
fecf92ba | 1722 | |
1da177e4 | 1723 | /* |
85bcc130 | 1724 | * Request resources. |
1da177e4 | 1725 | */ |
dd2c609c | 1726 | ret = wbsd_request_resources(host, base, irq, dma); |
cfa7f521 | 1727 | if (ret) { |
85bcc130 PO |
1728 | wbsd_release_resources(host); |
1729 | wbsd_free_mmc(dev); | |
1730 | return ret; | |
1731 | } | |
fecf92ba | 1732 | |
1da177e4 | 1733 | /* |
85bcc130 | 1734 | * See if chip needs to be configured. |
1da177e4 | 1735 | */ |
cfa7f521 PO |
1736 | if (pnp) { |
1737 | if ((host->config != 0) && !wbsd_chip_validate(host)) { | |
85bcc130 PO |
1738 | printk(KERN_WARNING DRIVER_NAME |
1739 | ": PnP active but chip not configured! " | |
1740 | "You probably have a buggy BIOS. " | |
1741 | "Configuring chip manually.\n"); | |
1742 | wbsd_chip_config(host); | |
1743 | } | |
cfa7f521 | 1744 | } else |
85bcc130 | 1745 | wbsd_chip_config(host); |
fecf92ba | 1746 | |
1da177e4 LT |
1747 | /* |
1748 | * Power Management stuff. No idea how this works. | |
1749 | * Not tested. | |
1750 | */ | |
1751 | #ifdef CONFIG_PM | |
cfa7f521 | 1752 | if (host->config) { |
19c1f3ca | 1753 | wbsd_unlock_config(host); |
85bcc130 | 1754 | wbsd_write_config(host, WBSD_CONF_PME, 0xA0); |
19c1f3ca PO |
1755 | wbsd_lock_config(host); |
1756 | } | |
1da177e4 | 1757 | #endif |
85bcc130 PO |
1758 | /* |
1759 | * Allow device to initialise itself properly. | |
1760 | */ | |
1761 | mdelay(5); | |
1da177e4 LT |
1762 | |
1763 | /* | |
1764 | * Reset the chip into a known state. | |
1765 | */ | |
1766 | wbsd_init_device(host); | |
fecf92ba | 1767 | |
1da177e4 LT |
1768 | mmc_add_host(mmc); |
1769 | ||
d366b643 | 1770 | printk(KERN_INFO "%s: W83L51xD", mmc_hostname(mmc)); |
85bcc130 PO |
1771 | if (host->chip_id != 0) |
1772 | printk(" id %x", (int)host->chip_id); | |
1773 | printk(" at 0x%x irq %d", (int)host->base, (int)host->irq); | |
1774 | if (host->dma >= 0) | |
1775 | printk(" dma %d", (int)host->dma); | |
1776 | else | |
1777 | printk(" FIFO"); | |
1778 | if (pnp) | |
1779 | printk(" PnP"); | |
1780 | printk("\n"); | |
1da177e4 LT |
1781 | |
1782 | return 0; | |
1da177e4 LT |
1783 | } |
1784 | ||
cfa7f521 | 1785 | static void __devexit wbsd_shutdown(struct device *dev, int pnp) |
1da177e4 | 1786 | { |
cfa7f521 PO |
1787 | struct mmc_host *mmc = dev_get_drvdata(dev); |
1788 | struct wbsd_host *host; | |
fecf92ba | 1789 | |
1da177e4 | 1790 | if (!mmc) |
85bcc130 | 1791 | return; |
1da177e4 LT |
1792 | |
1793 | host = mmc_priv(mmc); | |
fecf92ba | 1794 | |
1da177e4 LT |
1795 | mmc_remove_host(mmc); |
1796 | ||
19c1f3ca PO |
1797 | /* |
1798 | * Power down the SD/MMC function. | |
1799 | */ | |
85bcc130 | 1800 | if (!pnp) |
19c1f3ca | 1801 | wbsd_chip_poweroff(host); |
fecf92ba | 1802 | |
85bcc130 | 1803 | wbsd_release_resources(host); |
fecf92ba | 1804 | |
85bcc130 PO |
1805 | wbsd_free_mmc(dev); |
1806 | } | |
1da177e4 | 1807 | |
85bcc130 PO |
1808 | /* |
1809 | * Non-PnP | |
1810 | */ | |
1811 | ||
cfa7f521 | 1812 | static int __devinit wbsd_probe(struct platform_device *dev) |
85bcc130 | 1813 | { |
dd2c609c | 1814 | /* Use the module parameters for resources */ |
3ae5eaec | 1815 | return wbsd_init(&dev->dev, io, irq, dma, 0); |
85bcc130 PO |
1816 | } |
1817 | ||
cfa7f521 | 1818 | static int __devexit wbsd_remove(struct platform_device *dev) |
85bcc130 | 1819 | { |
3ae5eaec | 1820 | wbsd_shutdown(&dev->dev, 0); |
85bcc130 PO |
1821 | |
1822 | return 0; | |
1823 | } | |
1824 | ||
1825 | /* | |
1826 | * PnP | |
1827 | */ | |
1828 | ||
1829 | #ifdef CONFIG_PNP | |
1830 | ||
1831 | static int __devinit | |
cfa7f521 | 1832 | wbsd_pnp_probe(struct pnp_dev *pnpdev, const struct pnp_device_id *dev_id) |
85bcc130 PO |
1833 | { |
1834 | int io, irq, dma; | |
fecf92ba | 1835 | |
85bcc130 PO |
1836 | /* |
1837 | * Get resources from PnP layer. | |
1838 | */ | |
1839 | io = pnp_port_start(pnpdev, 0); | |
1840 | irq = pnp_irq(pnpdev, 0); | |
1841 | if (pnp_dma_valid(pnpdev, 0)) | |
1842 | dma = pnp_dma(pnpdev, 0); | |
1843 | else | |
1844 | dma = -1; | |
fecf92ba | 1845 | |
85bcc130 | 1846 | DBGF("PnP resources: port %3x irq %d dma %d\n", io, irq, dma); |
fecf92ba | 1847 | |
85bcc130 PO |
1848 | return wbsd_init(&pnpdev->dev, io, irq, dma, 1); |
1849 | } | |
1da177e4 | 1850 | |
cfa7f521 | 1851 | static void __devexit wbsd_pnp_remove(struct pnp_dev *dev) |
85bcc130 PO |
1852 | { |
1853 | wbsd_shutdown(&dev->dev, 1); | |
1da177e4 LT |
1854 | } |
1855 | ||
85bcc130 PO |
1856 | #endif /* CONFIG_PNP */ |
1857 | ||
1da177e4 LT |
1858 | /* |
1859 | * Power management | |
1860 | */ | |
1861 | ||
1862 | #ifdef CONFIG_PM | |
19c1f3ca | 1863 | |
5e68d95d PO |
1864 | static int wbsd_suspend(struct wbsd_host *host, pm_message_t state) |
1865 | { | |
1866 | BUG_ON(host == NULL); | |
1867 | ||
1868 | return mmc_suspend_host(host->mmc, state); | |
1869 | } | |
1870 | ||
1871 | static int wbsd_resume(struct wbsd_host *host) | |
1872 | { | |
1873 | BUG_ON(host == NULL); | |
1874 | ||
1875 | wbsd_init_device(host); | |
1876 | ||
1877 | return mmc_resume_host(host->mmc); | |
1878 | } | |
1879 | ||
cfa7f521 PO |
1880 | static int wbsd_platform_suspend(struct platform_device *dev, |
1881 | pm_message_t state) | |
1da177e4 | 1882 | { |
3ae5eaec | 1883 | struct mmc_host *mmc = platform_get_drvdata(dev); |
19c1f3ca PO |
1884 | struct wbsd_host *host; |
1885 | int ret; | |
1886 | ||
5e68d95d | 1887 | if (mmc == NULL) |
19c1f3ca PO |
1888 | return 0; |
1889 | ||
5e68d95d | 1890 | DBGF("Suspending...\n"); |
19c1f3ca PO |
1891 | |
1892 | host = mmc_priv(mmc); | |
1893 | ||
5e68d95d PO |
1894 | ret = wbsd_suspend(host, state); |
1895 | if (ret) | |
1896 | return ret; | |
1897 | ||
19c1f3ca | 1898 | wbsd_chip_poweroff(host); |
1da177e4 LT |
1899 | |
1900 | return 0; | |
1901 | } | |
1902 | ||
5e68d95d | 1903 | static int wbsd_platform_resume(struct platform_device *dev) |
1da177e4 | 1904 | { |
3ae5eaec | 1905 | struct mmc_host *mmc = platform_get_drvdata(dev); |
19c1f3ca | 1906 | struct wbsd_host *host; |
1da177e4 | 1907 | |
5e68d95d | 1908 | if (mmc == NULL) |
19c1f3ca PO |
1909 | return 0; |
1910 | ||
5e68d95d | 1911 | DBGF("Resuming...\n"); |
19c1f3ca PO |
1912 | |
1913 | host = mmc_priv(mmc); | |
1914 | ||
1915 | wbsd_chip_config(host); | |
1916 | ||
1917 | /* | |
1918 | * Allow device to initialise itself properly. | |
1919 | */ | |
1920 | mdelay(5); | |
1921 | ||
5e68d95d PO |
1922 | return wbsd_resume(host); |
1923 | } | |
1924 | ||
1925 | #ifdef CONFIG_PNP | |
1926 | ||
1927 | static int wbsd_pnp_suspend(struct pnp_dev *pnp_dev, pm_message_t state) | |
1928 | { | |
1929 | struct mmc_host *mmc = dev_get_drvdata(&pnp_dev->dev); | |
1930 | struct wbsd_host *host; | |
1931 | ||
1932 | if (mmc == NULL) | |
1933 | return 0; | |
19c1f3ca | 1934 | |
5e68d95d PO |
1935 | DBGF("Suspending...\n"); |
1936 | ||
1937 | host = mmc_priv(mmc); | |
1938 | ||
1939 | return wbsd_suspend(host, state); | |
1da177e4 | 1940 | } |
19c1f3ca | 1941 | |
5e68d95d PO |
1942 | static int wbsd_pnp_resume(struct pnp_dev *pnp_dev) |
1943 | { | |
1944 | struct mmc_host *mmc = dev_get_drvdata(&pnp_dev->dev); | |
1945 | struct wbsd_host *host; | |
1946 | ||
1947 | if (mmc == NULL) | |
1948 | return 0; | |
1949 | ||
1950 | DBGF("Resuming...\n"); | |
1951 | ||
1952 | host = mmc_priv(mmc); | |
1953 | ||
1954 | /* | |
1955 | * See if chip needs to be configured. | |
1956 | */ | |
cfa7f521 PO |
1957 | if (host->config != 0) { |
1958 | if (!wbsd_chip_validate(host)) { | |
5e68d95d PO |
1959 | printk(KERN_WARNING DRIVER_NAME |
1960 | ": PnP active but chip not configured! " | |
1961 | "You probably have a buggy BIOS. " | |
1962 | "Configuring chip manually.\n"); | |
1963 | wbsd_chip_config(host); | |
1964 | } | |
1965 | } | |
1966 | ||
1967 | /* | |
1968 | * Allow device to initialise itself properly. | |
1969 | */ | |
1970 | mdelay(5); | |
1971 | ||
1972 | return wbsd_resume(host); | |
1973 | } | |
1974 | ||
1975 | #endif /* CONFIG_PNP */ | |
1976 | ||
19c1f3ca PO |
1977 | #else /* CONFIG_PM */ |
1978 | ||
5e68d95d PO |
1979 | #define wbsd_platform_suspend NULL |
1980 | #define wbsd_platform_resume NULL | |
1981 | ||
1982 | #define wbsd_pnp_suspend NULL | |
1983 | #define wbsd_pnp_resume NULL | |
19c1f3ca PO |
1984 | |
1985 | #endif /* CONFIG_PM */ | |
1da177e4 | 1986 | |
85bcc130 | 1987 | static struct platform_device *wbsd_device; |
1da177e4 | 1988 | |
3ae5eaec | 1989 | static struct platform_driver wbsd_driver = { |
1da177e4 | 1990 | .probe = wbsd_probe, |
93968d75 | 1991 | .remove = __devexit_p(wbsd_remove), |
fecf92ba | 1992 | |
5e68d95d PO |
1993 | .suspend = wbsd_platform_suspend, |
1994 | .resume = wbsd_platform_resume, | |
3ae5eaec RK |
1995 | .driver = { |
1996 | .name = DRIVER_NAME, | |
1997 | }, | |
1da177e4 LT |
1998 | }; |
1999 | ||
85bcc130 PO |
2000 | #ifdef CONFIG_PNP |
2001 | ||
2002 | static struct pnp_driver wbsd_pnp_driver = { | |
2003 | .name = DRIVER_NAME, | |
2004 | .id_table = pnp_dev_table, | |
2005 | .probe = wbsd_pnp_probe, | |
93968d75 | 2006 | .remove = __devexit_p(wbsd_pnp_remove), |
5e68d95d PO |
2007 | |
2008 | .suspend = wbsd_pnp_suspend, | |
2009 | .resume = wbsd_pnp_resume, | |
85bcc130 PO |
2010 | }; |
2011 | ||
2012 | #endif /* CONFIG_PNP */ | |
2013 | ||
1da177e4 LT |
2014 | /* |
2015 | * Module loading/unloading | |
2016 | */ | |
2017 | ||
2018 | static int __init wbsd_drv_init(void) | |
2019 | { | |
2020 | int result; | |
fecf92ba | 2021 | |
1da177e4 | 2022 | printk(KERN_INFO DRIVER_NAME |
1615cc22 | 2023 | ": Winbond W83L51xD SD/MMC card interface driver\n"); |
1da177e4 | 2024 | printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n"); |
1da177e4 | 2025 | |
85bcc130 PO |
2026 | #ifdef CONFIG_PNP |
2027 | ||
cfa7f521 | 2028 | if (!nopnp) { |
85bcc130 PO |
2029 | result = pnp_register_driver(&wbsd_pnp_driver); |
2030 | if (result < 0) | |
2031 | return result; | |
2032 | } | |
fecf92ba PO |
2033 | #endif /* CONFIG_PNP */ |
2034 | ||
cfa7f521 | 2035 | if (nopnp) { |
3ae5eaec | 2036 | result = platform_driver_register(&wbsd_driver); |
85bcc130 PO |
2037 | if (result < 0) |
2038 | return result; | |
2039 | ||
21500bb3 | 2040 | wbsd_device = platform_device_alloc(DRIVER_NAME, -1); |
cfa7f521 | 2041 | if (!wbsd_device) { |
21500bb3 DT |
2042 | platform_driver_unregister(&wbsd_driver); |
2043 | return -ENOMEM; | |
2044 | } | |
2045 | ||
2046 | result = platform_device_add(wbsd_device); | |
cfa7f521 | 2047 | if (result) { |
21500bb3 DT |
2048 | platform_device_put(wbsd_device); |
2049 | platform_driver_unregister(&wbsd_driver); | |
2050 | return result; | |
2051 | } | |
85bcc130 | 2052 | } |
1da177e4 LT |
2053 | |
2054 | return 0; | |
2055 | } | |
2056 | ||
2057 | static void __exit wbsd_drv_exit(void) | |
2058 | { | |
85bcc130 PO |
2059 | #ifdef CONFIG_PNP |
2060 | ||
2061 | if (!nopnp) | |
2062 | pnp_unregister_driver(&wbsd_pnp_driver); | |
fecf92ba PO |
2063 | |
2064 | #endif /* CONFIG_PNP */ | |
85bcc130 | 2065 | |
cfa7f521 | 2066 | if (nopnp) { |
85bcc130 | 2067 | platform_device_unregister(wbsd_device); |
fecf92ba | 2068 | |
3ae5eaec | 2069 | platform_driver_unregister(&wbsd_driver); |
85bcc130 | 2070 | } |
1da177e4 LT |
2071 | |
2072 | DBG("unloaded\n"); | |
2073 | } | |
2074 | ||
2075 | module_init(wbsd_drv_init); | |
2076 | module_exit(wbsd_drv_exit); | |
85bcc130 PO |
2077 | #ifdef CONFIG_PNP |
2078 | module_param(nopnp, uint, 0444); | |
2079 | #endif | |
1da177e4 LT |
2080 | module_param(io, uint, 0444); |
2081 | module_param(irq, uint, 0444); | |
2082 | module_param(dma, int, 0444); | |
2083 | ||
2084 | MODULE_LICENSE("GPL"); | |
de1d09e3 | 2085 | MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>"); |
1da177e4 | 2086 | MODULE_DESCRIPTION("Winbond W83L51xD SD/MMC card interface driver"); |
1da177e4 | 2087 | |
85bcc130 PO |
2088 | #ifdef CONFIG_PNP |
2089 | MODULE_PARM_DESC(nopnp, "Scan for device instead of relying on PNP. (default 0)"); | |
2090 | #endif | |
1da177e4 LT |
2091 | MODULE_PARM_DESC(io, "I/O base to allocate. Must be 8 byte aligned. (default 0x248)"); |
2092 | MODULE_PARM_DESC(irq, "IRQ to allocate. (default 6)"); | |
2093 | MODULE_PARM_DESC(dma, "DMA channel to allocate. -1 for no DMA. (default 2)"); |