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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/drivers/mmc/wbsd.c - Winbond W83L51xD SD/MMC driver | |
3 | * | |
4 | * Copyright (C) 2004-2005 Pierre Ossman, All Rights Reserved. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | * | |
11 | * Warning! | |
12 | * | |
13 | * Changes to the FIFO system should be done with extreme care since | |
14 | * the hardware is full of bugs related to the FIFO. Known issues are: | |
15 | * | |
16 | * - FIFO size field in FSR is always zero. | |
17 | * | |
18 | * - FIFO interrupts tend not to work as they should. Interrupts are | |
19 | * triggered only for full/empty events, not for threshold values. | |
20 | * | |
21 | * - On APIC systems the FIFO empty interrupt is sometimes lost. | |
22 | */ | |
23 | ||
24 | #include <linux/config.h> | |
25 | #include <linux/module.h> | |
26 | #include <linux/moduleparam.h> | |
27 | #include <linux/init.h> | |
28 | #include <linux/ioport.h> | |
d052d1be | 29 | #include <linux/platform_device.h> |
1da177e4 | 30 | #include <linux/interrupt.h> |
85bcc130 | 31 | #include <linux/dma-mapping.h> |
1da177e4 | 32 | #include <linux/delay.h> |
85bcc130 | 33 | #include <linux/pnp.h> |
1da177e4 LT |
34 | #include <linux/highmem.h> |
35 | #include <linux/mmc/host.h> | |
36 | #include <linux/mmc/protocol.h> | |
37 | ||
38 | #include <asm/io.h> | |
39 | #include <asm/dma.h> | |
40 | #include <asm/scatterlist.h> | |
41 | ||
42 | #include "wbsd.h" | |
43 | ||
44 | #define DRIVER_NAME "wbsd" | |
402771c7 | 45 | #define DRIVER_VERSION "1.5" |
1da177e4 LT |
46 | |
47 | #ifdef CONFIG_MMC_DEBUG | |
48 | #define DBG(x...) \ | |
49 | printk(KERN_DEBUG DRIVER_NAME ": " x) | |
50 | #define DBGF(f, x...) \ | |
51 | printk(KERN_DEBUG DRIVER_NAME " [%s()]: " f, __func__ , ##x) | |
52 | #else | |
53 | #define DBG(x...) do { } while (0) | |
54 | #define DBGF(x...) do { } while (0) | |
55 | #endif | |
56 | ||
85bcc130 PO |
57 | /* |
58 | * Device resources | |
59 | */ | |
60 | ||
61 | #ifdef CONFIG_PNP | |
62 | ||
63 | static const struct pnp_device_id pnp_dev_table[] = { | |
64 | { "WEC0517", 0 }, | |
65 | { "WEC0518", 0 }, | |
66 | { "", 0 }, | |
67 | }; | |
68 | ||
69 | MODULE_DEVICE_TABLE(pnp, pnp_dev_table); | |
70 | ||
71 | #endif /* CONFIG_PNP */ | |
72 | ||
3eee0d03 AB |
73 | static const int config_ports[] = { 0x2E, 0x4E }; |
74 | static const int unlock_codes[] = { 0x83, 0x87 }; | |
75 | ||
76 | static const int valid_ids[] = { | |
77 | 0x7112, | |
78 | }; | |
79 | ||
85bcc130 PO |
80 | #ifdef CONFIG_PNP |
81 | static unsigned int nopnp = 0; | |
82 | #else | |
83 | static const unsigned int nopnp = 1; | |
84 | #endif | |
85 | static unsigned int io = 0x248; | |
86 | static unsigned int irq = 6; | |
87 | static int dma = 2; | |
88 | ||
1da177e4 LT |
89 | /* |
90 | * Basic functions | |
91 | */ | |
92 | ||
cfa7f521 | 93 | static inline void wbsd_unlock_config(struct wbsd_host *host) |
1da177e4 | 94 | { |
85bcc130 | 95 | BUG_ON(host->config == 0); |
fecf92ba | 96 | |
1da177e4 LT |
97 | outb(host->unlock_code, host->config); |
98 | outb(host->unlock_code, host->config); | |
99 | } | |
100 | ||
cfa7f521 | 101 | static inline void wbsd_lock_config(struct wbsd_host *host) |
1da177e4 | 102 | { |
85bcc130 | 103 | BUG_ON(host->config == 0); |
fecf92ba | 104 | |
1da177e4 LT |
105 | outb(LOCK_CODE, host->config); |
106 | } | |
107 | ||
cfa7f521 | 108 | static inline void wbsd_write_config(struct wbsd_host *host, u8 reg, u8 value) |
1da177e4 | 109 | { |
85bcc130 | 110 | BUG_ON(host->config == 0); |
fecf92ba | 111 | |
1da177e4 LT |
112 | outb(reg, host->config); |
113 | outb(value, host->config + 1); | |
114 | } | |
115 | ||
cfa7f521 | 116 | static inline u8 wbsd_read_config(struct wbsd_host *host, u8 reg) |
1da177e4 | 117 | { |
85bcc130 | 118 | BUG_ON(host->config == 0); |
fecf92ba | 119 | |
1da177e4 LT |
120 | outb(reg, host->config); |
121 | return inb(host->config + 1); | |
122 | } | |
123 | ||
cfa7f521 | 124 | static inline void wbsd_write_index(struct wbsd_host *host, u8 index, u8 value) |
1da177e4 LT |
125 | { |
126 | outb(index, host->base + WBSD_IDXR); | |
127 | outb(value, host->base + WBSD_DATAR); | |
128 | } | |
129 | ||
cfa7f521 | 130 | static inline u8 wbsd_read_index(struct wbsd_host *host, u8 index) |
1da177e4 LT |
131 | { |
132 | outb(index, host->base + WBSD_IDXR); | |
133 | return inb(host->base + WBSD_DATAR); | |
134 | } | |
135 | ||
136 | /* | |
137 | * Common routines | |
138 | */ | |
139 | ||
cfa7f521 | 140 | static void wbsd_init_device(struct wbsd_host *host) |
1da177e4 LT |
141 | { |
142 | u8 setup, ier; | |
fecf92ba | 143 | |
1da177e4 LT |
144 | /* |
145 | * Reset chip (SD/MMC part) and fifo. | |
146 | */ | |
147 | setup = wbsd_read_index(host, WBSD_IDX_SETUP); | |
148 | setup |= WBSD_FIFO_RESET | WBSD_SOFT_RESET; | |
149 | wbsd_write_index(host, WBSD_IDX_SETUP, setup); | |
fecf92ba | 150 | |
85bcc130 PO |
151 | /* |
152 | * Set DAT3 to input | |
153 | */ | |
154 | setup &= ~WBSD_DAT3_H; | |
155 | wbsd_write_index(host, WBSD_IDX_SETUP, setup); | |
156 | host->flags &= ~WBSD_FIGNORE_DETECT; | |
fecf92ba | 157 | |
1da177e4 LT |
158 | /* |
159 | * Read back default clock. | |
160 | */ | |
161 | host->clk = wbsd_read_index(host, WBSD_IDX_CLK); | |
162 | ||
163 | /* | |
164 | * Power down port. | |
165 | */ | |
166 | outb(WBSD_POWER_N, host->base + WBSD_CSR); | |
fecf92ba | 167 | |
1da177e4 LT |
168 | /* |
169 | * Set maximum timeout. | |
170 | */ | |
171 | wbsd_write_index(host, WBSD_IDX_TAAC, 0x7F); | |
fecf92ba | 172 | |
85bcc130 PO |
173 | /* |
174 | * Test for card presence | |
175 | */ | |
176 | if (inb(host->base + WBSD_CSR) & WBSD_CARDPRESENT) | |
177 | host->flags |= WBSD_FCARD_PRESENT; | |
178 | else | |
179 | host->flags &= ~WBSD_FCARD_PRESENT; | |
fecf92ba | 180 | |
1da177e4 LT |
181 | /* |
182 | * Enable interesting interrupts. | |
183 | */ | |
184 | ier = 0; | |
185 | ier |= WBSD_EINT_CARD; | |
186 | ier |= WBSD_EINT_FIFO_THRE; | |
187 | ier |= WBSD_EINT_CCRC; | |
188 | ier |= WBSD_EINT_TIMEOUT; | |
189 | ier |= WBSD_EINT_CRC; | |
190 | ier |= WBSD_EINT_TC; | |
191 | ||
192 | outb(ier, host->base + WBSD_EIR); | |
193 | ||
194 | /* | |
195 | * Clear interrupts. | |
196 | */ | |
197 | inb(host->base + WBSD_ISR); | |
198 | } | |
199 | ||
cfa7f521 | 200 | static void wbsd_reset(struct wbsd_host *host) |
1da177e4 LT |
201 | { |
202 | u8 setup; | |
fecf92ba | 203 | |
d191634f | 204 | printk(KERN_ERR "%s: Resetting chip\n", mmc_hostname(host->mmc)); |
fecf92ba | 205 | |
1da177e4 LT |
206 | /* |
207 | * Soft reset of chip (SD/MMC part). | |
208 | */ | |
209 | setup = wbsd_read_index(host, WBSD_IDX_SETUP); | |
210 | setup |= WBSD_SOFT_RESET; | |
211 | wbsd_write_index(host, WBSD_IDX_SETUP, setup); | |
212 | } | |
213 | ||
cfa7f521 | 214 | static void wbsd_request_end(struct wbsd_host *host, struct mmc_request *mrq) |
1da177e4 LT |
215 | { |
216 | unsigned long dmaflags; | |
fecf92ba | 217 | |
1da177e4 | 218 | DBGF("Ending request, cmd (%x)\n", mrq->cmd->opcode); |
fecf92ba | 219 | |
cfa7f521 | 220 | if (host->dma >= 0) { |
1da177e4 LT |
221 | /* |
222 | * Release ISA DMA controller. | |
223 | */ | |
224 | dmaflags = claim_dma_lock(); | |
225 | disable_dma(host->dma); | |
226 | clear_dma_ff(host->dma); | |
227 | release_dma_lock(dmaflags); | |
228 | ||
229 | /* | |
230 | * Disable DMA on host. | |
231 | */ | |
232 | wbsd_write_index(host, WBSD_IDX_DMA, 0); | |
233 | } | |
fecf92ba | 234 | |
1da177e4 LT |
235 | host->mrq = NULL; |
236 | ||
237 | /* | |
238 | * MMC layer might call back into the driver so first unlock. | |
239 | */ | |
240 | spin_unlock(&host->lock); | |
241 | mmc_request_done(host->mmc, mrq); | |
242 | spin_lock(&host->lock); | |
243 | } | |
244 | ||
245 | /* | |
246 | * Scatter/gather functions | |
247 | */ | |
248 | ||
cfa7f521 | 249 | static inline void wbsd_init_sg(struct wbsd_host *host, struct mmc_data *data) |
1da177e4 LT |
250 | { |
251 | /* | |
252 | * Get info. about SG list from data structure. | |
253 | */ | |
254 | host->cur_sg = data->sg; | |
255 | host->num_sg = data->sg_len; | |
256 | ||
257 | host->offset = 0; | |
258 | host->remain = host->cur_sg->length; | |
259 | } | |
260 | ||
cfa7f521 | 261 | static inline int wbsd_next_sg(struct wbsd_host *host) |
1da177e4 LT |
262 | { |
263 | /* | |
264 | * Skip to next SG entry. | |
265 | */ | |
266 | host->cur_sg++; | |
267 | host->num_sg--; | |
268 | ||
269 | /* | |
270 | * Any entries left? | |
271 | */ | |
cfa7f521 PO |
272 | if (host->num_sg > 0) { |
273 | host->offset = 0; | |
274 | host->remain = host->cur_sg->length; | |
275 | } | |
fecf92ba | 276 | |
1da177e4 LT |
277 | return host->num_sg; |
278 | } | |
279 | ||
cfa7f521 | 280 | static inline char *wbsd_kmap_sg(struct wbsd_host *host) |
1da177e4 LT |
281 | { |
282 | host->mapped_sg = kmap_atomic(host->cur_sg->page, KM_BIO_SRC_IRQ) + | |
283 | host->cur_sg->offset; | |
284 | return host->mapped_sg; | |
285 | } | |
286 | ||
cfa7f521 | 287 | static inline void wbsd_kunmap_sg(struct wbsd_host *host) |
1da177e4 LT |
288 | { |
289 | kunmap_atomic(host->mapped_sg, KM_BIO_SRC_IRQ); | |
290 | } | |
291 | ||
cfa7f521 | 292 | static inline void wbsd_sg_to_dma(struct wbsd_host *host, struct mmc_data *data) |
1da177e4 LT |
293 | { |
294 | unsigned int len, i, size; | |
cfa7f521 PO |
295 | struct scatterlist *sg; |
296 | char *dmabuf = host->dma_buffer; | |
297 | char *sgbuf; | |
fecf92ba | 298 | |
1da177e4 | 299 | size = host->size; |
fecf92ba | 300 | |
1da177e4 LT |
301 | sg = data->sg; |
302 | len = data->sg_len; | |
fecf92ba | 303 | |
1da177e4 LT |
304 | /* |
305 | * Just loop through all entries. Size might not | |
306 | * be the entire list though so make sure that | |
307 | * we do not transfer too much. | |
308 | */ | |
cfa7f521 | 309 | for (i = 0; i < len; i++) { |
1da177e4 LT |
310 | sgbuf = kmap_atomic(sg[i].page, KM_BIO_SRC_IRQ) + sg[i].offset; |
311 | if (size < sg[i].length) | |
312 | memcpy(dmabuf, sgbuf, size); | |
313 | else | |
314 | memcpy(dmabuf, sgbuf, sg[i].length); | |
315 | kunmap_atomic(sgbuf, KM_BIO_SRC_IRQ); | |
316 | dmabuf += sg[i].length; | |
fecf92ba | 317 | |
1da177e4 LT |
318 | if (size < sg[i].length) |
319 | size = 0; | |
320 | else | |
321 | size -= sg[i].length; | |
fecf92ba | 322 | |
1da177e4 LT |
323 | if (size == 0) |
324 | break; | |
325 | } | |
fecf92ba | 326 | |
1da177e4 LT |
327 | /* |
328 | * Check that we didn't get a request to transfer | |
329 | * more data than can fit into the SG list. | |
330 | */ | |
fecf92ba | 331 | |
1da177e4 | 332 | BUG_ON(size != 0); |
fecf92ba | 333 | |
1da177e4 LT |
334 | host->size -= size; |
335 | } | |
336 | ||
cfa7f521 | 337 | static inline void wbsd_dma_to_sg(struct wbsd_host *host, struct mmc_data *data) |
1da177e4 LT |
338 | { |
339 | unsigned int len, i, size; | |
cfa7f521 PO |
340 | struct scatterlist *sg; |
341 | char *dmabuf = host->dma_buffer; | |
342 | char *sgbuf; | |
fecf92ba | 343 | |
1da177e4 | 344 | size = host->size; |
fecf92ba | 345 | |
1da177e4 LT |
346 | sg = data->sg; |
347 | len = data->sg_len; | |
fecf92ba | 348 | |
1da177e4 LT |
349 | /* |
350 | * Just loop through all entries. Size might not | |
351 | * be the entire list though so make sure that | |
352 | * we do not transfer too much. | |
353 | */ | |
cfa7f521 | 354 | for (i = 0; i < len; i++) { |
1da177e4 LT |
355 | sgbuf = kmap_atomic(sg[i].page, KM_BIO_SRC_IRQ) + sg[i].offset; |
356 | if (size < sg[i].length) | |
357 | memcpy(sgbuf, dmabuf, size); | |
358 | else | |
359 | memcpy(sgbuf, dmabuf, sg[i].length); | |
360 | kunmap_atomic(sgbuf, KM_BIO_SRC_IRQ); | |
361 | dmabuf += sg[i].length; | |
fecf92ba | 362 | |
1da177e4 LT |
363 | if (size < sg[i].length) |
364 | size = 0; | |
365 | else | |
366 | size -= sg[i].length; | |
fecf92ba | 367 | |
1da177e4 LT |
368 | if (size == 0) |
369 | break; | |
370 | } | |
fecf92ba | 371 | |
1da177e4 LT |
372 | /* |
373 | * Check that we didn't get a request to transfer | |
374 | * more data than can fit into the SG list. | |
375 | */ | |
fecf92ba | 376 | |
1da177e4 | 377 | BUG_ON(size != 0); |
fecf92ba | 378 | |
1da177e4 LT |
379 | host->size -= size; |
380 | } | |
381 | ||
382 | /* | |
383 | * Command handling | |
384 | */ | |
fecf92ba | 385 | |
cfa7f521 PO |
386 | static inline void wbsd_get_short_reply(struct wbsd_host *host, |
387 | struct mmc_command *cmd) | |
1da177e4 LT |
388 | { |
389 | /* | |
390 | * Correct response type? | |
391 | */ | |
cfa7f521 | 392 | if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_SHORT) { |
1da177e4 LT |
393 | cmd->error = MMC_ERR_INVALID; |
394 | return; | |
395 | } | |
fecf92ba | 396 | |
cfa7f521 PO |
397 | cmd->resp[0] = wbsd_read_index(host, WBSD_IDX_RESP12) << 24; |
398 | cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP13) << 16; | |
399 | cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP14) << 8; | |
400 | cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP15) << 0; | |
401 | cmd->resp[1] = wbsd_read_index(host, WBSD_IDX_RESP16) << 24; | |
1da177e4 LT |
402 | } |
403 | ||
cfa7f521 PO |
404 | static inline void wbsd_get_long_reply(struct wbsd_host *host, |
405 | struct mmc_command *cmd) | |
1da177e4 LT |
406 | { |
407 | int i; | |
fecf92ba | 408 | |
1da177e4 LT |
409 | /* |
410 | * Correct response type? | |
411 | */ | |
cfa7f521 | 412 | if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_LONG) { |
1da177e4 LT |
413 | cmd->error = MMC_ERR_INVALID; |
414 | return; | |
415 | } | |
fecf92ba | 416 | |
cfa7f521 | 417 | for (i = 0; i < 4; i++) { |
1da177e4 LT |
418 | cmd->resp[i] = |
419 | wbsd_read_index(host, WBSD_IDX_RESP1 + i * 4) << 24; | |
420 | cmd->resp[i] |= | |
421 | wbsd_read_index(host, WBSD_IDX_RESP2 + i * 4) << 16; | |
422 | cmd->resp[i] |= | |
423 | wbsd_read_index(host, WBSD_IDX_RESP3 + i * 4) << 8; | |
424 | cmd->resp[i] |= | |
425 | wbsd_read_index(host, WBSD_IDX_RESP4 + i * 4) << 0; | |
426 | } | |
427 | } | |
428 | ||
cfa7f521 | 429 | static void wbsd_send_command(struct wbsd_host *host, struct mmc_command *cmd) |
1da177e4 LT |
430 | { |
431 | int i; | |
432 | u8 status, isr; | |
fecf92ba | 433 | |
1da177e4 LT |
434 | DBGF("Sending cmd (%x)\n", cmd->opcode); |
435 | ||
436 | /* | |
437 | * Clear accumulated ISR. The interrupt routine | |
438 | * will fill this one with events that occur during | |
439 | * transfer. | |
440 | */ | |
441 | host->isr = 0; | |
fecf92ba | 442 | |
1da177e4 LT |
443 | /* |
444 | * Send the command (CRC calculated by host). | |
445 | */ | |
446 | outb(cmd->opcode, host->base + WBSD_CMDR); | |
cfa7f521 | 447 | for (i = 3; i >= 0; i--) |
1da177e4 | 448 | outb((cmd->arg >> (i * 8)) & 0xff, host->base + WBSD_CMDR); |
fecf92ba | 449 | |
1da177e4 | 450 | cmd->error = MMC_ERR_NONE; |
fecf92ba | 451 | |
1da177e4 LT |
452 | /* |
453 | * Wait for the request to complete. | |
454 | */ | |
455 | do { | |
456 | status = wbsd_read_index(host, WBSD_IDX_STATUS); | |
457 | } while (status & WBSD_CARDTRAFFIC); | |
458 | ||
459 | /* | |
460 | * Do we expect a reply? | |
461 | */ | |
cfa7f521 | 462 | if ((cmd->flags & MMC_RSP_MASK) != MMC_RSP_NONE) { |
1da177e4 LT |
463 | /* |
464 | * Read back status. | |
465 | */ | |
466 | isr = host->isr; | |
fecf92ba | 467 | |
1da177e4 LT |
468 | /* Card removed? */ |
469 | if (isr & WBSD_INT_CARD) | |
470 | cmd->error = MMC_ERR_TIMEOUT; | |
471 | /* Timeout? */ | |
472 | else if (isr & WBSD_INT_TIMEOUT) | |
473 | cmd->error = MMC_ERR_TIMEOUT; | |
474 | /* CRC? */ | |
475 | else if ((cmd->flags & MMC_RSP_CRC) && (isr & WBSD_INT_CRC)) | |
476 | cmd->error = MMC_ERR_BADCRC; | |
477 | /* All ok */ | |
cfa7f521 | 478 | else { |
1da177e4 LT |
479 | if ((cmd->flags & MMC_RSP_MASK) == MMC_RSP_SHORT) |
480 | wbsd_get_short_reply(host, cmd); | |
481 | else | |
482 | wbsd_get_long_reply(host, cmd); | |
483 | } | |
484 | } | |
485 | ||
486 | DBGF("Sent cmd (%x), res %d\n", cmd->opcode, cmd->error); | |
487 | } | |
488 | ||
489 | /* | |
490 | * Data functions | |
491 | */ | |
492 | ||
cfa7f521 | 493 | static void wbsd_empty_fifo(struct wbsd_host *host) |
1da177e4 | 494 | { |
cfa7f521 PO |
495 | struct mmc_data *data = host->mrq->cmd->data; |
496 | char *buffer; | |
1da177e4 | 497 | int i, fsr, fifo; |
fecf92ba | 498 | |
1da177e4 LT |
499 | /* |
500 | * Handle excessive data. | |
501 | */ | |
502 | if (data->bytes_xfered == host->size) | |
503 | return; | |
fecf92ba | 504 | |
1da177e4 LT |
505 | buffer = wbsd_kmap_sg(host) + host->offset; |
506 | ||
507 | /* | |
508 | * Drain the fifo. This has a tendency to loop longer | |
509 | * than the FIFO length (usually one block). | |
510 | */ | |
cfa7f521 | 511 | while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_EMPTY)) { |
1da177e4 LT |
512 | /* |
513 | * The size field in the FSR is broken so we have to | |
514 | * do some guessing. | |
fecf92ba | 515 | */ |
1da177e4 LT |
516 | if (fsr & WBSD_FIFO_FULL) |
517 | fifo = 16; | |
518 | else if (fsr & WBSD_FIFO_FUTHRE) | |
519 | fifo = 8; | |
520 | else | |
521 | fifo = 1; | |
fecf92ba | 522 | |
cfa7f521 | 523 | for (i = 0; i < fifo; i++) { |
1da177e4 LT |
524 | *buffer = inb(host->base + WBSD_DFR); |
525 | buffer++; | |
526 | host->offset++; | |
527 | host->remain--; | |
528 | ||
529 | data->bytes_xfered++; | |
fecf92ba | 530 | |
1da177e4 LT |
531 | /* |
532 | * Transfer done? | |
533 | */ | |
cfa7f521 | 534 | if (data->bytes_xfered == host->size) { |
fecf92ba | 535 | wbsd_kunmap_sg(host); |
1da177e4 LT |
536 | return; |
537 | } | |
fecf92ba | 538 | |
1da177e4 LT |
539 | /* |
540 | * End of scatter list entry? | |
541 | */ | |
cfa7f521 | 542 | if (host->remain == 0) { |
1da177e4 | 543 | wbsd_kunmap_sg(host); |
fecf92ba | 544 | |
1da177e4 LT |
545 | /* |
546 | * Get next entry. Check if last. | |
547 | */ | |
cfa7f521 | 548 | if (!wbsd_next_sg(host)) { |
1da177e4 LT |
549 | /* |
550 | * We should never reach this point. | |
551 | * It means that we're trying to | |
552 | * transfer more blocks than can fit | |
553 | * into the scatter list. | |
554 | */ | |
555 | BUG_ON(1); | |
fecf92ba | 556 | |
1da177e4 | 557 | host->size = data->bytes_xfered; |
fecf92ba | 558 | |
1da177e4 LT |
559 | return; |
560 | } | |
fecf92ba | 561 | |
1da177e4 LT |
562 | buffer = wbsd_kmap_sg(host); |
563 | } | |
564 | } | |
565 | } | |
fecf92ba | 566 | |
1da177e4 LT |
567 | wbsd_kunmap_sg(host); |
568 | ||
569 | /* | |
570 | * This is a very dirty hack to solve a | |
571 | * hardware problem. The chip doesn't trigger | |
572 | * FIFO threshold interrupts properly. | |
573 | */ | |
574 | if ((host->size - data->bytes_xfered) < 16) | |
575 | tasklet_schedule(&host->fifo_tasklet); | |
576 | } | |
577 | ||
cfa7f521 | 578 | static void wbsd_fill_fifo(struct wbsd_host *host) |
1da177e4 | 579 | { |
cfa7f521 PO |
580 | struct mmc_data *data = host->mrq->cmd->data; |
581 | char *buffer; | |
1da177e4 | 582 | int i, fsr, fifo; |
fecf92ba | 583 | |
1da177e4 LT |
584 | /* |
585 | * Check that we aren't being called after the | |
586 | * entire buffer has been transfered. | |
587 | */ | |
588 | if (data->bytes_xfered == host->size) | |
589 | return; | |
590 | ||
591 | buffer = wbsd_kmap_sg(host) + host->offset; | |
592 | ||
593 | /* | |
594 | * Fill the fifo. This has a tendency to loop longer | |
595 | * than the FIFO length (usually one block). | |
596 | */ | |
cfa7f521 | 597 | while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_FULL)) { |
1da177e4 LT |
598 | /* |
599 | * The size field in the FSR is broken so we have to | |
600 | * do some guessing. | |
fecf92ba | 601 | */ |
1da177e4 LT |
602 | if (fsr & WBSD_FIFO_EMPTY) |
603 | fifo = 0; | |
604 | else if (fsr & WBSD_FIFO_EMTHRE) | |
605 | fifo = 8; | |
606 | else | |
607 | fifo = 15; | |
608 | ||
cfa7f521 | 609 | for (i = 16; i > fifo; i--) { |
1da177e4 LT |
610 | outb(*buffer, host->base + WBSD_DFR); |
611 | buffer++; | |
612 | host->offset++; | |
613 | host->remain--; | |
fecf92ba | 614 | |
1da177e4 | 615 | data->bytes_xfered++; |
fecf92ba | 616 | |
1da177e4 LT |
617 | /* |
618 | * Transfer done? | |
619 | */ | |
cfa7f521 | 620 | if (data->bytes_xfered == host->size) { |
1da177e4 LT |
621 | wbsd_kunmap_sg(host); |
622 | return; | |
623 | } | |
624 | ||
625 | /* | |
626 | * End of scatter list entry? | |
627 | */ | |
cfa7f521 | 628 | if (host->remain == 0) { |
1da177e4 | 629 | wbsd_kunmap_sg(host); |
fecf92ba | 630 | |
1da177e4 LT |
631 | /* |
632 | * Get next entry. Check if last. | |
633 | */ | |
cfa7f521 | 634 | if (!wbsd_next_sg(host)) { |
1da177e4 LT |
635 | /* |
636 | * We should never reach this point. | |
637 | * It means that we're trying to | |
638 | * transfer more blocks than can fit | |
639 | * into the scatter list. | |
640 | */ | |
641 | BUG_ON(1); | |
fecf92ba | 642 | |
1da177e4 | 643 | host->size = data->bytes_xfered; |
fecf92ba | 644 | |
1da177e4 LT |
645 | return; |
646 | } | |
fecf92ba | 647 | |
1da177e4 LT |
648 | buffer = wbsd_kmap_sg(host); |
649 | } | |
650 | } | |
651 | } | |
fecf92ba | 652 | |
1da177e4 | 653 | wbsd_kunmap_sg(host); |
fecf92ba | 654 | |
85bcc130 PO |
655 | /* |
656 | * The controller stops sending interrupts for | |
657 | * 'FIFO empty' under certain conditions. So we | |
658 | * need to be a bit more pro-active. | |
659 | */ | |
660 | tasklet_schedule(&host->fifo_tasklet); | |
1da177e4 LT |
661 | } |
662 | ||
cfa7f521 | 663 | static void wbsd_prepare_data(struct wbsd_host *host, struct mmc_data *data) |
1da177e4 LT |
664 | { |
665 | u16 blksize; | |
666 | u8 setup; | |
667 | unsigned long dmaflags; | |
668 | ||
669 | DBGF("blksz %04x blks %04x flags %08x\n", | |
670 | 1 << data->blksz_bits, data->blocks, data->flags); | |
671 | DBGF("tsac %d ms nsac %d clk\n", | |
672 | data->timeout_ns / 1000000, data->timeout_clks); | |
fecf92ba | 673 | |
1da177e4 LT |
674 | /* |
675 | * Calculate size. | |
676 | */ | |
677 | host->size = data->blocks << data->blksz_bits; | |
678 | ||
679 | /* | |
680 | * Check timeout values for overflow. | |
681 | * (Yes, some cards cause this value to overflow). | |
682 | */ | |
683 | if (data->timeout_ns > 127000000) | |
684 | wbsd_write_index(host, WBSD_IDX_TAAC, 127); | |
cfa7f521 PO |
685 | else { |
686 | wbsd_write_index(host, WBSD_IDX_TAAC, | |
687 | data->timeout_ns / 1000000); | |
688 | } | |
fecf92ba | 689 | |
1da177e4 LT |
690 | if (data->timeout_clks > 255) |
691 | wbsd_write_index(host, WBSD_IDX_NSAC, 255); | |
692 | else | |
693 | wbsd_write_index(host, WBSD_IDX_NSAC, data->timeout_clks); | |
fecf92ba | 694 | |
1da177e4 LT |
695 | /* |
696 | * Inform the chip of how large blocks will be | |
697 | * sent. It needs this to determine when to | |
698 | * calculate CRC. | |
699 | * | |
700 | * Space for CRC must be included in the size. | |
65ae2118 | 701 | * Two bytes are needed for each data line. |
1da177e4 | 702 | */ |
cfa7f521 | 703 | if (host->bus_width == MMC_BUS_WIDTH_1) { |
65ae2118 PO |
704 | blksize = (1 << data->blksz_bits) + 2; |
705 | ||
706 | wbsd_write_index(host, WBSD_IDX_PBSMSB, (blksize >> 4) & 0xF0); | |
707 | wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF); | |
cfa7f521 | 708 | } else if (host->bus_width == MMC_BUS_WIDTH_4) { |
65ae2118 | 709 | blksize = (1 << data->blksz_bits) + 2 * 4; |
fecf92ba | 710 | |
cfa7f521 PO |
711 | wbsd_write_index(host, WBSD_IDX_PBSMSB, |
712 | ((blksize >> 4) & 0xF0) | WBSD_DATA_WIDTH); | |
65ae2118 | 713 | wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF); |
cfa7f521 | 714 | } else { |
65ae2118 PO |
715 | data->error = MMC_ERR_INVALID; |
716 | return; | |
717 | } | |
1da177e4 LT |
718 | |
719 | /* | |
720 | * Clear the FIFO. This is needed even for DMA | |
721 | * transfers since the chip still uses the FIFO | |
722 | * internally. | |
723 | */ | |
724 | setup = wbsd_read_index(host, WBSD_IDX_SETUP); | |
725 | setup |= WBSD_FIFO_RESET; | |
726 | wbsd_write_index(host, WBSD_IDX_SETUP, setup); | |
fecf92ba | 727 | |
1da177e4 LT |
728 | /* |
729 | * DMA transfer? | |
730 | */ | |
cfa7f521 | 731 | if (host->dma >= 0) { |
1da177e4 LT |
732 | /* |
733 | * The buffer for DMA is only 64 kB. | |
734 | */ | |
735 | BUG_ON(host->size > 0x10000); | |
cfa7f521 | 736 | if (host->size > 0x10000) { |
1da177e4 LT |
737 | data->error = MMC_ERR_INVALID; |
738 | return; | |
739 | } | |
fecf92ba | 740 | |
1da177e4 LT |
741 | /* |
742 | * Transfer data from the SG list to | |
743 | * the DMA buffer. | |
744 | */ | |
745 | if (data->flags & MMC_DATA_WRITE) | |
746 | wbsd_sg_to_dma(host, data); | |
fecf92ba | 747 | |
1da177e4 LT |
748 | /* |
749 | * Initialise the ISA DMA controller. | |
fecf92ba | 750 | */ |
1da177e4 LT |
751 | dmaflags = claim_dma_lock(); |
752 | disable_dma(host->dma); | |
753 | clear_dma_ff(host->dma); | |
754 | if (data->flags & MMC_DATA_READ) | |
755 | set_dma_mode(host->dma, DMA_MODE_READ & ~0x40); | |
756 | else | |
757 | set_dma_mode(host->dma, DMA_MODE_WRITE & ~0x40); | |
758 | set_dma_addr(host->dma, host->dma_addr); | |
759 | set_dma_count(host->dma, host->size); | |
760 | ||
761 | enable_dma(host->dma); | |
762 | release_dma_lock(dmaflags); | |
763 | ||
764 | /* | |
765 | * Enable DMA on the host. | |
766 | */ | |
767 | wbsd_write_index(host, WBSD_IDX_DMA, WBSD_DMA_ENABLE); | |
cfa7f521 | 768 | } else { |
1da177e4 LT |
769 | /* |
770 | * This flag is used to keep printk | |
771 | * output to a minimum. | |
772 | */ | |
773 | host->firsterr = 1; | |
fecf92ba | 774 | |
1da177e4 LT |
775 | /* |
776 | * Initialise the SG list. | |
777 | */ | |
778 | wbsd_init_sg(host, data); | |
fecf92ba | 779 | |
1da177e4 LT |
780 | /* |
781 | * Turn off DMA. | |
782 | */ | |
783 | wbsd_write_index(host, WBSD_IDX_DMA, 0); | |
fecf92ba | 784 | |
1da177e4 LT |
785 | /* |
786 | * Set up FIFO threshold levels (and fill | |
787 | * buffer if doing a write). | |
788 | */ | |
cfa7f521 | 789 | if (data->flags & MMC_DATA_READ) { |
1da177e4 LT |
790 | wbsd_write_index(host, WBSD_IDX_FIFOEN, |
791 | WBSD_FIFOEN_FULL | 8); | |
cfa7f521 | 792 | } else { |
1da177e4 LT |
793 | wbsd_write_index(host, WBSD_IDX_FIFOEN, |
794 | WBSD_FIFOEN_EMPTY | 8); | |
795 | wbsd_fill_fifo(host); | |
796 | } | |
fecf92ba PO |
797 | } |
798 | ||
1da177e4 LT |
799 | data->error = MMC_ERR_NONE; |
800 | } | |
801 | ||
cfa7f521 | 802 | static void wbsd_finish_data(struct wbsd_host *host, struct mmc_data *data) |
1da177e4 LT |
803 | { |
804 | unsigned long dmaflags; | |
805 | int count; | |
806 | u8 status; | |
fecf92ba | 807 | |
1da177e4 LT |
808 | WARN_ON(host->mrq == NULL); |
809 | ||
810 | /* | |
811 | * Send a stop command if needed. | |
812 | */ | |
813 | if (data->stop) | |
814 | wbsd_send_command(host, data->stop); | |
815 | ||
816 | /* | |
817 | * Wait for the controller to leave data | |
818 | * transfer state. | |
819 | */ | |
cfa7f521 | 820 | do { |
1da177e4 LT |
821 | status = wbsd_read_index(host, WBSD_IDX_STATUS); |
822 | } while (status & (WBSD_BLOCK_READ | WBSD_BLOCK_WRITE)); | |
fecf92ba | 823 | |
1da177e4 LT |
824 | /* |
825 | * DMA transfer? | |
826 | */ | |
cfa7f521 | 827 | if (host->dma >= 0) { |
1da177e4 LT |
828 | /* |
829 | * Disable DMA on the host. | |
830 | */ | |
831 | wbsd_write_index(host, WBSD_IDX_DMA, 0); | |
fecf92ba | 832 | |
1da177e4 LT |
833 | /* |
834 | * Turn of ISA DMA controller. | |
835 | */ | |
836 | dmaflags = claim_dma_lock(); | |
837 | disable_dma(host->dma); | |
838 | clear_dma_ff(host->dma); | |
839 | count = get_dma_residue(host->dma); | |
840 | release_dma_lock(dmaflags); | |
fecf92ba | 841 | |
1da177e4 LT |
842 | /* |
843 | * Any leftover data? | |
844 | */ | |
cfa7f521 | 845 | if (count) { |
d191634f PO |
846 | printk(KERN_ERR "%s: Incomplete DMA transfer. " |
847 | "%d bytes left.\n", | |
848 | mmc_hostname(host->mmc), count); | |
fecf92ba | 849 | |
1da177e4 | 850 | data->error = MMC_ERR_FAILED; |
cfa7f521 | 851 | } else { |
1da177e4 LT |
852 | /* |
853 | * Transfer data from DMA buffer to | |
854 | * SG list. | |
855 | */ | |
856 | if (data->flags & MMC_DATA_READ) | |
857 | wbsd_dma_to_sg(host, data); | |
fecf92ba | 858 | |
1da177e4 LT |
859 | data->bytes_xfered = host->size; |
860 | } | |
861 | } | |
fecf92ba | 862 | |
1da177e4 | 863 | DBGF("Ending data transfer (%d bytes)\n", data->bytes_xfered); |
fecf92ba | 864 | |
1da177e4 LT |
865 | wbsd_request_end(host, host->mrq); |
866 | } | |
867 | ||
85bcc130 PO |
868 | /*****************************************************************************\ |
869 | * * | |
870 | * MMC layer callbacks * | |
871 | * * | |
872 | \*****************************************************************************/ | |
1da177e4 | 873 | |
cfa7f521 | 874 | static void wbsd_request(struct mmc_host *mmc, struct mmc_request *mrq) |
1da177e4 | 875 | { |
cfa7f521 PO |
876 | struct wbsd_host *host = mmc_priv(mmc); |
877 | struct mmc_command *cmd; | |
1da177e4 LT |
878 | |
879 | /* | |
880 | * Disable tasklets to avoid a deadlock. | |
881 | */ | |
882 | spin_lock_bh(&host->lock); | |
883 | ||
884 | BUG_ON(host->mrq != NULL); | |
885 | ||
886 | cmd = mrq->cmd; | |
887 | ||
888 | host->mrq = mrq; | |
fecf92ba | 889 | |
1da177e4 LT |
890 | /* |
891 | * If there is no card in the slot then | |
892 | * timeout immediatly. | |
893 | */ | |
cfa7f521 | 894 | if (!(host->flags & WBSD_FCARD_PRESENT)) { |
1da177e4 LT |
895 | cmd->error = MMC_ERR_TIMEOUT; |
896 | goto done; | |
897 | } | |
898 | ||
899 | /* | |
900 | * Does the request include data? | |
901 | */ | |
cfa7f521 | 902 | if (cmd->data) { |
1da177e4 | 903 | wbsd_prepare_data(host, cmd->data); |
fecf92ba | 904 | |
1da177e4 LT |
905 | if (cmd->data->error != MMC_ERR_NONE) |
906 | goto done; | |
907 | } | |
fecf92ba | 908 | |
1da177e4 LT |
909 | wbsd_send_command(host, cmd); |
910 | ||
911 | /* | |
912 | * If this is a data transfer the request | |
913 | * will be finished after the data has | |
914 | * transfered. | |
fecf92ba | 915 | */ |
cfa7f521 | 916 | if (cmd->data && (cmd->error == MMC_ERR_NONE)) { |
1da177e4 LT |
917 | /* |
918 | * Dirty fix for hardware bug. | |
919 | */ | |
920 | if (host->dma == -1) | |
921 | tasklet_schedule(&host->fifo_tasklet); | |
922 | ||
923 | spin_unlock_bh(&host->lock); | |
924 | ||
925 | return; | |
926 | } | |
fecf92ba | 927 | |
1da177e4 LT |
928 | done: |
929 | wbsd_request_end(host, mrq); | |
930 | ||
931 | spin_unlock_bh(&host->lock); | |
932 | } | |
933 | ||
cfa7f521 | 934 | static void wbsd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) |
1da177e4 | 935 | { |
cfa7f521 | 936 | struct wbsd_host *host = mmc_priv(mmc); |
1da177e4 | 937 | u8 clk, setup, pwr; |
fecf92ba | 938 | |
65ae2118 | 939 | DBGF("clock %uHz busmode %u powermode %u cs %u Vdd %u width %u\n", |
cfa7f521 PO |
940 | ios->clock, ios->bus_mode, ios->power_mode, ios->chip_select, |
941 | ios->vdd, ios->bus_width); | |
1da177e4 LT |
942 | |
943 | spin_lock_bh(&host->lock); | |
944 | ||
945 | /* | |
946 | * Reset the chip on each power off. | |
947 | * Should clear out any weird states. | |
948 | */ | |
949 | if (ios->power_mode == MMC_POWER_OFF) | |
950 | wbsd_init_device(host); | |
fecf92ba | 951 | |
1da177e4 LT |
952 | if (ios->clock >= 24000000) |
953 | clk = WBSD_CLK_24M; | |
954 | else if (ios->clock >= 16000000) | |
955 | clk = WBSD_CLK_16M; | |
956 | else if (ios->clock >= 12000000) | |
957 | clk = WBSD_CLK_12M; | |
958 | else | |
959 | clk = WBSD_CLK_375K; | |
960 | ||
961 | /* | |
962 | * Only write to the clock register when | |
963 | * there is an actual change. | |
964 | */ | |
cfa7f521 | 965 | if (clk != host->clk) { |
1da177e4 LT |
966 | wbsd_write_index(host, WBSD_IDX_CLK, clk); |
967 | host->clk = clk; | |
968 | } | |
969 | ||
85bcc130 PO |
970 | /* |
971 | * Power up card. | |
972 | */ | |
cfa7f521 | 973 | if (ios->power_mode != MMC_POWER_OFF) { |
1da177e4 LT |
974 | pwr = inb(host->base + WBSD_CSR); |
975 | pwr &= ~WBSD_POWER_N; | |
976 | outb(pwr, host->base + WBSD_CSR); | |
1da177e4 LT |
977 | } |
978 | ||
85bcc130 PO |
979 | /* |
980 | * MMC cards need to have pin 1 high during init. | |
85bcc130 | 981 | * It wreaks havoc with the card detection though so |
1656fa57 | 982 | * that needs to be disabled. |
85bcc130 PO |
983 | */ |
984 | setup = wbsd_read_index(host, WBSD_IDX_SETUP); | |
cfa7f521 | 985 | if (ios->chip_select == MMC_CS_HIGH) { |
65ae2118 | 986 | BUG_ON(ios->bus_width != MMC_BUS_WIDTH_1); |
85bcc130 PO |
987 | setup |= WBSD_DAT3_H; |
988 | host->flags |= WBSD_FIGNORE_DETECT; | |
cfa7f521 PO |
989 | } else { |
990 | if (setup & WBSD_DAT3_H) { | |
19c1f3ca | 991 | setup &= ~WBSD_DAT3_H; |
1656fa57 | 992 | |
19c1f3ca PO |
993 | /* |
994 | * We cannot resume card detection immediatly | |
995 | * because of capacitance and delays in the chip. | |
996 | */ | |
cfa7f521 | 997 | mod_timer(&host->ignore_timer, jiffies + HZ / 100); |
19c1f3ca | 998 | } |
85bcc130 PO |
999 | } |
1000 | wbsd_write_index(host, WBSD_IDX_SETUP, setup); | |
fecf92ba | 1001 | |
65ae2118 PO |
1002 | /* |
1003 | * Store bus width for later. Will be used when | |
1004 | * setting up the data transfer. | |
1005 | */ | |
1006 | host->bus_width = ios->bus_width; | |
1007 | ||
1da177e4 LT |
1008 | spin_unlock_bh(&host->lock); |
1009 | } | |
1010 | ||
cfa7f521 | 1011 | static int wbsd_get_ro(struct mmc_host *mmc) |
65ae2118 | 1012 | { |
cfa7f521 | 1013 | struct wbsd_host *host = mmc_priv(mmc); |
65ae2118 PO |
1014 | u8 csr; |
1015 | ||
1016 | spin_lock_bh(&host->lock); | |
1017 | ||
1018 | csr = inb(host->base + WBSD_CSR); | |
1019 | csr |= WBSD_MSLED; | |
1020 | outb(csr, host->base + WBSD_CSR); | |
1021 | ||
1022 | mdelay(1); | |
1023 | ||
1024 | csr = inb(host->base + WBSD_CSR); | |
1025 | csr &= ~WBSD_MSLED; | |
1026 | outb(csr, host->base + WBSD_CSR); | |
1027 | ||
1028 | spin_unlock_bh(&host->lock); | |
1029 | ||
1030 | return csr & WBSD_WRPT; | |
1031 | } | |
1032 | ||
85bcc130 PO |
1033 | static struct mmc_host_ops wbsd_ops = { |
1034 | .request = wbsd_request, | |
1035 | .set_ios = wbsd_set_ios, | |
65ae2118 | 1036 | .get_ro = wbsd_get_ro, |
85bcc130 PO |
1037 | }; |
1038 | ||
1039 | /*****************************************************************************\ | |
1040 | * * | |
1041 | * Interrupt handling * | |
1042 | * * | |
1043 | \*****************************************************************************/ | |
1044 | ||
1656fa57 PO |
1045 | /* |
1046 | * Helper function to reset detection ignore | |
1047 | */ | |
1048 | ||
1049 | static void wbsd_reset_ignore(unsigned long data) | |
1050 | { | |
cfa7f521 | 1051 | struct wbsd_host *host = (struct wbsd_host *)data; |
1656fa57 PO |
1052 | |
1053 | BUG_ON(host == NULL); | |
1054 | ||
1055 | DBG("Resetting card detection ignore\n"); | |
1056 | ||
1057 | spin_lock_bh(&host->lock); | |
1058 | ||
1059 | host->flags &= ~WBSD_FIGNORE_DETECT; | |
1060 | ||
1061 | /* | |
1062 | * Card status might have changed during the | |
1063 | * blackout. | |
1064 | */ | |
1065 | tasklet_schedule(&host->card_tasklet); | |
1066 | ||
1067 | spin_unlock_bh(&host->lock); | |
1068 | } | |
1069 | ||
1da177e4 LT |
1070 | /* |
1071 | * Tasklets | |
1072 | */ | |
1073 | ||
cfa7f521 | 1074 | static inline struct mmc_data *wbsd_get_data(struct wbsd_host *host) |
1da177e4 LT |
1075 | { |
1076 | WARN_ON(!host->mrq); | |
1077 | if (!host->mrq) | |
1078 | return NULL; | |
1079 | ||
1080 | WARN_ON(!host->mrq->cmd); | |
1081 | if (!host->mrq->cmd) | |
1082 | return NULL; | |
1083 | ||
1084 | WARN_ON(!host->mrq->cmd->data); | |
1085 | if (!host->mrq->cmd->data) | |
1086 | return NULL; | |
fecf92ba | 1087 | |
1da177e4 LT |
1088 | return host->mrq->cmd->data; |
1089 | } | |
1090 | ||
1091 | static void wbsd_tasklet_card(unsigned long param) | |
1092 | { | |
cfa7f521 | 1093 | struct wbsd_host *host = (struct wbsd_host *)param; |
1da177e4 | 1094 | u8 csr; |
210ce2a7 | 1095 | int delay = -1; |
fecf92ba | 1096 | |
1da177e4 | 1097 | spin_lock(&host->lock); |
fecf92ba | 1098 | |
cfa7f521 | 1099 | if (host->flags & WBSD_FIGNORE_DETECT) { |
85bcc130 PO |
1100 | spin_unlock(&host->lock); |
1101 | return; | |
1102 | } | |
fecf92ba | 1103 | |
1da177e4 LT |
1104 | csr = inb(host->base + WBSD_CSR); |
1105 | WARN_ON(csr == 0xff); | |
fecf92ba | 1106 | |
cfa7f521 PO |
1107 | if (csr & WBSD_CARDPRESENT) { |
1108 | if (!(host->flags & WBSD_FCARD_PRESENT)) { | |
85bcc130 PO |
1109 | DBG("Card inserted\n"); |
1110 | host->flags |= WBSD_FCARD_PRESENT; | |
fecf92ba | 1111 | |
210ce2a7 | 1112 | delay = 500; |
85bcc130 | 1113 | } |
cfa7f521 | 1114 | } else if (host->flags & WBSD_FCARD_PRESENT) { |
1da177e4 | 1115 | DBG("Card removed\n"); |
85bcc130 | 1116 | host->flags &= ~WBSD_FCARD_PRESENT; |
fecf92ba | 1117 | |
cfa7f521 | 1118 | if (host->mrq) { |
d191634f PO |
1119 | printk(KERN_ERR "%s: Card removed during transfer!\n", |
1120 | mmc_hostname(host->mmc)); | |
1da177e4 | 1121 | wbsd_reset(host); |
fecf92ba | 1122 | |
1da177e4 LT |
1123 | host->mrq->cmd->error = MMC_ERR_FAILED; |
1124 | tasklet_schedule(&host->finish_tasklet); | |
1125 | } | |
fecf92ba | 1126 | |
210ce2a7 | 1127 | delay = 0; |
6e6293dd | 1128 | } |
210ce2a7 PO |
1129 | |
1130 | /* | |
1131 | * Unlock first since we might get a call back. | |
1132 | */ | |
1133 | ||
1134 | spin_unlock(&host->lock); | |
1135 | ||
1136 | if (delay != -1) | |
1137 | mmc_detect_change(host->mmc, msecs_to_jiffies(delay)); | |
1da177e4 LT |
1138 | } |
1139 | ||
1140 | static void wbsd_tasklet_fifo(unsigned long param) | |
1141 | { | |
cfa7f521 PO |
1142 | struct wbsd_host *host = (struct wbsd_host *)param; |
1143 | struct mmc_data *data; | |
fecf92ba | 1144 | |
1da177e4 | 1145 | spin_lock(&host->lock); |
fecf92ba | 1146 | |
1da177e4 LT |
1147 | if (!host->mrq) |
1148 | goto end; | |
fecf92ba | 1149 | |
1da177e4 LT |
1150 | data = wbsd_get_data(host); |
1151 | if (!data) | |
1152 | goto end; | |
1153 | ||
1154 | if (data->flags & MMC_DATA_WRITE) | |
1155 | wbsd_fill_fifo(host); | |
1156 | else | |
1157 | wbsd_empty_fifo(host); | |
1158 | ||
1159 | /* | |
1160 | * Done? | |
1161 | */ | |
cfa7f521 | 1162 | if (host->size == data->bytes_xfered) { |
1da177e4 LT |
1163 | wbsd_write_index(host, WBSD_IDX_FIFOEN, 0); |
1164 | tasklet_schedule(&host->finish_tasklet); | |
1165 | } | |
1166 | ||
fecf92ba | 1167 | end: |
1da177e4 LT |
1168 | spin_unlock(&host->lock); |
1169 | } | |
1170 | ||
1171 | static void wbsd_tasklet_crc(unsigned long param) | |
1172 | { | |
cfa7f521 PO |
1173 | struct wbsd_host *host = (struct wbsd_host *)param; |
1174 | struct mmc_data *data; | |
fecf92ba | 1175 | |
1da177e4 | 1176 | spin_lock(&host->lock); |
fecf92ba | 1177 | |
1da177e4 LT |
1178 | if (!host->mrq) |
1179 | goto end; | |
fecf92ba | 1180 | |
1da177e4 LT |
1181 | data = wbsd_get_data(host); |
1182 | if (!data) | |
1183 | goto end; | |
fecf92ba | 1184 | |
1da177e4 LT |
1185 | DBGF("CRC error\n"); |
1186 | ||
1187 | data->error = MMC_ERR_BADCRC; | |
fecf92ba | 1188 | |
1da177e4 LT |
1189 | tasklet_schedule(&host->finish_tasklet); |
1190 | ||
fecf92ba | 1191 | end: |
1da177e4 LT |
1192 | spin_unlock(&host->lock); |
1193 | } | |
1194 | ||
1195 | static void wbsd_tasklet_timeout(unsigned long param) | |
1196 | { | |
cfa7f521 PO |
1197 | struct wbsd_host *host = (struct wbsd_host *)param; |
1198 | struct mmc_data *data; | |
fecf92ba | 1199 | |
1da177e4 | 1200 | spin_lock(&host->lock); |
fecf92ba | 1201 | |
1da177e4 LT |
1202 | if (!host->mrq) |
1203 | goto end; | |
fecf92ba | 1204 | |
1da177e4 LT |
1205 | data = wbsd_get_data(host); |
1206 | if (!data) | |
1207 | goto end; | |
fecf92ba | 1208 | |
1da177e4 LT |
1209 | DBGF("Timeout\n"); |
1210 | ||
1211 | data->error = MMC_ERR_TIMEOUT; | |
fecf92ba | 1212 | |
1da177e4 LT |
1213 | tasklet_schedule(&host->finish_tasklet); |
1214 | ||
fecf92ba | 1215 | end: |
1da177e4 LT |
1216 | spin_unlock(&host->lock); |
1217 | } | |
1218 | ||
1219 | static void wbsd_tasklet_finish(unsigned long param) | |
1220 | { | |
cfa7f521 PO |
1221 | struct wbsd_host *host = (struct wbsd_host *)param; |
1222 | struct mmc_data *data; | |
fecf92ba | 1223 | |
1da177e4 | 1224 | spin_lock(&host->lock); |
fecf92ba | 1225 | |
1da177e4 LT |
1226 | WARN_ON(!host->mrq); |
1227 | if (!host->mrq) | |
1228 | goto end; | |
fecf92ba | 1229 | |
1da177e4 LT |
1230 | data = wbsd_get_data(host); |
1231 | if (!data) | |
1232 | goto end; | |
1233 | ||
1234 | wbsd_finish_data(host, data); | |
fecf92ba PO |
1235 | |
1236 | end: | |
1da177e4 LT |
1237 | spin_unlock(&host->lock); |
1238 | } | |
1239 | ||
1240 | static void wbsd_tasklet_block(unsigned long param) | |
1241 | { | |
cfa7f521 PO |
1242 | struct wbsd_host *host = (struct wbsd_host *)param; |
1243 | struct mmc_data *data; | |
fecf92ba | 1244 | |
1da177e4 LT |
1245 | spin_lock(&host->lock); |
1246 | ||
1247 | if ((wbsd_read_index(host, WBSD_IDX_CRCSTATUS) & WBSD_CRC_MASK) != | |
cfa7f521 | 1248 | WBSD_CRC_OK) { |
1da177e4 LT |
1249 | data = wbsd_get_data(host); |
1250 | if (!data) | |
1251 | goto end; | |
fecf92ba | 1252 | |
1da177e4 LT |
1253 | DBGF("CRC error\n"); |
1254 | ||
1255 | data->error = MMC_ERR_BADCRC; | |
fecf92ba | 1256 | |
1da177e4 LT |
1257 | tasklet_schedule(&host->finish_tasklet); |
1258 | } | |
1259 | ||
fecf92ba | 1260 | end: |
1da177e4 LT |
1261 | spin_unlock(&host->lock); |
1262 | } | |
1263 | ||
1264 | /* | |
1265 | * Interrupt handling | |
1266 | */ | |
1267 | ||
1268 | static irqreturn_t wbsd_irq(int irq, void *dev_id, struct pt_regs *regs) | |
1269 | { | |
cfa7f521 | 1270 | struct wbsd_host *host = dev_id; |
1da177e4 | 1271 | int isr; |
fecf92ba | 1272 | |
1da177e4 LT |
1273 | isr = inb(host->base + WBSD_ISR); |
1274 | ||
1275 | /* | |
1276 | * Was it actually our hardware that caused the interrupt? | |
1277 | */ | |
1278 | if (isr == 0xff || isr == 0x00) | |
1279 | return IRQ_NONE; | |
fecf92ba | 1280 | |
1da177e4 LT |
1281 | host->isr |= isr; |
1282 | ||
1283 | /* | |
1284 | * Schedule tasklets as needed. | |
1285 | */ | |
1286 | if (isr & WBSD_INT_CARD) | |
1287 | tasklet_schedule(&host->card_tasklet); | |
1288 | if (isr & WBSD_INT_FIFO_THRE) | |
1289 | tasklet_schedule(&host->fifo_tasklet); | |
1290 | if (isr & WBSD_INT_CRC) | |
1291 | tasklet_hi_schedule(&host->crc_tasklet); | |
1292 | if (isr & WBSD_INT_TIMEOUT) | |
1293 | tasklet_hi_schedule(&host->timeout_tasklet); | |
1294 | if (isr & WBSD_INT_BUSYEND) | |
1295 | tasklet_hi_schedule(&host->block_tasklet); | |
1296 | if (isr & WBSD_INT_TC) | |
1297 | tasklet_schedule(&host->finish_tasklet); | |
fecf92ba | 1298 | |
1da177e4 LT |
1299 | return IRQ_HANDLED; |
1300 | } | |
1301 | ||
85bcc130 PO |
1302 | /*****************************************************************************\ |
1303 | * * | |
1304 | * Device initialisation and shutdown * | |
1305 | * * | |
1306 | \*****************************************************************************/ | |
1307 | ||
1da177e4 | 1308 | /* |
85bcc130 | 1309 | * Allocate/free MMC structure. |
1da177e4 LT |
1310 | */ |
1311 | ||
cfa7f521 | 1312 | static int __devinit wbsd_alloc_mmc(struct device *dev) |
85bcc130 | 1313 | { |
cfa7f521 PO |
1314 | struct mmc_host *mmc; |
1315 | struct wbsd_host *host; | |
fecf92ba | 1316 | |
85bcc130 PO |
1317 | /* |
1318 | * Allocate MMC structure. | |
1319 | */ | |
1320 | mmc = mmc_alloc_host(sizeof(struct wbsd_host), dev); | |
1321 | if (!mmc) | |
1322 | return -ENOMEM; | |
fecf92ba | 1323 | |
85bcc130 PO |
1324 | host = mmc_priv(mmc); |
1325 | host->mmc = mmc; | |
1326 | ||
1327 | host->dma = -1; | |
1328 | ||
1329 | /* | |
1330 | * Set host parameters. | |
1331 | */ | |
1332 | mmc->ops = &wbsd_ops; | |
1333 | mmc->f_min = 375000; | |
1334 | mmc->f_max = 24000000; | |
cfa7f521 | 1335 | mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; |
65ae2118 | 1336 | mmc->caps = MMC_CAP_4_BIT_DATA; |
fecf92ba | 1337 | |
85bcc130 | 1338 | spin_lock_init(&host->lock); |
fecf92ba | 1339 | |
6e6293dd | 1340 | /* |
1656fa57 | 1341 | * Set up timers |
6e6293dd | 1342 | */ |
1656fa57 PO |
1343 | init_timer(&host->ignore_timer); |
1344 | host->ignore_timer.data = (unsigned long)host; | |
1345 | host->ignore_timer.function = wbsd_reset_ignore; | |
fecf92ba | 1346 | |
85bcc130 PO |
1347 | /* |
1348 | * Maximum number of segments. Worst case is one sector per segment | |
1349 | * so this will be 64kB/512. | |
1350 | */ | |
1351 | mmc->max_hw_segs = 128; | |
1352 | mmc->max_phys_segs = 128; | |
fecf92ba | 1353 | |
85bcc130 PO |
1354 | /* |
1355 | * Maximum number of sectors in one transfer. Also limited by 64kB | |
1356 | * buffer. | |
1357 | */ | |
1358 | mmc->max_sectors = 128; | |
fecf92ba | 1359 | |
85bcc130 PO |
1360 | /* |
1361 | * Maximum segment size. Could be one segment with the maximum number | |
1362 | * of segments. | |
1363 | */ | |
1364 | mmc->max_seg_size = mmc->max_sectors * 512; | |
fecf92ba | 1365 | |
85bcc130 | 1366 | dev_set_drvdata(dev, mmc); |
fecf92ba | 1367 | |
85bcc130 PO |
1368 | return 0; |
1369 | } | |
1370 | ||
cfa7f521 | 1371 | static void __devexit wbsd_free_mmc(struct device *dev) |
85bcc130 | 1372 | { |
cfa7f521 PO |
1373 | struct mmc_host *mmc; |
1374 | struct wbsd_host *host; | |
fecf92ba | 1375 | |
85bcc130 PO |
1376 | mmc = dev_get_drvdata(dev); |
1377 | if (!mmc) | |
1378 | return; | |
fecf92ba | 1379 | |
6e6293dd PO |
1380 | host = mmc_priv(mmc); |
1381 | BUG_ON(host == NULL); | |
fecf92ba | 1382 | |
1656fa57 | 1383 | del_timer_sync(&host->ignore_timer); |
fecf92ba | 1384 | |
85bcc130 | 1385 | mmc_free_host(mmc); |
fecf92ba | 1386 | |
85bcc130 PO |
1387 | dev_set_drvdata(dev, NULL); |
1388 | } | |
1389 | ||
1390 | /* | |
1391 | * Scan for known chip id:s | |
1392 | */ | |
1393 | ||
cfa7f521 | 1394 | static int __devinit wbsd_scan(struct wbsd_host *host) |
1da177e4 LT |
1395 | { |
1396 | int i, j, k; | |
1397 | int id; | |
fecf92ba | 1398 | |
1da177e4 LT |
1399 | /* |
1400 | * Iterate through all ports, all codes to | |
1401 | * find hardware that is in our known list. | |
1402 | */ | |
63648fb5 | 1403 | for (i = 0; i < ARRAY_SIZE(config_ports); i++) { |
1da177e4 LT |
1404 | if (!request_region(config_ports[i], 2, DRIVER_NAME)) |
1405 | continue; | |
fecf92ba | 1406 | |
63648fb5 | 1407 | for (j = 0; j < ARRAY_SIZE(unlock_codes); j++) { |
1da177e4 | 1408 | id = 0xFFFF; |
fecf92ba | 1409 | |
19c1f3ca PO |
1410 | host->config = config_ports[i]; |
1411 | host->unlock_code = unlock_codes[j]; | |
1412 | ||
1413 | wbsd_unlock_config(host); | |
fecf92ba | 1414 | |
1da177e4 LT |
1415 | outb(WBSD_CONF_ID_HI, config_ports[i]); |
1416 | id = inb(config_ports[i] + 1) << 8; | |
1417 | ||
1418 | outb(WBSD_CONF_ID_LO, config_ports[i]); | |
1419 | id |= inb(config_ports[i] + 1); | |
fecf92ba | 1420 | |
19c1f3ca PO |
1421 | wbsd_lock_config(host); |
1422 | ||
63648fb5 | 1423 | for (k = 0; k < ARRAY_SIZE(valid_ids); k++) { |
cfa7f521 | 1424 | if (id == valid_ids[k]) { |
1da177e4 | 1425 | host->chip_id = id; |
fecf92ba | 1426 | |
1da177e4 LT |
1427 | return 0; |
1428 | } | |
1429 | } | |
fecf92ba | 1430 | |
cfa7f521 | 1431 | if (id != 0xFFFF) { |
1da177e4 LT |
1432 | DBG("Unknown hardware (id %x) found at %x\n", |
1433 | id, config_ports[i]); | |
1434 | } | |
1da177e4 | 1435 | } |
fecf92ba | 1436 | |
1da177e4 LT |
1437 | release_region(config_ports[i], 2); |
1438 | } | |
fecf92ba | 1439 | |
19c1f3ca PO |
1440 | host->config = 0; |
1441 | host->unlock_code = 0; | |
1442 | ||
1da177e4 LT |
1443 | return -ENODEV; |
1444 | } | |
1445 | ||
85bcc130 PO |
1446 | /* |
1447 | * Allocate/free io port ranges | |
1448 | */ | |
1449 | ||
cfa7f521 | 1450 | static int __devinit wbsd_request_region(struct wbsd_host *host, int base) |
1da177e4 LT |
1451 | { |
1452 | if (io & 0x7) | |
1453 | return -EINVAL; | |
fecf92ba | 1454 | |
85bcc130 | 1455 | if (!request_region(base, 8, DRIVER_NAME)) |
1da177e4 | 1456 | return -EIO; |
fecf92ba | 1457 | |
1da177e4 | 1458 | host->base = io; |
fecf92ba | 1459 | |
1da177e4 LT |
1460 | return 0; |
1461 | } | |
1462 | ||
cfa7f521 | 1463 | static void __devexit wbsd_release_regions(struct wbsd_host *host) |
1da177e4 LT |
1464 | { |
1465 | if (host->base) | |
1466 | release_region(host->base, 8); | |
fecf92ba | 1467 | |
85bcc130 | 1468 | host->base = 0; |
1da177e4 LT |
1469 | |
1470 | if (host->config) | |
1471 | release_region(host->config, 2); | |
fecf92ba | 1472 | |
85bcc130 | 1473 | host->config = 0; |
1da177e4 LT |
1474 | } |
1475 | ||
85bcc130 PO |
1476 | /* |
1477 | * Allocate/free DMA port and buffer | |
1478 | */ | |
1479 | ||
cfa7f521 | 1480 | static void __devinit wbsd_request_dma(struct wbsd_host *host, int dma) |
1da177e4 | 1481 | { |
1da177e4 LT |
1482 | if (dma < 0) |
1483 | return; | |
fecf92ba | 1484 | |
1da177e4 LT |
1485 | if (request_dma(dma, DRIVER_NAME)) |
1486 | goto err; | |
fecf92ba | 1487 | |
1da177e4 LT |
1488 | /* |
1489 | * We need to allocate a special buffer in | |
1490 | * order for ISA to be able to DMA to it. | |
1491 | */ | |
85bcc130 | 1492 | host->dma_buffer = kmalloc(WBSD_DMA_SIZE, |
1da177e4 LT |
1493 | GFP_NOIO | GFP_DMA | __GFP_REPEAT | __GFP_NOWARN); |
1494 | if (!host->dma_buffer) | |
1495 | goto free; | |
1496 | ||
1497 | /* | |
1498 | * Translate the address to a physical address. | |
1499 | */ | |
85bcc130 PO |
1500 | host->dma_addr = dma_map_single(host->mmc->dev, host->dma_buffer, |
1501 | WBSD_DMA_SIZE, DMA_BIDIRECTIONAL); | |
fecf92ba | 1502 | |
1da177e4 LT |
1503 | /* |
1504 | * ISA DMA must be aligned on a 64k basis. | |
1505 | */ | |
1506 | if ((host->dma_addr & 0xffff) != 0) | |
1507 | goto kfree; | |
1508 | /* | |
1509 | * ISA cannot access memory above 16 MB. | |
1510 | */ | |
1511 | else if (host->dma_addr >= 0x1000000) | |
1512 | goto kfree; | |
1513 | ||
1514 | host->dma = dma; | |
fecf92ba | 1515 | |
1da177e4 | 1516 | return; |
fecf92ba | 1517 | |
1da177e4 LT |
1518 | kfree: |
1519 | /* | |
1520 | * If we've gotten here then there is some kind of alignment bug | |
1521 | */ | |
1522 | BUG_ON(1); | |
fecf92ba | 1523 | |
cfa7f521 PO |
1524 | dma_unmap_single(host->mmc->dev, host->dma_addr, |
1525 | WBSD_DMA_SIZE, DMA_BIDIRECTIONAL); | |
85bcc130 | 1526 | host->dma_addr = (dma_addr_t)NULL; |
fecf92ba | 1527 | |
1da177e4 LT |
1528 | kfree(host->dma_buffer); |
1529 | host->dma_buffer = NULL; | |
1530 | ||
1531 | free: | |
1532 | free_dma(dma); | |
1533 | ||
1534 | err: | |
1535 | printk(KERN_WARNING DRIVER_NAME ": Unable to allocate DMA %d. " | |
1536 | "Falling back on FIFO.\n", dma); | |
1537 | } | |
1538 | ||
cfa7f521 | 1539 | static void __devexit wbsd_release_dma(struct wbsd_host *host) |
85bcc130 | 1540 | { |
cfa7f521 PO |
1541 | if (host->dma_addr) { |
1542 | dma_unmap_single(host->mmc->dev, host->dma_addr, | |
1543 | WBSD_DMA_SIZE, DMA_BIDIRECTIONAL); | |
1544 | } | |
6044ec88 | 1545 | kfree(host->dma_buffer); |
85bcc130 PO |
1546 | if (host->dma >= 0) |
1547 | free_dma(host->dma); | |
fecf92ba | 1548 | |
85bcc130 PO |
1549 | host->dma = -1; |
1550 | host->dma_buffer = NULL; | |
1551 | host->dma_addr = (dma_addr_t)NULL; | |
1552 | } | |
1da177e4 LT |
1553 | |
1554 | /* | |
85bcc130 | 1555 | * Allocate/free IRQ. |
1da177e4 LT |
1556 | */ |
1557 | ||
cfa7f521 | 1558 | static int __devinit wbsd_request_irq(struct wbsd_host *host, int irq) |
1da177e4 | 1559 | { |
1da177e4 | 1560 | int ret; |
fecf92ba | 1561 | |
1da177e4 | 1562 | /* |
85bcc130 | 1563 | * Allocate interrupt. |
1da177e4 | 1564 | */ |
85bcc130 PO |
1565 | |
1566 | ret = request_irq(irq, wbsd_irq, SA_SHIRQ, DRIVER_NAME, host); | |
1567 | if (ret) | |
1568 | return ret; | |
fecf92ba | 1569 | |
85bcc130 PO |
1570 | host->irq = irq; |
1571 | ||
1da177e4 | 1572 | /* |
85bcc130 | 1573 | * Set up tasklets. |
1da177e4 | 1574 | */ |
cfa7f521 PO |
1575 | tasklet_init(&host->card_tasklet, wbsd_tasklet_card, |
1576 | (unsigned long)host); | |
1577 | tasklet_init(&host->fifo_tasklet, wbsd_tasklet_fifo, | |
1578 | (unsigned long)host); | |
1579 | tasklet_init(&host->crc_tasklet, wbsd_tasklet_crc, | |
1580 | (unsigned long)host); | |
1581 | tasklet_init(&host->timeout_tasklet, wbsd_tasklet_timeout, | |
1582 | (unsigned long)host); | |
1583 | tasklet_init(&host->finish_tasklet, wbsd_tasklet_finish, | |
1584 | (unsigned long)host); | |
1585 | tasklet_init(&host->block_tasklet, wbsd_tasklet_block, | |
1586 | (unsigned long)host); | |
fecf92ba | 1587 | |
85bcc130 PO |
1588 | return 0; |
1589 | } | |
1da177e4 | 1590 | |
cfa7f521 | 1591 | static void __devexit wbsd_release_irq(struct wbsd_host *host) |
85bcc130 PO |
1592 | { |
1593 | if (!host->irq) | |
1594 | return; | |
1da177e4 | 1595 | |
85bcc130 | 1596 | free_irq(host->irq, host); |
fecf92ba | 1597 | |
85bcc130 | 1598 | host->irq = 0; |
fecf92ba | 1599 | |
85bcc130 PO |
1600 | tasklet_kill(&host->card_tasklet); |
1601 | tasklet_kill(&host->fifo_tasklet); | |
1602 | tasklet_kill(&host->crc_tasklet); | |
1603 | tasklet_kill(&host->timeout_tasklet); | |
1604 | tasklet_kill(&host->finish_tasklet); | |
1605 | tasklet_kill(&host->block_tasklet); | |
1606 | } | |
1607 | ||
1608 | /* | |
1609 | * Allocate all resources for the host. | |
1610 | */ | |
1611 | ||
cfa7f521 | 1612 | static int __devinit wbsd_request_resources(struct wbsd_host *host, |
85bcc130 PO |
1613 | int base, int irq, int dma) |
1614 | { | |
1615 | int ret; | |
fecf92ba | 1616 | |
1da177e4 LT |
1617 | /* |
1618 | * Allocate I/O ports. | |
1619 | */ | |
85bcc130 | 1620 | ret = wbsd_request_region(host, base); |
1da177e4 | 1621 | if (ret) |
85bcc130 | 1622 | return ret; |
1da177e4 LT |
1623 | |
1624 | /* | |
85bcc130 | 1625 | * Allocate interrupt. |
1da177e4 | 1626 | */ |
85bcc130 PO |
1627 | ret = wbsd_request_irq(host, irq); |
1628 | if (ret) | |
1629 | return ret; | |
1630 | ||
1631 | /* | |
1632 | * Allocate DMA. | |
1633 | */ | |
1634 | wbsd_request_dma(host, dma); | |
fecf92ba | 1635 | |
85bcc130 PO |
1636 | return 0; |
1637 | } | |
1638 | ||
1639 | /* | |
1640 | * Release all resources for the host. | |
1641 | */ | |
1642 | ||
cfa7f521 | 1643 | static void __devexit wbsd_release_resources(struct wbsd_host *host) |
85bcc130 PO |
1644 | { |
1645 | wbsd_release_dma(host); | |
1646 | wbsd_release_irq(host); | |
1647 | wbsd_release_regions(host); | |
1648 | } | |
1649 | ||
1650 | /* | |
1651 | * Configure the resources the chip should use. | |
1652 | */ | |
1653 | ||
cfa7f521 | 1654 | static void wbsd_chip_config(struct wbsd_host *host) |
85bcc130 | 1655 | { |
19c1f3ca PO |
1656 | wbsd_unlock_config(host); |
1657 | ||
85bcc130 PO |
1658 | /* |
1659 | * Reset the chip. | |
fecf92ba | 1660 | */ |
85bcc130 PO |
1661 | wbsd_write_config(host, WBSD_CONF_SWRST, 1); |
1662 | wbsd_write_config(host, WBSD_CONF_SWRST, 0); | |
1da177e4 LT |
1663 | |
1664 | /* | |
1665 | * Select SD/MMC function. | |
1666 | */ | |
1667 | wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD); | |
fecf92ba | 1668 | |
1da177e4 LT |
1669 | /* |
1670 | * Set up card detection. | |
1671 | */ | |
85bcc130 | 1672 | wbsd_write_config(host, WBSD_CONF_PINS, WBSD_PINS_DETECT_GP11); |
fecf92ba | 1673 | |
1da177e4 | 1674 | /* |
85bcc130 | 1675 | * Configure chip |
1da177e4 LT |
1676 | */ |
1677 | wbsd_write_config(host, WBSD_CONF_PORT_HI, host->base >> 8); | |
1678 | wbsd_write_config(host, WBSD_CONF_PORT_LO, host->base & 0xff); | |
fecf92ba | 1679 | |
85bcc130 | 1680 | wbsd_write_config(host, WBSD_CONF_IRQ, host->irq); |
fecf92ba | 1681 | |
85bcc130 PO |
1682 | if (host->dma >= 0) |
1683 | wbsd_write_config(host, WBSD_CONF_DRQ, host->dma); | |
fecf92ba | 1684 | |
1da177e4 | 1685 | /* |
85bcc130 | 1686 | * Enable and power up chip. |
1da177e4 | 1687 | */ |
85bcc130 PO |
1688 | wbsd_write_config(host, WBSD_CONF_ENABLE, 1); |
1689 | wbsd_write_config(host, WBSD_CONF_POWER, 0x20); | |
19c1f3ca PO |
1690 | |
1691 | wbsd_lock_config(host); | |
85bcc130 PO |
1692 | } |
1693 | ||
1694 | /* | |
1695 | * Check that configured resources are correct. | |
1696 | */ | |
fecf92ba | 1697 | |
cfa7f521 | 1698 | static int wbsd_chip_validate(struct wbsd_host *host) |
85bcc130 PO |
1699 | { |
1700 | int base, irq, dma; | |
fecf92ba | 1701 | |
19c1f3ca PO |
1702 | wbsd_unlock_config(host); |
1703 | ||
1da177e4 | 1704 | /* |
85bcc130 | 1705 | * Select SD/MMC function. |
1da177e4 | 1706 | */ |
85bcc130 | 1707 | wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD); |
fecf92ba | 1708 | |
1da177e4 | 1709 | /* |
85bcc130 | 1710 | * Read configuration. |
1da177e4 | 1711 | */ |
85bcc130 PO |
1712 | base = wbsd_read_config(host, WBSD_CONF_PORT_HI) << 8; |
1713 | base |= wbsd_read_config(host, WBSD_CONF_PORT_LO); | |
fecf92ba | 1714 | |
85bcc130 | 1715 | irq = wbsd_read_config(host, WBSD_CONF_IRQ); |
fecf92ba | 1716 | |
85bcc130 | 1717 | dma = wbsd_read_config(host, WBSD_CONF_DRQ); |
fecf92ba | 1718 | |
19c1f3ca PO |
1719 | wbsd_lock_config(host); |
1720 | ||
1da177e4 | 1721 | /* |
85bcc130 | 1722 | * Validate against given configuration. |
1da177e4 | 1723 | */ |
85bcc130 PO |
1724 | if (base != host->base) |
1725 | return 0; | |
1726 | if (irq != host->irq) | |
1727 | return 0; | |
1728 | if ((dma != host->dma) && (host->dma != -1)) | |
1729 | return 0; | |
fecf92ba | 1730 | |
85bcc130 PO |
1731 | return 1; |
1732 | } | |
1733 | ||
19c1f3ca PO |
1734 | /* |
1735 | * Powers down the SD function | |
1736 | */ | |
1737 | ||
cfa7f521 | 1738 | static void wbsd_chip_poweroff(struct wbsd_host *host) |
19c1f3ca PO |
1739 | { |
1740 | wbsd_unlock_config(host); | |
1741 | ||
1742 | wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD); | |
1743 | wbsd_write_config(host, WBSD_CONF_ENABLE, 0); | |
1744 | ||
1745 | wbsd_lock_config(host); | |
1746 | } | |
1747 | ||
85bcc130 PO |
1748 | /*****************************************************************************\ |
1749 | * * | |
1750 | * Devices setup and shutdown * | |
1751 | * * | |
1752 | \*****************************************************************************/ | |
1753 | ||
cfa7f521 | 1754 | static int __devinit wbsd_init(struct device *dev, int base, int irq, int dma, |
85bcc130 PO |
1755 | int pnp) |
1756 | { | |
cfa7f521 PO |
1757 | struct wbsd_host *host = NULL; |
1758 | struct mmc_host *mmc = NULL; | |
85bcc130 | 1759 | int ret; |
fecf92ba | 1760 | |
85bcc130 PO |
1761 | ret = wbsd_alloc_mmc(dev); |
1762 | if (ret) | |
1763 | return ret; | |
fecf92ba | 1764 | |
85bcc130 PO |
1765 | mmc = dev_get_drvdata(dev); |
1766 | host = mmc_priv(mmc); | |
fecf92ba | 1767 | |
1da177e4 | 1768 | /* |
85bcc130 | 1769 | * Scan for hardware. |
1da177e4 | 1770 | */ |
85bcc130 | 1771 | ret = wbsd_scan(host); |
cfa7f521 PO |
1772 | if (ret) { |
1773 | if (pnp && (ret == -ENODEV)) { | |
85bcc130 PO |
1774 | printk(KERN_WARNING DRIVER_NAME |
1775 | ": Unable to confirm device presence. You may " | |
1776 | "experience lock-ups.\n"); | |
cfa7f521 | 1777 | } else { |
85bcc130 PO |
1778 | wbsd_free_mmc(dev); |
1779 | return ret; | |
1780 | } | |
1781 | } | |
fecf92ba | 1782 | |
1da177e4 | 1783 | /* |
85bcc130 | 1784 | * Request resources. |
1da177e4 | 1785 | */ |
85bcc130 | 1786 | ret = wbsd_request_resources(host, io, irq, dma); |
cfa7f521 | 1787 | if (ret) { |
85bcc130 PO |
1788 | wbsd_release_resources(host); |
1789 | wbsd_free_mmc(dev); | |
1790 | return ret; | |
1791 | } | |
fecf92ba | 1792 | |
1da177e4 | 1793 | /* |
85bcc130 | 1794 | * See if chip needs to be configured. |
1da177e4 | 1795 | */ |
cfa7f521 PO |
1796 | if (pnp) { |
1797 | if ((host->config != 0) && !wbsd_chip_validate(host)) { | |
85bcc130 PO |
1798 | printk(KERN_WARNING DRIVER_NAME |
1799 | ": PnP active but chip not configured! " | |
1800 | "You probably have a buggy BIOS. " | |
1801 | "Configuring chip manually.\n"); | |
1802 | wbsd_chip_config(host); | |
1803 | } | |
cfa7f521 | 1804 | } else |
85bcc130 | 1805 | wbsd_chip_config(host); |
fecf92ba | 1806 | |
1da177e4 LT |
1807 | /* |
1808 | * Power Management stuff. No idea how this works. | |
1809 | * Not tested. | |
1810 | */ | |
1811 | #ifdef CONFIG_PM | |
cfa7f521 | 1812 | if (host->config) { |
19c1f3ca | 1813 | wbsd_unlock_config(host); |
85bcc130 | 1814 | wbsd_write_config(host, WBSD_CONF_PME, 0xA0); |
19c1f3ca PO |
1815 | wbsd_lock_config(host); |
1816 | } | |
1da177e4 | 1817 | #endif |
85bcc130 PO |
1818 | /* |
1819 | * Allow device to initialise itself properly. | |
1820 | */ | |
1821 | mdelay(5); | |
1da177e4 LT |
1822 | |
1823 | /* | |
1824 | * Reset the chip into a known state. | |
1825 | */ | |
1826 | wbsd_init_device(host); | |
fecf92ba | 1827 | |
1da177e4 LT |
1828 | mmc_add_host(mmc); |
1829 | ||
d366b643 | 1830 | printk(KERN_INFO "%s: W83L51xD", mmc_hostname(mmc)); |
85bcc130 PO |
1831 | if (host->chip_id != 0) |
1832 | printk(" id %x", (int)host->chip_id); | |
1833 | printk(" at 0x%x irq %d", (int)host->base, (int)host->irq); | |
1834 | if (host->dma >= 0) | |
1835 | printk(" dma %d", (int)host->dma); | |
1836 | else | |
1837 | printk(" FIFO"); | |
1838 | if (pnp) | |
1839 | printk(" PnP"); | |
1840 | printk("\n"); | |
1da177e4 LT |
1841 | |
1842 | return 0; | |
1da177e4 LT |
1843 | } |
1844 | ||
cfa7f521 | 1845 | static void __devexit wbsd_shutdown(struct device *dev, int pnp) |
1da177e4 | 1846 | { |
cfa7f521 PO |
1847 | struct mmc_host *mmc = dev_get_drvdata(dev); |
1848 | struct wbsd_host *host; | |
fecf92ba | 1849 | |
1da177e4 | 1850 | if (!mmc) |
85bcc130 | 1851 | return; |
1da177e4 LT |
1852 | |
1853 | host = mmc_priv(mmc); | |
fecf92ba | 1854 | |
1da177e4 LT |
1855 | mmc_remove_host(mmc); |
1856 | ||
19c1f3ca PO |
1857 | /* |
1858 | * Power down the SD/MMC function. | |
1859 | */ | |
85bcc130 | 1860 | if (!pnp) |
19c1f3ca | 1861 | wbsd_chip_poweroff(host); |
fecf92ba | 1862 | |
85bcc130 | 1863 | wbsd_release_resources(host); |
fecf92ba | 1864 | |
85bcc130 PO |
1865 | wbsd_free_mmc(dev); |
1866 | } | |
1da177e4 | 1867 | |
85bcc130 PO |
1868 | /* |
1869 | * Non-PnP | |
1870 | */ | |
1871 | ||
cfa7f521 | 1872 | static int __devinit wbsd_probe(struct platform_device *dev) |
85bcc130 | 1873 | { |
3ae5eaec | 1874 | return wbsd_init(&dev->dev, io, irq, dma, 0); |
85bcc130 PO |
1875 | } |
1876 | ||
cfa7f521 | 1877 | static int __devexit wbsd_remove(struct platform_device *dev) |
85bcc130 | 1878 | { |
3ae5eaec | 1879 | wbsd_shutdown(&dev->dev, 0); |
85bcc130 PO |
1880 | |
1881 | return 0; | |
1882 | } | |
1883 | ||
1884 | /* | |
1885 | * PnP | |
1886 | */ | |
1887 | ||
1888 | #ifdef CONFIG_PNP | |
1889 | ||
1890 | static int __devinit | |
cfa7f521 | 1891 | wbsd_pnp_probe(struct pnp_dev *pnpdev, const struct pnp_device_id *dev_id) |
85bcc130 PO |
1892 | { |
1893 | int io, irq, dma; | |
fecf92ba | 1894 | |
85bcc130 PO |
1895 | /* |
1896 | * Get resources from PnP layer. | |
1897 | */ | |
1898 | io = pnp_port_start(pnpdev, 0); | |
1899 | irq = pnp_irq(pnpdev, 0); | |
1900 | if (pnp_dma_valid(pnpdev, 0)) | |
1901 | dma = pnp_dma(pnpdev, 0); | |
1902 | else | |
1903 | dma = -1; | |
fecf92ba | 1904 | |
85bcc130 | 1905 | DBGF("PnP resources: port %3x irq %d dma %d\n", io, irq, dma); |
fecf92ba | 1906 | |
85bcc130 PO |
1907 | return wbsd_init(&pnpdev->dev, io, irq, dma, 1); |
1908 | } | |
1da177e4 | 1909 | |
cfa7f521 | 1910 | static void __devexit wbsd_pnp_remove(struct pnp_dev *dev) |
85bcc130 PO |
1911 | { |
1912 | wbsd_shutdown(&dev->dev, 1); | |
1da177e4 LT |
1913 | } |
1914 | ||
85bcc130 PO |
1915 | #endif /* CONFIG_PNP */ |
1916 | ||
1da177e4 LT |
1917 | /* |
1918 | * Power management | |
1919 | */ | |
1920 | ||
1921 | #ifdef CONFIG_PM | |
19c1f3ca | 1922 | |
5e68d95d PO |
1923 | static int wbsd_suspend(struct wbsd_host *host, pm_message_t state) |
1924 | { | |
1925 | BUG_ON(host == NULL); | |
1926 | ||
1927 | return mmc_suspend_host(host->mmc, state); | |
1928 | } | |
1929 | ||
1930 | static int wbsd_resume(struct wbsd_host *host) | |
1931 | { | |
1932 | BUG_ON(host == NULL); | |
1933 | ||
1934 | wbsd_init_device(host); | |
1935 | ||
1936 | return mmc_resume_host(host->mmc); | |
1937 | } | |
1938 | ||
cfa7f521 PO |
1939 | static int wbsd_platform_suspend(struct platform_device *dev, |
1940 | pm_message_t state) | |
1da177e4 | 1941 | { |
3ae5eaec | 1942 | struct mmc_host *mmc = platform_get_drvdata(dev); |
19c1f3ca PO |
1943 | struct wbsd_host *host; |
1944 | int ret; | |
1945 | ||
5e68d95d | 1946 | if (mmc == NULL) |
19c1f3ca PO |
1947 | return 0; |
1948 | ||
5e68d95d | 1949 | DBGF("Suspending...\n"); |
19c1f3ca PO |
1950 | |
1951 | host = mmc_priv(mmc); | |
1952 | ||
5e68d95d PO |
1953 | ret = wbsd_suspend(host, state); |
1954 | if (ret) | |
1955 | return ret; | |
1956 | ||
19c1f3ca | 1957 | wbsd_chip_poweroff(host); |
1da177e4 LT |
1958 | |
1959 | return 0; | |
1960 | } | |
1961 | ||
5e68d95d | 1962 | static int wbsd_platform_resume(struct platform_device *dev) |
1da177e4 | 1963 | { |
3ae5eaec | 1964 | struct mmc_host *mmc = platform_get_drvdata(dev); |
19c1f3ca | 1965 | struct wbsd_host *host; |
1da177e4 | 1966 | |
5e68d95d | 1967 | if (mmc == NULL) |
19c1f3ca PO |
1968 | return 0; |
1969 | ||
5e68d95d | 1970 | DBGF("Resuming...\n"); |
19c1f3ca PO |
1971 | |
1972 | host = mmc_priv(mmc); | |
1973 | ||
1974 | wbsd_chip_config(host); | |
1975 | ||
1976 | /* | |
1977 | * Allow device to initialise itself properly. | |
1978 | */ | |
1979 | mdelay(5); | |
1980 | ||
5e68d95d PO |
1981 | return wbsd_resume(host); |
1982 | } | |
1983 | ||
1984 | #ifdef CONFIG_PNP | |
1985 | ||
1986 | static int wbsd_pnp_suspend(struct pnp_dev *pnp_dev, pm_message_t state) | |
1987 | { | |
1988 | struct mmc_host *mmc = dev_get_drvdata(&pnp_dev->dev); | |
1989 | struct wbsd_host *host; | |
1990 | ||
1991 | if (mmc == NULL) | |
1992 | return 0; | |
19c1f3ca | 1993 | |
5e68d95d PO |
1994 | DBGF("Suspending...\n"); |
1995 | ||
1996 | host = mmc_priv(mmc); | |
1997 | ||
1998 | return wbsd_suspend(host, state); | |
1da177e4 | 1999 | } |
19c1f3ca | 2000 | |
5e68d95d PO |
2001 | static int wbsd_pnp_resume(struct pnp_dev *pnp_dev) |
2002 | { | |
2003 | struct mmc_host *mmc = dev_get_drvdata(&pnp_dev->dev); | |
2004 | struct wbsd_host *host; | |
2005 | ||
2006 | if (mmc == NULL) | |
2007 | return 0; | |
2008 | ||
2009 | DBGF("Resuming...\n"); | |
2010 | ||
2011 | host = mmc_priv(mmc); | |
2012 | ||
2013 | /* | |
2014 | * See if chip needs to be configured. | |
2015 | */ | |
cfa7f521 PO |
2016 | if (host->config != 0) { |
2017 | if (!wbsd_chip_validate(host)) { | |
5e68d95d PO |
2018 | printk(KERN_WARNING DRIVER_NAME |
2019 | ": PnP active but chip not configured! " | |
2020 | "You probably have a buggy BIOS. " | |
2021 | "Configuring chip manually.\n"); | |
2022 | wbsd_chip_config(host); | |
2023 | } | |
2024 | } | |
2025 | ||
2026 | /* | |
2027 | * Allow device to initialise itself properly. | |
2028 | */ | |
2029 | mdelay(5); | |
2030 | ||
2031 | return wbsd_resume(host); | |
2032 | } | |
2033 | ||
2034 | #endif /* CONFIG_PNP */ | |
2035 | ||
19c1f3ca PO |
2036 | #else /* CONFIG_PM */ |
2037 | ||
5e68d95d PO |
2038 | #define wbsd_platform_suspend NULL |
2039 | #define wbsd_platform_resume NULL | |
2040 | ||
2041 | #define wbsd_pnp_suspend NULL | |
2042 | #define wbsd_pnp_resume NULL | |
19c1f3ca PO |
2043 | |
2044 | #endif /* CONFIG_PM */ | |
1da177e4 | 2045 | |
85bcc130 | 2046 | static struct platform_device *wbsd_device; |
1da177e4 | 2047 | |
3ae5eaec | 2048 | static struct platform_driver wbsd_driver = { |
1da177e4 | 2049 | .probe = wbsd_probe, |
93968d75 | 2050 | .remove = __devexit_p(wbsd_remove), |
fecf92ba | 2051 | |
5e68d95d PO |
2052 | .suspend = wbsd_platform_suspend, |
2053 | .resume = wbsd_platform_resume, | |
3ae5eaec RK |
2054 | .driver = { |
2055 | .name = DRIVER_NAME, | |
2056 | }, | |
1da177e4 LT |
2057 | }; |
2058 | ||
85bcc130 PO |
2059 | #ifdef CONFIG_PNP |
2060 | ||
2061 | static struct pnp_driver wbsd_pnp_driver = { | |
2062 | .name = DRIVER_NAME, | |
2063 | .id_table = pnp_dev_table, | |
2064 | .probe = wbsd_pnp_probe, | |
93968d75 | 2065 | .remove = __devexit_p(wbsd_pnp_remove), |
5e68d95d PO |
2066 | |
2067 | .suspend = wbsd_pnp_suspend, | |
2068 | .resume = wbsd_pnp_resume, | |
85bcc130 PO |
2069 | }; |
2070 | ||
2071 | #endif /* CONFIG_PNP */ | |
2072 | ||
1da177e4 LT |
2073 | /* |
2074 | * Module loading/unloading | |
2075 | */ | |
2076 | ||
2077 | static int __init wbsd_drv_init(void) | |
2078 | { | |
2079 | int result; | |
fecf92ba | 2080 | |
1da177e4 LT |
2081 | printk(KERN_INFO DRIVER_NAME |
2082 | ": Winbond W83L51xD SD/MMC card interface driver, " | |
2083 | DRIVER_VERSION "\n"); | |
2084 | printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n"); | |
1da177e4 | 2085 | |
85bcc130 PO |
2086 | #ifdef CONFIG_PNP |
2087 | ||
cfa7f521 | 2088 | if (!nopnp) { |
85bcc130 PO |
2089 | result = pnp_register_driver(&wbsd_pnp_driver); |
2090 | if (result < 0) | |
2091 | return result; | |
2092 | } | |
fecf92ba PO |
2093 | #endif /* CONFIG_PNP */ |
2094 | ||
cfa7f521 | 2095 | if (nopnp) { |
3ae5eaec | 2096 | result = platform_driver_register(&wbsd_driver); |
85bcc130 PO |
2097 | if (result < 0) |
2098 | return result; | |
2099 | ||
21500bb3 | 2100 | wbsd_device = platform_device_alloc(DRIVER_NAME, -1); |
cfa7f521 | 2101 | if (!wbsd_device) { |
21500bb3 DT |
2102 | platform_driver_unregister(&wbsd_driver); |
2103 | return -ENOMEM; | |
2104 | } | |
2105 | ||
2106 | result = platform_device_add(wbsd_device); | |
cfa7f521 | 2107 | if (result) { |
21500bb3 DT |
2108 | platform_device_put(wbsd_device); |
2109 | platform_driver_unregister(&wbsd_driver); | |
2110 | return result; | |
2111 | } | |
85bcc130 | 2112 | } |
1da177e4 LT |
2113 | |
2114 | return 0; | |
2115 | } | |
2116 | ||
2117 | static void __exit wbsd_drv_exit(void) | |
2118 | { | |
85bcc130 PO |
2119 | #ifdef CONFIG_PNP |
2120 | ||
2121 | if (!nopnp) | |
2122 | pnp_unregister_driver(&wbsd_pnp_driver); | |
fecf92ba PO |
2123 | |
2124 | #endif /* CONFIG_PNP */ | |
85bcc130 | 2125 | |
cfa7f521 | 2126 | if (nopnp) { |
85bcc130 | 2127 | platform_device_unregister(wbsd_device); |
fecf92ba | 2128 | |
3ae5eaec | 2129 | platform_driver_unregister(&wbsd_driver); |
85bcc130 | 2130 | } |
1da177e4 LT |
2131 | |
2132 | DBG("unloaded\n"); | |
2133 | } | |
2134 | ||
2135 | module_init(wbsd_drv_init); | |
2136 | module_exit(wbsd_drv_exit); | |
85bcc130 PO |
2137 | #ifdef CONFIG_PNP |
2138 | module_param(nopnp, uint, 0444); | |
2139 | #endif | |
1da177e4 LT |
2140 | module_param(io, uint, 0444); |
2141 | module_param(irq, uint, 0444); | |
2142 | module_param(dma, int, 0444); | |
2143 | ||
2144 | MODULE_LICENSE("GPL"); | |
de1d09e3 | 2145 | MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>"); |
1da177e4 LT |
2146 | MODULE_DESCRIPTION("Winbond W83L51xD SD/MMC card interface driver"); |
2147 | MODULE_VERSION(DRIVER_VERSION); | |
2148 | ||
85bcc130 PO |
2149 | #ifdef CONFIG_PNP |
2150 | MODULE_PARM_DESC(nopnp, "Scan for device instead of relying on PNP. (default 0)"); | |
2151 | #endif | |
1da177e4 LT |
2152 | MODULE_PARM_DESC(io, "I/O base to allocate. Must be 8 byte aligned. (default 0x248)"); |
2153 | MODULE_PARM_DESC(irq, "IRQ to allocate. (default 6)"); | |
2154 | MODULE_PARM_DESC(dma, "DMA channel to allocate. -1 for no DMA. (default 2)"); |