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CommitLineData
1da177e4
LT
1/*
2 * linux/drivers/mmc/wbsd.c - Winbond W83L51xD SD/MMC driver
3 *
4 * Copyright (C) 2004-2005 Pierre Ossman, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 *
11 * Warning!
12 *
13 * Changes to the FIFO system should be done with extreme care since
14 * the hardware is full of bugs related to the FIFO. Known issues are:
15 *
16 * - FIFO size field in FSR is always zero.
17 *
18 * - FIFO interrupts tend not to work as they should. Interrupts are
19 * triggered only for full/empty events, not for threshold values.
20 *
21 * - On APIC systems the FIFO empty interrupt is sometimes lost.
22 */
23
24#include <linux/config.h>
25#include <linux/module.h>
26#include <linux/moduleparam.h>
27#include <linux/init.h>
28#include <linux/ioport.h>
d052d1be 29#include <linux/platform_device.h>
1da177e4 30#include <linux/interrupt.h>
85bcc130 31#include <linux/dma-mapping.h>
1da177e4 32#include <linux/delay.h>
85bcc130 33#include <linux/pnp.h>
1da177e4
LT
34#include <linux/highmem.h>
35#include <linux/mmc/host.h>
36#include <linux/mmc/protocol.h>
37
38#include <asm/io.h>
39#include <asm/dma.h>
40#include <asm/scatterlist.h>
41
42#include "wbsd.h"
43
44#define DRIVER_NAME "wbsd"
402771c7 45#define DRIVER_VERSION "1.5"
1da177e4
LT
46
47#ifdef CONFIG_MMC_DEBUG
48#define DBG(x...) \
49 printk(KERN_DEBUG DRIVER_NAME ": " x)
50#define DBGF(f, x...) \
51 printk(KERN_DEBUG DRIVER_NAME " [%s()]: " f, __func__ , ##x)
52#else
53#define DBG(x...) do { } while (0)
54#define DBGF(x...) do { } while (0)
55#endif
56
85bcc130
PO
57/*
58 * Device resources
59 */
60
61#ifdef CONFIG_PNP
62
63static const struct pnp_device_id pnp_dev_table[] = {
64 { "WEC0517", 0 },
65 { "WEC0518", 0 },
66 { "", 0 },
67};
68
69MODULE_DEVICE_TABLE(pnp, pnp_dev_table);
70
71#endif /* CONFIG_PNP */
72
3eee0d03
AB
73static const int config_ports[] = { 0x2E, 0x4E };
74static const int unlock_codes[] = { 0x83, 0x87 };
75
76static const int valid_ids[] = {
77 0x7112,
78 };
79
85bcc130
PO
80#ifdef CONFIG_PNP
81static unsigned int nopnp = 0;
82#else
83static const unsigned int nopnp = 1;
84#endif
85static unsigned int io = 0x248;
86static unsigned int irq = 6;
87static int dma = 2;
88
1da177e4
LT
89/*
90 * Basic functions
91 */
92
93static inline void wbsd_unlock_config(struct wbsd_host* host)
94{
85bcc130 95 BUG_ON(host->config == 0);
fecf92ba 96
1da177e4
LT
97 outb(host->unlock_code, host->config);
98 outb(host->unlock_code, host->config);
99}
100
101static inline void wbsd_lock_config(struct wbsd_host* host)
102{
85bcc130 103 BUG_ON(host->config == 0);
fecf92ba 104
1da177e4
LT
105 outb(LOCK_CODE, host->config);
106}
107
108static inline void wbsd_write_config(struct wbsd_host* host, u8 reg, u8 value)
109{
85bcc130 110 BUG_ON(host->config == 0);
fecf92ba 111
1da177e4
LT
112 outb(reg, host->config);
113 outb(value, host->config + 1);
114}
115
116static inline u8 wbsd_read_config(struct wbsd_host* host, u8 reg)
117{
85bcc130 118 BUG_ON(host->config == 0);
fecf92ba 119
1da177e4
LT
120 outb(reg, host->config);
121 return inb(host->config + 1);
122}
123
124static inline void wbsd_write_index(struct wbsd_host* host, u8 index, u8 value)
125{
126 outb(index, host->base + WBSD_IDXR);
127 outb(value, host->base + WBSD_DATAR);
128}
129
130static inline u8 wbsd_read_index(struct wbsd_host* host, u8 index)
131{
132 outb(index, host->base + WBSD_IDXR);
133 return inb(host->base + WBSD_DATAR);
134}
135
136/*
137 * Common routines
138 */
139
140static void wbsd_init_device(struct wbsd_host* host)
141{
142 u8 setup, ier;
fecf92ba 143
1da177e4
LT
144 /*
145 * Reset chip (SD/MMC part) and fifo.
146 */
147 setup = wbsd_read_index(host, WBSD_IDX_SETUP);
148 setup |= WBSD_FIFO_RESET | WBSD_SOFT_RESET;
149 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
fecf92ba 150
85bcc130
PO
151 /*
152 * Set DAT3 to input
153 */
154 setup &= ~WBSD_DAT3_H;
155 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
156 host->flags &= ~WBSD_FIGNORE_DETECT;
fecf92ba 157
1da177e4
LT
158 /*
159 * Read back default clock.
160 */
161 host->clk = wbsd_read_index(host, WBSD_IDX_CLK);
162
163 /*
164 * Power down port.
165 */
166 outb(WBSD_POWER_N, host->base + WBSD_CSR);
fecf92ba 167
1da177e4
LT
168 /*
169 * Set maximum timeout.
170 */
171 wbsd_write_index(host, WBSD_IDX_TAAC, 0x7F);
fecf92ba 172
85bcc130
PO
173 /*
174 * Test for card presence
175 */
176 if (inb(host->base + WBSD_CSR) & WBSD_CARDPRESENT)
177 host->flags |= WBSD_FCARD_PRESENT;
178 else
179 host->flags &= ~WBSD_FCARD_PRESENT;
fecf92ba 180
1da177e4
LT
181 /*
182 * Enable interesting interrupts.
183 */
184 ier = 0;
185 ier |= WBSD_EINT_CARD;
186 ier |= WBSD_EINT_FIFO_THRE;
187 ier |= WBSD_EINT_CCRC;
188 ier |= WBSD_EINT_TIMEOUT;
189 ier |= WBSD_EINT_CRC;
190 ier |= WBSD_EINT_TC;
191
192 outb(ier, host->base + WBSD_EIR);
193
194 /*
195 * Clear interrupts.
196 */
197 inb(host->base + WBSD_ISR);
198}
199
200static void wbsd_reset(struct wbsd_host* host)
201{
202 u8 setup;
fecf92ba 203
d191634f 204 printk(KERN_ERR "%s: Resetting chip\n", mmc_hostname(host->mmc));
fecf92ba 205
1da177e4
LT
206 /*
207 * Soft reset of chip (SD/MMC part).
208 */
209 setup = wbsd_read_index(host, WBSD_IDX_SETUP);
210 setup |= WBSD_SOFT_RESET;
211 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
212}
213
214static void wbsd_request_end(struct wbsd_host* host, struct mmc_request* mrq)
215{
216 unsigned long dmaflags;
fecf92ba 217
1da177e4 218 DBGF("Ending request, cmd (%x)\n", mrq->cmd->opcode);
fecf92ba 219
1da177e4
LT
220 if (host->dma >= 0)
221 {
222 /*
223 * Release ISA DMA controller.
224 */
225 dmaflags = claim_dma_lock();
226 disable_dma(host->dma);
227 clear_dma_ff(host->dma);
228 release_dma_lock(dmaflags);
229
230 /*
231 * Disable DMA on host.
232 */
233 wbsd_write_index(host, WBSD_IDX_DMA, 0);
234 }
fecf92ba 235
1da177e4
LT
236 host->mrq = NULL;
237
238 /*
239 * MMC layer might call back into the driver so first unlock.
240 */
241 spin_unlock(&host->lock);
242 mmc_request_done(host->mmc, mrq);
243 spin_lock(&host->lock);
244}
245
246/*
247 * Scatter/gather functions
248 */
249
250static inline void wbsd_init_sg(struct wbsd_host* host, struct mmc_data* data)
251{
252 /*
253 * Get info. about SG list from data structure.
254 */
255 host->cur_sg = data->sg;
256 host->num_sg = data->sg_len;
257
258 host->offset = 0;
259 host->remain = host->cur_sg->length;
260}
261
262static inline int wbsd_next_sg(struct wbsd_host* host)
263{
264 /*
265 * Skip to next SG entry.
266 */
267 host->cur_sg++;
268 host->num_sg--;
269
270 /*
271 * Any entries left?
272 */
273 if (host->num_sg > 0)
274 {
275 host->offset = 0;
276 host->remain = host->cur_sg->length;
277 }
fecf92ba 278
1da177e4
LT
279 return host->num_sg;
280}
281
282static inline char* wbsd_kmap_sg(struct wbsd_host* host)
283{
284 host->mapped_sg = kmap_atomic(host->cur_sg->page, KM_BIO_SRC_IRQ) +
285 host->cur_sg->offset;
286 return host->mapped_sg;
287}
288
289static inline void wbsd_kunmap_sg(struct wbsd_host* host)
290{
291 kunmap_atomic(host->mapped_sg, KM_BIO_SRC_IRQ);
292}
293
294static inline void wbsd_sg_to_dma(struct wbsd_host* host, struct mmc_data* data)
295{
296 unsigned int len, i, size;
297 struct scatterlist* sg;
298 char* dmabuf = host->dma_buffer;
299 char* sgbuf;
fecf92ba 300
1da177e4 301 size = host->size;
fecf92ba 302
1da177e4
LT
303 sg = data->sg;
304 len = data->sg_len;
fecf92ba 305
1da177e4
LT
306 /*
307 * Just loop through all entries. Size might not
308 * be the entire list though so make sure that
309 * we do not transfer too much.
310 */
311 for (i = 0;i < len;i++)
312 {
313 sgbuf = kmap_atomic(sg[i].page, KM_BIO_SRC_IRQ) + sg[i].offset;
314 if (size < sg[i].length)
315 memcpy(dmabuf, sgbuf, size);
316 else
317 memcpy(dmabuf, sgbuf, sg[i].length);
318 kunmap_atomic(sgbuf, KM_BIO_SRC_IRQ);
319 dmabuf += sg[i].length;
fecf92ba 320
1da177e4
LT
321 if (size < sg[i].length)
322 size = 0;
323 else
324 size -= sg[i].length;
fecf92ba 325
1da177e4
LT
326 if (size == 0)
327 break;
328 }
fecf92ba 329
1da177e4
LT
330 /*
331 * Check that we didn't get a request to transfer
332 * more data than can fit into the SG list.
333 */
fecf92ba 334
1da177e4 335 BUG_ON(size != 0);
fecf92ba 336
1da177e4
LT
337 host->size -= size;
338}
339
340static inline void wbsd_dma_to_sg(struct wbsd_host* host, struct mmc_data* data)
341{
342 unsigned int len, i, size;
343 struct scatterlist* sg;
344 char* dmabuf = host->dma_buffer;
345 char* sgbuf;
fecf92ba 346
1da177e4 347 size = host->size;
fecf92ba 348
1da177e4
LT
349 sg = data->sg;
350 len = data->sg_len;
fecf92ba 351
1da177e4
LT
352 /*
353 * Just loop through all entries. Size might not
354 * be the entire list though so make sure that
355 * we do not transfer too much.
356 */
357 for (i = 0;i < len;i++)
358 {
359 sgbuf = kmap_atomic(sg[i].page, KM_BIO_SRC_IRQ) + sg[i].offset;
360 if (size < sg[i].length)
361 memcpy(sgbuf, dmabuf, size);
362 else
363 memcpy(sgbuf, dmabuf, sg[i].length);
364 kunmap_atomic(sgbuf, KM_BIO_SRC_IRQ);
365 dmabuf += sg[i].length;
fecf92ba 366
1da177e4
LT
367 if (size < sg[i].length)
368 size = 0;
369 else
370 size -= sg[i].length;
fecf92ba 371
1da177e4
LT
372 if (size == 0)
373 break;
374 }
fecf92ba 375
1da177e4
LT
376 /*
377 * Check that we didn't get a request to transfer
378 * more data than can fit into the SG list.
379 */
fecf92ba 380
1da177e4 381 BUG_ON(size != 0);
fecf92ba 382
1da177e4
LT
383 host->size -= size;
384}
385
386/*
387 * Command handling
388 */
fecf92ba 389
1da177e4
LT
390static inline void wbsd_get_short_reply(struct wbsd_host* host,
391 struct mmc_command* cmd)
392{
393 /*
394 * Correct response type?
395 */
396 if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_SHORT)
397 {
398 cmd->error = MMC_ERR_INVALID;
399 return;
400 }
fecf92ba 401
1da177e4
LT
402 cmd->resp[0] =
403 wbsd_read_index(host, WBSD_IDX_RESP12) << 24;
404 cmd->resp[0] |=
405 wbsd_read_index(host, WBSD_IDX_RESP13) << 16;
406 cmd->resp[0] |=
407 wbsd_read_index(host, WBSD_IDX_RESP14) << 8;
408 cmd->resp[0] |=
409 wbsd_read_index(host, WBSD_IDX_RESP15) << 0;
410 cmd->resp[1] =
411 wbsd_read_index(host, WBSD_IDX_RESP16) << 24;
412}
413
414static inline void wbsd_get_long_reply(struct wbsd_host* host,
415 struct mmc_command* cmd)
416{
417 int i;
fecf92ba 418
1da177e4
LT
419 /*
420 * Correct response type?
421 */
422 if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_LONG)
423 {
424 cmd->error = MMC_ERR_INVALID;
425 return;
426 }
fecf92ba 427
1da177e4
LT
428 for (i = 0;i < 4;i++)
429 {
430 cmd->resp[i] =
431 wbsd_read_index(host, WBSD_IDX_RESP1 + i * 4) << 24;
432 cmd->resp[i] |=
433 wbsd_read_index(host, WBSD_IDX_RESP2 + i * 4) << 16;
434 cmd->resp[i] |=
435 wbsd_read_index(host, WBSD_IDX_RESP3 + i * 4) << 8;
436 cmd->resp[i] |=
437 wbsd_read_index(host, WBSD_IDX_RESP4 + i * 4) << 0;
438 }
439}
440
1da177e4
LT
441static void wbsd_send_command(struct wbsd_host* host, struct mmc_command* cmd)
442{
443 int i;
444 u8 status, isr;
fecf92ba 445
1da177e4
LT
446 DBGF("Sending cmd (%x)\n", cmd->opcode);
447
448 /*
449 * Clear accumulated ISR. The interrupt routine
450 * will fill this one with events that occur during
451 * transfer.
452 */
453 host->isr = 0;
fecf92ba 454
1da177e4
LT
455 /*
456 * Send the command (CRC calculated by host).
457 */
458 outb(cmd->opcode, host->base + WBSD_CMDR);
459 for (i = 3;i >= 0;i--)
460 outb((cmd->arg >> (i * 8)) & 0xff, host->base + WBSD_CMDR);
fecf92ba 461
1da177e4 462 cmd->error = MMC_ERR_NONE;
fecf92ba 463
1da177e4
LT
464 /*
465 * Wait for the request to complete.
466 */
467 do {
468 status = wbsd_read_index(host, WBSD_IDX_STATUS);
469 } while (status & WBSD_CARDTRAFFIC);
470
471 /*
472 * Do we expect a reply?
473 */
474 if ((cmd->flags & MMC_RSP_MASK) != MMC_RSP_NONE)
475 {
476 /*
477 * Read back status.
478 */
479 isr = host->isr;
fecf92ba 480
1da177e4
LT
481 /* Card removed? */
482 if (isr & WBSD_INT_CARD)
483 cmd->error = MMC_ERR_TIMEOUT;
484 /* Timeout? */
485 else if (isr & WBSD_INT_TIMEOUT)
486 cmd->error = MMC_ERR_TIMEOUT;
487 /* CRC? */
488 else if ((cmd->flags & MMC_RSP_CRC) && (isr & WBSD_INT_CRC))
489 cmd->error = MMC_ERR_BADCRC;
490 /* All ok */
491 else
492 {
493 if ((cmd->flags & MMC_RSP_MASK) == MMC_RSP_SHORT)
494 wbsd_get_short_reply(host, cmd);
495 else
496 wbsd_get_long_reply(host, cmd);
497 }
498 }
499
500 DBGF("Sent cmd (%x), res %d\n", cmd->opcode, cmd->error);
501}
502
503/*
504 * Data functions
505 */
506
507static void wbsd_empty_fifo(struct wbsd_host* host)
508{
509 struct mmc_data* data = host->mrq->cmd->data;
510 char* buffer;
511 int i, fsr, fifo;
fecf92ba 512
1da177e4
LT
513 /*
514 * Handle excessive data.
515 */
516 if (data->bytes_xfered == host->size)
517 return;
fecf92ba 518
1da177e4
LT
519 buffer = wbsd_kmap_sg(host) + host->offset;
520
521 /*
522 * Drain the fifo. This has a tendency to loop longer
523 * than the FIFO length (usually one block).
524 */
525 while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_EMPTY))
526 {
527 /*
528 * The size field in the FSR is broken so we have to
529 * do some guessing.
fecf92ba 530 */
1da177e4
LT
531 if (fsr & WBSD_FIFO_FULL)
532 fifo = 16;
533 else if (fsr & WBSD_FIFO_FUTHRE)
534 fifo = 8;
535 else
536 fifo = 1;
fecf92ba 537
1da177e4
LT
538 for (i = 0;i < fifo;i++)
539 {
540 *buffer = inb(host->base + WBSD_DFR);
541 buffer++;
542 host->offset++;
543 host->remain--;
544
545 data->bytes_xfered++;
fecf92ba 546
1da177e4
LT
547 /*
548 * Transfer done?
549 */
550 if (data->bytes_xfered == host->size)
551 {
fecf92ba 552 wbsd_kunmap_sg(host);
1da177e4
LT
553 return;
554 }
fecf92ba 555
1da177e4
LT
556 /*
557 * End of scatter list entry?
558 */
559 if (host->remain == 0)
560 {
561 wbsd_kunmap_sg(host);
fecf92ba 562
1da177e4
LT
563 /*
564 * Get next entry. Check if last.
565 */
566 if (!wbsd_next_sg(host))
567 {
568 /*
569 * We should never reach this point.
570 * It means that we're trying to
571 * transfer more blocks than can fit
572 * into the scatter list.
573 */
574 BUG_ON(1);
fecf92ba 575
1da177e4 576 host->size = data->bytes_xfered;
fecf92ba 577
1da177e4
LT
578 return;
579 }
fecf92ba 580
1da177e4
LT
581 buffer = wbsd_kmap_sg(host);
582 }
583 }
584 }
fecf92ba 585
1da177e4
LT
586 wbsd_kunmap_sg(host);
587
588 /*
589 * This is a very dirty hack to solve a
590 * hardware problem. The chip doesn't trigger
591 * FIFO threshold interrupts properly.
592 */
593 if ((host->size - data->bytes_xfered) < 16)
594 tasklet_schedule(&host->fifo_tasklet);
595}
596
597static void wbsd_fill_fifo(struct wbsd_host* host)
598{
599 struct mmc_data* data = host->mrq->cmd->data;
600 char* buffer;
601 int i, fsr, fifo;
fecf92ba 602
1da177e4
LT
603 /*
604 * Check that we aren't being called after the
605 * entire buffer has been transfered.
606 */
607 if (data->bytes_xfered == host->size)
608 return;
609
610 buffer = wbsd_kmap_sg(host) + host->offset;
611
612 /*
613 * Fill the fifo. This has a tendency to loop longer
614 * than the FIFO length (usually one block).
615 */
616 while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_FULL))
617 {
618 /*
619 * The size field in the FSR is broken so we have to
620 * do some guessing.
fecf92ba 621 */
1da177e4
LT
622 if (fsr & WBSD_FIFO_EMPTY)
623 fifo = 0;
624 else if (fsr & WBSD_FIFO_EMTHRE)
625 fifo = 8;
626 else
627 fifo = 15;
628
629 for (i = 16;i > fifo;i--)
630 {
631 outb(*buffer, host->base + WBSD_DFR);
632 buffer++;
633 host->offset++;
634 host->remain--;
fecf92ba 635
1da177e4 636 data->bytes_xfered++;
fecf92ba 637
1da177e4
LT
638 /*
639 * Transfer done?
640 */
641 if (data->bytes_xfered == host->size)
642 {
643 wbsd_kunmap_sg(host);
644 return;
645 }
646
647 /*
648 * End of scatter list entry?
649 */
650 if (host->remain == 0)
651 {
652 wbsd_kunmap_sg(host);
fecf92ba 653
1da177e4
LT
654 /*
655 * Get next entry. Check if last.
656 */
657 if (!wbsd_next_sg(host))
658 {
659 /*
660 * We should never reach this point.
661 * It means that we're trying to
662 * transfer more blocks than can fit
663 * into the scatter list.
664 */
665 BUG_ON(1);
fecf92ba 666
1da177e4 667 host->size = data->bytes_xfered;
fecf92ba 668
1da177e4
LT
669 return;
670 }
fecf92ba 671
1da177e4
LT
672 buffer = wbsd_kmap_sg(host);
673 }
674 }
675 }
fecf92ba 676
1da177e4 677 wbsd_kunmap_sg(host);
fecf92ba 678
85bcc130
PO
679 /*
680 * The controller stops sending interrupts for
681 * 'FIFO empty' under certain conditions. So we
682 * need to be a bit more pro-active.
683 */
684 tasklet_schedule(&host->fifo_tasklet);
1da177e4
LT
685}
686
687static void wbsd_prepare_data(struct wbsd_host* host, struct mmc_data* data)
688{
689 u16 blksize;
690 u8 setup;
691 unsigned long dmaflags;
692
693 DBGF("blksz %04x blks %04x flags %08x\n",
694 1 << data->blksz_bits, data->blocks, data->flags);
695 DBGF("tsac %d ms nsac %d clk\n",
696 data->timeout_ns / 1000000, data->timeout_clks);
fecf92ba 697
1da177e4
LT
698 /*
699 * Calculate size.
700 */
701 host->size = data->blocks << data->blksz_bits;
702
703 /*
704 * Check timeout values for overflow.
705 * (Yes, some cards cause this value to overflow).
706 */
707 if (data->timeout_ns > 127000000)
708 wbsd_write_index(host, WBSD_IDX_TAAC, 127);
709 else
710 wbsd_write_index(host, WBSD_IDX_TAAC, data->timeout_ns/1000000);
fecf92ba 711
1da177e4
LT
712 if (data->timeout_clks > 255)
713 wbsd_write_index(host, WBSD_IDX_NSAC, 255);
714 else
715 wbsd_write_index(host, WBSD_IDX_NSAC, data->timeout_clks);
fecf92ba 716
1da177e4
LT
717 /*
718 * Inform the chip of how large blocks will be
719 * sent. It needs this to determine when to
720 * calculate CRC.
721 *
722 * Space for CRC must be included in the size.
65ae2118 723 * Two bytes are needed for each data line.
1da177e4 724 */
65ae2118
PO
725 if (host->bus_width == MMC_BUS_WIDTH_1)
726 {
727 blksize = (1 << data->blksz_bits) + 2;
728
729 wbsd_write_index(host, WBSD_IDX_PBSMSB, (blksize >> 4) & 0xF0);
730 wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF);
731 }
732 else if (host->bus_width == MMC_BUS_WIDTH_4)
733 {
734 blksize = (1 << data->blksz_bits) + 2 * 4;
fecf92ba 735
65ae2118
PO
736 wbsd_write_index(host, WBSD_IDX_PBSMSB, ((blksize >> 4) & 0xF0)
737 | WBSD_DATA_WIDTH);
738 wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF);
739 }
740 else
741 {
742 data->error = MMC_ERR_INVALID;
743 return;
744 }
1da177e4
LT
745
746 /*
747 * Clear the FIFO. This is needed even for DMA
748 * transfers since the chip still uses the FIFO
749 * internally.
750 */
751 setup = wbsd_read_index(host, WBSD_IDX_SETUP);
752 setup |= WBSD_FIFO_RESET;
753 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
fecf92ba 754
1da177e4
LT
755 /*
756 * DMA transfer?
757 */
758 if (host->dma >= 0)
fecf92ba 759 {
1da177e4
LT
760 /*
761 * The buffer for DMA is only 64 kB.
762 */
763 BUG_ON(host->size > 0x10000);
764 if (host->size > 0x10000)
765 {
766 data->error = MMC_ERR_INVALID;
767 return;
768 }
fecf92ba 769
1da177e4
LT
770 /*
771 * Transfer data from the SG list to
772 * the DMA buffer.
773 */
774 if (data->flags & MMC_DATA_WRITE)
775 wbsd_sg_to_dma(host, data);
fecf92ba 776
1da177e4
LT
777 /*
778 * Initialise the ISA DMA controller.
fecf92ba 779 */
1da177e4
LT
780 dmaflags = claim_dma_lock();
781 disable_dma(host->dma);
782 clear_dma_ff(host->dma);
783 if (data->flags & MMC_DATA_READ)
784 set_dma_mode(host->dma, DMA_MODE_READ & ~0x40);
785 else
786 set_dma_mode(host->dma, DMA_MODE_WRITE & ~0x40);
787 set_dma_addr(host->dma, host->dma_addr);
788 set_dma_count(host->dma, host->size);
789
790 enable_dma(host->dma);
791 release_dma_lock(dmaflags);
792
793 /*
794 * Enable DMA on the host.
795 */
796 wbsd_write_index(host, WBSD_IDX_DMA, WBSD_DMA_ENABLE);
797 }
798 else
799 {
800 /*
801 * This flag is used to keep printk
802 * output to a minimum.
803 */
804 host->firsterr = 1;
fecf92ba 805
1da177e4
LT
806 /*
807 * Initialise the SG list.
808 */
809 wbsd_init_sg(host, data);
fecf92ba 810
1da177e4
LT
811 /*
812 * Turn off DMA.
813 */
814 wbsd_write_index(host, WBSD_IDX_DMA, 0);
fecf92ba 815
1da177e4
LT
816 /*
817 * Set up FIFO threshold levels (and fill
818 * buffer if doing a write).
819 */
820 if (data->flags & MMC_DATA_READ)
821 {
822 wbsd_write_index(host, WBSD_IDX_FIFOEN,
823 WBSD_FIFOEN_FULL | 8);
824 }
825 else
826 {
827 wbsd_write_index(host, WBSD_IDX_FIFOEN,
828 WBSD_FIFOEN_EMPTY | 8);
829 wbsd_fill_fifo(host);
830 }
fecf92ba
PO
831 }
832
1da177e4
LT
833 data->error = MMC_ERR_NONE;
834}
835
836static void wbsd_finish_data(struct wbsd_host* host, struct mmc_data* data)
837{
838 unsigned long dmaflags;
839 int count;
840 u8 status;
fecf92ba 841
1da177e4
LT
842 WARN_ON(host->mrq == NULL);
843
844 /*
845 * Send a stop command if needed.
846 */
847 if (data->stop)
848 wbsd_send_command(host, data->stop);
849
850 /*
851 * Wait for the controller to leave data
852 * transfer state.
853 */
854 do
855 {
856 status = wbsd_read_index(host, WBSD_IDX_STATUS);
857 } while (status & (WBSD_BLOCK_READ | WBSD_BLOCK_WRITE));
fecf92ba 858
1da177e4
LT
859 /*
860 * DMA transfer?
861 */
862 if (host->dma >= 0)
863 {
864 /*
865 * Disable DMA on the host.
866 */
867 wbsd_write_index(host, WBSD_IDX_DMA, 0);
fecf92ba 868
1da177e4
LT
869 /*
870 * Turn of ISA DMA controller.
871 */
872 dmaflags = claim_dma_lock();
873 disable_dma(host->dma);
874 clear_dma_ff(host->dma);
875 count = get_dma_residue(host->dma);
876 release_dma_lock(dmaflags);
fecf92ba 877
1da177e4
LT
878 /*
879 * Any leftover data?
880 */
881 if (count)
882 {
d191634f
PO
883 printk(KERN_ERR "%s: Incomplete DMA transfer. "
884 "%d bytes left.\n",
885 mmc_hostname(host->mmc), count);
fecf92ba 886
1da177e4
LT
887 data->error = MMC_ERR_FAILED;
888 }
889 else
890 {
891 /*
892 * Transfer data from DMA buffer to
893 * SG list.
894 */
895 if (data->flags & MMC_DATA_READ)
896 wbsd_dma_to_sg(host, data);
fecf92ba 897
1da177e4
LT
898 data->bytes_xfered = host->size;
899 }
900 }
fecf92ba 901
1da177e4 902 DBGF("Ending data transfer (%d bytes)\n", data->bytes_xfered);
fecf92ba 903
1da177e4
LT
904 wbsd_request_end(host, host->mrq);
905}
906
85bcc130
PO
907/*****************************************************************************\
908 * *
909 * MMC layer callbacks *
910 * *
911\*****************************************************************************/
1da177e4
LT
912
913static void wbsd_request(struct mmc_host* mmc, struct mmc_request* mrq)
914{
915 struct wbsd_host* host = mmc_priv(mmc);
916 struct mmc_command* cmd;
917
918 /*
919 * Disable tasklets to avoid a deadlock.
920 */
921 spin_lock_bh(&host->lock);
922
923 BUG_ON(host->mrq != NULL);
924
925 cmd = mrq->cmd;
926
927 host->mrq = mrq;
fecf92ba 928
1da177e4
LT
929 /*
930 * If there is no card in the slot then
931 * timeout immediatly.
932 */
85bcc130 933 if (!(host->flags & WBSD_FCARD_PRESENT))
1da177e4
LT
934 {
935 cmd->error = MMC_ERR_TIMEOUT;
936 goto done;
937 }
938
939 /*
940 * Does the request include data?
941 */
942 if (cmd->data)
943 {
944 wbsd_prepare_data(host, cmd->data);
fecf92ba 945
1da177e4
LT
946 if (cmd->data->error != MMC_ERR_NONE)
947 goto done;
948 }
fecf92ba 949
1da177e4
LT
950 wbsd_send_command(host, cmd);
951
952 /*
953 * If this is a data transfer the request
954 * will be finished after the data has
955 * transfered.
fecf92ba 956 */
1da177e4
LT
957 if (cmd->data && (cmd->error == MMC_ERR_NONE))
958 {
959 /*
960 * Dirty fix for hardware bug.
961 */
962 if (host->dma == -1)
963 tasklet_schedule(&host->fifo_tasklet);
964
965 spin_unlock_bh(&host->lock);
966
967 return;
968 }
fecf92ba 969
1da177e4
LT
970done:
971 wbsd_request_end(host, mrq);
972
973 spin_unlock_bh(&host->lock);
974}
975
976static void wbsd_set_ios(struct mmc_host* mmc, struct mmc_ios* ios)
977{
978 struct wbsd_host* host = mmc_priv(mmc);
979 u8 clk, setup, pwr;
fecf92ba 980
65ae2118
PO
981 DBGF("clock %uHz busmode %u powermode %u cs %u Vdd %u width %u\n",
982 ios->clock, ios->bus_mode, ios->power_mode, ios->chip_select,
983 ios->vdd, ios->bus_width);
1da177e4
LT
984
985 spin_lock_bh(&host->lock);
986
987 /*
988 * Reset the chip on each power off.
989 * Should clear out any weird states.
990 */
991 if (ios->power_mode == MMC_POWER_OFF)
992 wbsd_init_device(host);
fecf92ba 993
1da177e4
LT
994 if (ios->clock >= 24000000)
995 clk = WBSD_CLK_24M;
996 else if (ios->clock >= 16000000)
997 clk = WBSD_CLK_16M;
998 else if (ios->clock >= 12000000)
999 clk = WBSD_CLK_12M;
1000 else
1001 clk = WBSD_CLK_375K;
1002
1003 /*
1004 * Only write to the clock register when
1005 * there is an actual change.
1006 */
1007 if (clk != host->clk)
1008 {
1009 wbsd_write_index(host, WBSD_IDX_CLK, clk);
1010 host->clk = clk;
1011 }
1012
85bcc130
PO
1013 /*
1014 * Power up card.
1015 */
1da177e4
LT
1016 if (ios->power_mode != MMC_POWER_OFF)
1017 {
1da177e4
LT
1018 pwr = inb(host->base + WBSD_CSR);
1019 pwr &= ~WBSD_POWER_N;
1020 outb(pwr, host->base + WBSD_CSR);
1da177e4
LT
1021 }
1022
85bcc130
PO
1023 /*
1024 * MMC cards need to have pin 1 high during init.
85bcc130 1025 * It wreaks havoc with the card detection though so
1656fa57 1026 * that needs to be disabled.
85bcc130
PO
1027 */
1028 setup = wbsd_read_index(host, WBSD_IDX_SETUP);
1656fa57 1029 if (ios->chip_select == MMC_CS_HIGH)
85bcc130 1030 {
65ae2118 1031 BUG_ON(ios->bus_width != MMC_BUS_WIDTH_1);
85bcc130
PO
1032 setup |= WBSD_DAT3_H;
1033 host->flags |= WBSD_FIGNORE_DETECT;
1034 }
1035 else
1036 {
19c1f3ca
PO
1037 if (setup & WBSD_DAT3_H)
1038 {
1039 setup &= ~WBSD_DAT3_H;
1656fa57 1040
19c1f3ca
PO
1041 /*
1042 * We cannot resume card detection immediatly
1043 * because of capacitance and delays in the chip.
1044 */
1045 mod_timer(&host->ignore_timer, jiffies + HZ/100);
1046 }
85bcc130
PO
1047 }
1048 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
fecf92ba 1049
65ae2118
PO
1050 /*
1051 * Store bus width for later. Will be used when
1052 * setting up the data transfer.
1053 */
1054 host->bus_width = ios->bus_width;
1055
1da177e4
LT
1056 spin_unlock_bh(&host->lock);
1057}
1058
65ae2118
PO
1059static int wbsd_get_ro(struct mmc_host* mmc)
1060{
1061 struct wbsd_host* host = mmc_priv(mmc);
1062 u8 csr;
1063
1064 spin_lock_bh(&host->lock);
1065
1066 csr = inb(host->base + WBSD_CSR);
1067 csr |= WBSD_MSLED;
1068 outb(csr, host->base + WBSD_CSR);
1069
1070 mdelay(1);
1071
1072 csr = inb(host->base + WBSD_CSR);
1073 csr &= ~WBSD_MSLED;
1074 outb(csr, host->base + WBSD_CSR);
1075
1076 spin_unlock_bh(&host->lock);
1077
1078 return csr & WBSD_WRPT;
1079}
1080
85bcc130
PO
1081static struct mmc_host_ops wbsd_ops = {
1082 .request = wbsd_request,
1083 .set_ios = wbsd_set_ios,
65ae2118 1084 .get_ro = wbsd_get_ro,
85bcc130
PO
1085};
1086
1087/*****************************************************************************\
1088 * *
1089 * Interrupt handling *
1090 * *
1091\*****************************************************************************/
1092
1656fa57
PO
1093/*
1094 * Helper function to reset detection ignore
1095 */
1096
1097static void wbsd_reset_ignore(unsigned long data)
1098{
1099 struct wbsd_host *host = (struct wbsd_host*)data;
1100
1101 BUG_ON(host == NULL);
1102
1103 DBG("Resetting card detection ignore\n");
1104
1105 spin_lock_bh(&host->lock);
1106
1107 host->flags &= ~WBSD_FIGNORE_DETECT;
1108
1109 /*
1110 * Card status might have changed during the
1111 * blackout.
1112 */
1113 tasklet_schedule(&host->card_tasklet);
1114
1115 spin_unlock_bh(&host->lock);
1116}
1117
1da177e4
LT
1118/*
1119 * Tasklets
1120 */
1121
77933d72 1122static inline struct mmc_data* wbsd_get_data(struct wbsd_host* host)
1da177e4
LT
1123{
1124 WARN_ON(!host->mrq);
1125 if (!host->mrq)
1126 return NULL;
1127
1128 WARN_ON(!host->mrq->cmd);
1129 if (!host->mrq->cmd)
1130 return NULL;
1131
1132 WARN_ON(!host->mrq->cmd->data);
1133 if (!host->mrq->cmd->data)
1134 return NULL;
fecf92ba 1135
1da177e4
LT
1136 return host->mrq->cmd->data;
1137}
1138
1139static void wbsd_tasklet_card(unsigned long param)
1140{
1141 struct wbsd_host* host = (struct wbsd_host*)param;
1142 u8 csr;
210ce2a7 1143 int delay = -1;
fecf92ba 1144
1da177e4 1145 spin_lock(&host->lock);
fecf92ba 1146
85bcc130
PO
1147 if (host->flags & WBSD_FIGNORE_DETECT)
1148 {
1149 spin_unlock(&host->lock);
1150 return;
1151 }
fecf92ba 1152
1da177e4
LT
1153 csr = inb(host->base + WBSD_CSR);
1154 WARN_ON(csr == 0xff);
fecf92ba 1155
1da177e4 1156 if (csr & WBSD_CARDPRESENT)
85bcc130
PO
1157 {
1158 if (!(host->flags & WBSD_FCARD_PRESENT))
1159 {
1160 DBG("Card inserted\n");
1161 host->flags |= WBSD_FCARD_PRESENT;
fecf92ba 1162
210ce2a7 1163 delay = 500;
85bcc130
PO
1164 }
1165 }
1166 else if (host->flags & WBSD_FCARD_PRESENT)
1da177e4
LT
1167 {
1168 DBG("Card removed\n");
85bcc130 1169 host->flags &= ~WBSD_FCARD_PRESENT;
fecf92ba 1170
1da177e4
LT
1171 if (host->mrq)
1172 {
d191634f
PO
1173 printk(KERN_ERR "%s: Card removed during transfer!\n",
1174 mmc_hostname(host->mmc));
1da177e4 1175 wbsd_reset(host);
fecf92ba 1176
1da177e4
LT
1177 host->mrq->cmd->error = MMC_ERR_FAILED;
1178 tasklet_schedule(&host->finish_tasklet);
1179 }
fecf92ba 1180
210ce2a7 1181 delay = 0;
6e6293dd 1182 }
210ce2a7
PO
1183
1184 /*
1185 * Unlock first since we might get a call back.
1186 */
1187
1188 spin_unlock(&host->lock);
1189
1190 if (delay != -1)
1191 mmc_detect_change(host->mmc, msecs_to_jiffies(delay));
1da177e4
LT
1192}
1193
1194static void wbsd_tasklet_fifo(unsigned long param)
1195{
1196 struct wbsd_host* host = (struct wbsd_host*)param;
1197 struct mmc_data* data;
fecf92ba 1198
1da177e4 1199 spin_lock(&host->lock);
fecf92ba 1200
1da177e4
LT
1201 if (!host->mrq)
1202 goto end;
fecf92ba 1203
1da177e4
LT
1204 data = wbsd_get_data(host);
1205 if (!data)
1206 goto end;
1207
1208 if (data->flags & MMC_DATA_WRITE)
1209 wbsd_fill_fifo(host);
1210 else
1211 wbsd_empty_fifo(host);
1212
1213 /*
1214 * Done?
1215 */
1216 if (host->size == data->bytes_xfered)
1217 {
1218 wbsd_write_index(host, WBSD_IDX_FIFOEN, 0);
1219 tasklet_schedule(&host->finish_tasklet);
1220 }
1221
fecf92ba 1222end:
1da177e4
LT
1223 spin_unlock(&host->lock);
1224}
1225
1226static void wbsd_tasklet_crc(unsigned long param)
1227{
1228 struct wbsd_host* host = (struct wbsd_host*)param;
1229 struct mmc_data* data;
fecf92ba 1230
1da177e4 1231 spin_lock(&host->lock);
fecf92ba 1232
1da177e4
LT
1233 if (!host->mrq)
1234 goto end;
fecf92ba 1235
1da177e4
LT
1236 data = wbsd_get_data(host);
1237 if (!data)
1238 goto end;
fecf92ba 1239
1da177e4
LT
1240 DBGF("CRC error\n");
1241
1242 data->error = MMC_ERR_BADCRC;
fecf92ba 1243
1da177e4
LT
1244 tasklet_schedule(&host->finish_tasklet);
1245
fecf92ba 1246end:
1da177e4
LT
1247 spin_unlock(&host->lock);
1248}
1249
1250static void wbsd_tasklet_timeout(unsigned long param)
1251{
1252 struct wbsd_host* host = (struct wbsd_host*)param;
1253 struct mmc_data* data;
fecf92ba 1254
1da177e4 1255 spin_lock(&host->lock);
fecf92ba 1256
1da177e4
LT
1257 if (!host->mrq)
1258 goto end;
fecf92ba 1259
1da177e4
LT
1260 data = wbsd_get_data(host);
1261 if (!data)
1262 goto end;
fecf92ba 1263
1da177e4
LT
1264 DBGF("Timeout\n");
1265
1266 data->error = MMC_ERR_TIMEOUT;
fecf92ba 1267
1da177e4
LT
1268 tasklet_schedule(&host->finish_tasklet);
1269
fecf92ba 1270end:
1da177e4
LT
1271 spin_unlock(&host->lock);
1272}
1273
1274static void wbsd_tasklet_finish(unsigned long param)
1275{
1276 struct wbsd_host* host = (struct wbsd_host*)param;
1277 struct mmc_data* data;
fecf92ba 1278
1da177e4 1279 spin_lock(&host->lock);
fecf92ba 1280
1da177e4
LT
1281 WARN_ON(!host->mrq);
1282 if (!host->mrq)
1283 goto end;
fecf92ba 1284
1da177e4
LT
1285 data = wbsd_get_data(host);
1286 if (!data)
1287 goto end;
1288
1289 wbsd_finish_data(host, data);
fecf92ba
PO
1290
1291end:
1da177e4
LT
1292 spin_unlock(&host->lock);
1293}
1294
1295static void wbsd_tasklet_block(unsigned long param)
1296{
1297 struct wbsd_host* host = (struct wbsd_host*)param;
1298 struct mmc_data* data;
fecf92ba 1299
1da177e4
LT
1300 spin_lock(&host->lock);
1301
1302 if ((wbsd_read_index(host, WBSD_IDX_CRCSTATUS) & WBSD_CRC_MASK) !=
1303 WBSD_CRC_OK)
1304 {
1305 data = wbsd_get_data(host);
1306 if (!data)
1307 goto end;
fecf92ba 1308
1da177e4
LT
1309 DBGF("CRC error\n");
1310
1311 data->error = MMC_ERR_BADCRC;
fecf92ba 1312
1da177e4
LT
1313 tasklet_schedule(&host->finish_tasklet);
1314 }
1315
fecf92ba 1316end:
1da177e4
LT
1317 spin_unlock(&host->lock);
1318}
1319
1320/*
1321 * Interrupt handling
1322 */
1323
1324static irqreturn_t wbsd_irq(int irq, void *dev_id, struct pt_regs *regs)
1325{
1326 struct wbsd_host* host = dev_id;
1327 int isr;
fecf92ba 1328
1da177e4
LT
1329 isr = inb(host->base + WBSD_ISR);
1330
1331 /*
1332 * Was it actually our hardware that caused the interrupt?
1333 */
1334 if (isr == 0xff || isr == 0x00)
1335 return IRQ_NONE;
fecf92ba 1336
1da177e4
LT
1337 host->isr |= isr;
1338
1339 /*
1340 * Schedule tasklets as needed.
1341 */
1342 if (isr & WBSD_INT_CARD)
1343 tasklet_schedule(&host->card_tasklet);
1344 if (isr & WBSD_INT_FIFO_THRE)
1345 tasklet_schedule(&host->fifo_tasklet);
1346 if (isr & WBSD_INT_CRC)
1347 tasklet_hi_schedule(&host->crc_tasklet);
1348 if (isr & WBSD_INT_TIMEOUT)
1349 tasklet_hi_schedule(&host->timeout_tasklet);
1350 if (isr & WBSD_INT_BUSYEND)
1351 tasklet_hi_schedule(&host->block_tasklet);
1352 if (isr & WBSD_INT_TC)
1353 tasklet_schedule(&host->finish_tasklet);
fecf92ba 1354
1da177e4
LT
1355 return IRQ_HANDLED;
1356}
1357
85bcc130
PO
1358/*****************************************************************************\
1359 * *
1360 * Device initialisation and shutdown *
1361 * *
1362\*****************************************************************************/
1363
1da177e4 1364/*
85bcc130 1365 * Allocate/free MMC structure.
1da177e4
LT
1366 */
1367
85bcc130
PO
1368static int __devinit wbsd_alloc_mmc(struct device* dev)
1369{
1370 struct mmc_host* mmc;
1371 struct wbsd_host* host;
fecf92ba 1372
85bcc130
PO
1373 /*
1374 * Allocate MMC structure.
1375 */
1376 mmc = mmc_alloc_host(sizeof(struct wbsd_host), dev);
1377 if (!mmc)
1378 return -ENOMEM;
fecf92ba 1379
85bcc130
PO
1380 host = mmc_priv(mmc);
1381 host->mmc = mmc;
1382
1383 host->dma = -1;
1384
1385 /*
1386 * Set host parameters.
1387 */
1388 mmc->ops = &wbsd_ops;
1389 mmc->f_min = 375000;
1390 mmc->f_max = 24000000;
1391 mmc->ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34;
65ae2118 1392 mmc->caps = MMC_CAP_4_BIT_DATA;
fecf92ba 1393
85bcc130 1394 spin_lock_init(&host->lock);
fecf92ba 1395
6e6293dd 1396 /*
1656fa57 1397 * Set up timers
6e6293dd 1398 */
1656fa57
PO
1399 init_timer(&host->ignore_timer);
1400 host->ignore_timer.data = (unsigned long)host;
1401 host->ignore_timer.function = wbsd_reset_ignore;
fecf92ba 1402
85bcc130
PO
1403 /*
1404 * Maximum number of segments. Worst case is one sector per segment
1405 * so this will be 64kB/512.
1406 */
1407 mmc->max_hw_segs = 128;
1408 mmc->max_phys_segs = 128;
fecf92ba 1409
85bcc130
PO
1410 /*
1411 * Maximum number of sectors in one transfer. Also limited by 64kB
1412 * buffer.
1413 */
1414 mmc->max_sectors = 128;
fecf92ba 1415
85bcc130
PO
1416 /*
1417 * Maximum segment size. Could be one segment with the maximum number
1418 * of segments.
1419 */
1420 mmc->max_seg_size = mmc->max_sectors * 512;
fecf92ba 1421
85bcc130 1422 dev_set_drvdata(dev, mmc);
fecf92ba 1423
85bcc130
PO
1424 return 0;
1425}
1426
1427static void __devexit wbsd_free_mmc(struct device* dev)
1428{
1429 struct mmc_host* mmc;
6e6293dd 1430 struct wbsd_host* host;
fecf92ba 1431
85bcc130
PO
1432 mmc = dev_get_drvdata(dev);
1433 if (!mmc)
1434 return;
fecf92ba 1435
6e6293dd
PO
1436 host = mmc_priv(mmc);
1437 BUG_ON(host == NULL);
fecf92ba 1438
1656fa57 1439 del_timer_sync(&host->ignore_timer);
fecf92ba 1440
85bcc130 1441 mmc_free_host(mmc);
fecf92ba 1442
85bcc130
PO
1443 dev_set_drvdata(dev, NULL);
1444}
1445
1446/*
1447 * Scan for known chip id:s
1448 */
1449
1450static int __devinit wbsd_scan(struct wbsd_host* host)
1da177e4
LT
1451{
1452 int i, j, k;
1453 int id;
fecf92ba 1454
1da177e4
LT
1455 /*
1456 * Iterate through all ports, all codes to
1457 * find hardware that is in our known list.
1458 */
63648fb5 1459 for (i = 0; i < ARRAY_SIZE(config_ports); i++) {
1da177e4
LT
1460 if (!request_region(config_ports[i], 2, DRIVER_NAME))
1461 continue;
fecf92ba 1462
63648fb5 1463 for (j = 0; j < ARRAY_SIZE(unlock_codes); j++) {
1da177e4 1464 id = 0xFFFF;
fecf92ba 1465
19c1f3ca
PO
1466 host->config = config_ports[i];
1467 host->unlock_code = unlock_codes[j];
1468
1469 wbsd_unlock_config(host);
fecf92ba 1470
1da177e4
LT
1471 outb(WBSD_CONF_ID_HI, config_ports[i]);
1472 id = inb(config_ports[i] + 1) << 8;
1473
1474 outb(WBSD_CONF_ID_LO, config_ports[i]);
1475 id |= inb(config_ports[i] + 1);
fecf92ba 1476
19c1f3ca
PO
1477 wbsd_lock_config(host);
1478
63648fb5 1479 for (k = 0; k < ARRAY_SIZE(valid_ids); k++) {
1da177e4 1480 if (id == valid_ids[k])
fecf92ba 1481 {
1da177e4 1482 host->chip_id = id;
fecf92ba 1483
1da177e4
LT
1484 return 0;
1485 }
1486 }
fecf92ba 1487
1da177e4
LT
1488 if (id != 0xFFFF)
1489 {
1490 DBG("Unknown hardware (id %x) found at %x\n",
1491 id, config_ports[i]);
1492 }
1da177e4 1493 }
fecf92ba 1494
1da177e4
LT
1495 release_region(config_ports[i], 2);
1496 }
fecf92ba 1497
19c1f3ca
PO
1498 host->config = 0;
1499 host->unlock_code = 0;
1500
1da177e4
LT
1501 return -ENODEV;
1502}
1503
85bcc130
PO
1504/*
1505 * Allocate/free io port ranges
1506 */
1507
1508static int __devinit wbsd_request_region(struct wbsd_host* host, int base)
1da177e4
LT
1509{
1510 if (io & 0x7)
1511 return -EINVAL;
fecf92ba 1512
85bcc130 1513 if (!request_region(base, 8, DRIVER_NAME))
1da177e4 1514 return -EIO;
fecf92ba 1515
1da177e4 1516 host->base = io;
fecf92ba 1517
1da177e4
LT
1518 return 0;
1519}
1520
85bcc130 1521static void __devexit wbsd_release_regions(struct wbsd_host* host)
1da177e4
LT
1522{
1523 if (host->base)
1524 release_region(host->base, 8);
fecf92ba 1525
85bcc130 1526 host->base = 0;
1da177e4
LT
1527
1528 if (host->config)
1529 release_region(host->config, 2);
fecf92ba 1530
85bcc130 1531 host->config = 0;
1da177e4
LT
1532}
1533
85bcc130
PO
1534/*
1535 * Allocate/free DMA port and buffer
1536 */
1537
1538static void __devinit wbsd_request_dma(struct wbsd_host* host, int dma)
1da177e4 1539{
1da177e4
LT
1540 if (dma < 0)
1541 return;
fecf92ba 1542
1da177e4
LT
1543 if (request_dma(dma, DRIVER_NAME))
1544 goto err;
fecf92ba 1545
1da177e4
LT
1546 /*
1547 * We need to allocate a special buffer in
1548 * order for ISA to be able to DMA to it.
1549 */
85bcc130 1550 host->dma_buffer = kmalloc(WBSD_DMA_SIZE,
1da177e4
LT
1551 GFP_NOIO | GFP_DMA | __GFP_REPEAT | __GFP_NOWARN);
1552 if (!host->dma_buffer)
1553 goto free;
1554
1555 /*
1556 * Translate the address to a physical address.
1557 */
85bcc130
PO
1558 host->dma_addr = dma_map_single(host->mmc->dev, host->dma_buffer,
1559 WBSD_DMA_SIZE, DMA_BIDIRECTIONAL);
fecf92ba 1560
1da177e4
LT
1561 /*
1562 * ISA DMA must be aligned on a 64k basis.
1563 */
1564 if ((host->dma_addr & 0xffff) != 0)
1565 goto kfree;
1566 /*
1567 * ISA cannot access memory above 16 MB.
1568 */
1569 else if (host->dma_addr >= 0x1000000)
1570 goto kfree;
1571
1572 host->dma = dma;
fecf92ba 1573
1da177e4 1574 return;
fecf92ba 1575
1da177e4
LT
1576kfree:
1577 /*
1578 * If we've gotten here then there is some kind of alignment bug
1579 */
1580 BUG_ON(1);
fecf92ba 1581
85bcc130
PO
1582 dma_unmap_single(host->mmc->dev, host->dma_addr, WBSD_DMA_SIZE,
1583 DMA_BIDIRECTIONAL);
1584 host->dma_addr = (dma_addr_t)NULL;
fecf92ba 1585
1da177e4
LT
1586 kfree(host->dma_buffer);
1587 host->dma_buffer = NULL;
1588
1589free:
1590 free_dma(dma);
1591
1592err:
1593 printk(KERN_WARNING DRIVER_NAME ": Unable to allocate DMA %d. "
1594 "Falling back on FIFO.\n", dma);
1595}
1596
85bcc130
PO
1597static void __devexit wbsd_release_dma(struct wbsd_host* host)
1598{
1599 if (host->dma_addr)
1600 dma_unmap_single(host->mmc->dev, host->dma_addr, WBSD_DMA_SIZE,
1601 DMA_BIDIRECTIONAL);
6044ec88 1602 kfree(host->dma_buffer);
85bcc130
PO
1603 if (host->dma >= 0)
1604 free_dma(host->dma);
fecf92ba 1605
85bcc130
PO
1606 host->dma = -1;
1607 host->dma_buffer = NULL;
1608 host->dma_addr = (dma_addr_t)NULL;
1609}
1da177e4
LT
1610
1611/*
85bcc130 1612 * Allocate/free IRQ.
1da177e4
LT
1613 */
1614
85bcc130 1615static int __devinit wbsd_request_irq(struct wbsd_host* host, int irq)
1da177e4 1616{
1da177e4 1617 int ret;
fecf92ba 1618
1da177e4 1619 /*
85bcc130 1620 * Allocate interrupt.
1da177e4 1621 */
85bcc130
PO
1622
1623 ret = request_irq(irq, wbsd_irq, SA_SHIRQ, DRIVER_NAME, host);
1624 if (ret)
1625 return ret;
fecf92ba 1626
85bcc130
PO
1627 host->irq = irq;
1628
1da177e4 1629 /*
85bcc130 1630 * Set up tasklets.
1da177e4 1631 */
85bcc130
PO
1632 tasklet_init(&host->card_tasklet, wbsd_tasklet_card, (unsigned long)host);
1633 tasklet_init(&host->fifo_tasklet, wbsd_tasklet_fifo, (unsigned long)host);
1634 tasklet_init(&host->crc_tasklet, wbsd_tasklet_crc, (unsigned long)host);
1635 tasklet_init(&host->timeout_tasklet, wbsd_tasklet_timeout, (unsigned long)host);
1636 tasklet_init(&host->finish_tasklet, wbsd_tasklet_finish, (unsigned long)host);
1637 tasklet_init(&host->block_tasklet, wbsd_tasklet_block, (unsigned long)host);
fecf92ba 1638
85bcc130
PO
1639 return 0;
1640}
1da177e4 1641
85bcc130
PO
1642static void __devexit wbsd_release_irq(struct wbsd_host* host)
1643{
1644 if (!host->irq)
1645 return;
1da177e4 1646
85bcc130 1647 free_irq(host->irq, host);
fecf92ba 1648
85bcc130 1649 host->irq = 0;
fecf92ba 1650
85bcc130
PO
1651 tasklet_kill(&host->card_tasklet);
1652 tasklet_kill(&host->fifo_tasklet);
1653 tasklet_kill(&host->crc_tasklet);
1654 tasklet_kill(&host->timeout_tasklet);
1655 tasklet_kill(&host->finish_tasklet);
1656 tasklet_kill(&host->block_tasklet);
1657}
1658
1659/*
1660 * Allocate all resources for the host.
1661 */
1662
1663static int __devinit wbsd_request_resources(struct wbsd_host* host,
1664 int base, int irq, int dma)
1665{
1666 int ret;
fecf92ba 1667
1da177e4
LT
1668 /*
1669 * Allocate I/O ports.
1670 */
85bcc130 1671 ret = wbsd_request_region(host, base);
1da177e4 1672 if (ret)
85bcc130 1673 return ret;
1da177e4
LT
1674
1675 /*
85bcc130 1676 * Allocate interrupt.
1da177e4 1677 */
85bcc130
PO
1678 ret = wbsd_request_irq(host, irq);
1679 if (ret)
1680 return ret;
1681
1682 /*
1683 * Allocate DMA.
1684 */
1685 wbsd_request_dma(host, dma);
fecf92ba 1686
85bcc130
PO
1687 return 0;
1688}
1689
1690/*
1691 * Release all resources for the host.
1692 */
1693
1694static void __devexit wbsd_release_resources(struct wbsd_host* host)
1695{
1696 wbsd_release_dma(host);
1697 wbsd_release_irq(host);
1698 wbsd_release_regions(host);
1699}
1700
1701/*
1702 * Configure the resources the chip should use.
1703 */
1704
19c1f3ca 1705static void wbsd_chip_config(struct wbsd_host* host)
85bcc130 1706{
19c1f3ca
PO
1707 wbsd_unlock_config(host);
1708
85bcc130
PO
1709 /*
1710 * Reset the chip.
fecf92ba 1711 */
85bcc130
PO
1712 wbsd_write_config(host, WBSD_CONF_SWRST, 1);
1713 wbsd_write_config(host, WBSD_CONF_SWRST, 0);
1da177e4
LT
1714
1715 /*
1716 * Select SD/MMC function.
1717 */
1718 wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD);
fecf92ba 1719
1da177e4
LT
1720 /*
1721 * Set up card detection.
1722 */
85bcc130 1723 wbsd_write_config(host, WBSD_CONF_PINS, WBSD_PINS_DETECT_GP11);
fecf92ba 1724
1da177e4 1725 /*
85bcc130 1726 * Configure chip
1da177e4
LT
1727 */
1728 wbsd_write_config(host, WBSD_CONF_PORT_HI, host->base >> 8);
1729 wbsd_write_config(host, WBSD_CONF_PORT_LO, host->base & 0xff);
fecf92ba 1730
85bcc130 1731 wbsd_write_config(host, WBSD_CONF_IRQ, host->irq);
fecf92ba 1732
85bcc130
PO
1733 if (host->dma >= 0)
1734 wbsd_write_config(host, WBSD_CONF_DRQ, host->dma);
fecf92ba 1735
1da177e4 1736 /*
85bcc130 1737 * Enable and power up chip.
1da177e4 1738 */
85bcc130
PO
1739 wbsd_write_config(host, WBSD_CONF_ENABLE, 1);
1740 wbsd_write_config(host, WBSD_CONF_POWER, 0x20);
19c1f3ca
PO
1741
1742 wbsd_lock_config(host);
85bcc130
PO
1743}
1744
1745/*
1746 * Check that configured resources are correct.
1747 */
fecf92ba 1748
19c1f3ca 1749static int wbsd_chip_validate(struct wbsd_host* host)
85bcc130
PO
1750{
1751 int base, irq, dma;
fecf92ba 1752
19c1f3ca
PO
1753 wbsd_unlock_config(host);
1754
1da177e4 1755 /*
85bcc130 1756 * Select SD/MMC function.
1da177e4 1757 */
85bcc130 1758 wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD);
fecf92ba 1759
1da177e4 1760 /*
85bcc130 1761 * Read configuration.
1da177e4 1762 */
85bcc130
PO
1763 base = wbsd_read_config(host, WBSD_CONF_PORT_HI) << 8;
1764 base |= wbsd_read_config(host, WBSD_CONF_PORT_LO);
fecf92ba 1765
85bcc130 1766 irq = wbsd_read_config(host, WBSD_CONF_IRQ);
fecf92ba 1767
85bcc130 1768 dma = wbsd_read_config(host, WBSD_CONF_DRQ);
fecf92ba 1769
19c1f3ca
PO
1770 wbsd_lock_config(host);
1771
1da177e4 1772 /*
85bcc130 1773 * Validate against given configuration.
1da177e4 1774 */
85bcc130
PO
1775 if (base != host->base)
1776 return 0;
1777 if (irq != host->irq)
1778 return 0;
1779 if ((dma != host->dma) && (host->dma != -1))
1780 return 0;
fecf92ba 1781
85bcc130
PO
1782 return 1;
1783}
1784
19c1f3ca
PO
1785/*
1786 * Powers down the SD function
1787 */
1788
1789static void wbsd_chip_poweroff(struct wbsd_host* host)
1790{
1791 wbsd_unlock_config(host);
1792
1793 wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD);
1794 wbsd_write_config(host, WBSD_CONF_ENABLE, 0);
1795
1796 wbsd_lock_config(host);
1797}
1798
85bcc130
PO
1799/*****************************************************************************\
1800 * *
1801 * Devices setup and shutdown *
1802 * *
1803\*****************************************************************************/
1804
1805static int __devinit wbsd_init(struct device* dev, int base, int irq, int dma,
1806 int pnp)
1807{
1808 struct wbsd_host* host = NULL;
1809 struct mmc_host* mmc = NULL;
1810 int ret;
fecf92ba 1811
85bcc130
PO
1812 ret = wbsd_alloc_mmc(dev);
1813 if (ret)
1814 return ret;
fecf92ba 1815
85bcc130
PO
1816 mmc = dev_get_drvdata(dev);
1817 host = mmc_priv(mmc);
fecf92ba 1818
1da177e4 1819 /*
85bcc130 1820 * Scan for hardware.
1da177e4 1821 */
85bcc130
PO
1822 ret = wbsd_scan(host);
1823 if (ret)
1824 {
1825 if (pnp && (ret == -ENODEV))
1826 {
1827 printk(KERN_WARNING DRIVER_NAME
1828 ": Unable to confirm device presence. You may "
1829 "experience lock-ups.\n");
1830 }
1831 else
1832 {
1833 wbsd_free_mmc(dev);
1834 return ret;
1835 }
1836 }
fecf92ba 1837
1da177e4 1838 /*
85bcc130 1839 * Request resources.
1da177e4 1840 */
85bcc130
PO
1841 ret = wbsd_request_resources(host, io, irq, dma);
1842 if (ret)
1843 {
1844 wbsd_release_resources(host);
1845 wbsd_free_mmc(dev);
1846 return ret;
1847 }
fecf92ba 1848
1da177e4 1849 /*
85bcc130 1850 * See if chip needs to be configured.
1da177e4 1851 */
25cc5e5b 1852 if (pnp)
85bcc130 1853 {
25cc5e5b 1854 if ((host->config != 0) && !wbsd_chip_validate(host))
85bcc130
PO
1855 {
1856 printk(KERN_WARNING DRIVER_NAME
1857 ": PnP active but chip not configured! "
1858 "You probably have a buggy BIOS. "
1859 "Configuring chip manually.\n");
1860 wbsd_chip_config(host);
1861 }
1862 }
1863 else
1864 wbsd_chip_config(host);
fecf92ba 1865
1da177e4
LT
1866 /*
1867 * Power Management stuff. No idea how this works.
1868 * Not tested.
1869 */
1870#ifdef CONFIG_PM
85bcc130 1871 if (host->config)
19c1f3ca
PO
1872 {
1873 wbsd_unlock_config(host);
85bcc130 1874 wbsd_write_config(host, WBSD_CONF_PME, 0xA0);
19c1f3ca
PO
1875 wbsd_lock_config(host);
1876 }
1da177e4 1877#endif
85bcc130
PO
1878 /*
1879 * Allow device to initialise itself properly.
1880 */
1881 mdelay(5);
1da177e4
LT
1882
1883 /*
1884 * Reset the chip into a known state.
1885 */
1886 wbsd_init_device(host);
fecf92ba 1887
1da177e4
LT
1888 mmc_add_host(mmc);
1889
d366b643 1890 printk(KERN_INFO "%s: W83L51xD", mmc_hostname(mmc));
85bcc130
PO
1891 if (host->chip_id != 0)
1892 printk(" id %x", (int)host->chip_id);
1893 printk(" at 0x%x irq %d", (int)host->base, (int)host->irq);
1894 if (host->dma >= 0)
1895 printk(" dma %d", (int)host->dma);
1896 else
1897 printk(" FIFO");
1898 if (pnp)
1899 printk(" PnP");
1900 printk("\n");
1da177e4
LT
1901
1902 return 0;
1da177e4
LT
1903}
1904
85bcc130 1905static void __devexit wbsd_shutdown(struct device* dev, int pnp)
1da177e4
LT
1906{
1907 struct mmc_host* mmc = dev_get_drvdata(dev);
1908 struct wbsd_host* host;
fecf92ba 1909
1da177e4 1910 if (!mmc)
85bcc130 1911 return;
1da177e4
LT
1912
1913 host = mmc_priv(mmc);
fecf92ba 1914
1da177e4
LT
1915 mmc_remove_host(mmc);
1916
19c1f3ca
PO
1917 /*
1918 * Power down the SD/MMC function.
1919 */
85bcc130 1920 if (!pnp)
19c1f3ca 1921 wbsd_chip_poweroff(host);
fecf92ba 1922
85bcc130 1923 wbsd_release_resources(host);
fecf92ba 1924
85bcc130
PO
1925 wbsd_free_mmc(dev);
1926}
1da177e4 1927
85bcc130
PO
1928/*
1929 * Non-PnP
1930 */
1931
3ae5eaec 1932static int __devinit wbsd_probe(struct platform_device* dev)
85bcc130 1933{
3ae5eaec 1934 return wbsd_init(&dev->dev, io, irq, dma, 0);
85bcc130
PO
1935}
1936
3ae5eaec 1937static int __devexit wbsd_remove(struct platform_device* dev)
85bcc130 1938{
3ae5eaec 1939 wbsd_shutdown(&dev->dev, 0);
85bcc130
PO
1940
1941 return 0;
1942}
1943
1944/*
1945 * PnP
1946 */
1947
1948#ifdef CONFIG_PNP
1949
1950static int __devinit
1951wbsd_pnp_probe(struct pnp_dev * pnpdev, const struct pnp_device_id *dev_id)
1952{
1953 int io, irq, dma;
fecf92ba 1954
85bcc130
PO
1955 /*
1956 * Get resources from PnP layer.
1957 */
1958 io = pnp_port_start(pnpdev, 0);
1959 irq = pnp_irq(pnpdev, 0);
1960 if (pnp_dma_valid(pnpdev, 0))
1961 dma = pnp_dma(pnpdev, 0);
1962 else
1963 dma = -1;
fecf92ba 1964
85bcc130 1965 DBGF("PnP resources: port %3x irq %d dma %d\n", io, irq, dma);
fecf92ba 1966
85bcc130
PO
1967 return wbsd_init(&pnpdev->dev, io, irq, dma, 1);
1968}
1da177e4 1969
85bcc130
PO
1970static void __devexit wbsd_pnp_remove(struct pnp_dev * dev)
1971{
1972 wbsd_shutdown(&dev->dev, 1);
1da177e4
LT
1973}
1974
85bcc130
PO
1975#endif /* CONFIG_PNP */
1976
1da177e4
LT
1977/*
1978 * Power management
1979 */
1980
1981#ifdef CONFIG_PM
19c1f3ca 1982
5e68d95d
PO
1983static int wbsd_suspend(struct wbsd_host *host, pm_message_t state)
1984{
1985 BUG_ON(host == NULL);
1986
1987 return mmc_suspend_host(host->mmc, state);
1988}
1989
1990static int wbsd_resume(struct wbsd_host *host)
1991{
1992 BUG_ON(host == NULL);
1993
1994 wbsd_init_device(host);
1995
1996 return mmc_resume_host(host->mmc);
1997}
1998
1999static int wbsd_platform_suspend(struct platform_device *dev, pm_message_t state)
1da177e4 2000{
3ae5eaec 2001 struct mmc_host *mmc = platform_get_drvdata(dev);
19c1f3ca
PO
2002 struct wbsd_host *host;
2003 int ret;
2004
5e68d95d 2005 if (mmc == NULL)
19c1f3ca
PO
2006 return 0;
2007
5e68d95d 2008 DBGF("Suspending...\n");
19c1f3ca
PO
2009
2010 host = mmc_priv(mmc);
2011
5e68d95d
PO
2012 ret = wbsd_suspend(host, state);
2013 if (ret)
2014 return ret;
2015
19c1f3ca 2016 wbsd_chip_poweroff(host);
1da177e4
LT
2017
2018 return 0;
2019}
2020
5e68d95d 2021static int wbsd_platform_resume(struct platform_device *dev)
1da177e4 2022{
3ae5eaec 2023 struct mmc_host *mmc = platform_get_drvdata(dev);
19c1f3ca 2024 struct wbsd_host *host;
1da177e4 2025
5e68d95d 2026 if (mmc == NULL)
19c1f3ca
PO
2027 return 0;
2028
5e68d95d 2029 DBGF("Resuming...\n");
19c1f3ca
PO
2030
2031 host = mmc_priv(mmc);
2032
2033 wbsd_chip_config(host);
2034
2035 /*
2036 * Allow device to initialise itself properly.
2037 */
2038 mdelay(5);
2039
5e68d95d
PO
2040 return wbsd_resume(host);
2041}
2042
2043#ifdef CONFIG_PNP
2044
2045static int wbsd_pnp_suspend(struct pnp_dev *pnp_dev, pm_message_t state)
2046{
2047 struct mmc_host *mmc = dev_get_drvdata(&pnp_dev->dev);
2048 struct wbsd_host *host;
2049
2050 if (mmc == NULL)
2051 return 0;
19c1f3ca 2052
5e68d95d
PO
2053 DBGF("Suspending...\n");
2054
2055 host = mmc_priv(mmc);
2056
2057 return wbsd_suspend(host, state);
1da177e4 2058}
19c1f3ca 2059
5e68d95d
PO
2060static int wbsd_pnp_resume(struct pnp_dev *pnp_dev)
2061{
2062 struct mmc_host *mmc = dev_get_drvdata(&pnp_dev->dev);
2063 struct wbsd_host *host;
2064
2065 if (mmc == NULL)
2066 return 0;
2067
2068 DBGF("Resuming...\n");
2069
2070 host = mmc_priv(mmc);
2071
2072 /*
2073 * See if chip needs to be configured.
2074 */
2075 if (host->config != 0)
2076 {
2077 if (!wbsd_chip_validate(host))
2078 {
2079 printk(KERN_WARNING DRIVER_NAME
2080 ": PnP active but chip not configured! "
2081 "You probably have a buggy BIOS. "
2082 "Configuring chip manually.\n");
2083 wbsd_chip_config(host);
2084 }
2085 }
2086
2087 /*
2088 * Allow device to initialise itself properly.
2089 */
2090 mdelay(5);
2091
2092 return wbsd_resume(host);
2093}
2094
2095#endif /* CONFIG_PNP */
2096
19c1f3ca
PO
2097#else /* CONFIG_PM */
2098
5e68d95d
PO
2099#define wbsd_platform_suspend NULL
2100#define wbsd_platform_resume NULL
2101
2102#define wbsd_pnp_suspend NULL
2103#define wbsd_pnp_resume NULL
19c1f3ca
PO
2104
2105#endif /* CONFIG_PM */
1da177e4 2106
85bcc130 2107static struct platform_device *wbsd_device;
1da177e4 2108
3ae5eaec 2109static struct platform_driver wbsd_driver = {
1da177e4 2110 .probe = wbsd_probe,
93968d75 2111 .remove = __devexit_p(wbsd_remove),
fecf92ba 2112
5e68d95d
PO
2113 .suspend = wbsd_platform_suspend,
2114 .resume = wbsd_platform_resume,
3ae5eaec
RK
2115 .driver = {
2116 .name = DRIVER_NAME,
2117 },
1da177e4
LT
2118};
2119
85bcc130
PO
2120#ifdef CONFIG_PNP
2121
2122static struct pnp_driver wbsd_pnp_driver = {
2123 .name = DRIVER_NAME,
2124 .id_table = pnp_dev_table,
2125 .probe = wbsd_pnp_probe,
93968d75 2126 .remove = __devexit_p(wbsd_pnp_remove),
5e68d95d
PO
2127
2128 .suspend = wbsd_pnp_suspend,
2129 .resume = wbsd_pnp_resume,
85bcc130
PO
2130};
2131
2132#endif /* CONFIG_PNP */
2133
1da177e4
LT
2134/*
2135 * Module loading/unloading
2136 */
2137
2138static int __init wbsd_drv_init(void)
2139{
2140 int result;
fecf92ba 2141
1da177e4
LT
2142 printk(KERN_INFO DRIVER_NAME
2143 ": Winbond W83L51xD SD/MMC card interface driver, "
2144 DRIVER_VERSION "\n");
2145 printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
1da177e4 2146
85bcc130
PO
2147#ifdef CONFIG_PNP
2148
2149 if (!nopnp)
2150 {
2151 result = pnp_register_driver(&wbsd_pnp_driver);
2152 if (result < 0)
2153 return result;
2154 }
2155
fecf92ba
PO
2156#endif /* CONFIG_PNP */
2157
85bcc130
PO
2158 if (nopnp)
2159 {
3ae5eaec 2160 result = platform_driver_register(&wbsd_driver);
85bcc130
PO
2161 if (result < 0)
2162 return result;
2163
21500bb3
DT
2164 wbsd_device = platform_device_alloc(DRIVER_NAME, -1);
2165 if (!wbsd_device)
2166 {
2167 platform_driver_unregister(&wbsd_driver);
2168 return -ENOMEM;
2169 }
2170
2171 result = platform_device_add(wbsd_device);
2172 if (result)
2173 {
2174 platform_device_put(wbsd_device);
2175 platform_driver_unregister(&wbsd_driver);
2176 return result;
2177 }
85bcc130 2178 }
1da177e4
LT
2179
2180 return 0;
2181}
2182
2183static void __exit wbsd_drv_exit(void)
2184{
85bcc130
PO
2185#ifdef CONFIG_PNP
2186
2187 if (!nopnp)
2188 pnp_unregister_driver(&wbsd_pnp_driver);
fecf92ba
PO
2189
2190#endif /* CONFIG_PNP */
85bcc130
PO
2191
2192 if (nopnp)
2193 {
2194 platform_device_unregister(wbsd_device);
fecf92ba 2195
3ae5eaec 2196 platform_driver_unregister(&wbsd_driver);
85bcc130 2197 }
1da177e4
LT
2198
2199 DBG("unloaded\n");
2200}
2201
2202module_init(wbsd_drv_init);
2203module_exit(wbsd_drv_exit);
85bcc130
PO
2204#ifdef CONFIG_PNP
2205module_param(nopnp, uint, 0444);
2206#endif
1da177e4
LT
2207module_param(io, uint, 0444);
2208module_param(irq, uint, 0444);
2209module_param(dma, int, 0444);
2210
2211MODULE_LICENSE("GPL");
de1d09e3 2212MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
1da177e4
LT
2213MODULE_DESCRIPTION("Winbond W83L51xD SD/MMC card interface driver");
2214MODULE_VERSION(DRIVER_VERSION);
2215
85bcc130
PO
2216#ifdef CONFIG_PNP
2217MODULE_PARM_DESC(nopnp, "Scan for device instead of relying on PNP. (default 0)");
2218#endif
1da177e4
LT
2219MODULE_PARM_DESC(io, "I/O base to allocate. Must be 8 byte aligned. (default 0x248)");
2220MODULE_PARM_DESC(irq, "IRQ to allocate. (default 6)");
2221MODULE_PARM_DESC(dma, "DMA channel to allocate. -1 for no DMA. (default 2)");