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mmc: handle pci_enable_device() return value in sdhci
[mirror_ubuntu-hirsute-kernel.git] / drivers / mmc / wbsd.c
CommitLineData
1da177e4
LT
1/*
2 * linux/drivers/mmc/wbsd.c - Winbond W83L51xD SD/MMC driver
3 *
5ba593a9 4 * Copyright (C) 2004-2006 Pierre Ossman, All Rights Reserved.
1da177e4
LT
5 *
6 * This program is free software; you can redistribute it and/or modify
643f720c
PO
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or (at
9 * your option) any later version.
1da177e4
LT
10 *
11 *
12 * Warning!
13 *
14 * Changes to the FIFO system should be done with extreme care since
15 * the hardware is full of bugs related to the FIFO. Known issues are:
16 *
17 * - FIFO size field in FSR is always zero.
18 *
19 * - FIFO interrupts tend not to work as they should. Interrupts are
20 * triggered only for full/empty events, not for threshold values.
21 *
22 * - On APIC systems the FIFO empty interrupt is sometimes lost.
23 */
24
1da177e4
LT
25#include <linux/module.h>
26#include <linux/moduleparam.h>
27#include <linux/init.h>
28#include <linux/ioport.h>
d052d1be 29#include <linux/platform_device.h>
1da177e4 30#include <linux/interrupt.h>
85bcc130 31#include <linux/dma-mapping.h>
1da177e4 32#include <linux/delay.h>
85bcc130 33#include <linux/pnp.h>
1da177e4
LT
34#include <linux/highmem.h>
35#include <linux/mmc/host.h>
36#include <linux/mmc/protocol.h>
37
38#include <asm/io.h>
39#include <asm/dma.h>
40#include <asm/scatterlist.h>
41
42#include "wbsd.h"
43
44#define DRIVER_NAME "wbsd"
916f3ac6 45#define DRIVER_VERSION "1.6"
1da177e4 46
1da177e4 47#define DBG(x...) \
c6563178 48 pr_debug(DRIVER_NAME ": " x)
1da177e4 49#define DBGF(f, x...) \
c6563178 50 pr_debug(DRIVER_NAME " [%s()]: " f, __func__ , ##x)
1da177e4 51
85bcc130
PO
52/*
53 * Device resources
54 */
55
56#ifdef CONFIG_PNP
57
58static const struct pnp_device_id pnp_dev_table[] = {
59 { "WEC0517", 0 },
60 { "WEC0518", 0 },
61 { "", 0 },
62};
63
64MODULE_DEVICE_TABLE(pnp, pnp_dev_table);
65
66#endif /* CONFIG_PNP */
67
3eee0d03
AB
68static const int config_ports[] = { 0x2E, 0x4E };
69static const int unlock_codes[] = { 0x83, 0x87 };
70
71static const int valid_ids[] = {
72 0x7112,
73 };
74
85bcc130
PO
75#ifdef CONFIG_PNP
76static unsigned int nopnp = 0;
77#else
78static const unsigned int nopnp = 1;
79#endif
80static unsigned int io = 0x248;
81static unsigned int irq = 6;
82static int dma = 2;
83
1da177e4
LT
84/*
85 * Basic functions
86 */
87
cfa7f521 88static inline void wbsd_unlock_config(struct wbsd_host *host)
1da177e4 89{
85bcc130 90 BUG_ON(host->config == 0);
fecf92ba 91
1da177e4
LT
92 outb(host->unlock_code, host->config);
93 outb(host->unlock_code, host->config);
94}
95
cfa7f521 96static inline void wbsd_lock_config(struct wbsd_host *host)
1da177e4 97{
85bcc130 98 BUG_ON(host->config == 0);
fecf92ba 99
1da177e4
LT
100 outb(LOCK_CODE, host->config);
101}
102
cfa7f521 103static inline void wbsd_write_config(struct wbsd_host *host, u8 reg, u8 value)
1da177e4 104{
85bcc130 105 BUG_ON(host->config == 0);
fecf92ba 106
1da177e4
LT
107 outb(reg, host->config);
108 outb(value, host->config + 1);
109}
110
cfa7f521 111static inline u8 wbsd_read_config(struct wbsd_host *host, u8 reg)
1da177e4 112{
85bcc130 113 BUG_ON(host->config == 0);
fecf92ba 114
1da177e4
LT
115 outb(reg, host->config);
116 return inb(host->config + 1);
117}
118
cfa7f521 119static inline void wbsd_write_index(struct wbsd_host *host, u8 index, u8 value)
1da177e4
LT
120{
121 outb(index, host->base + WBSD_IDXR);
122 outb(value, host->base + WBSD_DATAR);
123}
124
cfa7f521 125static inline u8 wbsd_read_index(struct wbsd_host *host, u8 index)
1da177e4
LT
126{
127 outb(index, host->base + WBSD_IDXR);
128 return inb(host->base + WBSD_DATAR);
129}
130
131/*
132 * Common routines
133 */
134
cfa7f521 135static void wbsd_init_device(struct wbsd_host *host)
1da177e4
LT
136{
137 u8 setup, ier;
fecf92ba 138
1da177e4
LT
139 /*
140 * Reset chip (SD/MMC part) and fifo.
141 */
142 setup = wbsd_read_index(host, WBSD_IDX_SETUP);
143 setup |= WBSD_FIFO_RESET | WBSD_SOFT_RESET;
144 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
fecf92ba 145
85bcc130
PO
146 /*
147 * Set DAT3 to input
148 */
149 setup &= ~WBSD_DAT3_H;
150 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
151 host->flags &= ~WBSD_FIGNORE_DETECT;
fecf92ba 152
1da177e4
LT
153 /*
154 * Read back default clock.
155 */
156 host->clk = wbsd_read_index(host, WBSD_IDX_CLK);
157
158 /*
159 * Power down port.
160 */
161 outb(WBSD_POWER_N, host->base + WBSD_CSR);
fecf92ba 162
1da177e4
LT
163 /*
164 * Set maximum timeout.
165 */
166 wbsd_write_index(host, WBSD_IDX_TAAC, 0x7F);
fecf92ba 167
85bcc130
PO
168 /*
169 * Test for card presence
170 */
171 if (inb(host->base + WBSD_CSR) & WBSD_CARDPRESENT)
172 host->flags |= WBSD_FCARD_PRESENT;
173 else
174 host->flags &= ~WBSD_FCARD_PRESENT;
fecf92ba 175
1da177e4
LT
176 /*
177 * Enable interesting interrupts.
178 */
179 ier = 0;
180 ier |= WBSD_EINT_CARD;
181 ier |= WBSD_EINT_FIFO_THRE;
182 ier |= WBSD_EINT_CCRC;
183 ier |= WBSD_EINT_TIMEOUT;
184 ier |= WBSD_EINT_CRC;
185 ier |= WBSD_EINT_TC;
186
187 outb(ier, host->base + WBSD_EIR);
188
189 /*
190 * Clear interrupts.
191 */
192 inb(host->base + WBSD_ISR);
193}
194
cfa7f521 195static void wbsd_reset(struct wbsd_host *host)
1da177e4
LT
196{
197 u8 setup;
fecf92ba 198
d191634f 199 printk(KERN_ERR "%s: Resetting chip\n", mmc_hostname(host->mmc));
fecf92ba 200
1da177e4
LT
201 /*
202 * Soft reset of chip (SD/MMC part).
203 */
204 setup = wbsd_read_index(host, WBSD_IDX_SETUP);
205 setup |= WBSD_SOFT_RESET;
206 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
207}
208
cfa7f521 209static void wbsd_request_end(struct wbsd_host *host, struct mmc_request *mrq)
1da177e4
LT
210{
211 unsigned long dmaflags;
fecf92ba 212
1da177e4 213 DBGF("Ending request, cmd (%x)\n", mrq->cmd->opcode);
fecf92ba 214
cfa7f521 215 if (host->dma >= 0) {
1da177e4
LT
216 /*
217 * Release ISA DMA controller.
218 */
219 dmaflags = claim_dma_lock();
220 disable_dma(host->dma);
221 clear_dma_ff(host->dma);
222 release_dma_lock(dmaflags);
223
224 /*
225 * Disable DMA on host.
226 */
227 wbsd_write_index(host, WBSD_IDX_DMA, 0);
228 }
fecf92ba 229
1da177e4
LT
230 host->mrq = NULL;
231
232 /*
233 * MMC layer might call back into the driver so first unlock.
234 */
235 spin_unlock(&host->lock);
236 mmc_request_done(host->mmc, mrq);
237 spin_lock(&host->lock);
238}
239
240/*
241 * Scatter/gather functions
242 */
243
cfa7f521 244static inline void wbsd_init_sg(struct wbsd_host *host, struct mmc_data *data)
1da177e4
LT
245{
246 /*
247 * Get info. about SG list from data structure.
248 */
249 host->cur_sg = data->sg;
250 host->num_sg = data->sg_len;
251
252 host->offset = 0;
253 host->remain = host->cur_sg->length;
254}
255
cfa7f521 256static inline int wbsd_next_sg(struct wbsd_host *host)
1da177e4
LT
257{
258 /*
259 * Skip to next SG entry.
260 */
261 host->cur_sg++;
262 host->num_sg--;
263
264 /*
265 * Any entries left?
266 */
cfa7f521
PO
267 if (host->num_sg > 0) {
268 host->offset = 0;
269 host->remain = host->cur_sg->length;
270 }
fecf92ba 271
1da177e4
LT
272 return host->num_sg;
273}
274
cfa7f521 275static inline char *wbsd_kmap_sg(struct wbsd_host *host)
1da177e4
LT
276{
277 host->mapped_sg = kmap_atomic(host->cur_sg->page, KM_BIO_SRC_IRQ) +
278 host->cur_sg->offset;
279 return host->mapped_sg;
280}
281
cfa7f521 282static inline void wbsd_kunmap_sg(struct wbsd_host *host)
1da177e4
LT
283{
284 kunmap_atomic(host->mapped_sg, KM_BIO_SRC_IRQ);
285}
286
cfa7f521 287static inline void wbsd_sg_to_dma(struct wbsd_host *host, struct mmc_data *data)
1da177e4
LT
288{
289 unsigned int len, i, size;
cfa7f521
PO
290 struct scatterlist *sg;
291 char *dmabuf = host->dma_buffer;
292 char *sgbuf;
fecf92ba 293
1da177e4 294 size = host->size;
fecf92ba 295
1da177e4
LT
296 sg = data->sg;
297 len = data->sg_len;
fecf92ba 298
1da177e4
LT
299 /*
300 * Just loop through all entries. Size might not
301 * be the entire list though so make sure that
302 * we do not transfer too much.
303 */
cfa7f521 304 for (i = 0; i < len; i++) {
1da177e4
LT
305 sgbuf = kmap_atomic(sg[i].page, KM_BIO_SRC_IRQ) + sg[i].offset;
306 if (size < sg[i].length)
307 memcpy(dmabuf, sgbuf, size);
308 else
309 memcpy(dmabuf, sgbuf, sg[i].length);
310 kunmap_atomic(sgbuf, KM_BIO_SRC_IRQ);
311 dmabuf += sg[i].length;
fecf92ba 312
1da177e4
LT
313 if (size < sg[i].length)
314 size = 0;
315 else
316 size -= sg[i].length;
fecf92ba 317
1da177e4
LT
318 if (size == 0)
319 break;
320 }
fecf92ba 321
1da177e4
LT
322 /*
323 * Check that we didn't get a request to transfer
324 * more data than can fit into the SG list.
325 */
fecf92ba 326
1da177e4 327 BUG_ON(size != 0);
fecf92ba 328
1da177e4
LT
329 host->size -= size;
330}
331
cfa7f521 332static inline void wbsd_dma_to_sg(struct wbsd_host *host, struct mmc_data *data)
1da177e4
LT
333{
334 unsigned int len, i, size;
cfa7f521
PO
335 struct scatterlist *sg;
336 char *dmabuf = host->dma_buffer;
337 char *sgbuf;
fecf92ba 338
1da177e4 339 size = host->size;
fecf92ba 340
1da177e4
LT
341 sg = data->sg;
342 len = data->sg_len;
fecf92ba 343
1da177e4
LT
344 /*
345 * Just loop through all entries. Size might not
346 * be the entire list though so make sure that
347 * we do not transfer too much.
348 */
cfa7f521 349 for (i = 0; i < len; i++) {
1da177e4
LT
350 sgbuf = kmap_atomic(sg[i].page, KM_BIO_SRC_IRQ) + sg[i].offset;
351 if (size < sg[i].length)
352 memcpy(sgbuf, dmabuf, size);
353 else
354 memcpy(sgbuf, dmabuf, sg[i].length);
355 kunmap_atomic(sgbuf, KM_BIO_SRC_IRQ);
356 dmabuf += sg[i].length;
fecf92ba 357
1da177e4
LT
358 if (size < sg[i].length)
359 size = 0;
360 else
361 size -= sg[i].length;
fecf92ba 362
1da177e4
LT
363 if (size == 0)
364 break;
365 }
fecf92ba 366
1da177e4
LT
367 /*
368 * Check that we didn't get a request to transfer
369 * more data than can fit into the SG list.
370 */
fecf92ba 371
1da177e4 372 BUG_ON(size != 0);
fecf92ba 373
1da177e4
LT
374 host->size -= size;
375}
376
377/*
378 * Command handling
379 */
fecf92ba 380
cfa7f521
PO
381static inline void wbsd_get_short_reply(struct wbsd_host *host,
382 struct mmc_command *cmd)
1da177e4
LT
383{
384 /*
385 * Correct response type?
386 */
cfa7f521 387 if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_SHORT) {
1da177e4
LT
388 cmd->error = MMC_ERR_INVALID;
389 return;
390 }
fecf92ba 391
cfa7f521
PO
392 cmd->resp[0] = wbsd_read_index(host, WBSD_IDX_RESP12) << 24;
393 cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP13) << 16;
394 cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP14) << 8;
395 cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP15) << 0;
396 cmd->resp[1] = wbsd_read_index(host, WBSD_IDX_RESP16) << 24;
1da177e4
LT
397}
398
cfa7f521
PO
399static inline void wbsd_get_long_reply(struct wbsd_host *host,
400 struct mmc_command *cmd)
1da177e4
LT
401{
402 int i;
fecf92ba 403
1da177e4
LT
404 /*
405 * Correct response type?
406 */
cfa7f521 407 if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_LONG) {
1da177e4
LT
408 cmd->error = MMC_ERR_INVALID;
409 return;
410 }
fecf92ba 411
cfa7f521 412 for (i = 0; i < 4; i++) {
1da177e4
LT
413 cmd->resp[i] =
414 wbsd_read_index(host, WBSD_IDX_RESP1 + i * 4) << 24;
415 cmd->resp[i] |=
416 wbsd_read_index(host, WBSD_IDX_RESP2 + i * 4) << 16;
417 cmd->resp[i] |=
418 wbsd_read_index(host, WBSD_IDX_RESP3 + i * 4) << 8;
419 cmd->resp[i] |=
420 wbsd_read_index(host, WBSD_IDX_RESP4 + i * 4) << 0;
421 }
422}
423
cfa7f521 424static void wbsd_send_command(struct wbsd_host *host, struct mmc_command *cmd)
1da177e4
LT
425{
426 int i;
427 u8 status, isr;
fecf92ba 428
1da177e4
LT
429 DBGF("Sending cmd (%x)\n", cmd->opcode);
430
431 /*
432 * Clear accumulated ISR. The interrupt routine
433 * will fill this one with events that occur during
434 * transfer.
435 */
436 host->isr = 0;
fecf92ba 437
1da177e4
LT
438 /*
439 * Send the command (CRC calculated by host).
440 */
441 outb(cmd->opcode, host->base + WBSD_CMDR);
cfa7f521 442 for (i = 3; i >= 0; i--)
1da177e4 443 outb((cmd->arg >> (i * 8)) & 0xff, host->base + WBSD_CMDR);
fecf92ba 444
1da177e4 445 cmd->error = MMC_ERR_NONE;
fecf92ba 446
1da177e4
LT
447 /*
448 * Wait for the request to complete.
449 */
450 do {
451 status = wbsd_read_index(host, WBSD_IDX_STATUS);
452 } while (status & WBSD_CARDTRAFFIC);
453
454 /*
455 * Do we expect a reply?
456 */
e9225176 457 if (cmd->flags & MMC_RSP_PRESENT) {
1da177e4
LT
458 /*
459 * Read back status.
460 */
461 isr = host->isr;
fecf92ba 462
1da177e4
LT
463 /* Card removed? */
464 if (isr & WBSD_INT_CARD)
465 cmd->error = MMC_ERR_TIMEOUT;
466 /* Timeout? */
467 else if (isr & WBSD_INT_TIMEOUT)
468 cmd->error = MMC_ERR_TIMEOUT;
469 /* CRC? */
470 else if ((cmd->flags & MMC_RSP_CRC) && (isr & WBSD_INT_CRC))
471 cmd->error = MMC_ERR_BADCRC;
472 /* All ok */
cfa7f521 473 else {
e9225176 474 if (cmd->flags & MMC_RSP_136)
1da177e4 475 wbsd_get_long_reply(host, cmd);
e9225176
RK
476 else
477 wbsd_get_short_reply(host, cmd);
1da177e4
LT
478 }
479 }
480
481 DBGF("Sent cmd (%x), res %d\n", cmd->opcode, cmd->error);
482}
483
484/*
485 * Data functions
486 */
487
cfa7f521 488static void wbsd_empty_fifo(struct wbsd_host *host)
1da177e4 489{
cfa7f521
PO
490 struct mmc_data *data = host->mrq->cmd->data;
491 char *buffer;
1da177e4 492 int i, fsr, fifo;
fecf92ba 493
1da177e4
LT
494 /*
495 * Handle excessive data.
496 */
497 if (data->bytes_xfered == host->size)
498 return;
fecf92ba 499
1da177e4
LT
500 buffer = wbsd_kmap_sg(host) + host->offset;
501
502 /*
503 * Drain the fifo. This has a tendency to loop longer
504 * than the FIFO length (usually one block).
505 */
cfa7f521 506 while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_EMPTY)) {
1da177e4
LT
507 /*
508 * The size field in the FSR is broken so we have to
509 * do some guessing.
fecf92ba 510 */
1da177e4
LT
511 if (fsr & WBSD_FIFO_FULL)
512 fifo = 16;
513 else if (fsr & WBSD_FIFO_FUTHRE)
514 fifo = 8;
515 else
516 fifo = 1;
fecf92ba 517
cfa7f521 518 for (i = 0; i < fifo; i++) {
1da177e4
LT
519 *buffer = inb(host->base + WBSD_DFR);
520 buffer++;
521 host->offset++;
522 host->remain--;
523
524 data->bytes_xfered++;
fecf92ba 525
1da177e4
LT
526 /*
527 * Transfer done?
528 */
cfa7f521 529 if (data->bytes_xfered == host->size) {
fecf92ba 530 wbsd_kunmap_sg(host);
1da177e4
LT
531 return;
532 }
fecf92ba 533
1da177e4
LT
534 /*
535 * End of scatter list entry?
536 */
cfa7f521 537 if (host->remain == 0) {
1da177e4 538 wbsd_kunmap_sg(host);
fecf92ba 539
1da177e4
LT
540 /*
541 * Get next entry. Check if last.
542 */
cfa7f521 543 if (!wbsd_next_sg(host)) {
1da177e4
LT
544 /*
545 * We should never reach this point.
546 * It means that we're trying to
547 * transfer more blocks than can fit
548 * into the scatter list.
549 */
550 BUG_ON(1);
fecf92ba 551
1da177e4 552 host->size = data->bytes_xfered;
fecf92ba 553
1da177e4
LT
554 return;
555 }
fecf92ba 556
1da177e4
LT
557 buffer = wbsd_kmap_sg(host);
558 }
559 }
560 }
fecf92ba 561
1da177e4
LT
562 wbsd_kunmap_sg(host);
563
564 /*
565 * This is a very dirty hack to solve a
566 * hardware problem. The chip doesn't trigger
567 * FIFO threshold interrupts properly.
568 */
569 if ((host->size - data->bytes_xfered) < 16)
570 tasklet_schedule(&host->fifo_tasklet);
571}
572
cfa7f521 573static void wbsd_fill_fifo(struct wbsd_host *host)
1da177e4 574{
cfa7f521
PO
575 struct mmc_data *data = host->mrq->cmd->data;
576 char *buffer;
1da177e4 577 int i, fsr, fifo;
fecf92ba 578
1da177e4
LT
579 /*
580 * Check that we aren't being called after the
581 * entire buffer has been transfered.
582 */
583 if (data->bytes_xfered == host->size)
584 return;
585
586 buffer = wbsd_kmap_sg(host) + host->offset;
587
588 /*
589 * Fill the fifo. This has a tendency to loop longer
590 * than the FIFO length (usually one block).
591 */
cfa7f521 592 while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_FULL)) {
1da177e4
LT
593 /*
594 * The size field in the FSR is broken so we have to
595 * do some guessing.
fecf92ba 596 */
1da177e4
LT
597 if (fsr & WBSD_FIFO_EMPTY)
598 fifo = 0;
599 else if (fsr & WBSD_FIFO_EMTHRE)
600 fifo = 8;
601 else
602 fifo = 15;
603
cfa7f521 604 for (i = 16; i > fifo; i--) {
1da177e4
LT
605 outb(*buffer, host->base + WBSD_DFR);
606 buffer++;
607 host->offset++;
608 host->remain--;
fecf92ba 609
1da177e4 610 data->bytes_xfered++;
fecf92ba 611
1da177e4
LT
612 /*
613 * Transfer done?
614 */
cfa7f521 615 if (data->bytes_xfered == host->size) {
1da177e4
LT
616 wbsd_kunmap_sg(host);
617 return;
618 }
619
620 /*
621 * End of scatter list entry?
622 */
cfa7f521 623 if (host->remain == 0) {
1da177e4 624 wbsd_kunmap_sg(host);
fecf92ba 625
1da177e4
LT
626 /*
627 * Get next entry. Check if last.
628 */
cfa7f521 629 if (!wbsd_next_sg(host)) {
1da177e4
LT
630 /*
631 * We should never reach this point.
632 * It means that we're trying to
633 * transfer more blocks than can fit
634 * into the scatter list.
635 */
636 BUG_ON(1);
fecf92ba 637
1da177e4 638 host->size = data->bytes_xfered;
fecf92ba 639
1da177e4
LT
640 return;
641 }
fecf92ba 642
1da177e4
LT
643 buffer = wbsd_kmap_sg(host);
644 }
645 }
646 }
fecf92ba 647
1da177e4 648 wbsd_kunmap_sg(host);
fecf92ba 649
85bcc130
PO
650 /*
651 * The controller stops sending interrupts for
652 * 'FIFO empty' under certain conditions. So we
653 * need to be a bit more pro-active.
654 */
655 tasklet_schedule(&host->fifo_tasklet);
1da177e4
LT
656}
657
cfa7f521 658static void wbsd_prepare_data(struct wbsd_host *host, struct mmc_data *data)
1da177e4
LT
659{
660 u16 blksize;
661 u8 setup;
662 unsigned long dmaflags;
663
664 DBGF("blksz %04x blks %04x flags %08x\n",
2c171bf1 665 data->blksz, data->blocks, data->flags);
1da177e4
LT
666 DBGF("tsac %d ms nsac %d clk\n",
667 data->timeout_ns / 1000000, data->timeout_clks);
fecf92ba 668
1da177e4
LT
669 /*
670 * Calculate size.
671 */
2c171bf1 672 host->size = data->blocks * data->blksz;
1da177e4
LT
673
674 /*
675 * Check timeout values for overflow.
676 * (Yes, some cards cause this value to overflow).
677 */
678 if (data->timeout_ns > 127000000)
679 wbsd_write_index(host, WBSD_IDX_TAAC, 127);
cfa7f521
PO
680 else {
681 wbsd_write_index(host, WBSD_IDX_TAAC,
682 data->timeout_ns / 1000000);
683 }
fecf92ba 684
1da177e4
LT
685 if (data->timeout_clks > 255)
686 wbsd_write_index(host, WBSD_IDX_NSAC, 255);
687 else
688 wbsd_write_index(host, WBSD_IDX_NSAC, data->timeout_clks);
fecf92ba 689
1da177e4
LT
690 /*
691 * Inform the chip of how large blocks will be
692 * sent. It needs this to determine when to
693 * calculate CRC.
694 *
695 * Space for CRC must be included in the size.
65ae2118 696 * Two bytes are needed for each data line.
1da177e4 697 */
cfa7f521 698 if (host->bus_width == MMC_BUS_WIDTH_1) {
2c171bf1 699 blksize = data->blksz + 2;
65ae2118
PO
700
701 wbsd_write_index(host, WBSD_IDX_PBSMSB, (blksize >> 4) & 0xF0);
702 wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF);
cfa7f521 703 } else if (host->bus_width == MMC_BUS_WIDTH_4) {
2c171bf1 704 blksize = data->blksz + 2 * 4;
fecf92ba 705
cfa7f521
PO
706 wbsd_write_index(host, WBSD_IDX_PBSMSB,
707 ((blksize >> 4) & 0xF0) | WBSD_DATA_WIDTH);
65ae2118 708 wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF);
cfa7f521 709 } else {
65ae2118
PO
710 data->error = MMC_ERR_INVALID;
711 return;
712 }
1da177e4
LT
713
714 /*
715 * Clear the FIFO. This is needed even for DMA
716 * transfers since the chip still uses the FIFO
717 * internally.
718 */
719 setup = wbsd_read_index(host, WBSD_IDX_SETUP);
720 setup |= WBSD_FIFO_RESET;
721 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
fecf92ba 722
1da177e4
LT
723 /*
724 * DMA transfer?
725 */
cfa7f521 726 if (host->dma >= 0) {
1da177e4
LT
727 /*
728 * The buffer for DMA is only 64 kB.
729 */
730 BUG_ON(host->size > 0x10000);
cfa7f521 731 if (host->size > 0x10000) {
1da177e4
LT
732 data->error = MMC_ERR_INVALID;
733 return;
734 }
fecf92ba 735
1da177e4
LT
736 /*
737 * Transfer data from the SG list to
738 * the DMA buffer.
739 */
740 if (data->flags & MMC_DATA_WRITE)
741 wbsd_sg_to_dma(host, data);
fecf92ba 742
1da177e4
LT
743 /*
744 * Initialise the ISA DMA controller.
fecf92ba 745 */
1da177e4
LT
746 dmaflags = claim_dma_lock();
747 disable_dma(host->dma);
748 clear_dma_ff(host->dma);
749 if (data->flags & MMC_DATA_READ)
750 set_dma_mode(host->dma, DMA_MODE_READ & ~0x40);
751 else
752 set_dma_mode(host->dma, DMA_MODE_WRITE & ~0x40);
753 set_dma_addr(host->dma, host->dma_addr);
754 set_dma_count(host->dma, host->size);
755
756 enable_dma(host->dma);
757 release_dma_lock(dmaflags);
758
759 /*
760 * Enable DMA on the host.
761 */
762 wbsd_write_index(host, WBSD_IDX_DMA, WBSD_DMA_ENABLE);
cfa7f521 763 } else {
1da177e4
LT
764 /*
765 * This flag is used to keep printk
766 * output to a minimum.
767 */
768 host->firsterr = 1;
fecf92ba 769
1da177e4
LT
770 /*
771 * Initialise the SG list.
772 */
773 wbsd_init_sg(host, data);
fecf92ba 774
1da177e4
LT
775 /*
776 * Turn off DMA.
777 */
778 wbsd_write_index(host, WBSD_IDX_DMA, 0);
fecf92ba 779
1da177e4
LT
780 /*
781 * Set up FIFO threshold levels (and fill
782 * buffer if doing a write).
783 */
cfa7f521 784 if (data->flags & MMC_DATA_READ) {
1da177e4
LT
785 wbsd_write_index(host, WBSD_IDX_FIFOEN,
786 WBSD_FIFOEN_FULL | 8);
cfa7f521 787 } else {
1da177e4
LT
788 wbsd_write_index(host, WBSD_IDX_FIFOEN,
789 WBSD_FIFOEN_EMPTY | 8);
790 wbsd_fill_fifo(host);
791 }
fecf92ba
PO
792 }
793
1da177e4
LT
794 data->error = MMC_ERR_NONE;
795}
796
cfa7f521 797static void wbsd_finish_data(struct wbsd_host *host, struct mmc_data *data)
1da177e4
LT
798{
799 unsigned long dmaflags;
800 int count;
801 u8 status;
fecf92ba 802
1da177e4
LT
803 WARN_ON(host->mrq == NULL);
804
805 /*
806 * Send a stop command if needed.
807 */
808 if (data->stop)
809 wbsd_send_command(host, data->stop);
810
811 /*
812 * Wait for the controller to leave data
813 * transfer state.
814 */
cfa7f521 815 do {
1da177e4
LT
816 status = wbsd_read_index(host, WBSD_IDX_STATUS);
817 } while (status & (WBSD_BLOCK_READ | WBSD_BLOCK_WRITE));
fecf92ba 818
1da177e4
LT
819 /*
820 * DMA transfer?
821 */
cfa7f521 822 if (host->dma >= 0) {
1da177e4
LT
823 /*
824 * Disable DMA on the host.
825 */
826 wbsd_write_index(host, WBSD_IDX_DMA, 0);
fecf92ba 827
1da177e4
LT
828 /*
829 * Turn of ISA DMA controller.
830 */
831 dmaflags = claim_dma_lock();
832 disable_dma(host->dma);
833 clear_dma_ff(host->dma);
834 count = get_dma_residue(host->dma);
835 release_dma_lock(dmaflags);
fecf92ba 836
1da177e4
LT
837 /*
838 * Any leftover data?
839 */
cfa7f521 840 if (count) {
d191634f
PO
841 printk(KERN_ERR "%s: Incomplete DMA transfer. "
842 "%d bytes left.\n",
843 mmc_hostname(host->mmc), count);
fecf92ba 844
1da177e4 845 data->error = MMC_ERR_FAILED;
cfa7f521 846 } else {
1da177e4
LT
847 /*
848 * Transfer data from DMA buffer to
849 * SG list.
850 */
851 if (data->flags & MMC_DATA_READ)
852 wbsd_dma_to_sg(host, data);
fecf92ba 853
1da177e4
LT
854 data->bytes_xfered = host->size;
855 }
856 }
fecf92ba 857
1da177e4 858 DBGF("Ending data transfer (%d bytes)\n", data->bytes_xfered);
fecf92ba 859
1da177e4
LT
860 wbsd_request_end(host, host->mrq);
861}
862
85bcc130
PO
863/*****************************************************************************\
864 * *
865 * MMC layer callbacks *
866 * *
867\*****************************************************************************/
1da177e4 868
cfa7f521 869static void wbsd_request(struct mmc_host *mmc, struct mmc_request *mrq)
1da177e4 870{
cfa7f521
PO
871 struct wbsd_host *host = mmc_priv(mmc);
872 struct mmc_command *cmd;
1da177e4
LT
873
874 /*
875 * Disable tasklets to avoid a deadlock.
876 */
877 spin_lock_bh(&host->lock);
878
879 BUG_ON(host->mrq != NULL);
880
881 cmd = mrq->cmd;
882
883 host->mrq = mrq;
fecf92ba 884
1da177e4
LT
885 /*
886 * If there is no card in the slot then
887 * timeout immediatly.
888 */
cfa7f521 889 if (!(host->flags & WBSD_FCARD_PRESENT)) {
1da177e4
LT
890 cmd->error = MMC_ERR_TIMEOUT;
891 goto done;
892 }
893
894 /*
895 * Does the request include data?
896 */
cfa7f521 897 if (cmd->data) {
1da177e4 898 wbsd_prepare_data(host, cmd->data);
fecf92ba 899
1da177e4
LT
900 if (cmd->data->error != MMC_ERR_NONE)
901 goto done;
902 }
fecf92ba 903
1da177e4
LT
904 wbsd_send_command(host, cmd);
905
906 /*
907 * If this is a data transfer the request
908 * will be finished after the data has
909 * transfered.
fecf92ba 910 */
cfa7f521 911 if (cmd->data && (cmd->error == MMC_ERR_NONE)) {
5ba593a9
PO
912 /*
913 * The hardware is so delightfully stupid that it has a list
914 * of "data" commands. If a command isn't on this list, it'll
915 * just go back to the idle state and won't send any data
916 * interrupts.
917 */
918 switch (cmd->opcode) {
919 case 11:
920 case 17:
921 case 18:
922 case 20:
923 case 24:
924 case 25:
925 case 26:
926 case 27:
927 case 30:
928 case 42:
929 case 56:
930 break;
931
932 /* ACMDs. We don't keep track of state, so we just treat them
933 * like any other command. */
934 case 51:
935 break;
936
937 default:
938#ifdef CONFIG_MMC_DEBUG
939 printk(KERN_WARNING "%s: Data command %d is not "
940 "supported by this controller.\n",
941 mmc_hostname(host->mmc), cmd->opcode);
942#endif
943 cmd->data->error = MMC_ERR_INVALID;
944
945 if (cmd->data->stop)
946 wbsd_send_command(host, cmd->data->stop);
947
948 goto done;
949 };
950
1da177e4
LT
951 /*
952 * Dirty fix for hardware bug.
953 */
954 if (host->dma == -1)
955 tasklet_schedule(&host->fifo_tasklet);
956
957 spin_unlock_bh(&host->lock);
958
959 return;
960 }
fecf92ba 961
1da177e4
LT
962done:
963 wbsd_request_end(host, mrq);
964
965 spin_unlock_bh(&host->lock);
966}
967
cfa7f521 968static void wbsd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1da177e4 969{
cfa7f521 970 struct wbsd_host *host = mmc_priv(mmc);
1da177e4 971 u8 clk, setup, pwr;
fecf92ba 972
1da177e4
LT
973 spin_lock_bh(&host->lock);
974
975 /*
976 * Reset the chip on each power off.
977 * Should clear out any weird states.
978 */
979 if (ios->power_mode == MMC_POWER_OFF)
980 wbsd_init_device(host);
fecf92ba 981
1da177e4
LT
982 if (ios->clock >= 24000000)
983 clk = WBSD_CLK_24M;
984 else if (ios->clock >= 16000000)
985 clk = WBSD_CLK_16M;
986 else if (ios->clock >= 12000000)
987 clk = WBSD_CLK_12M;
988 else
989 clk = WBSD_CLK_375K;
990
991 /*
992 * Only write to the clock register when
993 * there is an actual change.
994 */
cfa7f521 995 if (clk != host->clk) {
1da177e4
LT
996 wbsd_write_index(host, WBSD_IDX_CLK, clk);
997 host->clk = clk;
998 }
999
85bcc130
PO
1000 /*
1001 * Power up card.
1002 */
cfa7f521 1003 if (ios->power_mode != MMC_POWER_OFF) {
1da177e4
LT
1004 pwr = inb(host->base + WBSD_CSR);
1005 pwr &= ~WBSD_POWER_N;
1006 outb(pwr, host->base + WBSD_CSR);
1da177e4
LT
1007 }
1008
85bcc130
PO
1009 /*
1010 * MMC cards need to have pin 1 high during init.
85bcc130 1011 * It wreaks havoc with the card detection though so
1656fa57 1012 * that needs to be disabled.
85bcc130
PO
1013 */
1014 setup = wbsd_read_index(host, WBSD_IDX_SETUP);
cfa7f521 1015 if (ios->chip_select == MMC_CS_HIGH) {
65ae2118 1016 BUG_ON(ios->bus_width != MMC_BUS_WIDTH_1);
85bcc130
PO
1017 setup |= WBSD_DAT3_H;
1018 host->flags |= WBSD_FIGNORE_DETECT;
cfa7f521
PO
1019 } else {
1020 if (setup & WBSD_DAT3_H) {
19c1f3ca 1021 setup &= ~WBSD_DAT3_H;
1656fa57 1022
19c1f3ca
PO
1023 /*
1024 * We cannot resume card detection immediatly
1025 * because of capacitance and delays in the chip.
1026 */
cfa7f521 1027 mod_timer(&host->ignore_timer, jiffies + HZ / 100);
19c1f3ca 1028 }
85bcc130
PO
1029 }
1030 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
fecf92ba 1031
65ae2118
PO
1032 /*
1033 * Store bus width for later. Will be used when
1034 * setting up the data transfer.
1035 */
1036 host->bus_width = ios->bus_width;
1037
1da177e4
LT
1038 spin_unlock_bh(&host->lock);
1039}
1040
cfa7f521 1041static int wbsd_get_ro(struct mmc_host *mmc)
65ae2118 1042{
cfa7f521 1043 struct wbsd_host *host = mmc_priv(mmc);
65ae2118
PO
1044 u8 csr;
1045
1046 spin_lock_bh(&host->lock);
1047
1048 csr = inb(host->base + WBSD_CSR);
1049 csr |= WBSD_MSLED;
1050 outb(csr, host->base + WBSD_CSR);
1051
1052 mdelay(1);
1053
1054 csr = inb(host->base + WBSD_CSR);
1055 csr &= ~WBSD_MSLED;
1056 outb(csr, host->base + WBSD_CSR);
1057
1058 spin_unlock_bh(&host->lock);
1059
1060 return csr & WBSD_WRPT;
1061}
1062
ab7aefd0 1063static const struct mmc_host_ops wbsd_ops = {
85bcc130
PO
1064 .request = wbsd_request,
1065 .set_ios = wbsd_set_ios,
65ae2118 1066 .get_ro = wbsd_get_ro,
85bcc130
PO
1067};
1068
1069/*****************************************************************************\
1070 * *
1071 * Interrupt handling *
1072 * *
1073\*****************************************************************************/
1074
1656fa57
PO
1075/*
1076 * Helper function to reset detection ignore
1077 */
1078
1079static void wbsd_reset_ignore(unsigned long data)
1080{
cfa7f521 1081 struct wbsd_host *host = (struct wbsd_host *)data;
1656fa57
PO
1082
1083 BUG_ON(host == NULL);
1084
1085 DBG("Resetting card detection ignore\n");
1086
1087 spin_lock_bh(&host->lock);
1088
1089 host->flags &= ~WBSD_FIGNORE_DETECT;
1090
1091 /*
1092 * Card status might have changed during the
1093 * blackout.
1094 */
1095 tasklet_schedule(&host->card_tasklet);
1096
1097 spin_unlock_bh(&host->lock);
1098}
1099
1da177e4
LT
1100/*
1101 * Tasklets
1102 */
1103
cfa7f521 1104static inline struct mmc_data *wbsd_get_data(struct wbsd_host *host)
1da177e4
LT
1105{
1106 WARN_ON(!host->mrq);
1107 if (!host->mrq)
1108 return NULL;
1109
1110 WARN_ON(!host->mrq->cmd);
1111 if (!host->mrq->cmd)
1112 return NULL;
1113
1114 WARN_ON(!host->mrq->cmd->data);
1115 if (!host->mrq->cmd->data)
1116 return NULL;
fecf92ba 1117
1da177e4
LT
1118 return host->mrq->cmd->data;
1119}
1120
1121static void wbsd_tasklet_card(unsigned long param)
1122{
cfa7f521 1123 struct wbsd_host *host = (struct wbsd_host *)param;
1da177e4 1124 u8 csr;
210ce2a7 1125 int delay = -1;
fecf92ba 1126
1da177e4 1127 spin_lock(&host->lock);
fecf92ba 1128
cfa7f521 1129 if (host->flags & WBSD_FIGNORE_DETECT) {
85bcc130
PO
1130 spin_unlock(&host->lock);
1131 return;
1132 }
fecf92ba 1133
1da177e4
LT
1134 csr = inb(host->base + WBSD_CSR);
1135 WARN_ON(csr == 0xff);
fecf92ba 1136
cfa7f521
PO
1137 if (csr & WBSD_CARDPRESENT) {
1138 if (!(host->flags & WBSD_FCARD_PRESENT)) {
85bcc130
PO
1139 DBG("Card inserted\n");
1140 host->flags |= WBSD_FCARD_PRESENT;
fecf92ba 1141
210ce2a7 1142 delay = 500;
85bcc130 1143 }
cfa7f521 1144 } else if (host->flags & WBSD_FCARD_PRESENT) {
1da177e4 1145 DBG("Card removed\n");
85bcc130 1146 host->flags &= ~WBSD_FCARD_PRESENT;
fecf92ba 1147
cfa7f521 1148 if (host->mrq) {
d191634f
PO
1149 printk(KERN_ERR "%s: Card removed during transfer!\n",
1150 mmc_hostname(host->mmc));
1da177e4 1151 wbsd_reset(host);
fecf92ba 1152
1da177e4
LT
1153 host->mrq->cmd->error = MMC_ERR_FAILED;
1154 tasklet_schedule(&host->finish_tasklet);
1155 }
fecf92ba 1156
210ce2a7 1157 delay = 0;
6e6293dd 1158 }
210ce2a7
PO
1159
1160 /*
1161 * Unlock first since we might get a call back.
1162 */
1163
1164 spin_unlock(&host->lock);
1165
1166 if (delay != -1)
1167 mmc_detect_change(host->mmc, msecs_to_jiffies(delay));
1da177e4
LT
1168}
1169
1170static void wbsd_tasklet_fifo(unsigned long param)
1171{
cfa7f521
PO
1172 struct wbsd_host *host = (struct wbsd_host *)param;
1173 struct mmc_data *data;
fecf92ba 1174
1da177e4 1175 spin_lock(&host->lock);
fecf92ba 1176
1da177e4
LT
1177 if (!host->mrq)
1178 goto end;
fecf92ba 1179
1da177e4
LT
1180 data = wbsd_get_data(host);
1181 if (!data)
1182 goto end;
1183
1184 if (data->flags & MMC_DATA_WRITE)
1185 wbsd_fill_fifo(host);
1186 else
1187 wbsd_empty_fifo(host);
1188
1189 /*
1190 * Done?
1191 */
cfa7f521 1192 if (host->size == data->bytes_xfered) {
1da177e4
LT
1193 wbsd_write_index(host, WBSD_IDX_FIFOEN, 0);
1194 tasklet_schedule(&host->finish_tasklet);
1195 }
1196
fecf92ba 1197end:
1da177e4
LT
1198 spin_unlock(&host->lock);
1199}
1200
1201static void wbsd_tasklet_crc(unsigned long param)
1202{
cfa7f521
PO
1203 struct wbsd_host *host = (struct wbsd_host *)param;
1204 struct mmc_data *data;
fecf92ba 1205
1da177e4 1206 spin_lock(&host->lock);
fecf92ba 1207
1da177e4
LT
1208 if (!host->mrq)
1209 goto end;
fecf92ba 1210
1da177e4
LT
1211 data = wbsd_get_data(host);
1212 if (!data)
1213 goto end;
fecf92ba 1214
1da177e4
LT
1215 DBGF("CRC error\n");
1216
1217 data->error = MMC_ERR_BADCRC;
fecf92ba 1218
1da177e4
LT
1219 tasklet_schedule(&host->finish_tasklet);
1220
fecf92ba 1221end:
1da177e4
LT
1222 spin_unlock(&host->lock);
1223}
1224
1225static void wbsd_tasklet_timeout(unsigned long param)
1226{
cfa7f521
PO
1227 struct wbsd_host *host = (struct wbsd_host *)param;
1228 struct mmc_data *data;
fecf92ba 1229
1da177e4 1230 spin_lock(&host->lock);
fecf92ba 1231
1da177e4
LT
1232 if (!host->mrq)
1233 goto end;
fecf92ba 1234
1da177e4
LT
1235 data = wbsd_get_data(host);
1236 if (!data)
1237 goto end;
fecf92ba 1238
1da177e4
LT
1239 DBGF("Timeout\n");
1240
1241 data->error = MMC_ERR_TIMEOUT;
fecf92ba 1242
1da177e4
LT
1243 tasklet_schedule(&host->finish_tasklet);
1244
fecf92ba 1245end:
1da177e4
LT
1246 spin_unlock(&host->lock);
1247}
1248
1249static void wbsd_tasklet_finish(unsigned long param)
1250{
cfa7f521
PO
1251 struct wbsd_host *host = (struct wbsd_host *)param;
1252 struct mmc_data *data;
fecf92ba 1253
1da177e4 1254 spin_lock(&host->lock);
fecf92ba 1255
1da177e4
LT
1256 WARN_ON(!host->mrq);
1257 if (!host->mrq)
1258 goto end;
fecf92ba 1259
1da177e4
LT
1260 data = wbsd_get_data(host);
1261 if (!data)
1262 goto end;
1263
1264 wbsd_finish_data(host, data);
fecf92ba
PO
1265
1266end:
1da177e4
LT
1267 spin_unlock(&host->lock);
1268}
1269
1270static void wbsd_tasklet_block(unsigned long param)
1271{
cfa7f521
PO
1272 struct wbsd_host *host = (struct wbsd_host *)param;
1273 struct mmc_data *data;
fecf92ba 1274
1da177e4
LT
1275 spin_lock(&host->lock);
1276
1277 if ((wbsd_read_index(host, WBSD_IDX_CRCSTATUS) & WBSD_CRC_MASK) !=
cfa7f521 1278 WBSD_CRC_OK) {
1da177e4
LT
1279 data = wbsd_get_data(host);
1280 if (!data)
1281 goto end;
fecf92ba 1282
1da177e4
LT
1283 DBGF("CRC error\n");
1284
1285 data->error = MMC_ERR_BADCRC;
fecf92ba 1286
1da177e4
LT
1287 tasklet_schedule(&host->finish_tasklet);
1288 }
1289
fecf92ba 1290end:
1da177e4
LT
1291 spin_unlock(&host->lock);
1292}
1293
1294/*
1295 * Interrupt handling
1296 */
1297
7d12e780 1298static irqreturn_t wbsd_irq(int irq, void *dev_id)
1da177e4 1299{
cfa7f521 1300 struct wbsd_host *host = dev_id;
1da177e4 1301 int isr;
fecf92ba 1302
1da177e4
LT
1303 isr = inb(host->base + WBSD_ISR);
1304
1305 /*
1306 * Was it actually our hardware that caused the interrupt?
1307 */
1308 if (isr == 0xff || isr == 0x00)
1309 return IRQ_NONE;
fecf92ba 1310
1da177e4
LT
1311 host->isr |= isr;
1312
1313 /*
1314 * Schedule tasklets as needed.
1315 */
1316 if (isr & WBSD_INT_CARD)
1317 tasklet_schedule(&host->card_tasklet);
1318 if (isr & WBSD_INT_FIFO_THRE)
1319 tasklet_schedule(&host->fifo_tasklet);
1320 if (isr & WBSD_INT_CRC)
1321 tasklet_hi_schedule(&host->crc_tasklet);
1322 if (isr & WBSD_INT_TIMEOUT)
1323 tasklet_hi_schedule(&host->timeout_tasklet);
1324 if (isr & WBSD_INT_BUSYEND)
1325 tasklet_hi_schedule(&host->block_tasklet);
1326 if (isr & WBSD_INT_TC)
1327 tasklet_schedule(&host->finish_tasklet);
fecf92ba 1328
1da177e4
LT
1329 return IRQ_HANDLED;
1330}
1331
85bcc130
PO
1332/*****************************************************************************\
1333 * *
1334 * Device initialisation and shutdown *
1335 * *
1336\*****************************************************************************/
1337
1da177e4 1338/*
85bcc130 1339 * Allocate/free MMC structure.
1da177e4
LT
1340 */
1341
cfa7f521 1342static int __devinit wbsd_alloc_mmc(struct device *dev)
85bcc130 1343{
cfa7f521
PO
1344 struct mmc_host *mmc;
1345 struct wbsd_host *host;
fecf92ba 1346
85bcc130
PO
1347 /*
1348 * Allocate MMC structure.
1349 */
1350 mmc = mmc_alloc_host(sizeof(struct wbsd_host), dev);
1351 if (!mmc)
1352 return -ENOMEM;
fecf92ba 1353
85bcc130
PO
1354 host = mmc_priv(mmc);
1355 host->mmc = mmc;
1356
1357 host->dma = -1;
1358
1359 /*
1360 * Set host parameters.
1361 */
1362 mmc->ops = &wbsd_ops;
1363 mmc->f_min = 375000;
1364 mmc->f_max = 24000000;
cfa7f521 1365 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
42431acb 1366 mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_MULTIWRITE | MMC_CAP_BYTEBLOCK;
fecf92ba 1367
85bcc130 1368 spin_lock_init(&host->lock);
fecf92ba 1369
6e6293dd 1370 /*
1656fa57 1371 * Set up timers
6e6293dd 1372 */
1656fa57
PO
1373 init_timer(&host->ignore_timer);
1374 host->ignore_timer.data = (unsigned long)host;
1375 host->ignore_timer.function = wbsd_reset_ignore;
fecf92ba 1376
85bcc130
PO
1377 /*
1378 * Maximum number of segments. Worst case is one sector per segment
1379 * so this will be 64kB/512.
1380 */
1381 mmc->max_hw_segs = 128;
1382 mmc->max_phys_segs = 128;
fecf92ba 1383
85bcc130 1384 /*
55db890a 1385 * Maximum request size. Also limited by 64KiB buffer.
85bcc130 1386 */
55db890a 1387 mmc->max_req_size = 65536;
fecf92ba 1388
85bcc130
PO
1389 /*
1390 * Maximum segment size. Could be one segment with the maximum number
55db890a 1391 * of bytes.
85bcc130 1392 */
55db890a 1393 mmc->max_seg_size = mmc->max_req_size;
fecf92ba 1394
fe4a3c7a
PO
1395 /*
1396 * Maximum block size. We have 12 bits (= 4095) but have to subtract
1397 * space for CRC. So the maximum is 4095 - 4*2 = 4087.
1398 */
1399 mmc->max_blk_size = 4087;
1400
55db890a
PO
1401 /*
1402 * Maximum block count. There is no real limit so the maximum
1403 * request size will be the only restriction.
1404 */
1405 mmc->max_blk_count = mmc->max_req_size;
1406
85bcc130 1407 dev_set_drvdata(dev, mmc);
fecf92ba 1408
85bcc130
PO
1409 return 0;
1410}
1411
cfa7f521 1412static void __devexit wbsd_free_mmc(struct device *dev)
85bcc130 1413{
cfa7f521
PO
1414 struct mmc_host *mmc;
1415 struct wbsd_host *host;
fecf92ba 1416
85bcc130
PO
1417 mmc = dev_get_drvdata(dev);
1418 if (!mmc)
1419 return;
fecf92ba 1420
6e6293dd
PO
1421 host = mmc_priv(mmc);
1422 BUG_ON(host == NULL);
fecf92ba 1423
1656fa57 1424 del_timer_sync(&host->ignore_timer);
fecf92ba 1425
85bcc130 1426 mmc_free_host(mmc);
fecf92ba 1427
85bcc130
PO
1428 dev_set_drvdata(dev, NULL);
1429}
1430
1431/*
1432 * Scan for known chip id:s
1433 */
1434
cfa7f521 1435static int __devinit wbsd_scan(struct wbsd_host *host)
1da177e4
LT
1436{
1437 int i, j, k;
1438 int id;
fecf92ba 1439
1da177e4
LT
1440 /*
1441 * Iterate through all ports, all codes to
1442 * find hardware that is in our known list.
1443 */
63648fb5 1444 for (i = 0; i < ARRAY_SIZE(config_ports); i++) {
1da177e4
LT
1445 if (!request_region(config_ports[i], 2, DRIVER_NAME))
1446 continue;
fecf92ba 1447
63648fb5 1448 for (j = 0; j < ARRAY_SIZE(unlock_codes); j++) {
1da177e4 1449 id = 0xFFFF;
fecf92ba 1450
19c1f3ca
PO
1451 host->config = config_ports[i];
1452 host->unlock_code = unlock_codes[j];
1453
1454 wbsd_unlock_config(host);
fecf92ba 1455
1da177e4
LT
1456 outb(WBSD_CONF_ID_HI, config_ports[i]);
1457 id = inb(config_ports[i] + 1) << 8;
1458
1459 outb(WBSD_CONF_ID_LO, config_ports[i]);
1460 id |= inb(config_ports[i] + 1);
fecf92ba 1461
19c1f3ca
PO
1462 wbsd_lock_config(host);
1463
63648fb5 1464 for (k = 0; k < ARRAY_SIZE(valid_ids); k++) {
cfa7f521 1465 if (id == valid_ids[k]) {
1da177e4 1466 host->chip_id = id;
fecf92ba 1467
1da177e4
LT
1468 return 0;
1469 }
1470 }
fecf92ba 1471
cfa7f521 1472 if (id != 0xFFFF) {
1da177e4
LT
1473 DBG("Unknown hardware (id %x) found at %x\n",
1474 id, config_ports[i]);
1475 }
1da177e4 1476 }
fecf92ba 1477
1da177e4
LT
1478 release_region(config_ports[i], 2);
1479 }
fecf92ba 1480
19c1f3ca
PO
1481 host->config = 0;
1482 host->unlock_code = 0;
1483
1da177e4
LT
1484 return -ENODEV;
1485}
1486
85bcc130
PO
1487/*
1488 * Allocate/free io port ranges
1489 */
1490
cfa7f521 1491static int __devinit wbsd_request_region(struct wbsd_host *host, int base)
1da177e4 1492{
916f3ac6 1493 if (base & 0x7)
1da177e4 1494 return -EINVAL;
fecf92ba 1495
85bcc130 1496 if (!request_region(base, 8, DRIVER_NAME))
1da177e4 1497 return -EIO;
fecf92ba 1498
916f3ac6 1499 host->base = base;
fecf92ba 1500
1da177e4
LT
1501 return 0;
1502}
1503
cfa7f521 1504static void __devexit wbsd_release_regions(struct wbsd_host *host)
1da177e4
LT
1505{
1506 if (host->base)
1507 release_region(host->base, 8);
fecf92ba 1508
85bcc130 1509 host->base = 0;
1da177e4
LT
1510
1511 if (host->config)
1512 release_region(host->config, 2);
fecf92ba 1513
85bcc130 1514 host->config = 0;
1da177e4
LT
1515}
1516
85bcc130
PO
1517/*
1518 * Allocate/free DMA port and buffer
1519 */
1520
cfa7f521 1521static void __devinit wbsd_request_dma(struct wbsd_host *host, int dma)
1da177e4 1522{
1da177e4
LT
1523 if (dma < 0)
1524 return;
fecf92ba 1525
1da177e4
LT
1526 if (request_dma(dma, DRIVER_NAME))
1527 goto err;
fecf92ba 1528
1da177e4
LT
1529 /*
1530 * We need to allocate a special buffer in
1531 * order for ISA to be able to DMA to it.
1532 */
85bcc130 1533 host->dma_buffer = kmalloc(WBSD_DMA_SIZE,
1da177e4
LT
1534 GFP_NOIO | GFP_DMA | __GFP_REPEAT | __GFP_NOWARN);
1535 if (!host->dma_buffer)
1536 goto free;
1537
1538 /*
1539 * Translate the address to a physical address.
1540 */
fcaf71fd 1541 host->dma_addr = dma_map_single(mmc_dev(host->mmc), host->dma_buffer,
85bcc130 1542 WBSD_DMA_SIZE, DMA_BIDIRECTIONAL);
fecf92ba 1543
1da177e4
LT
1544 /*
1545 * ISA DMA must be aligned on a 64k basis.
1546 */
1547 if ((host->dma_addr & 0xffff) != 0)
1548 goto kfree;
1549 /*
1550 * ISA cannot access memory above 16 MB.
1551 */
1552 else if (host->dma_addr >= 0x1000000)
1553 goto kfree;
1554
1555 host->dma = dma;
fecf92ba 1556
1da177e4 1557 return;
fecf92ba 1558
1da177e4
LT
1559kfree:
1560 /*
1561 * If we've gotten here then there is some kind of alignment bug
1562 */
1563 BUG_ON(1);
fecf92ba 1564
fcaf71fd 1565 dma_unmap_single(mmc_dev(host->mmc), host->dma_addr,
cfa7f521 1566 WBSD_DMA_SIZE, DMA_BIDIRECTIONAL);
85bcc130 1567 host->dma_addr = (dma_addr_t)NULL;
fecf92ba 1568
1da177e4
LT
1569 kfree(host->dma_buffer);
1570 host->dma_buffer = NULL;
1571
1572free:
1573 free_dma(dma);
1574
1575err:
1576 printk(KERN_WARNING DRIVER_NAME ": Unable to allocate DMA %d. "
1577 "Falling back on FIFO.\n", dma);
1578}
1579
cfa7f521 1580static void __devexit wbsd_release_dma(struct wbsd_host *host)
85bcc130 1581{
cfa7f521 1582 if (host->dma_addr) {
fcaf71fd 1583 dma_unmap_single(mmc_dev(host->mmc), host->dma_addr,
cfa7f521
PO
1584 WBSD_DMA_SIZE, DMA_BIDIRECTIONAL);
1585 }
6044ec88 1586 kfree(host->dma_buffer);
85bcc130
PO
1587 if (host->dma >= 0)
1588 free_dma(host->dma);
fecf92ba 1589
85bcc130
PO
1590 host->dma = -1;
1591 host->dma_buffer = NULL;
1592 host->dma_addr = (dma_addr_t)NULL;
1593}
1da177e4
LT
1594
1595/*
85bcc130 1596 * Allocate/free IRQ.
1da177e4
LT
1597 */
1598
cfa7f521 1599static int __devinit wbsd_request_irq(struct wbsd_host *host, int irq)
1da177e4 1600{
1da177e4 1601 int ret;
fecf92ba 1602
1da177e4 1603 /*
85bcc130 1604 * Allocate interrupt.
1da177e4 1605 */
85bcc130 1606
dace1453 1607 ret = request_irq(irq, wbsd_irq, IRQF_SHARED, DRIVER_NAME, host);
85bcc130
PO
1608 if (ret)
1609 return ret;
fecf92ba 1610
85bcc130
PO
1611 host->irq = irq;
1612
1da177e4 1613 /*
85bcc130 1614 * Set up tasklets.
1da177e4 1615 */
cfa7f521
PO
1616 tasklet_init(&host->card_tasklet, wbsd_tasklet_card,
1617 (unsigned long)host);
1618 tasklet_init(&host->fifo_tasklet, wbsd_tasklet_fifo,
1619 (unsigned long)host);
1620 tasklet_init(&host->crc_tasklet, wbsd_tasklet_crc,
1621 (unsigned long)host);
1622 tasklet_init(&host->timeout_tasklet, wbsd_tasklet_timeout,
1623 (unsigned long)host);
1624 tasklet_init(&host->finish_tasklet, wbsd_tasklet_finish,
1625 (unsigned long)host);
1626 tasklet_init(&host->block_tasklet, wbsd_tasklet_block,
1627 (unsigned long)host);
fecf92ba 1628
85bcc130
PO
1629 return 0;
1630}
1da177e4 1631
cfa7f521 1632static void __devexit wbsd_release_irq(struct wbsd_host *host)
85bcc130
PO
1633{
1634 if (!host->irq)
1635 return;
1da177e4 1636
85bcc130 1637 free_irq(host->irq, host);
fecf92ba 1638
85bcc130 1639 host->irq = 0;
fecf92ba 1640
85bcc130
PO
1641 tasklet_kill(&host->card_tasklet);
1642 tasklet_kill(&host->fifo_tasklet);
1643 tasklet_kill(&host->crc_tasklet);
1644 tasklet_kill(&host->timeout_tasklet);
1645 tasklet_kill(&host->finish_tasklet);
1646 tasklet_kill(&host->block_tasklet);
1647}
1648
1649/*
1650 * Allocate all resources for the host.
1651 */
1652
cfa7f521 1653static int __devinit wbsd_request_resources(struct wbsd_host *host,
85bcc130
PO
1654 int base, int irq, int dma)
1655{
1656 int ret;
fecf92ba 1657
1da177e4
LT
1658 /*
1659 * Allocate I/O ports.
1660 */
85bcc130 1661 ret = wbsd_request_region(host, base);
1da177e4 1662 if (ret)
85bcc130 1663 return ret;
1da177e4
LT
1664
1665 /*
85bcc130 1666 * Allocate interrupt.
1da177e4 1667 */
85bcc130
PO
1668 ret = wbsd_request_irq(host, irq);
1669 if (ret)
1670 return ret;
1671
1672 /*
1673 * Allocate DMA.
1674 */
1675 wbsd_request_dma(host, dma);
fecf92ba 1676
85bcc130
PO
1677 return 0;
1678}
1679
1680/*
1681 * Release all resources for the host.
1682 */
1683
cfa7f521 1684static void __devexit wbsd_release_resources(struct wbsd_host *host)
85bcc130
PO
1685{
1686 wbsd_release_dma(host);
1687 wbsd_release_irq(host);
1688 wbsd_release_regions(host);
1689}
1690
1691/*
1692 * Configure the resources the chip should use.
1693 */
1694
cfa7f521 1695static void wbsd_chip_config(struct wbsd_host *host)
85bcc130 1696{
19c1f3ca
PO
1697 wbsd_unlock_config(host);
1698
85bcc130
PO
1699 /*
1700 * Reset the chip.
fecf92ba 1701 */
85bcc130
PO
1702 wbsd_write_config(host, WBSD_CONF_SWRST, 1);
1703 wbsd_write_config(host, WBSD_CONF_SWRST, 0);
1da177e4
LT
1704
1705 /*
1706 * Select SD/MMC function.
1707 */
1708 wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD);
fecf92ba 1709
1da177e4
LT
1710 /*
1711 * Set up card detection.
1712 */
85bcc130 1713 wbsd_write_config(host, WBSD_CONF_PINS, WBSD_PINS_DETECT_GP11);
fecf92ba 1714
1da177e4 1715 /*
85bcc130 1716 * Configure chip
1da177e4
LT
1717 */
1718 wbsd_write_config(host, WBSD_CONF_PORT_HI, host->base >> 8);
1719 wbsd_write_config(host, WBSD_CONF_PORT_LO, host->base & 0xff);
fecf92ba 1720
85bcc130 1721 wbsd_write_config(host, WBSD_CONF_IRQ, host->irq);
fecf92ba 1722
85bcc130
PO
1723 if (host->dma >= 0)
1724 wbsd_write_config(host, WBSD_CONF_DRQ, host->dma);
fecf92ba 1725
1da177e4 1726 /*
85bcc130 1727 * Enable and power up chip.
1da177e4 1728 */
85bcc130
PO
1729 wbsd_write_config(host, WBSD_CONF_ENABLE, 1);
1730 wbsd_write_config(host, WBSD_CONF_POWER, 0x20);
19c1f3ca
PO
1731
1732 wbsd_lock_config(host);
85bcc130
PO
1733}
1734
1735/*
1736 * Check that configured resources are correct.
1737 */
fecf92ba 1738
cfa7f521 1739static int wbsd_chip_validate(struct wbsd_host *host)
85bcc130
PO
1740{
1741 int base, irq, dma;
fecf92ba 1742
19c1f3ca
PO
1743 wbsd_unlock_config(host);
1744
1da177e4 1745 /*
85bcc130 1746 * Select SD/MMC function.
1da177e4 1747 */
85bcc130 1748 wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD);
fecf92ba 1749
1da177e4 1750 /*
85bcc130 1751 * Read configuration.
1da177e4 1752 */
85bcc130
PO
1753 base = wbsd_read_config(host, WBSD_CONF_PORT_HI) << 8;
1754 base |= wbsd_read_config(host, WBSD_CONF_PORT_LO);
fecf92ba 1755
85bcc130 1756 irq = wbsd_read_config(host, WBSD_CONF_IRQ);
fecf92ba 1757
85bcc130 1758 dma = wbsd_read_config(host, WBSD_CONF_DRQ);
fecf92ba 1759
19c1f3ca
PO
1760 wbsd_lock_config(host);
1761
1da177e4 1762 /*
85bcc130 1763 * Validate against given configuration.
1da177e4 1764 */
85bcc130
PO
1765 if (base != host->base)
1766 return 0;
1767 if (irq != host->irq)
1768 return 0;
1769 if ((dma != host->dma) && (host->dma != -1))
1770 return 0;
fecf92ba 1771
85bcc130
PO
1772 return 1;
1773}
1774
19c1f3ca
PO
1775/*
1776 * Powers down the SD function
1777 */
1778
cfa7f521 1779static void wbsd_chip_poweroff(struct wbsd_host *host)
19c1f3ca
PO
1780{
1781 wbsd_unlock_config(host);
1782
1783 wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD);
1784 wbsd_write_config(host, WBSD_CONF_ENABLE, 0);
1785
1786 wbsd_lock_config(host);
1787}
1788
85bcc130
PO
1789/*****************************************************************************\
1790 * *
1791 * Devices setup and shutdown *
1792 * *
1793\*****************************************************************************/
1794
cfa7f521 1795static int __devinit wbsd_init(struct device *dev, int base, int irq, int dma,
85bcc130
PO
1796 int pnp)
1797{
cfa7f521
PO
1798 struct wbsd_host *host = NULL;
1799 struct mmc_host *mmc = NULL;
85bcc130 1800 int ret;
fecf92ba 1801
85bcc130
PO
1802 ret = wbsd_alloc_mmc(dev);
1803 if (ret)
1804 return ret;
fecf92ba 1805
85bcc130
PO
1806 mmc = dev_get_drvdata(dev);
1807 host = mmc_priv(mmc);
fecf92ba 1808
1da177e4 1809 /*
85bcc130 1810 * Scan for hardware.
1da177e4 1811 */
85bcc130 1812 ret = wbsd_scan(host);
cfa7f521
PO
1813 if (ret) {
1814 if (pnp && (ret == -ENODEV)) {
85bcc130
PO
1815 printk(KERN_WARNING DRIVER_NAME
1816 ": Unable to confirm device presence. You may "
1817 "experience lock-ups.\n");
cfa7f521 1818 } else {
85bcc130
PO
1819 wbsd_free_mmc(dev);
1820 return ret;
1821 }
1822 }
fecf92ba 1823
1da177e4 1824 /*
85bcc130 1825 * Request resources.
1da177e4 1826 */
dd2c609c 1827 ret = wbsd_request_resources(host, base, irq, dma);
cfa7f521 1828 if (ret) {
85bcc130
PO
1829 wbsd_release_resources(host);
1830 wbsd_free_mmc(dev);
1831 return ret;
1832 }
fecf92ba 1833
1da177e4 1834 /*
85bcc130 1835 * See if chip needs to be configured.
1da177e4 1836 */
cfa7f521
PO
1837 if (pnp) {
1838 if ((host->config != 0) && !wbsd_chip_validate(host)) {
85bcc130
PO
1839 printk(KERN_WARNING DRIVER_NAME
1840 ": PnP active but chip not configured! "
1841 "You probably have a buggy BIOS. "
1842 "Configuring chip manually.\n");
1843 wbsd_chip_config(host);
1844 }
cfa7f521 1845 } else
85bcc130 1846 wbsd_chip_config(host);
fecf92ba 1847
1da177e4
LT
1848 /*
1849 * Power Management stuff. No idea how this works.
1850 * Not tested.
1851 */
1852#ifdef CONFIG_PM
cfa7f521 1853 if (host->config) {
19c1f3ca 1854 wbsd_unlock_config(host);
85bcc130 1855 wbsd_write_config(host, WBSD_CONF_PME, 0xA0);
19c1f3ca
PO
1856 wbsd_lock_config(host);
1857 }
1da177e4 1858#endif
85bcc130
PO
1859 /*
1860 * Allow device to initialise itself properly.
1861 */
1862 mdelay(5);
1da177e4
LT
1863
1864 /*
1865 * Reset the chip into a known state.
1866 */
1867 wbsd_init_device(host);
fecf92ba 1868
1da177e4
LT
1869 mmc_add_host(mmc);
1870
d366b643 1871 printk(KERN_INFO "%s: W83L51xD", mmc_hostname(mmc));
85bcc130
PO
1872 if (host->chip_id != 0)
1873 printk(" id %x", (int)host->chip_id);
1874 printk(" at 0x%x irq %d", (int)host->base, (int)host->irq);
1875 if (host->dma >= 0)
1876 printk(" dma %d", (int)host->dma);
1877 else
1878 printk(" FIFO");
1879 if (pnp)
1880 printk(" PnP");
1881 printk("\n");
1da177e4
LT
1882
1883 return 0;
1da177e4
LT
1884}
1885
cfa7f521 1886static void __devexit wbsd_shutdown(struct device *dev, int pnp)
1da177e4 1887{
cfa7f521
PO
1888 struct mmc_host *mmc = dev_get_drvdata(dev);
1889 struct wbsd_host *host;
fecf92ba 1890
1da177e4 1891 if (!mmc)
85bcc130 1892 return;
1da177e4
LT
1893
1894 host = mmc_priv(mmc);
fecf92ba 1895
1da177e4
LT
1896 mmc_remove_host(mmc);
1897
19c1f3ca
PO
1898 /*
1899 * Power down the SD/MMC function.
1900 */
85bcc130 1901 if (!pnp)
19c1f3ca 1902 wbsd_chip_poweroff(host);
fecf92ba 1903
85bcc130 1904 wbsd_release_resources(host);
fecf92ba 1905
85bcc130
PO
1906 wbsd_free_mmc(dev);
1907}
1da177e4 1908
85bcc130
PO
1909/*
1910 * Non-PnP
1911 */
1912
cfa7f521 1913static int __devinit wbsd_probe(struct platform_device *dev)
85bcc130 1914{
dd2c609c 1915 /* Use the module parameters for resources */
3ae5eaec 1916 return wbsd_init(&dev->dev, io, irq, dma, 0);
85bcc130
PO
1917}
1918
cfa7f521 1919static int __devexit wbsd_remove(struct platform_device *dev)
85bcc130 1920{
3ae5eaec 1921 wbsd_shutdown(&dev->dev, 0);
85bcc130
PO
1922
1923 return 0;
1924}
1925
1926/*
1927 * PnP
1928 */
1929
1930#ifdef CONFIG_PNP
1931
1932static int __devinit
cfa7f521 1933wbsd_pnp_probe(struct pnp_dev *pnpdev, const struct pnp_device_id *dev_id)
85bcc130
PO
1934{
1935 int io, irq, dma;
fecf92ba 1936
85bcc130
PO
1937 /*
1938 * Get resources from PnP layer.
1939 */
1940 io = pnp_port_start(pnpdev, 0);
1941 irq = pnp_irq(pnpdev, 0);
1942 if (pnp_dma_valid(pnpdev, 0))
1943 dma = pnp_dma(pnpdev, 0);
1944 else
1945 dma = -1;
fecf92ba 1946
85bcc130 1947 DBGF("PnP resources: port %3x irq %d dma %d\n", io, irq, dma);
fecf92ba 1948
85bcc130
PO
1949 return wbsd_init(&pnpdev->dev, io, irq, dma, 1);
1950}
1da177e4 1951
cfa7f521 1952static void __devexit wbsd_pnp_remove(struct pnp_dev *dev)
85bcc130
PO
1953{
1954 wbsd_shutdown(&dev->dev, 1);
1da177e4
LT
1955}
1956
85bcc130
PO
1957#endif /* CONFIG_PNP */
1958
1da177e4
LT
1959/*
1960 * Power management
1961 */
1962
1963#ifdef CONFIG_PM
19c1f3ca 1964
5e68d95d
PO
1965static int wbsd_suspend(struct wbsd_host *host, pm_message_t state)
1966{
1967 BUG_ON(host == NULL);
1968
1969 return mmc_suspend_host(host->mmc, state);
1970}
1971
1972static int wbsd_resume(struct wbsd_host *host)
1973{
1974 BUG_ON(host == NULL);
1975
1976 wbsd_init_device(host);
1977
1978 return mmc_resume_host(host->mmc);
1979}
1980
cfa7f521
PO
1981static int wbsd_platform_suspend(struct platform_device *dev,
1982 pm_message_t state)
1da177e4 1983{
3ae5eaec 1984 struct mmc_host *mmc = platform_get_drvdata(dev);
19c1f3ca
PO
1985 struct wbsd_host *host;
1986 int ret;
1987
5e68d95d 1988 if (mmc == NULL)
19c1f3ca
PO
1989 return 0;
1990
5e68d95d 1991 DBGF("Suspending...\n");
19c1f3ca
PO
1992
1993 host = mmc_priv(mmc);
1994
5e68d95d
PO
1995 ret = wbsd_suspend(host, state);
1996 if (ret)
1997 return ret;
1998
19c1f3ca 1999 wbsd_chip_poweroff(host);
1da177e4
LT
2000
2001 return 0;
2002}
2003
5e68d95d 2004static int wbsd_platform_resume(struct platform_device *dev)
1da177e4 2005{
3ae5eaec 2006 struct mmc_host *mmc = platform_get_drvdata(dev);
19c1f3ca 2007 struct wbsd_host *host;
1da177e4 2008
5e68d95d 2009 if (mmc == NULL)
19c1f3ca
PO
2010 return 0;
2011
5e68d95d 2012 DBGF("Resuming...\n");
19c1f3ca
PO
2013
2014 host = mmc_priv(mmc);
2015
2016 wbsd_chip_config(host);
2017
2018 /*
2019 * Allow device to initialise itself properly.
2020 */
2021 mdelay(5);
2022
5e68d95d
PO
2023 return wbsd_resume(host);
2024}
2025
2026#ifdef CONFIG_PNP
2027
2028static int wbsd_pnp_suspend(struct pnp_dev *pnp_dev, pm_message_t state)
2029{
2030 struct mmc_host *mmc = dev_get_drvdata(&pnp_dev->dev);
2031 struct wbsd_host *host;
2032
2033 if (mmc == NULL)
2034 return 0;
19c1f3ca 2035
5e68d95d
PO
2036 DBGF("Suspending...\n");
2037
2038 host = mmc_priv(mmc);
2039
2040 return wbsd_suspend(host, state);
1da177e4 2041}
19c1f3ca 2042
5e68d95d
PO
2043static int wbsd_pnp_resume(struct pnp_dev *pnp_dev)
2044{
2045 struct mmc_host *mmc = dev_get_drvdata(&pnp_dev->dev);
2046 struct wbsd_host *host;
2047
2048 if (mmc == NULL)
2049 return 0;
2050
2051 DBGF("Resuming...\n");
2052
2053 host = mmc_priv(mmc);
2054
2055 /*
2056 * See if chip needs to be configured.
2057 */
cfa7f521
PO
2058 if (host->config != 0) {
2059 if (!wbsd_chip_validate(host)) {
5e68d95d
PO
2060 printk(KERN_WARNING DRIVER_NAME
2061 ": PnP active but chip not configured! "
2062 "You probably have a buggy BIOS. "
2063 "Configuring chip manually.\n");
2064 wbsd_chip_config(host);
2065 }
2066 }
2067
2068 /*
2069 * Allow device to initialise itself properly.
2070 */
2071 mdelay(5);
2072
2073 return wbsd_resume(host);
2074}
2075
2076#endif /* CONFIG_PNP */
2077
19c1f3ca
PO
2078#else /* CONFIG_PM */
2079
5e68d95d
PO
2080#define wbsd_platform_suspend NULL
2081#define wbsd_platform_resume NULL
2082
2083#define wbsd_pnp_suspend NULL
2084#define wbsd_pnp_resume NULL
19c1f3ca
PO
2085
2086#endif /* CONFIG_PM */
1da177e4 2087
85bcc130 2088static struct platform_device *wbsd_device;
1da177e4 2089
3ae5eaec 2090static struct platform_driver wbsd_driver = {
1da177e4 2091 .probe = wbsd_probe,
93968d75 2092 .remove = __devexit_p(wbsd_remove),
fecf92ba 2093
5e68d95d
PO
2094 .suspend = wbsd_platform_suspend,
2095 .resume = wbsd_platform_resume,
3ae5eaec
RK
2096 .driver = {
2097 .name = DRIVER_NAME,
2098 },
1da177e4
LT
2099};
2100
85bcc130
PO
2101#ifdef CONFIG_PNP
2102
2103static struct pnp_driver wbsd_pnp_driver = {
2104 .name = DRIVER_NAME,
2105 .id_table = pnp_dev_table,
2106 .probe = wbsd_pnp_probe,
93968d75 2107 .remove = __devexit_p(wbsd_pnp_remove),
5e68d95d
PO
2108
2109 .suspend = wbsd_pnp_suspend,
2110 .resume = wbsd_pnp_resume,
85bcc130
PO
2111};
2112
2113#endif /* CONFIG_PNP */
2114
1da177e4
LT
2115/*
2116 * Module loading/unloading
2117 */
2118
2119static int __init wbsd_drv_init(void)
2120{
2121 int result;
fecf92ba 2122
1da177e4
LT
2123 printk(KERN_INFO DRIVER_NAME
2124 ": Winbond W83L51xD SD/MMC card interface driver, "
2125 DRIVER_VERSION "\n");
2126 printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
1da177e4 2127
85bcc130
PO
2128#ifdef CONFIG_PNP
2129
cfa7f521 2130 if (!nopnp) {
85bcc130
PO
2131 result = pnp_register_driver(&wbsd_pnp_driver);
2132 if (result < 0)
2133 return result;
2134 }
fecf92ba
PO
2135#endif /* CONFIG_PNP */
2136
cfa7f521 2137 if (nopnp) {
3ae5eaec 2138 result = platform_driver_register(&wbsd_driver);
85bcc130
PO
2139 if (result < 0)
2140 return result;
2141
21500bb3 2142 wbsd_device = platform_device_alloc(DRIVER_NAME, -1);
cfa7f521 2143 if (!wbsd_device) {
21500bb3
DT
2144 platform_driver_unregister(&wbsd_driver);
2145 return -ENOMEM;
2146 }
2147
2148 result = platform_device_add(wbsd_device);
cfa7f521 2149 if (result) {
21500bb3
DT
2150 platform_device_put(wbsd_device);
2151 platform_driver_unregister(&wbsd_driver);
2152 return result;
2153 }
85bcc130 2154 }
1da177e4
LT
2155
2156 return 0;
2157}
2158
2159static void __exit wbsd_drv_exit(void)
2160{
85bcc130
PO
2161#ifdef CONFIG_PNP
2162
2163 if (!nopnp)
2164 pnp_unregister_driver(&wbsd_pnp_driver);
fecf92ba
PO
2165
2166#endif /* CONFIG_PNP */
85bcc130 2167
cfa7f521 2168 if (nopnp) {
85bcc130 2169 platform_device_unregister(wbsd_device);
fecf92ba 2170
3ae5eaec 2171 platform_driver_unregister(&wbsd_driver);
85bcc130 2172 }
1da177e4
LT
2173
2174 DBG("unloaded\n");
2175}
2176
2177module_init(wbsd_drv_init);
2178module_exit(wbsd_drv_exit);
85bcc130
PO
2179#ifdef CONFIG_PNP
2180module_param(nopnp, uint, 0444);
2181#endif
1da177e4
LT
2182module_param(io, uint, 0444);
2183module_param(irq, uint, 0444);
2184module_param(dma, int, 0444);
2185
2186MODULE_LICENSE("GPL");
de1d09e3 2187MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
1da177e4
LT
2188MODULE_DESCRIPTION("Winbond W83L51xD SD/MMC card interface driver");
2189MODULE_VERSION(DRIVER_VERSION);
2190
85bcc130
PO
2191#ifdef CONFIG_PNP
2192MODULE_PARM_DESC(nopnp, "Scan for device instead of relying on PNP. (default 0)");
2193#endif
1da177e4
LT
2194MODULE_PARM_DESC(io, "I/O base to allocate. Must be 8 byte aligned. (default 0x248)");
2195MODULE_PARM_DESC(irq, "IRQ to allocate. (default 6)");
2196MODULE_PARM_DESC(dma, "DMA channel to allocate. -1 for no DMA. (default 2)");