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mtd: denali: add Kconfig dependency
[mirror_ubuntu-artful-kernel.git] / drivers / mtd / chips / cfi_cmdset_0001.c
CommitLineData
1da177e4
LT
1/*
2 * Common Flash Interface support:
3 * Intel Extended Vendor Command Set (ID 0x0001)
4 *
5 * (C) 2000 Red Hat. GPL'd
6 *
1da177e4 7 *
2f82af08 8 * 10/10/2000 Nicolas Pitre <nico@fluxnic.net>
1da177e4
LT
9 * - completely revamped method functions so they are aware and
10 * independent of the flash geometry (buswidth, interleave, etc.)
11 * - scalability vs code size is completely set at compile-time
12 * (see include/linux/mtd/cfi.h for selection)
13 * - optimized write buffer method
14 * 02/05/2002 Christopher Hoover <ch@hpl.hp.com>/<ch@murgatroid.com>
15 * - reworked lock/unlock/erase support for var size flash
0ecbc81a
RG
16 * 21/03/2007 Rodolfo Giometti <giometti@linux.it>
17 * - auto unlock sectors on resume for auto locking flash on power up
1da177e4
LT
18 */
19
20#include <linux/module.h>
21#include <linux/types.h>
22#include <linux/kernel.h>
23#include <linux/sched.h>
24#include <linux/init.h>
25#include <asm/io.h>
26#include <asm/byteorder.h>
27
28#include <linux/errno.h>
29#include <linux/slab.h>
30#include <linux/delay.h>
31#include <linux/interrupt.h>
963a6fb0 32#include <linux/reboot.h>
0ecbc81a 33#include <linux/bitmap.h>
1da177e4
LT
34#include <linux/mtd/xip.h>
35#include <linux/mtd/map.h>
36#include <linux/mtd/mtd.h>
37#include <linux/mtd/compatmac.h>
38#include <linux/mtd/cfi.h>
39
40/* #define CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE */
41/* #define CMDSET0001_DISABLE_WRITE_SUSPEND */
42
43// debugging, turns off buffer write mode if set to 1
44#define FORCE_WORD_WRITE 0
45
b2ef1a2b 46/* Intel chips */
1da177e4
LT
47#define I82802AB 0x00ad
48#define I82802AC 0x00ac
ec2d0d84 49#define PF38F4476 0x881c
b2ef1a2b 50/* STMicroelectronics chips */
1da177e4 51#define M50LPW080 0x002F
deb1a5f1
NC
52#define M50FLW080A 0x0080
53#define M50FLW080B 0x0081
8dbaea4b 54/* Atmel chips */
d10a39d1 55#define AT49BV640D 0x02de
8dbaea4b 56#define AT49BV640DT 0x02db
1da177e4
LT
57
58static int cfi_intelext_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
1da177e4
LT
59static int cfi_intelext_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
60static int cfi_intelext_write_buffers(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
e102d54a 61static int cfi_intelext_writev(struct mtd_info *, const struct kvec *, unsigned long, loff_t, size_t *);
1da177e4
LT
62static int cfi_intelext_erase_varsize(struct mtd_info *, struct erase_info *);
63static void cfi_intelext_sync (struct mtd_info *);
69423d99
AH
64static int cfi_intelext_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len);
65static int cfi_intelext_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len);
8048d2fc 66#ifdef CONFIG_MTD_OTP
f77814dd
NP
67static int cfi_intelext_read_fact_prot_reg (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
68static int cfi_intelext_read_user_prot_reg (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
69static int cfi_intelext_write_user_prot_reg (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
70static int cfi_intelext_lock_user_prot_reg (struct mtd_info *, loff_t, size_t);
71static int cfi_intelext_get_fact_prot_info (struct mtd_info *,
72 struct otp_info *, size_t);
73static int cfi_intelext_get_user_prot_info (struct mtd_info *,
74 struct otp_info *, size_t);
8048d2fc 75#endif
1da177e4
LT
76static int cfi_intelext_suspend (struct mtd_info *);
77static void cfi_intelext_resume (struct mtd_info *);
963a6fb0 78static int cfi_intelext_reboot (struct notifier_block *, unsigned long, void *);
1da177e4
LT
79
80static void cfi_intelext_destroy(struct mtd_info *);
81
82struct mtd_info *cfi_cmdset_0001(struct map_info *, int);
83
84static struct mtd_info *cfi_intelext_setup (struct mtd_info *);
85static int cfi_intelext_partition_fixup(struct mtd_info *, struct cfi_private **);
86
87static int cfi_intelext_point (struct mtd_info *mtd, loff_t from, size_t len,
a98889f3
JH
88 size_t *retlen, void **virt, resource_size_t *phys);
89static void cfi_intelext_unpoint(struct mtd_info *mtd, loff_t from, size_t len);
1da177e4 90
5a37cf19 91static int chip_ready (struct map_info *map, struct flchip *chip, unsigned long adr, int mode);
1da177e4
LT
92static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr, int mode);
93static void put_chip(struct map_info *map, struct flchip *chip, unsigned long adr);
94#include "fwh_lock.h"
95
96
97
98/*
99 * *********** SETUP AND PROBE BITS ***********
100 */
101
102static struct mtd_chip_driver cfi_intelext_chipdrv = {
103 .probe = NULL, /* Not usable directly */
104 .destroy = cfi_intelext_destroy,
105 .name = "cfi_cmdset_0001",
106 .module = THIS_MODULE
107};
108
109/* #define DEBUG_LOCK_BITS */
110/* #define DEBUG_CFI_FEATURES */
111
112#ifdef DEBUG_CFI_FEATURES
113static void cfi_tell_features(struct cfi_pri_intelext *extp)
114{
115 int i;
638d9838 116 printk(" Extended Query version %c.%c\n", extp->MajorVersion, extp->MinorVersion);
1da177e4
LT
117 printk(" Feature/Command Support: %4.4X\n", extp->FeatureSupport);
118 printk(" - Chip Erase: %s\n", extp->FeatureSupport&1?"supported":"unsupported");
119 printk(" - Suspend Erase: %s\n", extp->FeatureSupport&2?"supported":"unsupported");
120 printk(" - Suspend Program: %s\n", extp->FeatureSupport&4?"supported":"unsupported");
121 printk(" - Legacy Lock/Unlock: %s\n", extp->FeatureSupport&8?"supported":"unsupported");
122 printk(" - Queued Erase: %s\n", extp->FeatureSupport&16?"supported":"unsupported");
123 printk(" - Instant block lock: %s\n", extp->FeatureSupport&32?"supported":"unsupported");
124 printk(" - Protection Bits: %s\n", extp->FeatureSupport&64?"supported":"unsupported");
125 printk(" - Page-mode read: %s\n", extp->FeatureSupport&128?"supported":"unsupported");
126 printk(" - Synchronous read: %s\n", extp->FeatureSupport&256?"supported":"unsupported");
127 printk(" - Simultaneous operations: %s\n", extp->FeatureSupport&512?"supported":"unsupported");
638d9838
NP
128 printk(" - Extended Flash Array: %s\n", extp->FeatureSupport&1024?"supported":"unsupported");
129 for (i=11; i<32; i++) {
1f948b43 130 if (extp->FeatureSupport & (1<<i))
1da177e4
LT
131 printk(" - Unknown Bit %X: supported\n", i);
132 }
1f948b43 133
1da177e4
LT
134 printk(" Supported functions after Suspend: %2.2X\n", extp->SuspendCmdSupport);
135 printk(" - Program after Erase Suspend: %s\n", extp->SuspendCmdSupport&1?"supported":"unsupported");
136 for (i=1; i<8; i++) {
137 if (extp->SuspendCmdSupport & (1<<i))
138 printk(" - Unknown Bit %X: supported\n", i);
139 }
1f948b43 140
1da177e4
LT
141 printk(" Block Status Register Mask: %4.4X\n", extp->BlkStatusRegMask);
142 printk(" - Lock Bit Active: %s\n", extp->BlkStatusRegMask&1?"yes":"no");
638d9838
NP
143 printk(" - Lock-Down Bit Active: %s\n", extp->BlkStatusRegMask&2?"yes":"no");
144 for (i=2; i<3; i++) {
1da177e4
LT
145 if (extp->BlkStatusRegMask & (1<<i))
146 printk(" - Unknown Bit %X Active: yes\n",i);
147 }
638d9838
NP
148 printk(" - EFA Lock Bit: %s\n", extp->BlkStatusRegMask&16?"yes":"no");
149 printk(" - EFA Lock-Down Bit: %s\n", extp->BlkStatusRegMask&32?"yes":"no");
150 for (i=6; i<16; i++) {
151 if (extp->BlkStatusRegMask & (1<<i))
152 printk(" - Unknown Bit %X Active: yes\n",i);
153 }
154
1f948b43 155 printk(" Vcc Logic Supply Optimum Program/Erase Voltage: %d.%d V\n",
1da177e4
LT
156 extp->VccOptimal >> 4, extp->VccOptimal & 0xf);
157 if (extp->VppOptimal)
1f948b43 158 printk(" Vpp Programming Supply Optimum Program/Erase Voltage: %d.%d V\n",
1da177e4
LT
159 extp->VppOptimal >> 4, extp->VppOptimal & 0xf);
160}
161#endif
162
d10a39d1
HCE
163/* Atmel chips don't use the same PRI format as Intel chips */
164static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
165{
166 struct map_info *map = mtd->priv;
167 struct cfi_private *cfi = map->fldrv_priv;
168 struct cfi_pri_intelext *extp = cfi->cmdset_priv;
169 struct cfi_pri_atmel atmel_pri;
170 uint32_t features = 0;
171
172 /* Reverse byteswapping */
173 extp->FeatureSupport = cpu_to_le32(extp->FeatureSupport);
174 extp->BlkStatusRegMask = cpu_to_le16(extp->BlkStatusRegMask);
175 extp->ProtRegAddr = cpu_to_le16(extp->ProtRegAddr);
176
177 memcpy(&atmel_pri, extp, sizeof(atmel_pri));
178 memset((char *)extp + 5, 0, sizeof(*extp) - 5);
179
180 printk(KERN_ERR "atmel Features: %02x\n", atmel_pri.Features);
181
182 if (atmel_pri.Features & 0x01) /* chip erase supported */
183 features |= (1<<0);
184 if (atmel_pri.Features & 0x02) /* erase suspend supported */
185 features |= (1<<1);
186 if (atmel_pri.Features & 0x04) /* program suspend supported */
187 features |= (1<<2);
188 if (atmel_pri.Features & 0x08) /* simultaneous operations supported */
189 features |= (1<<9);
190 if (atmel_pri.Features & 0x20) /* page mode read supported */
191 features |= (1<<7);
192 if (atmel_pri.Features & 0x40) /* queued erase supported */
193 features |= (1<<4);
194 if (atmel_pri.Features & 0x80) /* Protection bits supported */
195 features |= (1<<6);
196
197 extp->FeatureSupport = features;
198
199 /* burst write mode not supported */
200 cfi->cfiq->BufWriteTimeoutTyp = 0;
201 cfi->cfiq->BufWriteTimeoutMax = 0;
202}
203
8dbaea4b
HCE
204static void fixup_at49bv640dx_lock(struct mtd_info *mtd, void *param)
205{
206 struct map_info *map = mtd->priv;
207 struct cfi_private *cfi = map->fldrv_priv;
208 struct cfi_pri_intelext *cfip = cfi->cmdset_priv;
209
210 cfip->FeatureSupport |= (1 << 5);
211 mtd->flags |= MTD_POWERUP_LOCK;
212}
213
1da177e4 214#ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
1f948b43 215/* Some Intel Strata Flash prior to FPO revision C has bugs in this area */
1da177e4
LT
216static void fixup_intel_strataflash(struct mtd_info *mtd, void* param)
217{
218 struct map_info *map = mtd->priv;
219 struct cfi_private *cfi = map->fldrv_priv;
91949d64 220 struct cfi_pri_intelext *extp = cfi->cmdset_priv;
1da177e4
LT
221
222 printk(KERN_WARNING "cfi_cmdset_0001: Suspend "
223 "erase on write disabled.\n");
224 extp->SuspendCmdSupport &= ~1;
225}
226#endif
227
228#ifdef CMDSET0001_DISABLE_WRITE_SUSPEND
229static void fixup_no_write_suspend(struct mtd_info *mtd, void* param)
230{
231 struct map_info *map = mtd->priv;
232 struct cfi_private *cfi = map->fldrv_priv;
233 struct cfi_pri_intelext *cfip = cfi->cmdset_priv;
234
235 if (cfip && (cfip->FeatureSupport&4)) {
236 cfip->FeatureSupport &= ~4;
237 printk(KERN_WARNING "cfi_cmdset_0001: write suspend disabled\n");
238 }
239}
240#endif
241
242static void fixup_st_m28w320ct(struct mtd_info *mtd, void* param)
243{
244 struct map_info *map = mtd->priv;
245 struct cfi_private *cfi = map->fldrv_priv;
1f948b43 246
1da177e4
LT
247 cfi->cfiq->BufWriteTimeoutTyp = 0; /* Not supported */
248 cfi->cfiq->BufWriteTimeoutMax = 0; /* Not supported */
249}
250
251static void fixup_st_m28w320cb(struct mtd_info *mtd, void* param)
252{
253 struct map_info *map = mtd->priv;
254 struct cfi_private *cfi = map->fldrv_priv;
1f948b43 255
1da177e4
LT
256 /* Note this is done after the region info is endian swapped */
257 cfi->cfiq->EraseRegionInfo[1] =
258 (cfi->cfiq->EraseRegionInfo[1] & 0xffff0000) | 0x3e;
259};
260
261static void fixup_use_point(struct mtd_info *mtd, void *param)
262{
263 struct map_info *map = mtd->priv;
264 if (!mtd->point && map_is_linear(map)) {
265 mtd->point = cfi_intelext_point;
266 mtd->unpoint = cfi_intelext_unpoint;
267 }
268}
269
270static void fixup_use_write_buffers(struct mtd_info *mtd, void *param)
271{
272 struct map_info *map = mtd->priv;
273 struct cfi_private *cfi = map->fldrv_priv;
274 if (cfi->cfiq->BufWriteTimeoutTyp) {
275 printk(KERN_INFO "Using buffer write method\n" );
276 mtd->write = cfi_intelext_write_buffers;
e102d54a 277 mtd->writev = cfi_intelext_writev;
1da177e4
LT
278 }
279}
280
0ecbc81a
RG
281/*
282 * Some chips power-up with all sectors locked by default.
283 */
e619a75f 284static void fixup_unlock_powerup_lock(struct mtd_info *mtd, void *param)
0ecbc81a 285{
e619a75f
JT
286 struct map_info *map = mtd->priv;
287 struct cfi_private *cfi = map->fldrv_priv;
288 struct cfi_pri_intelext *cfip = cfi->cmdset_priv;
289
290 if (cfip->FeatureSupport&32) {
291 printk(KERN_INFO "Using auto-unlock on power-up/resume\n" );
292 mtd->flags |= MTD_POWERUP_LOCK;
293 }
0ecbc81a
RG
294}
295
1da177e4 296static struct cfi_fixup cfi_fixup_table[] = {
d10a39d1 297 { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
8dbaea4b
HCE
298 { CFI_MFR_ATMEL, AT49BV640D, fixup_at49bv640dx_lock, NULL },
299 { CFI_MFR_ATMEL, AT49BV640DT, fixup_at49bv640dx_lock, NULL },
1da177e4 300#ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
1f948b43 301 { CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash, NULL },
1da177e4
LT
302#endif
303#ifdef CMDSET0001_DISABLE_WRITE_SUSPEND
304 { CFI_MFR_ANY, CFI_ID_ANY, fixup_no_write_suspend, NULL },
305#endif
306#if !FORCE_WORD_WRITE
307 { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL },
308#endif
309 { CFI_MFR_ST, 0x00ba, /* M28W320CT */ fixup_st_m28w320ct, NULL },
310 { CFI_MFR_ST, 0x00bb, /* M28W320CB */ fixup_st_m28w320cb, NULL },
b2ef1a2b 311 { CFI_MFR_INTEL, CFI_ID_ANY, fixup_unlock_powerup_lock, NULL, },
1da177e4
LT
312 { 0, 0, NULL, NULL }
313};
314
315static struct cfi_fixup jedec_fixup_table[] = {
b2ef1a2b
HCE
316 { CFI_MFR_INTEL, I82802AB, fixup_use_fwh_lock, NULL, },
317 { CFI_MFR_INTEL, I82802AC, fixup_use_fwh_lock, NULL, },
318 { CFI_MFR_ST, M50LPW080, fixup_use_fwh_lock, NULL, },
319 { CFI_MFR_ST, M50FLW080A, fixup_use_fwh_lock, NULL, },
320 { CFI_MFR_ST, M50FLW080B, fixup_use_fwh_lock, NULL, },
1da177e4
LT
321 { 0, 0, NULL, NULL }
322};
323static struct cfi_fixup fixup_table[] = {
324 /* The CFI vendor ids and the JEDEC vendor IDs appear
325 * to be common. It is like the devices id's are as
326 * well. This table is to pick all cases where
327 * we know that is the case.
328 */
329 { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_point, NULL },
330 { 0, 0, NULL, NULL }
331};
332
ec2d0d84
DR
333static void cfi_fixup_major_minor(struct cfi_private *cfi,
334 struct cfi_pri_intelext *extp)
335{
b2ef1a2b 336 if (cfi->mfr == CFI_MFR_INTEL &&
ec2d0d84
DR
337 cfi->id == PF38F4476 && extp->MinorVersion == '3')
338 extp->MinorVersion = '1';
339}
340
1da177e4
LT
341static inline struct cfi_pri_intelext *
342read_pri_intelext(struct map_info *map, __u16 adr)
343{
ec2d0d84 344 struct cfi_private *cfi = map->fldrv_priv;
1da177e4 345 struct cfi_pri_intelext *extp;
e1b158ab 346 unsigned int extra_size = 0;
1da177e4
LT
347 unsigned int extp_size = sizeof(*extp);
348
349 again:
350 extp = (struct cfi_pri_intelext *)cfi_read_pri(map, adr, extp_size, "Intel/Sharp");
351 if (!extp)
352 return NULL;
353
ec2d0d84
DR
354 cfi_fixup_major_minor(cfi, extp);
355
d88f977b 356 if (extp->MajorVersion != '1' ||
b1c9c9be 357 (extp->MinorVersion < '0' || extp->MinorVersion > '5')) {
d88f977b
TP
358 printk(KERN_ERR " Unknown Intel/Sharp Extended Query "
359 "version %c.%c.\n", extp->MajorVersion,
360 extp->MinorVersion);
361 kfree(extp);
362 return NULL;
363 }
364
1da177e4
LT
365 /* Do some byteswapping if necessary */
366 extp->FeatureSupport = le32_to_cpu(extp->FeatureSupport);
367 extp->BlkStatusRegMask = le16_to_cpu(extp->BlkStatusRegMask);
368 extp->ProtRegAddr = le16_to_cpu(extp->ProtRegAddr);
369
e1b158ab
DR
370 if (extp->MinorVersion >= '0') {
371 extra_size = 0;
1da177e4
LT
372
373 /* Protection Register info */
72b56a2d
NP
374 extra_size += (extp->NumProtectionFields - 1) *
375 sizeof(struct cfi_intelext_otpinfo);
e1b158ab 376 }
1da177e4 377
e1b158ab 378 if (extp->MinorVersion >= '1') {
1da177e4 379 /* Burst Read info */
6f6ed056
NP
380 extra_size += 2;
381 if (extp_size < sizeof(*extp) + extra_size)
382 goto need_more;
e1b158ab
DR
383 extra_size += extp->extra[extra_size - 1];
384 }
385
386 if (extp->MinorVersion >= '3') {
387 int nb_parts, i;
1da177e4
LT
388
389 /* Number of hardware-partitions */
390 extra_size += 1;
391 if (extp_size < sizeof(*extp) + extra_size)
392 goto need_more;
393 nb_parts = extp->extra[extra_size - 1];
394
638d9838
NP
395 /* skip the sizeof(partregion) field in CFI 1.4 */
396 if (extp->MinorVersion >= '4')
397 extra_size += 2;
398
1da177e4
LT
399 for (i = 0; i < nb_parts; i++) {
400 struct cfi_intelext_regioninfo *rinfo;
401 rinfo = (struct cfi_intelext_regioninfo *)&extp->extra[extra_size];
402 extra_size += sizeof(*rinfo);
403 if (extp_size < sizeof(*extp) + extra_size)
404 goto need_more;
405 rinfo->NumIdentPartitions=le16_to_cpu(rinfo->NumIdentPartitions);
406 extra_size += (rinfo->NumBlockTypes - 1)
407 * sizeof(struct cfi_intelext_blockinfo);
408 }
409
638d9838
NP
410 if (extp->MinorVersion >= '4')
411 extra_size += sizeof(struct cfi_intelext_programming_regioninfo);
412
1da177e4
LT
413 if (extp_size < sizeof(*extp) + extra_size) {
414 need_more:
415 extp_size = sizeof(*extp) + extra_size;
416 kfree(extp);
417 if (extp_size > 4096) {
418 printk(KERN_ERR
419 "%s: cfi_pri_intelext is too fat\n",
cb53b3b9 420 __func__);
1da177e4
LT
421 return NULL;
422 }
423 goto again;
424 }
425 }
1f948b43 426
1da177e4
LT
427 return extp;
428}
429
1da177e4
LT
430struct mtd_info *cfi_cmdset_0001(struct map_info *map, int primary)
431{
432 struct cfi_private *cfi = map->fldrv_priv;
433 struct mtd_info *mtd;
434 int i;
435
95b93a0c 436 mtd = kzalloc(sizeof(*mtd), GFP_KERNEL);
1da177e4
LT
437 if (!mtd) {
438 printk(KERN_ERR "Failed to allocate memory for MTD device\n");
439 return NULL;
440 }
1da177e4
LT
441 mtd->priv = map;
442 mtd->type = MTD_NORFLASH;
443
444 /* Fill in the default mtd operations */
445 mtd->erase = cfi_intelext_erase_varsize;
446 mtd->read = cfi_intelext_read;
447 mtd->write = cfi_intelext_write_words;
448 mtd->sync = cfi_intelext_sync;
449 mtd->lock = cfi_intelext_lock;
450 mtd->unlock = cfi_intelext_unlock;
451 mtd->suspend = cfi_intelext_suspend;
452 mtd->resume = cfi_intelext_resume;
453 mtd->flags = MTD_CAP_NORFLASH;
454 mtd->name = map->name;
17ffc7ba 455 mtd->writesize = 1;
963a6fb0
NP
456
457 mtd->reboot_notifier.notifier_call = cfi_intelext_reboot;
458
1da177e4 459 if (cfi->cfi_mode == CFI_MODE_CFI) {
1f948b43 460 /*
1da177e4
LT
461 * It's a real CFI chip, not one for which the probe
462 * routine faked a CFI structure. So we read the feature
463 * table from it.
464 */
465 __u16 adr = primary?cfi->cfiq->P_ADR:cfi->cfiq->A_ADR;
466 struct cfi_pri_intelext *extp;
467
468 extp = read_pri_intelext(map, adr);
469 if (!extp) {
470 kfree(mtd);
471 return NULL;
472 }
473
474 /* Install our own private info structure */
1f948b43 475 cfi->cmdset_priv = extp;
1da177e4
LT
476
477 cfi_fixup(mtd, cfi_fixup_table);
478
479#ifdef DEBUG_CFI_FEATURES
480 /* Tell the user about it in lots of lovely detail */
481 cfi_tell_features(extp);
1f948b43 482#endif
1da177e4
LT
483
484 if(extp->SuspendCmdSupport & 1) {
485 printk(KERN_NOTICE "cfi_cmdset_0001: Erase suspend on write enabled\n");
486 }
487 }
488 else if (cfi->cfi_mode == CFI_MODE_JEDEC) {
489 /* Apply jedec specific fixups */
490 cfi_fixup(mtd, jedec_fixup_table);
491 }
492 /* Apply generic fixups */
493 cfi_fixup(mtd, fixup_table);
494
495 for (i=0; i< cfi->numchips; i++) {
2a5bd596
DW
496 if (cfi->cfiq->WordWriteTimeoutTyp)
497 cfi->chips[i].word_write_time =
498 1<<cfi->cfiq->WordWriteTimeoutTyp;
499 else
500 cfi->chips[i].word_write_time = 50000;
501
502 if (cfi->cfiq->BufWriteTimeoutTyp)
503 cfi->chips[i].buffer_write_time =
504 1<<cfi->cfiq->BufWriteTimeoutTyp;
505 /* No default; if it isn't specified, we won't use it */
506
507 if (cfi->cfiq->BlockEraseTimeoutTyp)
508 cfi->chips[i].erase_time =
509 1000<<cfi->cfiq->BlockEraseTimeoutTyp;
510 else
511 cfi->chips[i].erase_time = 2000000;
512
e93cafe4
AG
513 if (cfi->cfiq->WordWriteTimeoutTyp &&
514 cfi->cfiq->WordWriteTimeoutMax)
515 cfi->chips[i].word_write_time_max =
516 1<<(cfi->cfiq->WordWriteTimeoutTyp +
517 cfi->cfiq->WordWriteTimeoutMax);
518 else
519 cfi->chips[i].word_write_time_max = 50000 * 8;
520
521 if (cfi->cfiq->BufWriteTimeoutTyp &&
522 cfi->cfiq->BufWriteTimeoutMax)
523 cfi->chips[i].buffer_write_time_max =
524 1<<(cfi->cfiq->BufWriteTimeoutTyp +
525 cfi->cfiq->BufWriteTimeoutMax);
526
527 if (cfi->cfiq->BlockEraseTimeoutTyp &&
528 cfi->cfiq->BlockEraseTimeoutMax)
529 cfi->chips[i].erase_time_max =
530 1000<<(cfi->cfiq->BlockEraseTimeoutTyp +
531 cfi->cfiq->BlockEraseTimeoutMax);
532 else
533 cfi->chips[i].erase_time_max = 2000000 * 8;
534
1da177e4 535 cfi->chips[i].ref_point_counter = 0;
c314b6f1 536 init_waitqueue_head(&(cfi->chips[i].wq));
1f948b43 537 }
1da177e4
LT
538
539 map->fldrv = &cfi_intelext_chipdrv;
1f948b43 540
1da177e4
LT
541 return cfi_intelext_setup(mtd);
542}
a15bdeef
DW
543struct mtd_info *cfi_cmdset_0003(struct map_info *map, int primary) __attribute__((alias("cfi_cmdset_0001")));
544struct mtd_info *cfi_cmdset_0200(struct map_info *map, int primary) __attribute__((alias("cfi_cmdset_0001")));
545EXPORT_SYMBOL_GPL(cfi_cmdset_0001);
546EXPORT_SYMBOL_GPL(cfi_cmdset_0003);
547EXPORT_SYMBOL_GPL(cfi_cmdset_0200);
1da177e4
LT
548
549static struct mtd_info *cfi_intelext_setup(struct mtd_info *mtd)
550{
551 struct map_info *map = mtd->priv;
552 struct cfi_private *cfi = map->fldrv_priv;
553 unsigned long offset = 0;
554 int i,j;
555 unsigned long devsize = (1<<cfi->cfiq->DevSize) * cfi->interleave;
556
557 //printk(KERN_DEBUG "number of CFI chips: %d\n", cfi->numchips);
558
559 mtd->size = devsize * cfi->numchips;
560
561 mtd->numeraseregions = cfi->cfiq->NumEraseRegions * cfi->numchips;
1f948b43 562 mtd->eraseregions = kmalloc(sizeof(struct mtd_erase_region_info)
1da177e4 563 * mtd->numeraseregions, GFP_KERNEL);
1f948b43 564 if (!mtd->eraseregions) {
1da177e4
LT
565 printk(KERN_ERR "Failed to allocate memory for MTD erase region info\n");
566 goto setup_err;
567 }
1f948b43 568
1da177e4
LT
569 for (i=0; i<cfi->cfiq->NumEraseRegions; i++) {
570 unsigned long ernum, ersize;
571 ersize = ((cfi->cfiq->EraseRegionInfo[i] >> 8) & ~0xff) * cfi->interleave;
572 ernum = (cfi->cfiq->EraseRegionInfo[i] & 0xffff) + 1;
573
574 if (mtd->erasesize < ersize) {
575 mtd->erasesize = ersize;
576 }
577 for (j=0; j<cfi->numchips; j++) {
578 mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].offset = (j*devsize)+offset;
579 mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].erasesize = ersize;
580 mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].numblocks = ernum;
0ecbc81a 581 mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].lockmap = kmalloc(ernum / 8 + 1, GFP_KERNEL);
1da177e4
LT
582 }
583 offset += (ersize * ernum);
584 }
585
586 if (offset != devsize) {
587 /* Argh */
588 printk(KERN_WARNING "Sum of regions (%lx) != total size of set of interleaved chips (%lx)\n", offset, devsize);
589 goto setup_err;
590 }
591
592 for (i=0; i<mtd->numeraseregions;i++){
69423d99
AH
593 printk(KERN_DEBUG "erase region %d: offset=0x%llx,size=0x%x,blocks=%d\n",
594 i,(unsigned long long)mtd->eraseregions[i].offset,
1da177e4
LT
595 mtd->eraseregions[i].erasesize,
596 mtd->eraseregions[i].numblocks);
597 }
598
f77814dd 599#ifdef CONFIG_MTD_OTP
1da177e4 600 mtd->read_fact_prot_reg = cfi_intelext_read_fact_prot_reg;
f77814dd
NP
601 mtd->read_user_prot_reg = cfi_intelext_read_user_prot_reg;
602 mtd->write_user_prot_reg = cfi_intelext_write_user_prot_reg;
603 mtd->lock_user_prot_reg = cfi_intelext_lock_user_prot_reg;
604 mtd->get_fact_prot_info = cfi_intelext_get_fact_prot_info;
605 mtd->get_user_prot_info = cfi_intelext_get_user_prot_info;
1da177e4
LT
606#endif
607
608 /* This function has the potential to distort the reality
609 a bit and therefore should be called last. */
610 if (cfi_intelext_partition_fixup(mtd, &cfi) != 0)
611 goto setup_err;
612
613 __module_get(THIS_MODULE);
963a6fb0 614 register_reboot_notifier(&mtd->reboot_notifier);
1da177e4
LT
615 return mtd;
616
617 setup_err:
17fabf15
JS
618 kfree(mtd->eraseregions);
619 kfree(mtd);
1da177e4
LT
620 kfree(cfi->cmdset_priv);
621 return NULL;
622}
623
624static int cfi_intelext_partition_fixup(struct mtd_info *mtd,
625 struct cfi_private **pcfi)
626{
627 struct map_info *map = mtd->priv;
628 struct cfi_private *cfi = *pcfi;
629 struct cfi_pri_intelext *extp = cfi->cmdset_priv;
630
631 /*
8f1a866f 632 * Probing of multi-partition flash chips.
1da177e4
LT
633 *
634 * To support multiple partitions when available, we simply arrange
635 * for each of them to have their own flchip structure even if they
636 * are on the same physical chip. This means completely recreating
637 * a new cfi_private structure right here which is a blatent code
638 * layering violation, but this is still the least intrusive
639 * arrangement at this point. This can be rearranged in the future
640 * if someone feels motivated enough. --nico
641 */
638d9838 642 if (extp && extp->MajorVersion == '1' && extp->MinorVersion >= '3'
1da177e4
LT
643 && extp->FeatureSupport & (1 << 9)) {
644 struct cfi_private *newcfi;
645 struct flchip *chip;
646 struct flchip_shared *shared;
647 int offs, numregions, numparts, partshift, numvirtchips, i, j;
648
649 /* Protection Register info */
72b56a2d
NP
650 offs = (extp->NumProtectionFields - 1) *
651 sizeof(struct cfi_intelext_otpinfo);
1da177e4
LT
652
653 /* Burst Read info */
6f6ed056 654 offs += extp->extra[offs+1]+2;
1da177e4
LT
655
656 /* Number of partition regions */
657 numregions = extp->extra[offs];
658 offs += 1;
659
638d9838
NP
660 /* skip the sizeof(partregion) field in CFI 1.4 */
661 if (extp->MinorVersion >= '4')
662 offs += 2;
663
1da177e4
LT
664 /* Number of hardware partitions */
665 numparts = 0;
666 for (i = 0; i < numregions; i++) {
667 struct cfi_intelext_regioninfo *rinfo;
668 rinfo = (struct cfi_intelext_regioninfo *)&extp->extra[offs];
669 numparts += rinfo->NumIdentPartitions;
670 offs += sizeof(*rinfo)
671 + (rinfo->NumBlockTypes - 1) *
672 sizeof(struct cfi_intelext_blockinfo);
673 }
674
fe224668
TK
675 if (!numparts)
676 numparts = 1;
677
638d9838
NP
678 /* Programming Region info */
679 if (extp->MinorVersion >= '4') {
680 struct cfi_intelext_programming_regioninfo *prinfo;
681 prinfo = (struct cfi_intelext_programming_regioninfo *)&extp->extra[offs];
28318776 682 mtd->writesize = cfi->interleave << prinfo->ProgRegShift;
5fa43394 683 mtd->flags &= ~MTD_BIT_WRITEABLE;
638d9838 684 printk(KERN_DEBUG "%s: program region size/ctrl_valid/ctrl_inval = %d/%d/%d\n",
28318776 685 map->name, mtd->writesize,
d4160855
AB
686 cfi->interleave * prinfo->ControlValid,
687 cfi->interleave * prinfo->ControlInvalid);
638d9838
NP
688 }
689
1da177e4
LT
690 /*
691 * All functions below currently rely on all chips having
692 * the same geometry so we'll just assume that all hardware
693 * partitions are of the same size too.
694 */
695 partshift = cfi->chipshift - __ffs(numparts);
696
697 if ((1 << partshift) < mtd->erasesize) {
698 printk( KERN_ERR
699 "%s: bad number of hw partitions (%d)\n",
cb53b3b9 700 __func__, numparts);
1da177e4
LT
701 return -EINVAL;
702 }
703
704 numvirtchips = cfi->numchips * numparts;
705 newcfi = kmalloc(sizeof(struct cfi_private) + numvirtchips * sizeof(struct flchip), GFP_KERNEL);
706 if (!newcfi)
707 return -ENOMEM;
708 shared = kmalloc(sizeof(struct flchip_shared) * cfi->numchips, GFP_KERNEL);
709 if (!shared) {
710 kfree(newcfi);
711 return -ENOMEM;
712 }
713 memcpy(newcfi, cfi, sizeof(struct cfi_private));
714 newcfi->numchips = numvirtchips;
715 newcfi->chipshift = partshift;
716
717 chip = &newcfi->chips[0];
718 for (i = 0; i < cfi->numchips; i++) {
719 shared[i].writing = shared[i].erasing = NULL;
720 spin_lock_init(&shared[i].lock);
721 for (j = 0; j < numparts; j++) {
722 *chip = cfi->chips[i];
723 chip->start += j << partshift;
724 chip->priv = &shared[i];
725 /* those should be reset too since
726 they create memory references. */
727 init_waitqueue_head(&chip->wq);
c4e77376 728 mutex_init(&chip->mutex);
1da177e4
LT
729 chip++;
730 }
731 }
732
733 printk(KERN_DEBUG "%s: %d set(s) of %d interleaved chips "
734 "--> %d partitions of %d KiB\n",
735 map->name, cfi->numchips, cfi->interleave,
736 newcfi->numchips, 1<<(newcfi->chipshift-10));
737
738 map->fldrv_priv = newcfi;
739 *pcfi = newcfi;
740 kfree(cfi);
741 }
742
743 return 0;
744}
745
746/*
747 * *********** CHIP ACCESS FUNCTIONS ***********
748 */
5a37cf19 749static int chip_ready (struct map_info *map, struct flchip *chip, unsigned long adr, int mode)
1da177e4
LT
750{
751 DECLARE_WAITQUEUE(wait, current);
752 struct cfi_private *cfi = map->fldrv_priv;
753 map_word status, status_OK = CMD(0x80), status_PWS = CMD(0x01);
1da177e4 754 struct cfi_pri_intelext *cfip = cfi->cmdset_priv;
5a37cf19 755 unsigned long timeo = jiffies + HZ;
1da177e4 756
3afe7eb3
AB
757 /* Prevent setting state FL_SYNCING for chip in suspended state. */
758 if (mode == FL_SYNCING && chip->oldstate != FL_READY)
759 goto sleep;
760
1da177e4
LT
761 switch (chip->state) {
762
763 case FL_STATUS:
764 for (;;) {
765 status = map_read(map, adr);
766 if (map_word_andequal(map, status, status_OK, status_OK))
767 break;
768
769 /* At this point we're fine with write operations
770 in other partitions as they don't conflict. */
771 if (chip->priv && map_word_andequal(map, status, status_PWS, status_PWS))
772 break;
773
c4e77376 774 mutex_unlock(&chip->mutex);
1da177e4 775 cfi_udelay(1);
c4e77376 776 mutex_lock(&chip->mutex);
1da177e4 777 /* Someone else might have been playing with it. */
5a37cf19 778 return -EAGAIN;
1da177e4 779 }
fb6d080c 780 /* Fall through */
1da177e4
LT
781 case FL_READY:
782 case FL_CFI_QUERY:
783 case FL_JEDEC_QUERY:
784 return 0;
785
786 case FL_ERASING:
787 if (!cfip ||
788 !(cfip->FeatureSupport & 2) ||
789 !(mode == FL_READY || mode == FL_POINT ||
790 (mode == FL_WRITING && (cfip->SuspendCmdSupport & 1))))
791 goto sleep;
792
793
794 /* Erase suspend */
795 map_write(map, CMD(0xB0), adr);
796
797 /* If the flash has finished erasing, then 'erase suspend'
798 * appears to make some (28F320) flash devices switch to
799 * 'read' mode. Make sure that we switch to 'read status'
800 * mode so we get the right data. --rmk
801 */
802 map_write(map, CMD(0x70), adr);
803 chip->oldstate = FL_ERASING;
804 chip->state = FL_ERASE_SUSPENDING;
805 chip->erase_suspended = 1;
806 for (;;) {
807 status = map_read(map, adr);
808 if (map_word_andequal(map, status, status_OK, status_OK))
809 break;
810
811 if (time_after(jiffies, timeo)) {
812 /* Urgh. Resume and pretend we weren't here. */
813 map_write(map, CMD(0xd0), adr);
814 /* Make sure we're in 'read status' mode if it had finished */
815 map_write(map, CMD(0x70), adr);
816 chip->state = FL_ERASING;
817 chip->oldstate = FL_READY;
4843653c
NP
818 printk(KERN_ERR "%s: Chip not ready after erase "
819 "suspended: status = 0x%lx\n", map->name, status.x[0]);
1da177e4
LT
820 return -EIO;
821 }
822
c4e77376 823 mutex_unlock(&chip->mutex);
1da177e4 824 cfi_udelay(1);
c4e77376 825 mutex_lock(&chip->mutex);
1da177e4
LT
826 /* Nobody will touch it while it's in state FL_ERASE_SUSPENDING.
827 So we can just loop here. */
828 }
829 chip->state = FL_STATUS;
830 return 0;
831
832 case FL_XIP_WHILE_ERASING:
833 if (mode != FL_READY && mode != FL_POINT &&
834 (mode != FL_WRITING || !cfip || !(cfip->SuspendCmdSupport&1)))
835 goto sleep;
836 chip->oldstate = chip->state;
837 chip->state = FL_READY;
838 return 0;
839
fb6d080c
AK
840 case FL_SHUTDOWN:
841 /* The machine is rebooting now,so no one can get chip anymore */
842 return -EIO;
1da177e4
LT
843 case FL_POINT:
844 /* Only if there's no operation suspended... */
845 if (mode == FL_READY && chip->oldstate == FL_READY)
846 return 0;
fb6d080c 847 /* Fall through */
1da177e4
LT
848 default:
849 sleep:
850 set_current_state(TASK_UNINTERRUPTIBLE);
851 add_wait_queue(&chip->wq, &wait);
c4e77376 852 mutex_unlock(&chip->mutex);
1da177e4
LT
853 schedule();
854 remove_wait_queue(&chip->wq, &wait);
c4e77376 855 mutex_lock(&chip->mutex);
5a37cf19
AK
856 return -EAGAIN;
857 }
858}
859
860static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr, int mode)
861{
862 int ret;
6c24e416 863 DECLARE_WAITQUEUE(wait, current);
5a37cf19
AK
864
865 retry:
3afe7eb3
AB
866 if (chip->priv &&
867 (mode == FL_WRITING || mode == FL_ERASING || mode == FL_OTP_WRITE
868 || mode == FL_SHUTDOWN) && chip->state != FL_SYNCING) {
5a37cf19
AK
869 /*
870 * OK. We have possibility for contention on the write/erase
871 * operations which are global to the real chip and not per
872 * partition. So let's fight it over in the partition which
873 * currently has authority on the operation.
874 *
875 * The rules are as follows:
876 *
877 * - any write operation must own shared->writing.
878 *
879 * - any erase operation must own _both_ shared->writing and
880 * shared->erasing.
881 *
882 * - contention arbitration is handled in the owner's context.
883 *
884 * The 'shared' struct can be read and/or written only when
885 * its lock is taken.
886 */
887 struct flchip_shared *shared = chip->priv;
888 struct flchip *contender;
889 spin_lock(&shared->lock);
890 contender = shared->writing;
891 if (contender && contender != chip) {
892 /*
893 * The engine to perform desired operation on this
894 * partition is already in use by someone else.
895 * Let's fight over it in the context of the chip
896 * currently using it. If it is possible to suspend,
897 * that other partition will do just that, otherwise
898 * it'll happily send us to sleep. In any case, when
899 * get_chip returns success we're clear to go ahead.
900 */
c4e77376 901 ret = mutex_trylock(&contender->mutex);
5a37cf19
AK
902 spin_unlock(&shared->lock);
903 if (!ret)
904 goto retry;
c4e77376 905 mutex_unlock(&chip->mutex);
5a37cf19 906 ret = chip_ready(map, contender, contender->start, mode);
c4e77376 907 mutex_lock(&chip->mutex);
5a37cf19
AK
908
909 if (ret == -EAGAIN) {
c4e77376 910 mutex_unlock(&contender->mutex);
5a37cf19
AK
911 goto retry;
912 }
913 if (ret) {
c4e77376 914 mutex_unlock(&contender->mutex);
5a37cf19
AK
915 return ret;
916 }
917 spin_lock(&shared->lock);
3afe7eb3
AB
918
919 /* We should not own chip if it is already
920 * in FL_SYNCING state. Put contender and retry. */
921 if (chip->state == FL_SYNCING) {
922 put_chip(map, contender, contender->start);
c4e77376 923 mutex_unlock(&contender->mutex);
3afe7eb3
AB
924 goto retry;
925 }
c4e77376 926 mutex_unlock(&contender->mutex);
5a37cf19
AK
927 }
928
6c24e416
AB
929 /* Check if we already have suspended erase
930 * on this chip. Sleep. */
931 if (mode == FL_ERASING && shared->erasing
932 && shared->erasing->oldstate == FL_ERASING) {
933 spin_unlock(&shared->lock);
934 set_current_state(TASK_UNINTERRUPTIBLE);
935 add_wait_queue(&chip->wq, &wait);
c4e77376 936 mutex_unlock(&chip->mutex);
6c24e416
AB
937 schedule();
938 remove_wait_queue(&chip->wq, &wait);
c4e77376 939 mutex_lock(&chip->mutex);
6c24e416
AB
940 goto retry;
941 }
942
5a37cf19
AK
943 /* We now own it */
944 shared->writing = chip;
945 if (mode == FL_ERASING)
946 shared->erasing = chip;
947 spin_unlock(&shared->lock);
1da177e4 948 }
5a37cf19
AK
949 ret = chip_ready(map, chip, adr, mode);
950 if (ret == -EAGAIN)
951 goto retry;
952
953 return ret;
1da177e4
LT
954}
955
956static void put_chip(struct map_info *map, struct flchip *chip, unsigned long adr)
957{
958 struct cfi_private *cfi = map->fldrv_priv;
959
960 if (chip->priv) {
961 struct flchip_shared *shared = chip->priv;
962 spin_lock(&shared->lock);
963 if (shared->writing == chip && chip->oldstate == FL_READY) {
964 /* We own the ability to write, but we're done */
965 shared->writing = shared->erasing;
966 if (shared->writing && shared->writing != chip) {
967 /* give back ownership to who we loaned it from */
968 struct flchip *loaner = shared->writing;
c4e77376 969 mutex_lock(&loaner->mutex);
1da177e4 970 spin_unlock(&shared->lock);
c4e77376 971 mutex_unlock(&chip->mutex);
1da177e4 972 put_chip(map, loaner, loaner->start);
c4e77376
SS
973 mutex_lock(&chip->mutex);
974 mutex_unlock(&loaner->mutex);
1da177e4
LT
975 wake_up(&chip->wq);
976 return;
977 }
978 shared->erasing = NULL;
979 shared->writing = NULL;
980 } else if (shared->erasing == chip && shared->writing != chip) {
981 /*
982 * We own the ability to erase without the ability
983 * to write, which means the erase was suspended
984 * and some other partition is currently writing.
985 * Don't let the switch below mess things up since
986 * we don't have ownership to resume anything.
987 */
988 spin_unlock(&shared->lock);
989 wake_up(&chip->wq);
990 return;
991 }
992 spin_unlock(&shared->lock);
993 }
994
995 switch(chip->oldstate) {
996 case FL_ERASING:
997 chip->state = chip->oldstate;
1f948b43 998 /* What if one interleaved chip has finished and the
1da177e4 999 other hasn't? The old code would leave the finished
1f948b43 1000 one in READY mode. That's bad, and caused -EROFS
1da177e4
LT
1001 errors to be returned from do_erase_oneblock because
1002 that's the only bit it checked for at the time.
1f948b43 1003 As the state machine appears to explicitly allow
1da177e4 1004 sending the 0x70 (Read Status) command to an erasing
1f948b43 1005 chip and expecting it to be ignored, that's what we
1da177e4
LT
1006 do. */
1007 map_write(map, CMD(0xd0), adr);
1008 map_write(map, CMD(0x70), adr);
1009 chip->oldstate = FL_READY;
1010 chip->state = FL_ERASING;
1011 break;
1012
1013 case FL_XIP_WHILE_ERASING:
1014 chip->state = chip->oldstate;
1015 chip->oldstate = FL_READY;
1016 break;
1017
1018 case FL_READY:
1019 case FL_STATUS:
1020 case FL_JEDEC_QUERY:
1021 /* We should really make set_vpp() count, rather than doing this */
1022 DISABLE_VPP(map);
1023 break;
1024 default:
4843653c 1025 printk(KERN_ERR "%s: put_chip() called with oldstate %d!!\n", map->name, chip->oldstate);
1da177e4
LT
1026 }
1027 wake_up(&chip->wq);
1028}
1029
1030#ifdef CONFIG_MTD_XIP
1031
1032/*
1033 * No interrupt what so ever can be serviced while the flash isn't in array
1034 * mode. This is ensured by the xip_disable() and xip_enable() functions
1035 * enclosing any code path where the flash is known not to be in array mode.
1036 * And within a XIP disabled code path, only functions marked with __xipram
1037 * may be called and nothing else (it's a good thing to inspect generated
1038 * assembly to make sure inline functions were actually inlined and that gcc
1039 * didn't emit calls to its own support functions). Also configuring MTD CFI
1040 * support to a single buswidth and a single interleave is also recommended.
1da177e4
LT
1041 */
1042
1043static void xip_disable(struct map_info *map, struct flchip *chip,
1044 unsigned long adr)
1045{
1046 /* TODO: chips with no XIP use should ignore and return */
1047 (void) map_read(map, adr); /* ensure mmu mapping is up to date */
1da177e4
LT
1048 local_irq_disable();
1049}
1050
1051static void __xipram xip_enable(struct map_info *map, struct flchip *chip,
1052 unsigned long adr)
1053{
1054 struct cfi_private *cfi = map->fldrv_priv;
1055 if (chip->state != FL_POINT && chip->state != FL_READY) {
1056 map_write(map, CMD(0xff), adr);
1057 chip->state = FL_READY;
1058 }
1059 (void) map_read(map, adr);
97f927a4 1060 xip_iprefetch();
1da177e4 1061 local_irq_enable();
1da177e4
LT
1062}
1063
1064/*
1065 * When a delay is required for the flash operation to complete, the
c172471b
NP
1066 * xip_wait_for_operation() function is polling for both the given timeout
1067 * and pending (but still masked) hardware interrupts. Whenever there is an
1068 * interrupt pending then the flash erase or write operation is suspended,
1069 * array mode restored and interrupts unmasked. Task scheduling might also
1070 * happen at that point. The CPU eventually returns from the interrupt or
1071 * the call to schedule() and the suspended flash operation is resumed for
1072 * the remaining of the delay period.
1da177e4
LT
1073 *
1074 * Warning: this function _will_ fool interrupt latency tracing tools.
1075 */
1076
c172471b
NP
1077static int __xipram xip_wait_for_operation(
1078 struct map_info *map, struct flchip *chip,
e93cafe4 1079 unsigned long adr, unsigned int chip_op_time_max)
1da177e4
LT
1080{
1081 struct cfi_private *cfi = map->fldrv_priv;
1082 struct cfi_pri_intelext *cfip = cfi->cmdset_priv;
1083 map_word status, OK = CMD(0x80);
c172471b 1084 unsigned long usec, suspended, start, done;
1da177e4
LT
1085 flstate_t oldstate, newstate;
1086
c172471b 1087 start = xip_currtime();
e93cafe4 1088 usec = chip_op_time_max;
c172471b
NP
1089 if (usec == 0)
1090 usec = 500000;
1091 done = 0;
1092
1da177e4
LT
1093 do {
1094 cpu_relax();
1095 if (xip_irqpending() && cfip &&
1096 ((chip->state == FL_ERASING && (cfip->FeatureSupport&2)) ||
1097 (chip->state == FL_WRITING && (cfip->FeatureSupport&4))) &&
1098 (cfi_interleave_is_1(cfi) || chip->oldstate == FL_READY)) {
1099 /*
1100 * Let's suspend the erase or write operation when
1101 * supported. Note that we currently don't try to
1102 * suspend interleaved chips if there is already
1103 * another operation suspended (imagine what happens
1104 * when one chip was already done with the current
1105 * operation while another chip suspended it, then
1106 * we resume the whole thing at once). Yes, it
1107 * can happen!
1108 */
c172471b 1109 usec -= done;
1da177e4
LT
1110 map_write(map, CMD(0xb0), adr);
1111 map_write(map, CMD(0x70), adr);
1da177e4
LT
1112 suspended = xip_currtime();
1113 do {
1114 if (xip_elapsed_since(suspended) > 100000) {
1115 /*
1116 * The chip doesn't want to suspend
1117 * after waiting for 100 msecs.
1118 * This is a critical error but there
1119 * is not much we can do here.
1120 */
c172471b 1121 return -EIO;
1da177e4
LT
1122 }
1123 status = map_read(map, adr);
1124 } while (!map_word_andequal(map, status, OK, OK));
1125
1126 /* Suspend succeeded */
1127 oldstate = chip->state;
1128 if (oldstate == FL_ERASING) {
1129 if (!map_word_bitsset(map, status, CMD(0x40)))
1130 break;
1131 newstate = FL_XIP_WHILE_ERASING;
1132 chip->erase_suspended = 1;
1133 } else {
1134 if (!map_word_bitsset(map, status, CMD(0x04)))
1135 break;
1136 newstate = FL_XIP_WHILE_WRITING;
1137 chip->write_suspended = 1;
1138 }
1139 chip->state = newstate;
1140 map_write(map, CMD(0xff), adr);
1141 (void) map_read(map, adr);
ca5c23c3 1142 xip_iprefetch();
1da177e4 1143 local_irq_enable();
c4e77376 1144 mutex_unlock(&chip->mutex);
ca5c23c3 1145 xip_iprefetch();
1da177e4
LT
1146 cond_resched();
1147
1148 /*
1149 * We're back. However someone else might have
1150 * decided to go write to the chip if we are in
1151 * a suspended erase state. If so let's wait
1152 * until it's done.
1153 */
c4e77376 1154 mutex_lock(&chip->mutex);
1da177e4
LT
1155 while (chip->state != newstate) {
1156 DECLARE_WAITQUEUE(wait, current);
1157 set_current_state(TASK_UNINTERRUPTIBLE);
1158 add_wait_queue(&chip->wq, &wait);
c4e77376 1159 mutex_unlock(&chip->mutex);
1da177e4
LT
1160 schedule();
1161 remove_wait_queue(&chip->wq, &wait);
c4e77376 1162 mutex_lock(&chip->mutex);
1da177e4
LT
1163 }
1164 /* Disallow XIP again */
1165 local_irq_disable();
1166
1167 /* Resume the write or erase operation */
1168 map_write(map, CMD(0xd0), adr);
1169 map_write(map, CMD(0x70), adr);
1170 chip->state = oldstate;
1171 start = xip_currtime();
1172 } else if (usec >= 1000000/HZ) {
1173 /*
1174 * Try to save on CPU power when waiting delay
1175 * is at least a system timer tick period.
1176 * No need to be extremely accurate here.
1177 */
1178 xip_cpu_idle();
1179 }
1180 status = map_read(map, adr);
c172471b 1181 done = xip_elapsed_since(start);
1da177e4 1182 } while (!map_word_andequal(map, status, OK, OK)
c172471b 1183 && done < usec);
1da177e4 1184
c172471b
NP
1185 return (done >= usec) ? -ETIME : 0;
1186}
1da177e4
LT
1187
1188/*
1189 * The INVALIDATE_CACHED_RANGE() macro is normally used in parallel while
1190 * the flash is actively programming or erasing since we have to poll for
1191 * the operation to complete anyway. We can't do that in a generic way with
6da70124 1192 * a XIP setup so do it before the actual flash operation in this case
c172471b 1193 * and stub it out from INVAL_CACHE_AND_WAIT.
1da177e4 1194 */
6da70124
NP
1195#define XIP_INVAL_CACHED_RANGE(map, from, size) \
1196 INVALIDATE_CACHED_RANGE(map, from, size)
1197
e93cafe4
AG
1198#define INVAL_CACHE_AND_WAIT(map, chip, cmd_adr, inval_adr, inval_len, usec, usec_max) \
1199 xip_wait_for_operation(map, chip, cmd_adr, usec_max)
1da177e4
LT
1200
1201#else
1202
1203#define xip_disable(map, chip, adr)
1204#define xip_enable(map, chip, adr)
1da177e4 1205#define XIP_INVAL_CACHED_RANGE(x...)
c172471b
NP
1206#define INVAL_CACHE_AND_WAIT inval_cache_and_wait_for_operation
1207
1208static int inval_cache_and_wait_for_operation(
1209 struct map_info *map, struct flchip *chip,
1210 unsigned long cmd_adr, unsigned long inval_adr, int inval_len,
e93cafe4 1211 unsigned int chip_op_time, unsigned int chip_op_time_max)
c172471b
NP
1212{
1213 struct cfi_private *cfi = map->fldrv_priv;
1214 map_word status, status_OK = CMD(0x80);
46a1652c 1215 int chip_state = chip->state;
998453fb 1216 unsigned int timeo, sleep_time, reset_timeo;
c172471b 1217
c4e77376 1218 mutex_unlock(&chip->mutex);
c172471b
NP
1219 if (inval_len)
1220 INVALIDATE_CACHED_RANGE(map, inval_adr, inval_len);
c4e77376 1221 mutex_lock(&chip->mutex);
c172471b 1222
e93cafe4 1223 timeo = chip_op_time_max;
46a1652c
AK
1224 if (!timeo)
1225 timeo = 500000;
998453fb 1226 reset_timeo = timeo;
46a1652c 1227 sleep_time = chip_op_time / 2;
c172471b 1228
c172471b 1229 for (;;) {
c172471b
NP
1230 status = map_read(map, cmd_adr);
1231 if (map_word_andequal(map, status, status_OK, status_OK))
1232 break;
1da177e4 1233
46a1652c 1234 if (!timeo) {
c172471b
NP
1235 map_write(map, CMD(0x70), cmd_adr);
1236 chip->state = FL_STATUS;
1237 return -ETIME;
1238 }
1239
46a1652c 1240 /* OK Still waiting. Drop the lock, wait a while and retry. */
c4e77376 1241 mutex_unlock(&chip->mutex);
46a1652c
AK
1242 if (sleep_time >= 1000000/HZ) {
1243 /*
1244 * Half of the normal delay still remaining
1245 * can be performed with a sleeping delay instead
1246 * of busy waiting.
1247 */
1248 msleep(sleep_time/1000);
1249 timeo -= sleep_time;
1250 sleep_time = 1000000/HZ;
1251 } else {
1252 udelay(1);
1253 cond_resched();
1254 timeo--;
1255 }
c4e77376 1256 mutex_lock(&chip->mutex);
c172471b 1257
967bf623 1258 while (chip->state != chip_state) {
46a1652c
AK
1259 /* Someone's suspended the operation: sleep */
1260 DECLARE_WAITQUEUE(wait, current);
1261 set_current_state(TASK_UNINTERRUPTIBLE);
1262 add_wait_queue(&chip->wq, &wait);
c4e77376 1263 mutex_unlock(&chip->mutex);
46a1652c
AK
1264 schedule();
1265 remove_wait_queue(&chip->wq, &wait);
c4e77376 1266 mutex_lock(&chip->mutex);
46a1652c 1267 }
6ac15e92
GY
1268 if (chip->erase_suspended && chip_state == FL_ERASING) {
1269 /* Erase suspend occured while sleep: reset timeout */
998453fb
AK
1270 timeo = reset_timeo;
1271 chip->erase_suspended = 0;
6ac15e92
GY
1272 }
1273 if (chip->write_suspended && chip_state == FL_WRITING) {
1274 /* Write suspend occured while sleep: reset timeout */
1275 timeo = reset_timeo;
998453fb
AK
1276 chip->write_suspended = 0;
1277 }
46a1652c 1278 }
c172471b
NP
1279
1280 /* Done and happy. */
1281 chip->state = FL_STATUS;
1282 return 0;
1283}
6da70124 1284
1da177e4
LT
1285#endif
1286
e93cafe4
AG
1287#define WAIT_TIMEOUT(map, chip, adr, udelay, udelay_max) \
1288 INVAL_CACHE_AND_WAIT(map, chip, adr, 0, 0, udelay, udelay_max);
c172471b
NP
1289
1290
1da177e4
LT
1291static int do_point_onechip (struct map_info *map, struct flchip *chip, loff_t adr, size_t len)
1292{
1293 unsigned long cmd_addr;
1294 struct cfi_private *cfi = map->fldrv_priv;
1295 int ret = 0;
1296
1297 adr += chip->start;
1298
1f948b43
TG
1299 /* Ensure cmd read/writes are aligned. */
1300 cmd_addr = adr & ~(map_bankwidth(map)-1);
1da177e4 1301
c4e77376 1302 mutex_lock(&chip->mutex);
1da177e4
LT
1303
1304 ret = get_chip(map, chip, cmd_addr, FL_POINT);
1305
1306 if (!ret) {
1307 if (chip->state != FL_POINT && chip->state != FL_READY)
1308 map_write(map, CMD(0xff), cmd_addr);
1309
1310 chip->state = FL_POINT;
1311 chip->ref_point_counter++;
1312 }
c4e77376 1313 mutex_unlock(&chip->mutex);
1da177e4
LT
1314
1315 return ret;
1316}
1317
a98889f3
JH
1318static int cfi_intelext_point(struct mtd_info *mtd, loff_t from, size_t len,
1319 size_t *retlen, void **virt, resource_size_t *phys)
1da177e4
LT
1320{
1321 struct map_info *map = mtd->priv;
1322 struct cfi_private *cfi = map->fldrv_priv;
097f2576 1323 unsigned long ofs, last_end = 0;
1da177e4
LT
1324 int chipnum;
1325 int ret = 0;
1326
1327 if (!map->virt || (from + len > mtd->size))
1328 return -EINVAL;
1f948b43 1329
1da177e4
LT
1330 /* Now lock the chip(s) to POINT state */
1331
1332 /* ofs: offset within the first chip that the first read should start */
1333 chipnum = (from >> cfi->chipshift);
1334 ofs = from - (chipnum << cfi->chipshift);
1335
a98889f3 1336 *virt = map->virt + cfi->chips[chipnum].start + ofs;
097f2576 1337 *retlen = 0;
a98889f3
JH
1338 if (phys)
1339 *phys = map->phys + cfi->chips[chipnum].start + ofs;
097f2576 1340
1da177e4
LT
1341 while (len) {
1342 unsigned long thislen;
1343
1344 if (chipnum >= cfi->numchips)
1345 break;
1346
097f2576
AL
1347 /* We cannot point across chips that are virtually disjoint */
1348 if (!last_end)
1349 last_end = cfi->chips[chipnum].start;
1350 else if (cfi->chips[chipnum].start != last_end)
1351 break;
1352
1da177e4
LT
1353 if ((len + ofs -1) >> cfi->chipshift)
1354 thislen = (1<<cfi->chipshift) - ofs;
1355 else
1356 thislen = len;
1357
1358 ret = do_point_onechip(map, &cfi->chips[chipnum], ofs, thislen);
1359 if (ret)
1360 break;
1361
1362 *retlen += thislen;
1363 len -= thislen;
1f948b43 1364
1da177e4 1365 ofs = 0;
097f2576 1366 last_end += 1 << cfi->chipshift;
1da177e4
LT
1367 chipnum++;
1368 }
1369 return 0;
1370}
1371
a98889f3 1372static void cfi_intelext_unpoint(struct mtd_info *mtd, loff_t from, size_t len)
1da177e4
LT
1373{
1374 struct map_info *map = mtd->priv;
1375 struct cfi_private *cfi = map->fldrv_priv;
1376 unsigned long ofs;
1377 int chipnum;
1378
1379 /* Now unlock the chip(s) POINT state */
1380
1381 /* ofs: offset within the first chip that the first read should start */
1382 chipnum = (from >> cfi->chipshift);
1383 ofs = from - (chipnum << cfi->chipshift);
1384
1385 while (len) {
1386 unsigned long thislen;
1387 struct flchip *chip;
1388
1389 chip = &cfi->chips[chipnum];
1390 if (chipnum >= cfi->numchips)
1391 break;
1392
1393 if ((len + ofs -1) >> cfi->chipshift)
1394 thislen = (1<<cfi->chipshift) - ofs;
1395 else
1396 thislen = len;
1397
c4e77376 1398 mutex_lock(&chip->mutex);
1da177e4
LT
1399 if (chip->state == FL_POINT) {
1400 chip->ref_point_counter--;
1401 if(chip->ref_point_counter == 0)
1402 chip->state = FL_READY;
1403 } else
4843653c 1404 printk(KERN_ERR "%s: Warning: unpoint called on non pointed region\n", map->name); /* Should this give an error? */
1da177e4
LT
1405
1406 put_chip(map, chip, chip->start);
c4e77376 1407 mutex_unlock(&chip->mutex);
1da177e4
LT
1408
1409 len -= thislen;
1410 ofs = 0;
1411 chipnum++;
1412 }
1413}
1414
1415static inline int do_read_onechip(struct map_info *map, struct flchip *chip, loff_t adr, size_t len, u_char *buf)
1416{
1417 unsigned long cmd_addr;
1418 struct cfi_private *cfi = map->fldrv_priv;
1419 int ret;
1420
1421 adr += chip->start;
1422
1f948b43
TG
1423 /* Ensure cmd read/writes are aligned. */
1424 cmd_addr = adr & ~(map_bankwidth(map)-1);
1da177e4 1425
c4e77376 1426 mutex_lock(&chip->mutex);
1da177e4
LT
1427 ret = get_chip(map, chip, cmd_addr, FL_READY);
1428 if (ret) {
c4e77376 1429 mutex_unlock(&chip->mutex);
1da177e4
LT
1430 return ret;
1431 }
1432
1433 if (chip->state != FL_POINT && chip->state != FL_READY) {
1434 map_write(map, CMD(0xff), cmd_addr);
1435
1436 chip->state = FL_READY;
1437 }
1438
1439 map_copy_from(map, buf, adr, len);
1440
1441 put_chip(map, chip, cmd_addr);
1442
c4e77376 1443 mutex_unlock(&chip->mutex);
1da177e4
LT
1444 return 0;
1445}
1446
1447static int cfi_intelext_read (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
1448{
1449 struct map_info *map = mtd->priv;
1450 struct cfi_private *cfi = map->fldrv_priv;
1451 unsigned long ofs;
1452 int chipnum;
1453 int ret = 0;
1454
1455 /* ofs: offset within the first chip that the first read should start */
1456 chipnum = (from >> cfi->chipshift);
1457 ofs = from - (chipnum << cfi->chipshift);
1458
1459 *retlen = 0;
1460
1461 while (len) {
1462 unsigned long thislen;
1463
1464 if (chipnum >= cfi->numchips)
1465 break;
1466
1467 if ((len + ofs -1) >> cfi->chipshift)
1468 thislen = (1<<cfi->chipshift) - ofs;
1469 else
1470 thislen = len;
1471
1472 ret = do_read_onechip(map, &cfi->chips[chipnum], ofs, thislen, buf);
1473 if (ret)
1474 break;
1475
1476 *retlen += thislen;
1477 len -= thislen;
1478 buf += thislen;
1f948b43 1479
1da177e4
LT
1480 ofs = 0;
1481 chipnum++;
1482 }
1483 return ret;
1484}
1485
1da177e4 1486static int __xipram do_write_oneword(struct map_info *map, struct flchip *chip,
f77814dd 1487 unsigned long adr, map_word datum, int mode)
1da177e4
LT
1488{
1489 struct cfi_private *cfi = map->fldrv_priv;
c172471b
NP
1490 map_word status, write_cmd;
1491 int ret=0;
1da177e4
LT
1492
1493 adr += chip->start;
1494
f77814dd 1495 switch (mode) {
638d9838
NP
1496 case FL_WRITING:
1497 write_cmd = (cfi->cfiq->P_ID != 0x0200) ? CMD(0x40) : CMD(0x41);
1498 break;
1499 case FL_OTP_WRITE:
1500 write_cmd = CMD(0xc0);
1501 break;
1502 default:
1503 return -EINVAL;
f77814dd 1504 }
1da177e4 1505
c4e77376 1506 mutex_lock(&chip->mutex);
f77814dd 1507 ret = get_chip(map, chip, adr, mode);
1da177e4 1508 if (ret) {
c4e77376 1509 mutex_unlock(&chip->mutex);
1da177e4
LT
1510 return ret;
1511 }
1512
1513 XIP_INVAL_CACHED_RANGE(map, adr, map_bankwidth(map));
1514 ENABLE_VPP(map);
1515 xip_disable(map, chip, adr);
f77814dd 1516 map_write(map, write_cmd, adr);
1da177e4 1517 map_write(map, datum, adr);
f77814dd 1518 chip->state = mode;
1da177e4 1519
c172471b
NP
1520 ret = INVAL_CACHE_AND_WAIT(map, chip, adr,
1521 adr, map_bankwidth(map),
e93cafe4
AG
1522 chip->word_write_time,
1523 chip->word_write_time_max);
c172471b
NP
1524 if (ret) {
1525 xip_enable(map, chip, adr);
1526 printk(KERN_ERR "%s: word write error (status timeout)\n", map->name);
1527 goto out;
1da177e4 1528 }
1da177e4 1529
4843653c 1530 /* check for errors */
c172471b 1531 status = map_read(map, adr);
4843653c
NP
1532 if (map_word_bitsset(map, status, CMD(0x1a))) {
1533 unsigned long chipstatus = MERGESTATUS(status);
1534
1535 /* reset status */
1da177e4 1536 map_write(map, CMD(0x50), adr);
1da177e4 1537 map_write(map, CMD(0x70), adr);
4843653c
NP
1538 xip_enable(map, chip, adr);
1539
1540 if (chipstatus & 0x02) {
1541 ret = -EROFS;
1542 } else if (chipstatus & 0x08) {
1543 printk(KERN_ERR "%s: word write error (bad VPP)\n", map->name);
1544 ret = -EIO;
1545 } else {
1546 printk(KERN_ERR "%s: word write error (status 0x%lx)\n", map->name, chipstatus);
1547 ret = -EINVAL;
1548 }
1549
1550 goto out;
1da177e4
LT
1551 }
1552
1553 xip_enable(map, chip, adr);
1554 out: put_chip(map, chip, adr);
c4e77376 1555 mutex_unlock(&chip->mutex);
1da177e4
LT
1556 return ret;
1557}
1558
1559
1560static int cfi_intelext_write_words (struct mtd_info *mtd, loff_t to , size_t len, size_t *retlen, const u_char *buf)
1561{
1562 struct map_info *map = mtd->priv;
1563 struct cfi_private *cfi = map->fldrv_priv;
1564 int ret = 0;
1565 int chipnum;
1566 unsigned long ofs;
1567
1568 *retlen = 0;
1569 if (!len)
1570 return 0;
1571
1572 chipnum = to >> cfi->chipshift;
1573 ofs = to - (chipnum << cfi->chipshift);
1574
1575 /* If it's not bus-aligned, do the first byte write */
1576 if (ofs & (map_bankwidth(map)-1)) {
1577 unsigned long bus_ofs = ofs & ~(map_bankwidth(map)-1);
1578 int gap = ofs - bus_ofs;
1579 int n;
1580 map_word datum;
1581
1582 n = min_t(int, len, map_bankwidth(map)-gap);
1583 datum = map_word_ff(map);
1584 datum = map_word_load_partial(map, datum, buf, gap, n);
1585
1586 ret = do_write_oneword(map, &cfi->chips[chipnum],
f77814dd 1587 bus_ofs, datum, FL_WRITING);
1f948b43 1588 if (ret)
1da177e4
LT
1589 return ret;
1590
1591 len -= n;
1592 ofs += n;
1593 buf += n;
1594 (*retlen) += n;
1595
1596 if (ofs >> cfi->chipshift) {
1f948b43 1597 chipnum ++;
1da177e4
LT
1598 ofs = 0;
1599 if (chipnum == cfi->numchips)
1600 return 0;
1601 }
1602 }
1f948b43 1603
1da177e4
LT
1604 while(len >= map_bankwidth(map)) {
1605 map_word datum = map_word_load(map, buf);
1606
1607 ret = do_write_oneword(map, &cfi->chips[chipnum],
f77814dd 1608 ofs, datum, FL_WRITING);
1da177e4
LT
1609 if (ret)
1610 return ret;
1611
1612 ofs += map_bankwidth(map);
1613 buf += map_bankwidth(map);
1614 (*retlen) += map_bankwidth(map);
1615 len -= map_bankwidth(map);
1616
1617 if (ofs >> cfi->chipshift) {
1f948b43 1618 chipnum ++;
1da177e4
LT
1619 ofs = 0;
1620 if (chipnum == cfi->numchips)
1621 return 0;
1622 }
1623 }
1624
1625 if (len & (map_bankwidth(map)-1)) {
1626 map_word datum;
1627
1628 datum = map_word_ff(map);
1629 datum = map_word_load_partial(map, datum, buf, 0, len);
1630
1631 ret = do_write_oneword(map, &cfi->chips[chipnum],
f77814dd 1632 ofs, datum, FL_WRITING);
1f948b43 1633 if (ret)
1da177e4 1634 return ret;
1f948b43 1635
1da177e4
LT
1636 (*retlen) += len;
1637 }
1638
1639 return 0;
1640}
1641
1642
1f948b43 1643static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip,
e102d54a
NP
1644 unsigned long adr, const struct kvec **pvec,
1645 unsigned long *pvec_seek, int len)
1da177e4
LT
1646{
1647 struct cfi_private *cfi = map->fldrv_priv;
c172471b
NP
1648 map_word status, write_cmd, datum;
1649 unsigned long cmd_adr;
1650 int ret, wbufsize, word_gap, words;
e102d54a
NP
1651 const struct kvec *vec;
1652 unsigned long vec_seek;
646fd127
MC
1653 unsigned long initial_adr;
1654 int initial_len = len;
1da177e4
LT
1655
1656 wbufsize = cfi_interleave(cfi) << cfi->cfiq->MaxBufWriteSize;
1657 adr += chip->start;
646fd127 1658 initial_adr = adr;
1da177e4 1659 cmd_adr = adr & ~(wbufsize-1);
638d9838 1660
1da177e4 1661 /* Let's determine this according to the interleave only once */
638d9838 1662 write_cmd = (cfi->cfiq->P_ID != 0x0200) ? CMD(0xe8) : CMD(0xe9);
1da177e4 1663
c4e77376 1664 mutex_lock(&chip->mutex);
1da177e4
LT
1665 ret = get_chip(map, chip, cmd_adr, FL_WRITING);
1666 if (ret) {
c4e77376 1667 mutex_unlock(&chip->mutex);
1da177e4
LT
1668 return ret;
1669 }
1670
646fd127 1671 XIP_INVAL_CACHED_RANGE(map, initial_adr, initial_len);
1da177e4
LT
1672 ENABLE_VPP(map);
1673 xip_disable(map, chip, cmd_adr);
1674
151e7659 1675 /* §4.8 of the 28FxxxJ3A datasheet says "Any time SR.4 and/or SR.5 is set
1f948b43 1676 [...], the device will not accept any more Write to Buffer commands".
1da177e4
LT
1677 So we must check here and reset those bits if they're set. Otherwise
1678 we're just pissing in the wind */
6e7a6809 1679 if (chip->state != FL_STATUS) {
1da177e4 1680 map_write(map, CMD(0x70), cmd_adr);
6e7a6809
NP
1681 chip->state = FL_STATUS;
1682 }
1da177e4
LT
1683 status = map_read(map, cmd_adr);
1684 if (map_word_bitsset(map, status, CMD(0x30))) {
1685 xip_enable(map, chip, cmd_adr);
1686 printk(KERN_WARNING "SR.4 or SR.5 bits set in buffer write (status %lx). Clearing.\n", status.x[0]);
1687 xip_disable(map, chip, cmd_adr);
1688 map_write(map, CMD(0x50), cmd_adr);
1689 map_write(map, CMD(0x70), cmd_adr);
1690 }
1691
1692 chip->state = FL_WRITING_TO_BUFFER;
c172471b 1693 map_write(map, write_cmd, cmd_adr);
e93cafe4 1694 ret = WAIT_TIMEOUT(map, chip, cmd_adr, 0, 0);
c172471b
NP
1695 if (ret) {
1696 /* Argh. Not ready for write to buffer */
1697 map_word Xstatus = map_read(map, cmd_adr);
1698 map_write(map, CMD(0x70), cmd_adr);
1699 chip->state = FL_STATUS;
1da177e4 1700 status = map_read(map, cmd_adr);
c172471b
NP
1701 map_write(map, CMD(0x50), cmd_adr);
1702 map_write(map, CMD(0x70), cmd_adr);
1703 xip_enable(map, chip, cmd_adr);
1704 printk(KERN_ERR "%s: Chip not ready for buffer write. Xstatus = %lx, status = %lx\n",
1705 map->name, Xstatus.x[0], status.x[0]);
1706 goto out;
1da177e4
LT
1707 }
1708
e102d54a
NP
1709 /* Figure out the number of words to write */
1710 word_gap = (-adr & (map_bankwidth(map)-1));
c8872b06 1711 words = DIV_ROUND_UP(len - word_gap, map_bankwidth(map));
e102d54a
NP
1712 if (!word_gap) {
1713 words--;
1714 } else {
1715 word_gap = map_bankwidth(map) - word_gap;
1716 adr -= word_gap;
1717 datum = map_word_ff(map);
1718 }
1719
1da177e4 1720 /* Write length of data to come */
e102d54a 1721 map_write(map, CMD(words), cmd_adr );
1da177e4
LT
1722
1723 /* Write data */
e102d54a
NP
1724 vec = *pvec;
1725 vec_seek = *pvec_seek;
1726 do {
1727 int n = map_bankwidth(map) - word_gap;
1728 if (n > vec->iov_len - vec_seek)
1729 n = vec->iov_len - vec_seek;
1730 if (n > len)
1731 n = len;
1da177e4 1732
e102d54a
NP
1733 if (!word_gap && len < map_bankwidth(map))
1734 datum = map_word_ff(map);
1da177e4 1735
e102d54a 1736 datum = map_word_load_partial(map, datum,
1f948b43 1737 vec->iov_base + vec_seek,
e102d54a 1738 word_gap, n);
1da177e4 1739
e102d54a
NP
1740 len -= n;
1741 word_gap += n;
1742 if (!len || word_gap == map_bankwidth(map)) {
1743 map_write(map, datum, adr);
1744 adr += map_bankwidth(map);
1745 word_gap = 0;
1746 }
1da177e4 1747
e102d54a
NP
1748 vec_seek += n;
1749 if (vec_seek == vec->iov_len) {
1750 vec++;
1751 vec_seek = 0;
1752 }
1753 } while (len);
1754 *pvec = vec;
1755 *pvec_seek = vec_seek;
1da177e4
LT
1756
1757 /* GO GO GO */
1758 map_write(map, CMD(0xd0), cmd_adr);
1759 chip->state = FL_WRITING;
1760
c172471b 1761 ret = INVAL_CACHE_AND_WAIT(map, chip, cmd_adr,
646fd127 1762 initial_adr, initial_len,
e93cafe4
AG
1763 chip->buffer_write_time,
1764 chip->buffer_write_time_max);
c172471b
NP
1765 if (ret) {
1766 map_write(map, CMD(0x70), cmd_adr);
1767 chip->state = FL_STATUS;
1768 xip_enable(map, chip, cmd_adr);
1769 printk(KERN_ERR "%s: buffer write error (status timeout)\n", map->name);
1770 goto out;
1da177e4 1771 }
1da177e4 1772
4843653c 1773 /* check for errors */
c172471b 1774 status = map_read(map, cmd_adr);
4843653c
NP
1775 if (map_word_bitsset(map, status, CMD(0x1a))) {
1776 unsigned long chipstatus = MERGESTATUS(status);
1777
1778 /* reset status */
1da177e4 1779 map_write(map, CMD(0x50), cmd_adr);
4843653c
NP
1780 map_write(map, CMD(0x70), cmd_adr);
1781 xip_enable(map, chip, cmd_adr);
1782
1783 if (chipstatus & 0x02) {
1784 ret = -EROFS;
1785 } else if (chipstatus & 0x08) {
1786 printk(KERN_ERR "%s: buffer write error (bad VPP)\n", map->name);
1787 ret = -EIO;
1788 } else {
1789 printk(KERN_ERR "%s: buffer write error (status 0x%lx)\n", map->name, chipstatus);
1790 ret = -EINVAL;
1791 }
1792
1793 goto out;
1da177e4
LT
1794 }
1795
1796 xip_enable(map, chip, cmd_adr);
1797 out: put_chip(map, chip, cmd_adr);
c4e77376 1798 mutex_unlock(&chip->mutex);
1da177e4
LT
1799 return ret;
1800}
1801
e102d54a
NP
1802static int cfi_intelext_writev (struct mtd_info *mtd, const struct kvec *vecs,
1803 unsigned long count, loff_t to, size_t *retlen)
1da177e4
LT
1804{
1805 struct map_info *map = mtd->priv;
1806 struct cfi_private *cfi = map->fldrv_priv;
1807 int wbufsize = cfi_interleave(cfi) << cfi->cfiq->MaxBufWriteSize;
1808 int ret = 0;
1809 int chipnum;
e102d54a
NP
1810 unsigned long ofs, vec_seek, i;
1811 size_t len = 0;
1812
1813 for (i = 0; i < count; i++)
1814 len += vecs[i].iov_len;
1da177e4
LT
1815
1816 *retlen = 0;
1817 if (!len)
1818 return 0;
1819
1820 chipnum = to >> cfi->chipshift;
e102d54a
NP
1821 ofs = to - (chipnum << cfi->chipshift);
1822 vec_seek = 0;
1da177e4 1823
e102d54a 1824 do {
1da177e4
LT
1825 /* We must not cross write block boundaries */
1826 int size = wbufsize - (ofs & (wbufsize-1));
1827
1828 if (size > len)
1829 size = len;
1f948b43 1830 ret = do_write_buffer(map, &cfi->chips[chipnum],
e102d54a 1831 ofs, &vecs, &vec_seek, size);
1da177e4
LT
1832 if (ret)
1833 return ret;
1834
1835 ofs += size;
1da177e4
LT
1836 (*retlen) += size;
1837 len -= size;
1838
1839 if (ofs >> cfi->chipshift) {
1f948b43 1840 chipnum ++;
1da177e4
LT
1841 ofs = 0;
1842 if (chipnum == cfi->numchips)
1843 return 0;
1844 }
df54b52c
JB
1845
1846 /* Be nice and reschedule with the chip in a usable state for other
1847 processes. */
1848 cond_resched();
1849
e102d54a
NP
1850 } while (len);
1851
1da177e4
LT
1852 return 0;
1853}
1854
e102d54a
NP
1855static int cfi_intelext_write_buffers (struct mtd_info *mtd, loff_t to,
1856 size_t len, size_t *retlen, const u_char *buf)
1857{
1858 struct kvec vec;
1859
1860 vec.iov_base = (void *) buf;
1861 vec.iov_len = len;
1862
1863 return cfi_intelext_writev(mtd, &vec, 1, to, retlen);
1864}
1865
1da177e4
LT
1866static int __xipram do_erase_oneblock(struct map_info *map, struct flchip *chip,
1867 unsigned long adr, int len, void *thunk)
1868{
1869 struct cfi_private *cfi = map->fldrv_priv;
c172471b 1870 map_word status;
1da177e4 1871 int retries = 3;
c172471b 1872 int ret;
1da177e4
LT
1873
1874 adr += chip->start;
1875
1da177e4 1876 retry:
c4e77376 1877 mutex_lock(&chip->mutex);
1da177e4
LT
1878 ret = get_chip(map, chip, adr, FL_ERASING);
1879 if (ret) {
c4e77376 1880 mutex_unlock(&chip->mutex);
1da177e4
LT
1881 return ret;
1882 }
1883
1884 XIP_INVAL_CACHED_RANGE(map, adr, len);
1885 ENABLE_VPP(map);
1886 xip_disable(map, chip, adr);
1887
1888 /* Clear the status register first */
1889 map_write(map, CMD(0x50), adr);
1890
1891 /* Now erase */
1892 map_write(map, CMD(0x20), adr);
1893 map_write(map, CMD(0xD0), adr);
1894 chip->state = FL_ERASING;
1895 chip->erase_suspended = 0;
1896
c172471b
NP
1897 ret = INVAL_CACHE_AND_WAIT(map, chip, adr,
1898 adr, len,
e93cafe4
AG
1899 chip->erase_time,
1900 chip->erase_time_max);
c172471b
NP
1901 if (ret) {
1902 map_write(map, CMD(0x70), adr);
1903 chip->state = FL_STATUS;
1904 xip_enable(map, chip, adr);
1905 printk(KERN_ERR "%s: block erase error: (status timeout)\n", map->name);
1906 goto out;
1da177e4
LT
1907 }
1908
1909 /* We've broken this before. It doesn't hurt to be safe */
1910 map_write(map, CMD(0x70), adr);
1911 chip->state = FL_STATUS;
1912 status = map_read(map, adr);
1913
4843653c 1914 /* check for errors */
1da177e4 1915 if (map_word_bitsset(map, status, CMD(0x3a))) {
4843653c 1916 unsigned long chipstatus = MERGESTATUS(status);
1da177e4
LT
1917
1918 /* Reset the error bits */
1919 map_write(map, CMD(0x50), adr);
1920 map_write(map, CMD(0x70), adr);
1921 xip_enable(map, chip, adr);
1922
1da177e4 1923 if ((chipstatus & 0x30) == 0x30) {
4843653c
NP
1924 printk(KERN_ERR "%s: block erase error: (bad command sequence, status 0x%lx)\n", map->name, chipstatus);
1925 ret = -EINVAL;
1da177e4
LT
1926 } else if (chipstatus & 0x02) {
1927 /* Protection bit set */
1928 ret = -EROFS;
1929 } else if (chipstatus & 0x8) {
1930 /* Voltage */
4843653c 1931 printk(KERN_ERR "%s: block erase error: (bad VPP)\n", map->name);
1da177e4 1932 ret = -EIO;
4843653c
NP
1933 } else if (chipstatus & 0x20 && retries--) {
1934 printk(KERN_DEBUG "block erase failed at 0x%08lx: status 0x%lx. Retrying...\n", adr, chipstatus);
4843653c 1935 put_chip(map, chip, adr);
c4e77376 1936 mutex_unlock(&chip->mutex);
4843653c
NP
1937 goto retry;
1938 } else {
1939 printk(KERN_ERR "%s: block erase failed at 0x%08lx (status 0x%lx)\n", map->name, adr, chipstatus);
1da177e4
LT
1940 ret = -EIO;
1941 }
4843653c
NP
1942
1943 goto out;
1da177e4
LT
1944 }
1945
4843653c 1946 xip_enable(map, chip, adr);
1da177e4 1947 out: put_chip(map, chip, adr);
c4e77376 1948 mutex_unlock(&chip->mutex);
1da177e4
LT
1949 return ret;
1950}
1951
029a9eb1 1952static int cfi_intelext_erase_varsize(struct mtd_info *mtd, struct erase_info *instr)
1da177e4
LT
1953{
1954 unsigned long ofs, len;
1955 int ret;
1956
1957 ofs = instr->addr;
1958 len = instr->len;
1959
1960 ret = cfi_varsize_frob(mtd, do_erase_oneblock, ofs, len, NULL);
1961 if (ret)
1962 return ret;
1963
1964 instr->state = MTD_ERASE_DONE;
1965 mtd_erase_callback(instr);
1f948b43 1966
1da177e4
LT
1967 return 0;
1968}
1969
1970static void cfi_intelext_sync (struct mtd_info *mtd)
1971{
1972 struct map_info *map = mtd->priv;
1973 struct cfi_private *cfi = map->fldrv_priv;
1974 int i;
1975 struct flchip *chip;
1976 int ret = 0;
1977
1978 for (i=0; !ret && i<cfi->numchips; i++) {
1979 chip = &cfi->chips[i];
1980
c4e77376 1981 mutex_lock(&chip->mutex);
1da177e4
LT
1982 ret = get_chip(map, chip, chip->start, FL_SYNCING);
1983
1984 if (!ret) {
1985 chip->oldstate = chip->state;
1986 chip->state = FL_SYNCING;
1f948b43 1987 /* No need to wake_up() on this state change -
1da177e4
LT
1988 * as the whole point is that nobody can do anything
1989 * with the chip now anyway.
1990 */
1991 }
c4e77376 1992 mutex_unlock(&chip->mutex);
1da177e4
LT
1993 }
1994
1995 /* Unlock the chips again */
1996
1997 for (i--; i >=0; i--) {
1998 chip = &cfi->chips[i];
1999
c4e77376 2000 mutex_lock(&chip->mutex);
1f948b43 2001
1da177e4
LT
2002 if (chip->state == FL_SYNCING) {
2003 chip->state = chip->oldstate;
09c79335 2004 chip->oldstate = FL_READY;
1da177e4
LT
2005 wake_up(&chip->wq);
2006 }
c4e77376 2007 mutex_unlock(&chip->mutex);
1da177e4
LT
2008 }
2009}
2010
0ecbc81a 2011static int __xipram do_getlockstatus_oneblock(struct map_info *map,
1da177e4
LT
2012 struct flchip *chip,
2013 unsigned long adr,
2014 int len, void *thunk)
2015{
2016 struct cfi_private *cfi = map->fldrv_priv;
2017 int status, ofs_factor = cfi->interleave * cfi->device_type;
2018
c25bb1f5 2019 adr += chip->start;
1da177e4 2020 xip_disable(map, chip, adr+(2*ofs_factor));
c25bb1f5 2021 map_write(map, CMD(0x90), adr+(2*ofs_factor));
1da177e4
LT
2022 chip->state = FL_JEDEC_QUERY;
2023 status = cfi_read_query(map, adr+(2*ofs_factor));
2024 xip_enable(map, chip, 0);
0ecbc81a
RG
2025 return status;
2026}
2027
2028#ifdef DEBUG_LOCK_BITS
2029static int __xipram do_printlockstatus_oneblock(struct map_info *map,
2030 struct flchip *chip,
2031 unsigned long adr,
2032 int len, void *thunk)
2033{
1da177e4 2034 printk(KERN_DEBUG "block status register for 0x%08lx is %x\n",
0ecbc81a 2035 adr, do_getlockstatus_oneblock(map, chip, adr, len, thunk));
1da177e4
LT
2036 return 0;
2037}
2038#endif
2039
2040#define DO_XXLOCK_ONEBLOCK_LOCK ((void *) 1)
2041#define DO_XXLOCK_ONEBLOCK_UNLOCK ((void *) 2)
2042
2043static int __xipram do_xxlock_oneblock(struct map_info *map, struct flchip *chip,
2044 unsigned long adr, int len, void *thunk)
2045{
2046 struct cfi_private *cfi = map->fldrv_priv;
9a6e73ec 2047 struct cfi_pri_intelext *extp = cfi->cmdset_priv;
c172471b 2048 int udelay;
1da177e4
LT
2049 int ret;
2050
2051 adr += chip->start;
2052
c4e77376 2053 mutex_lock(&chip->mutex);
1da177e4
LT
2054 ret = get_chip(map, chip, adr, FL_LOCKING);
2055 if (ret) {
c4e77376 2056 mutex_unlock(&chip->mutex);
1da177e4
LT
2057 return ret;
2058 }
2059
2060 ENABLE_VPP(map);
2061 xip_disable(map, chip, adr);
1f948b43 2062
1da177e4
LT
2063 map_write(map, CMD(0x60), adr);
2064 if (thunk == DO_XXLOCK_ONEBLOCK_LOCK) {
2065 map_write(map, CMD(0x01), adr);
2066 chip->state = FL_LOCKING;
2067 } else if (thunk == DO_XXLOCK_ONEBLOCK_UNLOCK) {
2068 map_write(map, CMD(0xD0), adr);
2069 chip->state = FL_UNLOCKING;
2070 } else
2071 BUG();
2072
9a6e73ec
TP
2073 /*
2074 * If Instant Individual Block Locking supported then no need
2075 * to delay.
2076 */
c172471b 2077 udelay = (!extp || !(extp->FeatureSupport & (1 << 5))) ? 1000000/HZ : 0;
9a6e73ec 2078
e93cafe4 2079 ret = WAIT_TIMEOUT(map, chip, adr, udelay, udelay * 100);
c172471b
NP
2080 if (ret) {
2081 map_write(map, CMD(0x70), adr);
2082 chip->state = FL_STATUS;
2083 xip_enable(map, chip, adr);
2084 printk(KERN_ERR "%s: block unlock error: (status timeout)\n", map->name);
2085 goto out;
1da177e4 2086 }
1f948b43 2087
1da177e4 2088 xip_enable(map, chip, adr);
c172471b 2089out: put_chip(map, chip, adr);
c4e77376 2090 mutex_unlock(&chip->mutex);
c172471b 2091 return ret;
1da177e4
LT
2092}
2093
69423d99 2094static int cfi_intelext_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
1da177e4
LT
2095{
2096 int ret;
2097
2098#ifdef DEBUG_LOCK_BITS
2099 printk(KERN_DEBUG "%s: lock status before, ofs=0x%08llx, len=0x%08X\n",
cb53b3b9 2100 __func__, ofs, len);
1da177e4 2101 cfi_varsize_frob(mtd, do_printlockstatus_oneblock,
1da1caf8 2102 ofs, len, NULL);
1da177e4
LT
2103#endif
2104
1f948b43 2105 ret = cfi_varsize_frob(mtd, do_xxlock_oneblock,
1da177e4 2106 ofs, len, DO_XXLOCK_ONEBLOCK_LOCK);
1f948b43 2107
1da177e4
LT
2108#ifdef DEBUG_LOCK_BITS
2109 printk(KERN_DEBUG "%s: lock status after, ret=%d\n",
cb53b3b9 2110 __func__, ret);
1da177e4 2111 cfi_varsize_frob(mtd, do_printlockstatus_oneblock,
1da1caf8 2112 ofs, len, NULL);
1da177e4
LT
2113#endif
2114
2115 return ret;
2116}
2117
69423d99 2118static int cfi_intelext_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
1da177e4
LT
2119{
2120 int ret;
2121
2122#ifdef DEBUG_LOCK_BITS
2123 printk(KERN_DEBUG "%s: lock status before, ofs=0x%08llx, len=0x%08X\n",
cb53b3b9 2124 __func__, ofs, len);
1da177e4 2125 cfi_varsize_frob(mtd, do_printlockstatus_oneblock,
1da1caf8 2126 ofs, len, NULL);
1da177e4
LT
2127#endif
2128
2129 ret = cfi_varsize_frob(mtd, do_xxlock_oneblock,
2130 ofs, len, DO_XXLOCK_ONEBLOCK_UNLOCK);
1f948b43 2131
1da177e4
LT
2132#ifdef DEBUG_LOCK_BITS
2133 printk(KERN_DEBUG "%s: lock status after, ret=%d\n",
cb53b3b9 2134 __func__, ret);
1f948b43 2135 cfi_varsize_frob(mtd, do_printlockstatus_oneblock,
1da1caf8 2136 ofs, len, NULL);
1da177e4 2137#endif
1f948b43 2138
1da177e4
LT
2139 return ret;
2140}
2141
f77814dd
NP
2142#ifdef CONFIG_MTD_OTP
2143
1f948b43 2144typedef int (*otp_op_t)(struct map_info *map, struct flchip *chip,
f77814dd
NP
2145 u_long data_offset, u_char *buf, u_int size,
2146 u_long prot_offset, u_int groupno, u_int groupsize);
2147
2148static int __xipram
2149do_otp_read(struct map_info *map, struct flchip *chip, u_long offset,
2150 u_char *buf, u_int size, u_long prot, u_int grpno, u_int grpsz)
2151{
2152 struct cfi_private *cfi = map->fldrv_priv;
2153 int ret;
2154
c4e77376 2155 mutex_lock(&chip->mutex);
f77814dd
NP
2156 ret = get_chip(map, chip, chip->start, FL_JEDEC_QUERY);
2157 if (ret) {
c4e77376 2158 mutex_unlock(&chip->mutex);
f77814dd
NP
2159 return ret;
2160 }
2161
2162 /* let's ensure we're not reading back cached data from array mode */
6da70124 2163 INVALIDATE_CACHED_RANGE(map, chip->start + offset, size);
f77814dd
NP
2164
2165 xip_disable(map, chip, chip->start);
2166 if (chip->state != FL_JEDEC_QUERY) {
2167 map_write(map, CMD(0x90), chip->start);
2168 chip->state = FL_JEDEC_QUERY;
2169 }
2170 map_copy_from(map, buf, chip->start + offset, size);
2171 xip_enable(map, chip, chip->start);
2172
2173 /* then ensure we don't keep OTP data in the cache */
6da70124 2174 INVALIDATE_CACHED_RANGE(map, chip->start + offset, size);
f77814dd
NP
2175
2176 put_chip(map, chip, chip->start);
c4e77376 2177 mutex_unlock(&chip->mutex);
f77814dd
NP
2178 return 0;
2179}
2180
2181static int
2182do_otp_write(struct map_info *map, struct flchip *chip, u_long offset,
2183 u_char *buf, u_int size, u_long prot, u_int grpno, u_int grpsz)
2184{
2185 int ret;
2186
2187 while (size) {
2188 unsigned long bus_ofs = offset & ~(map_bankwidth(map)-1);
2189 int gap = offset - bus_ofs;
2190 int n = min_t(int, size, map_bankwidth(map)-gap);
2191 map_word datum = map_word_ff(map);
2192
2193 datum = map_word_load_partial(map, datum, buf, gap, n);
2194 ret = do_write_oneword(map, chip, bus_ofs, datum, FL_OTP_WRITE);
1f948b43 2195 if (ret)
f77814dd
NP
2196 return ret;
2197
2198 offset += n;
2199 buf += n;
2200 size -= n;
2201 }
2202
2203 return 0;
2204}
2205
2206static int
2207do_otp_lock(struct map_info *map, struct flchip *chip, u_long offset,
2208 u_char *buf, u_int size, u_long prot, u_int grpno, u_int grpsz)
2209{
2210 struct cfi_private *cfi = map->fldrv_priv;
2211 map_word datum;
2212
2213 /* make sure area matches group boundaries */
332d71f7 2214 if (size != grpsz)
f77814dd
NP
2215 return -EXDEV;
2216
2217 datum = map_word_ff(map);
2218 datum = map_word_clr(map, datum, CMD(1 << grpno));
2219 return do_write_oneword(map, chip, prot, datum, FL_OTP_WRITE);
2220}
2221
2222static int cfi_intelext_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
2223 size_t *retlen, u_char *buf,
2224 otp_op_t action, int user_regs)
2225{
2226 struct map_info *map = mtd->priv;
2227 struct cfi_private *cfi = map->fldrv_priv;
2228 struct cfi_pri_intelext *extp = cfi->cmdset_priv;
2229 struct flchip *chip;
2230 struct cfi_intelext_otpinfo *otp;
2231 u_long devsize, reg_prot_offset, data_offset;
2232 u_int chip_num, chip_step, field, reg_fact_size, reg_user_size;
2233 u_int groups, groupno, groupsize, reg_fact_groups, reg_user_groups;
2234 int ret;
2235
2236 *retlen = 0;
2237
2238 /* Check that we actually have some OTP registers */
2239 if (!extp || !(extp->FeatureSupport & 64) || !extp->NumProtectionFields)
2240 return -ENODATA;
2241
2242 /* we need real chips here not virtual ones */
2243 devsize = (1 << cfi->cfiq->DevSize) * cfi->interleave;
2244 chip_step = devsize >> cfi->chipshift;
dce2b4da
NP
2245 chip_num = 0;
2246
2247 /* Some chips have OTP located in the _top_ partition only.
2248 For example: Intel 28F256L18T (T means top-parameter device) */
b2ef1a2b 2249 if (cfi->mfr == CFI_MFR_INTEL) {
dce2b4da
NP
2250 switch (cfi->id) {
2251 case 0x880b:
2252 case 0x880c:
2253 case 0x880d:
2254 chip_num = chip_step - 1;
2255 }
2256 }
f77814dd 2257
dce2b4da 2258 for ( ; chip_num < cfi->numchips; chip_num += chip_step) {
f77814dd
NP
2259 chip = &cfi->chips[chip_num];
2260 otp = (struct cfi_intelext_otpinfo *)&extp->extra[0];
2261
2262 /* first OTP region */
2263 field = 0;
2264 reg_prot_offset = extp->ProtRegAddr;
2265 reg_fact_groups = 1;
2266 reg_fact_size = 1 << extp->FactProtRegSize;
2267 reg_user_groups = 1;
2268 reg_user_size = 1 << extp->UserProtRegSize;
2269
2270 while (len > 0) {
2271 /* flash geometry fixup */
2272 data_offset = reg_prot_offset + 1;
2273 data_offset *= cfi->interleave * cfi->device_type;
2274 reg_prot_offset *= cfi->interleave * cfi->device_type;
2275 reg_fact_size *= cfi->interleave;
2276 reg_user_size *= cfi->interleave;
2277
2278 if (user_regs) {
2279 groups = reg_user_groups;
2280 groupsize = reg_user_size;
2281 /* skip over factory reg area */
2282 groupno = reg_fact_groups;
2283 data_offset += reg_fact_groups * reg_fact_size;
2284 } else {
2285 groups = reg_fact_groups;
2286 groupsize = reg_fact_size;
2287 groupno = 0;
2288 }
2289
332d71f7 2290 while (len > 0 && groups > 0) {
f77814dd
NP
2291 if (!action) {
2292 /*
2293 * Special case: if action is NULL
2294 * we fill buf with otp_info records.
2295 */
2296 struct otp_info *otpinfo;
2297 map_word lockword;
2298 len -= sizeof(struct otp_info);
2299 if (len <= 0)
2300 return -ENOSPC;
2301 ret = do_otp_read(map, chip,
2302 reg_prot_offset,
2303 (u_char *)&lockword,
2304 map_bankwidth(map),
2305 0, 0, 0);
2306 if (ret)
2307 return ret;
2308 otpinfo = (struct otp_info *)buf;
2309 otpinfo->start = from;
2310 otpinfo->length = groupsize;
2311 otpinfo->locked =
2312 !map_word_bitsset(map, lockword,
2313 CMD(1 << groupno));
2314 from += groupsize;
2315 buf += sizeof(*otpinfo);
2316 *retlen += sizeof(*otpinfo);
2317 } else if (from >= groupsize) {
2318 from -= groupsize;
332d71f7 2319 data_offset += groupsize;
f77814dd
NP
2320 } else {
2321 int size = groupsize;
2322 data_offset += from;
2323 size -= from;
2324 from = 0;
2325 if (size > len)
2326 size = len;
2327 ret = action(map, chip, data_offset,
2328 buf, size, reg_prot_offset,
2329 groupno, groupsize);
2330 if (ret < 0)
2331 return ret;
2332 buf += size;
2333 len -= size;
2334 *retlen += size;
332d71f7 2335 data_offset += size;
f77814dd
NP
2336 }
2337 groupno++;
2338 groups--;
2339 }
2340
2341 /* next OTP region */
2342 if (++field == extp->NumProtectionFields)
2343 break;
2344 reg_prot_offset = otp->ProtRegAddr;
2345 reg_fact_groups = otp->FactGroups;
2346 reg_fact_size = 1 << otp->FactProtRegSize;
2347 reg_user_groups = otp->UserGroups;
2348 reg_user_size = 1 << otp->UserProtRegSize;
2349 otp++;
2350 }
2351 }
2352
2353 return 0;
2354}
2355
2356static int cfi_intelext_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
2357 size_t len, size_t *retlen,
2358 u_char *buf)
2359{
2360 return cfi_intelext_otp_walk(mtd, from, len, retlen,
2361 buf, do_otp_read, 0);
2362}
2363
2364static int cfi_intelext_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
2365 size_t len, size_t *retlen,
2366 u_char *buf)
2367{
2368 return cfi_intelext_otp_walk(mtd, from, len, retlen,
2369 buf, do_otp_read, 1);
2370}
2371
2372static int cfi_intelext_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
2373 size_t len, size_t *retlen,
2374 u_char *buf)
2375{
2376 return cfi_intelext_otp_walk(mtd, from, len, retlen,
2377 buf, do_otp_write, 1);
2378}
2379
2380static int cfi_intelext_lock_user_prot_reg(struct mtd_info *mtd,
2381 loff_t from, size_t len)
2382{
2383 size_t retlen;
2384 return cfi_intelext_otp_walk(mtd, from, len, &retlen,
2385 NULL, do_otp_lock, 1);
2386}
2387
1f948b43 2388static int cfi_intelext_get_fact_prot_info(struct mtd_info *mtd,
f77814dd
NP
2389 struct otp_info *buf, size_t len)
2390{
2391 size_t retlen;
2392 int ret;
2393
2394 ret = cfi_intelext_otp_walk(mtd, 0, len, &retlen, (u_char *)buf, NULL, 0);
2395 return ret ? : retlen;
2396}
2397
2398static int cfi_intelext_get_user_prot_info(struct mtd_info *mtd,
2399 struct otp_info *buf, size_t len)
2400{
2401 size_t retlen;
2402 int ret;
2403
2404 ret = cfi_intelext_otp_walk(mtd, 0, len, &retlen, (u_char *)buf, NULL, 1);
2405 return ret ? : retlen;
2406}
2407
2408#endif
2409
0ecbc81a
RG
2410static void cfi_intelext_save_locks(struct mtd_info *mtd)
2411{
2412 struct mtd_erase_region_info *region;
2413 int block, status, i;
2414 unsigned long adr;
2415 size_t len;
2416
2417 for (i = 0; i < mtd->numeraseregions; i++) {
2418 region = &mtd->eraseregions[i];
2419 if (!region->lockmap)
2420 continue;
2421
2422 for (block = 0; block < region->numblocks; block++){
2423 len = region->erasesize;
2424 adr = region->offset + block * len;
2425
2426 status = cfi_varsize_frob(mtd,
029a9eb1 2427 do_getlockstatus_oneblock, adr, len, NULL);
0ecbc81a
RG
2428 if (status)
2429 set_bit(block, region->lockmap);
2430 else
2431 clear_bit(block, region->lockmap);
2432 }
2433 }
2434}
2435
1da177e4
LT
2436static int cfi_intelext_suspend(struct mtd_info *mtd)
2437{
2438 struct map_info *map = mtd->priv;
2439 struct cfi_private *cfi = map->fldrv_priv;
0ecbc81a 2440 struct cfi_pri_intelext *extp = cfi->cmdset_priv;
1da177e4
LT
2441 int i;
2442 struct flchip *chip;
2443 int ret = 0;
2444
e619a75f 2445 if ((mtd->flags & MTD_POWERUP_LOCK)
0ecbc81a
RG
2446 && extp && (extp->FeatureSupport & (1 << 5)))
2447 cfi_intelext_save_locks(mtd);
2448
1da177e4
LT
2449 for (i=0; !ret && i<cfi->numchips; i++) {
2450 chip = &cfi->chips[i];
2451
c4e77376 2452 mutex_lock(&chip->mutex);
1da177e4
LT
2453
2454 switch (chip->state) {
2455 case FL_READY:
2456 case FL_STATUS:
2457 case FL_CFI_QUERY:
2458 case FL_JEDEC_QUERY:
2459 if (chip->oldstate == FL_READY) {
a86aaa6d
DA
2460 /* place the chip in a known state before suspend */
2461 map_write(map, CMD(0xFF), cfi->chips[i].start);
1da177e4
LT
2462 chip->oldstate = chip->state;
2463 chip->state = FL_PM_SUSPENDED;
1f948b43 2464 /* No need to wake_up() on this state change -
1da177e4
LT
2465 * as the whole point is that nobody can do anything
2466 * with the chip now anyway.
2467 */
2468 } else {
2469 /* There seems to be an operation pending. We must wait for it. */
2470 printk(KERN_NOTICE "Flash device refused suspend due to pending operation (oldstate %d)\n", chip->oldstate);
2471 ret = -EAGAIN;
2472 }
2473 break;
2474 default:
2475 /* Should we actually wait? Once upon a time these routines weren't
2476 allowed to. Or should we return -EAGAIN, because the upper layers
2477 ought to have already shut down anything which was using the device
2478 anyway? The latter for now. */
2479 printk(KERN_NOTICE "Flash device refused suspend due to active operation (state %d)\n", chip->oldstate);
2480 ret = -EAGAIN;
2481 case FL_PM_SUSPENDED:
2482 break;
2483 }
c4e77376 2484 mutex_unlock(&chip->mutex);
1da177e4
LT
2485 }
2486
2487 /* Unlock the chips again */
2488
2489 if (ret) {
2490 for (i--; i >=0; i--) {
2491 chip = &cfi->chips[i];
1f948b43 2492
c4e77376 2493 mutex_lock(&chip->mutex);
1f948b43 2494
1da177e4
LT
2495 if (chip->state == FL_PM_SUSPENDED) {
2496 /* No need to force it into a known state here,
2497 because we're returning failure, and it didn't
2498 get power cycled */
2499 chip->state = chip->oldstate;
2500 chip->oldstate = FL_READY;
2501 wake_up(&chip->wq);
2502 }
c4e77376 2503 mutex_unlock(&chip->mutex);
1da177e4 2504 }
1f948b43
TG
2505 }
2506
1da177e4
LT
2507 return ret;
2508}
2509
0ecbc81a
RG
2510static void cfi_intelext_restore_locks(struct mtd_info *mtd)
2511{
2512 struct mtd_erase_region_info *region;
2513 int block, i;
2514 unsigned long adr;
2515 size_t len;
2516
2517 for (i = 0; i < mtd->numeraseregions; i++) {
2518 region = &mtd->eraseregions[i];
2519 if (!region->lockmap)
2520 continue;
2521
2522 for (block = 0; block < region->numblocks; block++) {
2523 len = region->erasesize;
2524 adr = region->offset + block * len;
2525
2526 if (!test_bit(block, region->lockmap))
2527 cfi_intelext_unlock(mtd, adr, len);
2528 }
2529 }
2530}
2531
1da177e4
LT
2532static void cfi_intelext_resume(struct mtd_info *mtd)
2533{
2534 struct map_info *map = mtd->priv;
2535 struct cfi_private *cfi = map->fldrv_priv;
0ecbc81a 2536 struct cfi_pri_intelext *extp = cfi->cmdset_priv;
1da177e4
LT
2537 int i;
2538 struct flchip *chip;
2539
2540 for (i=0; i<cfi->numchips; i++) {
1f948b43 2541
1da177e4
LT
2542 chip = &cfi->chips[i];
2543
c4e77376 2544 mutex_lock(&chip->mutex);
1f948b43 2545
1da177e4
LT
2546 /* Go to known state. Chip may have been power cycled */
2547 if (chip->state == FL_PM_SUSPENDED) {
2548 map_write(map, CMD(0xFF), cfi->chips[i].start);
2549 chip->oldstate = chip->state = FL_READY;
2550 wake_up(&chip->wq);
2551 }
2552
c4e77376 2553 mutex_unlock(&chip->mutex);
1da177e4 2554 }
0ecbc81a 2555
e619a75f 2556 if ((mtd->flags & MTD_POWERUP_LOCK)
0ecbc81a
RG
2557 && extp && (extp->FeatureSupport & (1 << 5)))
2558 cfi_intelext_restore_locks(mtd);
1da177e4
LT
2559}
2560
963a6fb0
NP
2561static int cfi_intelext_reset(struct mtd_info *mtd)
2562{
2563 struct map_info *map = mtd->priv;
2564 struct cfi_private *cfi = map->fldrv_priv;
2565 int i, ret;
2566
2567 for (i=0; i < cfi->numchips; i++) {
2568 struct flchip *chip = &cfi->chips[i];
2569
2570 /* force the completion of any ongoing operation
1f948b43 2571 and switch to array mode so any bootloader in
963a6fb0 2572 flash is accessible for soft reboot. */
c4e77376 2573 mutex_lock(&chip->mutex);
c4a9f88d 2574 ret = get_chip(map, chip, chip->start, FL_SHUTDOWN);
963a6fb0
NP
2575 if (!ret) {
2576 map_write(map, CMD(0xff), chip->start);
c4a9f88d 2577 chip->state = FL_SHUTDOWN;
c9f7ec30 2578 put_chip(map, chip, chip->start);
963a6fb0 2579 }
c4e77376 2580 mutex_unlock(&chip->mutex);
963a6fb0
NP
2581 }
2582
2583 return 0;
2584}
2585
2586static int cfi_intelext_reboot(struct notifier_block *nb, unsigned long val,
2587 void *v)
2588{
2589 struct mtd_info *mtd;
2590
2591 mtd = container_of(nb, struct mtd_info, reboot_notifier);
2592 cfi_intelext_reset(mtd);
2593 return NOTIFY_DONE;
2594}
2595
1da177e4
LT
2596static void cfi_intelext_destroy(struct mtd_info *mtd)
2597{
2598 struct map_info *map = mtd->priv;
2599 struct cfi_private *cfi = map->fldrv_priv;
0ecbc81a
RG
2600 struct mtd_erase_region_info *region;
2601 int i;
963a6fb0
NP
2602 cfi_intelext_reset(mtd);
2603 unregister_reboot_notifier(&mtd->reboot_notifier);
1da177e4
LT
2604 kfree(cfi->cmdset_priv);
2605 kfree(cfi->cfiq);
2606 kfree(cfi->chips[0].priv);
2607 kfree(cfi);
0ecbc81a
RG
2608 for (i = 0; i < mtd->numeraseregions; i++) {
2609 region = &mtd->eraseregions[i];
2610 if (region->lockmap)
2611 kfree(region->lockmap);
2612 }
1da177e4
LT
2613 kfree(mtd->eraseregions);
2614}
2615
1da177e4
LT
2616MODULE_LICENSE("GPL");
2617MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org> et al.");
2618MODULE_DESCRIPTION("MTD chip driver for Intel/Sharp flash chips");
a15bdeef
DW
2619MODULE_ALIAS("cfi_cmdset_0003");
2620MODULE_ALIAS("cfi_cmdset_0200");