[mirror_ubuntu-eoan-kernel.git] / drivers / mtd / devices / bcm47xxsflash.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __BCM47XXSFLASH_H
#define __BCM47XXSFLASH_H

#include <linux/mtd/mtd.h>

#define BCM47XXSFLASH_WINDOW_SZ			SZ_16M

/* Used for ST flashes only. */
#define OPCODE_ST_WREN		0x0006		/* Write Enable */
#define OPCODE_ST_WRDIS		0x0004		/* Write Disable */
#define OPCODE_ST_RDSR		0x0105		/* Read Status Register */
#define OPCODE_ST_WRSR		0x0101		/* Write Status Register */
#define OPCODE_ST_READ		0x0303		/* Read Data Bytes */
#define OPCODE_ST_PP		0x0302		/* Page Program */
#define OPCODE_ST_SE		0x02d8		/* Sector Erase */
#define OPCODE_ST_BE		0x00c7		/* Bulk Erase */
#define OPCODE_ST_DP		0x00b9		/* Deep Power-down */
#define OPCODE_ST_RES		0x03ab		/* Read Electronic Signature */
#define OPCODE_ST_CSA		0x1000		/* Keep chip select asserted */
#define OPCODE_ST_SSE		0x0220		/* Sub-sector Erase */
#define OPCODE_ST_READ4B	0x6313		/* Read Data Bytes in 4Byte addressing mode */

/* Used for Atmel flashes only. */
#define OPCODE_AT_READ				0x07e8
#define OPCODE_AT_PAGE_READ			0x07d2
#define OPCODE_AT_STATUS			0x01d7
#define OPCODE_AT_BUF1_WRITE			0x0384
#define OPCODE_AT_BUF2_WRITE			0x0387
#define OPCODE_AT_BUF1_ERASE_PROGRAM		0x0283
#define OPCODE_AT_BUF2_ERASE_PROGRAM		0x0286
#define OPCODE_AT_BUF1_PROGRAM			0x0288
#define OPCODE_AT_BUF2_PROGRAM			0x0289
#define OPCODE_AT_PAGE_ERASE			0x0281
#define OPCODE_AT_BLOCK_ERASE			0x0250
#define OPCODE_AT_BUF1_WRITE_ERASE_PROGRAM	0x0382
#define OPCODE_AT_BUF2_WRITE_ERASE_PROGRAM	0x0385
#define OPCODE_AT_BUF1_LOAD			0x0253
#define OPCODE_AT_BUF2_LOAD			0x0255
#define OPCODE_AT_BUF1_COMPARE			0x0260
#define OPCODE_AT_BUF2_COMPARE			0x0261
#define OPCODE_AT_BUF1_REPROGRAM		0x0258
#define OPCODE_AT_BUF2_REPROGRAM		0x0259

/* Status register bits for ST flashes */
#define SR_ST_WIP		0x01		/* Write In Progress */
#define SR_ST_WEL		0x02		/* Write Enable Latch */
#define SR_ST_BP_MASK		0x1c		/* Block Protect */
#define SR_ST_BP_SHIFT		2
#define SR_ST_SRWD		0x80		/* Status Register Write Disable */

/* Status register bits for Atmel flashes */
#define SR_AT_READY		0x80
#define SR_AT_MISMATCH		0x40
#define SR_AT_ID_MASK		0x38
#define SR_AT_ID_SHIFT		3

struct bcma_drv_cc;

enum bcm47xxsflash_type {
	BCM47XXSFLASH_TYPE_ATMEL,
	BCM47XXSFLASH_TYPE_ST,
};

struct bcm47xxsflash {
	struct bcma_drv_cc *bcma_cc;
	int (*cc_read)(struct bcm47xxsflash *b47s, u16 offset);
	void (*cc_write)(struct bcm47xxsflash *b47s, u16 offset, u32 value);

	enum bcm47xxsflash_type type;

	void __iomem *window;

	u32 blocksize;
	u16 numblocks;
	u32 size;

	struct mtd_info mtd;
};

#endif /* BCM47XXSFLASH */
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
a2f74a7d RM	2	#ifndef __BCM47XXSFLASH_H
	3	#define __BCM47XXSFLASH_H
	4
	5	#include <linux/mtd/mtd.h>
	6
ccc38234 RM	7	#define BCM47XXSFLASH_WINDOW_SZ SZ_16M
ccc38234 RM	8
a6fb35d3 RM	9	/* Used for ST flashes only. */
	10	#define OPCODE_ST_WREN 0x0006 /* Write Enable */
	11	#define OPCODE_ST_WRDIS 0x0004 /* Write Disable */
	12	#define OPCODE_ST_RDSR 0x0105 /* Read Status Register */
	13	#define OPCODE_ST_WRSR 0x0101 /* Write Status Register */
	14	#define OPCODE_ST_READ 0x0303 /* Read Data Bytes */
	15	#define OPCODE_ST_PP 0x0302 /* Page Program */
	16	#define OPCODE_ST_SE 0x02d8 /* Sector Erase */
	17	#define OPCODE_ST_BE 0x00c7 /* Bulk Erase */
	18	#define OPCODE_ST_DP 0x00b9 /* Deep Power-down */
	19	#define OPCODE_ST_RES 0x03ab /* Read Electronic Signature */
	20	#define OPCODE_ST_CSA 0x1000 /* Keep chip select asserted */
	21	#define OPCODE_ST_SSE 0x0220 /* Sub-sector Erase */
ccc38234	22	#define OPCODE_ST_READ4B 0x6313 /* Read Data Bytes in 4Byte addressing mode */
a6fb35d3 RM	23
	24	/* Used for Atmel flashes only. */
	25	#define OPCODE_AT_READ 0x07e8
	26	#define OPCODE_AT_PAGE_READ 0x07d2
	27	#define OPCODE_AT_STATUS 0x01d7
	28	#define OPCODE_AT_BUF1_WRITE 0x0384
	29	#define OPCODE_AT_BUF2_WRITE 0x0387
	30	#define OPCODE_AT_BUF1_ERASE_PROGRAM 0x0283
	31	#define OPCODE_AT_BUF2_ERASE_PROGRAM 0x0286
	32	#define OPCODE_AT_BUF1_PROGRAM 0x0288
	33	#define OPCODE_AT_BUF2_PROGRAM 0x0289
	34	#define OPCODE_AT_PAGE_ERASE 0x0281
	35	#define OPCODE_AT_BLOCK_ERASE 0x0250
	36	#define OPCODE_AT_BUF1_WRITE_ERASE_PROGRAM 0x0382
	37	#define OPCODE_AT_BUF2_WRITE_ERASE_PROGRAM 0x0385
	38	#define OPCODE_AT_BUF1_LOAD 0x0253
	39	#define OPCODE_AT_BUF2_LOAD 0x0255
	40	#define OPCODE_AT_BUF1_COMPARE 0x0260
	41	#define OPCODE_AT_BUF2_COMPARE 0x0261
	42	#define OPCODE_AT_BUF1_REPROGRAM 0x0258
	43	#define OPCODE_AT_BUF2_REPROGRAM 0x0259
	44
	45	/* Status register bits for ST flashes */
	46	#define SR_ST_WIP 0x01 /* Write In Progress */
	47	#define SR_ST_WEL 0x02 /* Write Enable Latch */
	48	#define SR_ST_BP_MASK 0x1c /* Block Protect */
	49	#define SR_ST_BP_SHIFT 2
	50	#define SR_ST_SRWD 0x80 /* Status Register Write Disable */
	51
	52	/* Status register bits for Atmel flashes */
	53	#define SR_AT_READY 0x80
	54	#define SR_AT_MISMATCH 0x40
	55	#define SR_AT_ID_MASK 0x38
	56	#define SR_AT_ID_SHIFT 3
	57
41c81536 RM	58	struct bcma_drv_cc;
41c81536 RM	59
1f816bc7 RM	60	enum bcm47xxsflash_type {
	61	BCM47XXSFLASH_TYPE_ATMEL,
	62	BCM47XXSFLASH_TYPE_ST,
	63	};
	64
a2f74a7d	65	struct bcm47xxsflash {
41c81536	66	struct bcma_drv_cc *bcma_cc;
265dfbd9 RM	67	int (cc_read)(struct bcm47xxsflash b47s, u16 offset);
265dfbd9 RM	68	void (cc_write)(struct bcm47xxsflash b47s, u16 offset, u32 value);
41c81536	69
1f816bc7 RM	70	enum bcm47xxsflash_type type;
1f816bc7 RM	71
5651d6aa BN	72	void __iomem *window;
5651d6aa BN	73
a2f74a7d RM	74	u32 blocksize;
	75	u16 numblocks;
	76	u32 size;
	77
	78	struct mtd_info mtd;
	79	};
	80
	81	#endif /* BCM47XXSFLASH */