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1da177e4
LT
1
2/*
3 * Linux driver for Disk-On-Chip Millennium
4 * (c) 1999 Machine Vision Holdings, Inc.
5 * (c) 1999, 2000 David Woodhouse <dwmw2@infradead.org>
1da177e4
LT
6 */
7
8#include <linux/kernel.h>
9#include <linux/module.h>
10#include <asm/errno.h>
11#include <asm/io.h>
12#include <asm/uaccess.h>
13#include <linux/miscdevice.h>
1da177e4
LT
14#include <linux/delay.h>
15#include <linux/slab.h>
1da177e4
LT
16#include <linux/init.h>
17#include <linux/types.h>
18#include <linux/bitops.h>
19
20#include <linux/mtd/mtd.h>
21#include <linux/mtd/nand.h>
22#include <linux/mtd/doc2000.h>
23
24/* #define ECC_DEBUG */
25
26/* I have no idea why some DoC chips can not use memcop_form|to_io().
27 * This may be due to the different revisions of the ASIC controller built-in or
28 * simplily a QA/Bug issue. Who knows ?? If you have trouble, please uncomment
29 * this:*/
30#undef USE_MEMCPY
31
32static int doc_read(struct mtd_info *mtd, loff_t from, size_t len,
33 size_t *retlen, u_char *buf);
34static int doc_write(struct mtd_info *mtd, loff_t to, size_t len,
35 size_t *retlen, const u_char *buf);
8593fbc6
TG
36static int doc_read_oob(struct mtd_info *mtd, loff_t ofs,
37 struct mtd_oob_ops *ops);
38static int doc_write_oob(struct mtd_info *mtd, loff_t ofs,
39 struct mtd_oob_ops *ops);
1da177e4
LT
40static int doc_erase (struct mtd_info *mtd, struct erase_info *instr);
41
42static struct mtd_info *docmillist = NULL;
43
44/* Perform the required delay cycles by reading from the NOP register */
45static void DoC_Delay(void __iomem * docptr, unsigned short cycles)
46{
47 volatile char dummy;
48 int i;
49
50 for (i = 0; i < cycles; i++)
51 dummy = ReadDOC(docptr, NOP);
52}
53
54/* DOC_WaitReady: Wait for RDY line to be asserted by the flash chip */
55static int _DoC_WaitReady(void __iomem * docptr)
56{
57 unsigned short c = 0xffff;
58
59 DEBUG(MTD_DEBUG_LEVEL3,
60 "_DoC_WaitReady called for out-of-line wait\n");
61
62 /* Out-of-line routine to wait for chip response */
63 while (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B) && --c)
64 ;
65
66 if (c == 0)
67 DEBUG(MTD_DEBUG_LEVEL2, "_DoC_WaitReady timed out.\n");
68
69 return (c == 0);
70}
71
72static inline int DoC_WaitReady(void __iomem * docptr)
73{
74 /* This is inline, to optimise the common case, where it's ready instantly */
75 int ret = 0;
76
77 /* 4 read form NOP register should be issued in prior to the read from CDSNControl
78 see Software Requirement 11.4 item 2. */
79 DoC_Delay(docptr, 4);
80
81 if (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B))
82 /* Call the out-of-line routine to wait */
83 ret = _DoC_WaitReady(docptr);
84
85 /* issue 2 read from NOP register after reading from CDSNControl register
86 see Software Requirement 11.4 item 2. */
87 DoC_Delay(docptr, 2);
88
89 return ret;
90}
91
92/* DoC_Command: Send a flash command to the flash chip through the CDSN IO register
93 with the internal pipeline. Each of 4 delay cycles (read from the NOP register) is
94 required after writing to CDSN Control register, see Software Requirement 11.4 item 3. */
95
858119e1 96static void DoC_Command(void __iomem * docptr, unsigned char command,
1da177e4
LT
97 unsigned char xtraflags)
98{
99 /* Assert the CLE (Command Latch Enable) line to the flash chip */
100 WriteDOC(xtraflags | CDSN_CTRL_CLE | CDSN_CTRL_CE, docptr, CDSNControl);
101 DoC_Delay(docptr, 4);
102
103 /* Send the command */
104 WriteDOC(command, docptr, Mil_CDSN_IO);
105 WriteDOC(0x00, docptr, WritePipeTerm);
106
107 /* Lower the CLE line */
108 WriteDOC(xtraflags | CDSN_CTRL_CE, docptr, CDSNControl);
109 DoC_Delay(docptr, 4);
110}
111
112/* DoC_Address: Set the current address for the flash chip through the CDSN IO register
113 with the internal pipeline. Each of 4 delay cycles (read from the NOP register) is
114 required after writing to CDSN Control register, see Software Requirement 11.4 item 3. */
115
116static inline void DoC_Address(void __iomem * docptr, int numbytes, unsigned long ofs,
117 unsigned char xtraflags1, unsigned char xtraflags2)
118{
119 /* Assert the ALE (Address Latch Enable) line to the flash chip */
120 WriteDOC(xtraflags1 | CDSN_CTRL_ALE | CDSN_CTRL_CE, docptr, CDSNControl);
121 DoC_Delay(docptr, 4);
122
123 /* Send the address */
124 switch (numbytes)
125 {
126 case 1:
127 /* Send single byte, bits 0-7. */
128 WriteDOC(ofs & 0xff, docptr, Mil_CDSN_IO);
129 WriteDOC(0x00, docptr, WritePipeTerm);
130 break;
131 case 2:
132 /* Send bits 9-16 followed by 17-23 */
133 WriteDOC((ofs >> 9) & 0xff, docptr, Mil_CDSN_IO);
134 WriteDOC((ofs >> 17) & 0xff, docptr, Mil_CDSN_IO);
135 WriteDOC(0x00, docptr, WritePipeTerm);
136 break;
137 case 3:
138 /* Send 0-7, 9-16, then 17-23 */
139 WriteDOC(ofs & 0xff, docptr, Mil_CDSN_IO);
140 WriteDOC((ofs >> 9) & 0xff, docptr, Mil_CDSN_IO);
141 WriteDOC((ofs >> 17) & 0xff, docptr, Mil_CDSN_IO);
142 WriteDOC(0x00, docptr, WritePipeTerm);
143 break;
144 default:
145 return;
146 }
147
148 /* Lower the ALE line */
149 WriteDOC(xtraflags1 | xtraflags2 | CDSN_CTRL_CE, docptr, CDSNControl);
150 DoC_Delay(docptr, 4);
151}
152
153/* DoC_SelectChip: Select a given flash chip within the current floor */
154static int DoC_SelectChip(void __iomem * docptr, int chip)
155{
156 /* Select the individual flash chip requested */
157 WriteDOC(chip, docptr, CDSNDeviceSelect);
158 DoC_Delay(docptr, 4);
159
160 /* Wait for it to be ready */
161 return DoC_WaitReady(docptr);
162}
163
164/* DoC_SelectFloor: Select a given floor (bank of flash chips) */
165static int DoC_SelectFloor(void __iomem * docptr, int floor)
166{
167 /* Select the floor (bank) of chips required */
168 WriteDOC(floor, docptr, FloorSelect);
169
170 /* Wait for the chip to be ready */
171 return DoC_WaitReady(docptr);
172}
173
174/* DoC_IdentChip: Identify a given NAND chip given {floor,chip} */
175static int DoC_IdentChip(struct DiskOnChip *doc, int floor, int chip)
176{
177 int mfr, id, i, j;
178 volatile char dummy;
179
180 /* Page in the required floor/chip
181 FIXME: is this supported by Millennium ?? */
182 DoC_SelectFloor(doc->virtadr, floor);
183 DoC_SelectChip(doc->virtadr, chip);
184
185 /* Reset the chip, see Software Requirement 11.4 item 1. */
186 DoC_Command(doc->virtadr, NAND_CMD_RESET, CDSN_CTRL_WP);
187 DoC_WaitReady(doc->virtadr);
188
e5580fbe 189 /* Read the NAND chip ID: 1. Send ReadID command */
1da177e4
LT
190 DoC_Command(doc->virtadr, NAND_CMD_READID, CDSN_CTRL_WP);
191
e5580fbe 192 /* Read the NAND chip ID: 2. Send address byte zero */
1da177e4
LT
193 DoC_Address(doc->virtadr, 1, 0x00, CDSN_CTRL_WP, 0x00);
194
195 /* Read the manufacturer and device id codes of the flash device through
196 CDSN IO register see Software Requirement 11.4 item 5.*/
197 dummy = ReadDOC(doc->virtadr, ReadPipeInit);
198 DoC_Delay(doc->virtadr, 2);
199 mfr = ReadDOC(doc->virtadr, Mil_CDSN_IO);
200
201 DoC_Delay(doc->virtadr, 2);
202 id = ReadDOC(doc->virtadr, Mil_CDSN_IO);
203 dummy = ReadDOC(doc->virtadr, LastDataRead);
204
205 /* No response - return failure */
206 if (mfr == 0xff || mfr == 0)
207 return 0;
208
209 /* FIXME: to deal with multi-flash on multi-Millennium case more carefully */
210 for (i = 0; nand_flash_ids[i].name != NULL; i++) {
211 if ( id == nand_flash_ids[i].id) {
212 /* Try to identify manufacturer */
213 for (j = 0; nand_manuf_ids[j].id != 0x0; j++) {
214 if (nand_manuf_ids[j].id == mfr)
215 break;
e5580fbe 216 }
1da177e4
LT
217 printk(KERN_INFO "Flash chip found: Manufacturer ID: %2.2X, "
218 "Chip ID: %2.2X (%s:%s)\n",
219 mfr, id, nand_manuf_ids[j].name, nand_flash_ids[i].name);
220 doc->mfr = mfr;
221 doc->id = id;
222 doc->chipshift = ffs((nand_flash_ids[i].chipsize << 20)) - 1;
223 break;
224 }
225 }
226
227 if (nand_flash_ids[i].name == NULL)
228 return 0;
229 else
230 return 1;
231}
232
233/* DoC_ScanChips: Find all NAND chips present in a DiskOnChip, and identify them */
234static void DoC_ScanChips(struct DiskOnChip *this)
235{
236 int floor, chip;
237 int numchips[MAX_FLOORS_MIL];
238 int ret;
239
240 this->numchips = 0;
241 this->mfr = 0;
242 this->id = 0;
243
244 /* For each floor, find the number of valid chips it contains */
245 for (floor = 0,ret = 1; floor < MAX_FLOORS_MIL; floor++) {
246 numchips[floor] = 0;
247 for (chip = 0; chip < MAX_CHIPS_MIL && ret != 0; chip++) {
248 ret = DoC_IdentChip(this, floor, chip);
249 if (ret) {
250 numchips[floor]++;
251 this->numchips++;
252 }
253 }
254 }
255 /* If there are none at all that we recognise, bail */
256 if (!this->numchips) {
257 printk("No flash chips recognised.\n");
258 return;
259 }
260
261 /* Allocate an array to hold the information for each chip */
262 this->chips = kmalloc(sizeof(struct Nand) * this->numchips, GFP_KERNEL);
263 if (!this->chips){
264 printk("No memory for allocating chip info structures\n");
265 return;
266 }
267
e5580fbe 268 /* Fill out the chip array with {floor, chipno} for each
1da177e4
LT
269 * detected chip in the device. */
270 for (floor = 0, ret = 0; floor < MAX_FLOORS_MIL; floor++) {
271 for (chip = 0 ; chip < numchips[floor] ; chip++) {
272 this->chips[ret].floor = floor;
273 this->chips[ret].chip = chip;
274 this->chips[ret].curadr = 0;
275 this->chips[ret].curmode = 0x50;
276 ret++;
277 }
278 }
279
280 /* Calculate and print the total size of the device */
281 this->totlen = this->numchips * (1 << this->chipshift);
282 printk(KERN_INFO "%d flash chips found. Total DiskOnChip size: %ld MiB\n",
283 this->numchips ,this->totlen >> 20);
284}
285
286static int DoCMil_is_alias(struct DiskOnChip *doc1, struct DiskOnChip *doc2)
287{
288 int tmp1, tmp2, retval;
289
290 if (doc1->physadr == doc2->physadr)
291 return 1;
292
293 /* Use the alias resolution register which was set aside for this
294 * purpose. If it's value is the same on both chips, they might
295 * be the same chip, and we write to one and check for a change in
296 * the other. It's unclear if this register is usuable in the
297 * DoC 2000 (it's in the Millenium docs), but it seems to work. */
298 tmp1 = ReadDOC(doc1->virtadr, AliasResolution);
299 tmp2 = ReadDOC(doc2->virtadr, AliasResolution);
300 if (tmp1 != tmp2)
301 return 0;
e5580fbe 302
1da177e4
LT
303 WriteDOC((tmp1+1) % 0xff, doc1->virtadr, AliasResolution);
304 tmp2 = ReadDOC(doc2->virtadr, AliasResolution);
305 if (tmp2 == (tmp1+1) % 0xff)
306 retval = 1;
307 else
308 retval = 0;
309
310 /* Restore register contents. May not be necessary, but do it just to
311 * be safe. */
312 WriteDOC(tmp1, doc1->virtadr, AliasResolution);
313
314 return retval;
315}
316
5e535429
DW
317/* This routine is found from the docprobe code by symbol_get(),
318 * which will bump the use count of this module. */
319void DoCMil_init(struct mtd_info *mtd)
1da177e4
LT
320{
321 struct DiskOnChip *this = mtd->priv;
322 struct DiskOnChip *old = NULL;
323
324 /* We must avoid being called twice for the same device. */
325 if (docmillist)
326 old = docmillist->priv;
327
328 while (old) {
329 if (DoCMil_is_alias(this, old)) {
330 printk(KERN_NOTICE "Ignoring DiskOnChip Millennium at "
331 "0x%lX - already configured\n", this->physadr);
332 iounmap(this->virtadr);
333 kfree(mtd);
334 return;
335 }
336 if (old->nextdoc)
337 old = old->nextdoc->priv;
338 else
339 old = NULL;
340 }
341
342 mtd->name = "DiskOnChip Millennium";
343 printk(KERN_NOTICE "DiskOnChip Millennium found at address 0x%lX\n",
344 this->physadr);
345
346 mtd->type = MTD_NANDFLASH;
347 mtd->flags = MTD_CAP_NANDFLASH;
1da177e4
LT
348 mtd->size = 0;
349
350 /* FIXME: erase size is not always 8KiB */
351 mtd->erasesize = 0x2000;
352
28318776 353 mtd->writesize = 512;
1da177e4
LT
354 mtd->oobsize = 16;
355 mtd->owner = THIS_MODULE;
356 mtd->erase = doc_erase;
357 mtd->point = NULL;
358 mtd->unpoint = NULL;
359 mtd->read = doc_read;
360 mtd->write = doc_write;
1da177e4
LT
361 mtd->read_oob = doc_read_oob;
362 mtd->write_oob = doc_write_oob;
363 mtd->sync = NULL;
364
365 this->totlen = 0;
366 this->numchips = 0;
367 this->curfloor = -1;
368 this->curchip = -1;
369
370 /* Ident all the chips present. */
371 DoC_ScanChips(this);
372
373 if (!this->totlen) {
374 kfree(mtd);
375 iounmap(this->virtadr);
376 } else {
377 this->nextdoc = docmillist;
378 docmillist = mtd;
379 mtd->size = this->totlen;
380 add_mtd_device(mtd);
381 return;
382 }
383}
f0ad11d0 384EXPORT_SYMBOL_GPL(DoCMil_init);
1da177e4
LT
385
386static int doc_read (struct mtd_info *mtd, loff_t from, size_t len,
387 size_t *retlen, u_char *buf)
1da177e4
LT
388{
389 int i, ret;
390 volatile char dummy;
7f8a8940 391 unsigned char syndrome[6], eccbuf[6];
1da177e4
LT
392 struct DiskOnChip *this = mtd->priv;
393 void __iomem *docptr = this->virtadr;
394 struct Nand *mychip = &this->chips[from >> (this->chipshift)];
395
396 /* Don't allow read past end of device */
397 if (from >= this->totlen)
398 return -EINVAL;
399
400 /* Don't allow a single read to cross a 512-byte block boundary */
e5580fbe 401 if (from + len > ((from | 0x1ff) + 1))
1da177e4
LT
402 len = ((from | 0x1ff) + 1) - from;
403
404 /* Find the chip which is to be used and select it */
405 if (this->curfloor != mychip->floor) {
406 DoC_SelectFloor(docptr, mychip->floor);
407 DoC_SelectChip(docptr, mychip->chip);
408 } else if (this->curchip != mychip->chip) {
409 DoC_SelectChip(docptr, mychip->chip);
410 }
411 this->curfloor = mychip->floor;
412 this->curchip = mychip->chip;
413
414 /* issue the Read0 or Read1 command depend on which half of the page
415 we are accessing. Polling the Flash Ready bit after issue 3 bytes
416 address in Sequence Read Mode, see Software Requirement 11.4 item 1.*/
417 DoC_Command(docptr, (from >> 8) & 1, CDSN_CTRL_WP);
418 DoC_Address(docptr, 3, from, CDSN_CTRL_WP, 0x00);
419 DoC_WaitReady(docptr);
420
7f8a8940
TG
421 /* init the ECC engine, see Reed-Solomon EDC/ECC 11.1 .*/
422 WriteDOC (DOC_ECC_RESET, docptr, ECCConf);
423 WriteDOC (DOC_ECC_EN, docptr, ECCConf);
1da177e4
LT
424
425 /* Read the data via the internal pipeline through CDSN IO register,
426 see Pipelined Read Operations 11.3 */
427 dummy = ReadDOC(docptr, ReadPipeInit);
428#ifndef USE_MEMCPY
429 for (i = 0; i < len-1; i++) {
430 /* N.B. you have to increase the source address in this way or the
431 ECC logic will not work properly */
432 buf[i] = ReadDOC(docptr, Mil_CDSN_IO + (i & 0xff));
433 }
434#else
435 memcpy_fromio(buf, docptr + DoC_Mil_CDSN_IO, len - 1);
436#endif
437 buf[len - 1] = ReadDOC(docptr, LastDataRead);
438
439 /* Let the caller know we completed it */
440 *retlen = len;
441 ret = 0;
442
7f8a8940
TG
443 /* Read the ECC data from Spare Data Area,
444 see Reed-Solomon EDC/ECC 11.1 */
445 dummy = ReadDOC(docptr, ReadPipeInit);
1da177e4 446#ifndef USE_MEMCPY
7f8a8940
TG
447 for (i = 0; i < 5; i++) {
448 /* N.B. you have to increase the source address in this way or the
449 ECC logic will not work properly */
450 eccbuf[i] = ReadDOC(docptr, Mil_CDSN_IO + i);
451 }
1da177e4 452#else
7f8a8940 453 memcpy_fromio(eccbuf, docptr + DoC_Mil_CDSN_IO, 5);
1da177e4 454#endif
7f8a8940 455 eccbuf[5] = ReadDOC(docptr, LastDataRead);
1da177e4 456
7f8a8940
TG
457 /* Flush the pipeline */
458 dummy = ReadDOC(docptr, ECCConf);
459 dummy = ReadDOC(docptr, ECCConf);
1da177e4 460
7f8a8940
TG
461 /* Check the ECC Status */
462 if (ReadDOC(docptr, ECCConf) & 0x80) {
463 int nb_errors;
464 /* There was an ECC error */
1da177e4 465#ifdef ECC_DEBUG
7f8a8940 466 printk("DiskOnChip ECC Error: Read at %lx\n", (long)from);
1da177e4 467#endif
7f8a8940
TG
468 /* Read the ECC syndrom through the DiskOnChip ECC logic.
469 These syndrome will be all ZERO when there is no error */
470 for (i = 0; i < 6; i++) {
471 syndrome[i] = ReadDOC(docptr, ECCSyndrome0 + i);
472 }
473 nb_errors = doc_decode_ecc(buf, syndrome);
1da177e4 474#ifdef ECC_DEBUG
7f8a8940 475 printk("ECC Errors corrected: %x\n", nb_errors);
1da177e4 476#endif
7f8a8940
TG
477 if (nb_errors < 0) {
478 /* We return error, but have actually done the read. Not that
479 this can be told to user-space, via sys_read(), but at least
480 MTD-aware stuff can know about it by checking *retlen */
481 ret = -EIO;
1da177e4 482 }
7f8a8940 483 }
1da177e4
LT
484
485#ifdef PSYCHO_DEBUG
7f8a8940
TG
486 printk("ECC DATA at %lx: %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
487 (long)from, eccbuf[0], eccbuf[1], eccbuf[2], eccbuf[3],
488 eccbuf[4], eccbuf[5]);
1da177e4
LT
489#endif
490
7f8a8940
TG
491 /* disable the ECC engine */
492 WriteDOC(DOC_ECC_DIS, docptr , ECCConf);
1da177e4
LT
493
494 return ret;
495}
496
497static int doc_write (struct mtd_info *mtd, loff_t to, size_t len,
498 size_t *retlen, const u_char *buf)
1da177e4
LT
499{
500 int i,ret = 0;
7f8a8940 501 char eccbuf[6];
1da177e4
LT
502 volatile char dummy;
503 struct DiskOnChip *this = mtd->priv;
504 void __iomem *docptr = this->virtadr;
505 struct Nand *mychip = &this->chips[to >> (this->chipshift)];
506
507 /* Don't allow write past end of device */
508 if (to >= this->totlen)
509 return -EINVAL;
510
511#if 0
512 /* Don't allow a single write to cross a 512-byte block boundary */
e5580fbe 513 if (to + len > ( (to | 0x1ff) + 1))
1da177e4
LT
514 len = ((to | 0x1ff) + 1) - to;
515#else
516 /* Don't allow writes which aren't exactly one block */
517 if (to & 0x1ff || len != 0x200)
518 return -EINVAL;
519#endif
520
521 /* Find the chip which is to be used and select it */
522 if (this->curfloor != mychip->floor) {
523 DoC_SelectFloor(docptr, mychip->floor);
524 DoC_SelectChip(docptr, mychip->chip);
525 } else if (this->curchip != mychip->chip) {
526 DoC_SelectChip(docptr, mychip->chip);
527 }
528 this->curfloor = mychip->floor;
529 this->curchip = mychip->chip;
530
531 /* Reset the chip, see Software Requirement 11.4 item 1. */
532 DoC_Command(docptr, NAND_CMD_RESET, 0x00);
533 DoC_WaitReady(docptr);
534 /* Set device to main plane of flash */
535 DoC_Command(docptr, NAND_CMD_READ0, 0x00);
536
537 /* issue the Serial Data In command to initial the Page Program process */
538 DoC_Command(docptr, NAND_CMD_SEQIN, 0x00);
539 DoC_Address(docptr, 3, to, 0x00, 0x00);
540 DoC_WaitReady(docptr);
541
7f8a8940
TG
542 /* init the ECC engine, see Reed-Solomon EDC/ECC 11.1 .*/
543 WriteDOC (DOC_ECC_RESET, docptr, ECCConf);
544 WriteDOC (DOC_ECC_EN | DOC_ECC_RW, docptr, ECCConf);
1da177e4
LT
545
546 /* Write the data via the internal pipeline through CDSN IO register,
547 see Pipelined Write Operations 11.2 */
548#ifndef USE_MEMCPY
549 for (i = 0; i < len; i++) {
550 /* N.B. you have to increase the source address in this way or the
551 ECC logic will not work properly */
552 WriteDOC(buf[i], docptr, Mil_CDSN_IO + i);
553 }
554#else
555 memcpy_toio(docptr + DoC_Mil_CDSN_IO, buf, len);
556#endif
557 WriteDOC(0x00, docptr, WritePipeTerm);
558
7f8a8940
TG
559 /* Write ECC data to flash, the ECC info is generated by the DiskOnChip ECC logic
560 see Reed-Solomon EDC/ECC 11.1 */
561 WriteDOC(0, docptr, NOP);
562 WriteDOC(0, docptr, NOP);
563 WriteDOC(0, docptr, NOP);
1da177e4 564
7f8a8940
TG
565 /* Read the ECC data through the DiskOnChip ECC logic */
566 for (i = 0; i < 6; i++) {
567 eccbuf[i] = ReadDOC(docptr, ECCSyndrome0 + i);
568 }
1da177e4 569
7f8a8940
TG
570 /* ignore the ECC engine */
571 WriteDOC(DOC_ECC_DIS, docptr , ECCConf);
1da177e4
LT
572
573#ifndef USE_MEMCPY
7f8a8940
TG
574 /* Write the ECC data to flash */
575 for (i = 0; i < 6; i++) {
576 /* N.B. you have to increase the source address in this way or the
577 ECC logic will not work properly */
578 WriteDOC(eccbuf[i], docptr, Mil_CDSN_IO + i);
579 }
1da177e4 580#else
7f8a8940 581 memcpy_toio(docptr + DoC_Mil_CDSN_IO, eccbuf, 6);
1da177e4
LT
582#endif
583
7f8a8940
TG
584 /* write the block status BLOCK_USED (0x5555) at the end of ECC data
585 FIXME: this is only a hack for programming the IPL area for LinuxBIOS
586 and should be replace with proper codes in user space utilities */
587 WriteDOC(0x55, docptr, Mil_CDSN_IO);
588 WriteDOC(0x55, docptr, Mil_CDSN_IO + 1);
1da177e4 589
7f8a8940 590 WriteDOC(0x00, docptr, WritePipeTerm);
1da177e4
LT
591
592#ifdef PSYCHO_DEBUG
7f8a8940
TG
593 printk("OOB data at %lx is %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
594 (long) to, eccbuf[0], eccbuf[1], eccbuf[2], eccbuf[3],
595 eccbuf[4], eccbuf[5]);
1da177e4 596#endif
1da177e4
LT
597
598 /* Commit the Page Program command and wait for ready
599 see Software Requirement 11.4 item 1.*/
600 DoC_Command(docptr, NAND_CMD_PAGEPROG, 0x00);
601 DoC_WaitReady(docptr);
602
603 /* Read the status of the flash device through CDSN IO register
604 see Software Requirement 11.4 item 5.*/
605 DoC_Command(docptr, NAND_CMD_STATUS, CDSN_CTRL_WP);
606 dummy = ReadDOC(docptr, ReadPipeInit);
607 DoC_Delay(docptr, 2);
608 if (ReadDOC(docptr, Mil_CDSN_IO) & 1) {
609 printk("Error programming flash\n");
610 /* Error in programming
611 FIXME: implement Bad Block Replacement (in nftl.c ??) */
612 *retlen = 0;
613 ret = -EIO;
614 }
615 dummy = ReadDOC(docptr, LastDataRead);
616
617 /* Let the caller know we completed it */
618 *retlen = len;
619
620 return ret;
621}
622
8593fbc6
TG
623static int doc_read_oob(struct mtd_info *mtd, loff_t ofs,
624 struct mtd_oob_ops *ops)
1da177e4
LT
625{
626#ifndef USE_MEMCPY
627 int i;
628#endif
629 volatile char dummy;
630 struct DiskOnChip *this = mtd->priv;
631 void __iomem *docptr = this->virtadr;
632 struct Nand *mychip = &this->chips[ofs >> this->chipshift];
8593fbc6
TG
633 uint8_t *buf = ops->oobbuf;
634 size_t len = ops->len;
635
636 BUG_ON(ops->mode != MTD_OOB_PLACE);
637
638 ofs += ops->ooboffs;
1da177e4
LT
639
640 /* Find the chip which is to be used and select it */
641 if (this->curfloor != mychip->floor) {
642 DoC_SelectFloor(docptr, mychip->floor);
643 DoC_SelectChip(docptr, mychip->chip);
644 } else if (this->curchip != mychip->chip) {
645 DoC_SelectChip(docptr, mychip->chip);
646 }
647 this->curfloor = mychip->floor;
648 this->curchip = mychip->chip;
649
650 /* disable the ECC engine */
651 WriteDOC (DOC_ECC_RESET, docptr, ECCConf);
652 WriteDOC (DOC_ECC_DIS, docptr, ECCConf);
653
654 /* issue the Read2 command to set the pointer to the Spare Data Area.
655 Polling the Flash Ready bit after issue 3 bytes address in
656 Sequence Read Mode, see Software Requirement 11.4 item 1.*/
657 DoC_Command(docptr, NAND_CMD_READOOB, CDSN_CTRL_WP);
658 DoC_Address(docptr, 3, ofs, CDSN_CTRL_WP, 0x00);
659 DoC_WaitReady(docptr);
660
661 /* Read the data out via the internal pipeline through CDSN IO register,
662 see Pipelined Read Operations 11.3 */
663 dummy = ReadDOC(docptr, ReadPipeInit);
664#ifndef USE_MEMCPY
665 for (i = 0; i < len-1; i++) {
666 /* N.B. you have to increase the source address in this way or the
667 ECC logic will not work properly */
668 buf[i] = ReadDOC(docptr, Mil_CDSN_IO + i);
669 }
670#else
671 memcpy_fromio(buf, docptr + DoC_Mil_CDSN_IO, len - 1);
672#endif
673 buf[len - 1] = ReadDOC(docptr, LastDataRead);
674
8593fbc6 675 ops->retlen = len;
1da177e4
LT
676
677 return 0;
678}
679
8593fbc6
TG
680static int doc_write_oob(struct mtd_info *mtd, loff_t ofs,
681 struct mtd_oob_ops *ops)
1da177e4
LT
682{
683#ifndef USE_MEMCPY
684 int i;
685#endif
686 volatile char dummy;
687 int ret = 0;
688 struct DiskOnChip *this = mtd->priv;
689 void __iomem *docptr = this->virtadr;
690 struct Nand *mychip = &this->chips[ofs >> this->chipshift];
8593fbc6
TG
691 uint8_t *buf = ops->oobbuf;
692 size_t len = ops->len;
693
694 BUG_ON(ops->mode != MTD_OOB_PLACE);
695
696 ofs += ops->ooboffs;
1da177e4
LT
697
698 /* Find the chip which is to be used and select it */
699 if (this->curfloor != mychip->floor) {
700 DoC_SelectFloor(docptr, mychip->floor);
701 DoC_SelectChip(docptr, mychip->chip);
702 } else if (this->curchip != mychip->chip) {
703 DoC_SelectChip(docptr, mychip->chip);
704 }
705 this->curfloor = mychip->floor;
706 this->curchip = mychip->chip;
707
708 /* disable the ECC engine */
709 WriteDOC (DOC_ECC_RESET, docptr, ECCConf);
710 WriteDOC (DOC_ECC_DIS, docptr, ECCConf);
711
712 /* Reset the chip, see Software Requirement 11.4 item 1. */
713 DoC_Command(docptr, NAND_CMD_RESET, CDSN_CTRL_WP);
714 DoC_WaitReady(docptr);
715 /* issue the Read2 command to set the pointer to the Spare Data Area. */
716 DoC_Command(docptr, NAND_CMD_READOOB, CDSN_CTRL_WP);
717
718 /* issue the Serial Data In command to initial the Page Program process */
719 DoC_Command(docptr, NAND_CMD_SEQIN, 0x00);
720 DoC_Address(docptr, 3, ofs, 0x00, 0x00);
721
722 /* Write the data via the internal pipeline through CDSN IO register,
723 see Pipelined Write Operations 11.2 */
724#ifndef USE_MEMCPY
725 for (i = 0; i < len; i++) {
726 /* N.B. you have to increase the source address in this way or the
727 ECC logic will not work properly */
728 WriteDOC(buf[i], docptr, Mil_CDSN_IO + i);
729 }
730#else
731 memcpy_toio(docptr + DoC_Mil_CDSN_IO, buf, len);
732#endif
733 WriteDOC(0x00, docptr, WritePipeTerm);
734
735 /* Commit the Page Program command and wait for ready
736 see Software Requirement 11.4 item 1.*/
737 DoC_Command(docptr, NAND_CMD_PAGEPROG, 0x00);
738 DoC_WaitReady(docptr);
739
740 /* Read the status of the flash device through CDSN IO register
741 see Software Requirement 11.4 item 5.*/
742 DoC_Command(docptr, NAND_CMD_STATUS, 0x00);
743 dummy = ReadDOC(docptr, ReadPipeInit);
744 DoC_Delay(docptr, 2);
745 if (ReadDOC(docptr, Mil_CDSN_IO) & 1) {
746 printk("Error programming oob data\n");
747 /* FIXME: implement Bad Block Replacement (in nftl.c ??) */
8593fbc6 748 ops->retlen = 0;
1da177e4
LT
749 ret = -EIO;
750 }
751 dummy = ReadDOC(docptr, LastDataRead);
752
8593fbc6 753 ops->retlen = len;
1da177e4
LT
754
755 return ret;
756}
757
758int doc_erase (struct mtd_info *mtd, struct erase_info *instr)
759{
760 volatile char dummy;
761 struct DiskOnChip *this = mtd->priv;
762 __u32 ofs = instr->addr;
763 __u32 len = instr->len;
764 void __iomem *docptr = this->virtadr;
765 struct Nand *mychip = &this->chips[ofs >> this->chipshift];
766
e5580fbe 767 if (len != mtd->erasesize)
1da177e4
LT
768 printk(KERN_WARNING "Erase not right size (%x != %x)n",
769 len, mtd->erasesize);
770
771 /* Find the chip which is to be used and select it */
772 if (this->curfloor != mychip->floor) {
773 DoC_SelectFloor(docptr, mychip->floor);
774 DoC_SelectChip(docptr, mychip->chip);
775 } else if (this->curchip != mychip->chip) {
776 DoC_SelectChip(docptr, mychip->chip);
777 }
778 this->curfloor = mychip->floor;
779 this->curchip = mychip->chip;
780
781 instr->state = MTD_ERASE_PENDING;
782
783 /* issue the Erase Setup command */
784 DoC_Command(docptr, NAND_CMD_ERASE1, 0x00);
785 DoC_Address(docptr, 2, ofs, 0x00, 0x00);
786
787 /* Commit the Erase Start command and wait for ready
788 see Software Requirement 11.4 item 1.*/
789 DoC_Command(docptr, NAND_CMD_ERASE2, 0x00);
790 DoC_WaitReady(docptr);
791
792 instr->state = MTD_ERASING;
793
794 /* Read the status of the flash device through CDSN IO register
795 see Software Requirement 11.4 item 5.
796 FIXME: it seems that we are not wait long enough, some blocks are not
797 erased fully */
798 DoC_Command(docptr, NAND_CMD_STATUS, CDSN_CTRL_WP);
799 dummy = ReadDOC(docptr, ReadPipeInit);
800 DoC_Delay(docptr, 2);
801 if (ReadDOC(docptr, Mil_CDSN_IO) & 1) {
802 printk("Error Erasing at 0x%x\n", ofs);
803 /* There was an error
804 FIXME: implement Bad Block Replacement (in nftl.c ??) */
805 instr->state = MTD_ERASE_FAILED;
806 } else
807 instr->state = MTD_ERASE_DONE;
808 dummy = ReadDOC(docptr, LastDataRead);
809
810 mtd_erase_callback(instr);
811
812 return 0;
813}
814
815/****************************************************************************
816 *
817 * Module stuff
818 *
819 ****************************************************************************/
820
1da177e4
LT
821static void __exit cleanup_doc2001(void)
822{
823 struct mtd_info *mtd;
824 struct DiskOnChip *this;
825
826 while ((mtd=docmillist)) {
827 this = mtd->priv;
828 docmillist = this->nextdoc;
e5580fbe 829
1da177e4 830 del_mtd_device(mtd);
e5580fbe 831
1da177e4
LT
832 iounmap(this->virtadr);
833 kfree(this->chips);
834 kfree(mtd);
835 }
1da177e4
LT
836}
837
838module_exit(cleanup_doc2001);
1da177e4
LT
839
840MODULE_LICENSE("GPL");
841MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org> et al.");
842MODULE_DESCRIPTION("Alternative driver for DiskOnChip Millennium");