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2f9f7628 ML |
1 | /* |
2 | * MTD SPI driver for ST M25Pxx flash chips | |
3 | * | |
4 | * Author: Mike Lavender, mike@steroidmicros.com | |
5 | * | |
6 | * Copyright (c) 2005, Intec Automation Inc. | |
7 | * | |
8 | * Some parts are based on lart.c by Abraham Van Der Merwe | |
9 | * | |
10 | * Cleaned up and generalized based on mtd_dataflash.c | |
11 | * | |
12 | * This code is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License version 2 as | |
14 | * published by the Free Software Foundation. | |
15 | * | |
16 | */ | |
17 | ||
18 | #include <linux/init.h> | |
19 | #include <linux/module.h> | |
20 | #include <linux/device.h> | |
21 | #include <linux/interrupt.h> | |
22 | #include <linux/interrupt.h> | |
23 | #include <linux/mtd/mtd.h> | |
24 | #include <linux/mtd/partitions.h> | |
25 | #include <linux/spi/spi.h> | |
26 | #include <linux/spi/flash.h> | |
27 | ||
28 | #include <asm/semaphore.h> | |
29 | ||
30 | ||
31 | /* NOTE: AT 25F and SST 25LF series are very similar, | |
32 | * but commands for sector erase and chip id differ... | |
33 | */ | |
34 | ||
35 | #define FLASH_PAGESIZE 256 | |
36 | ||
37 | /* Flash opcodes. */ | |
38 | #define OPCODE_WREN 6 /* Write enable */ | |
39 | #define OPCODE_RDSR 5 /* Read status register */ | |
40 | #define OPCODE_READ 3 /* Read data bytes */ | |
41 | #define OPCODE_PP 2 /* Page program */ | |
42 | #define OPCODE_SE 0xd8 /* Sector erase */ | |
43 | #define OPCODE_RES 0xab /* Read Electronic Signature */ | |
44 | #define OPCODE_RDID 0x9f /* Read JEDEC ID */ | |
45 | ||
46 | /* Status Register bits. */ | |
47 | #define SR_WIP 1 /* Write in progress */ | |
48 | #define SR_WEL 2 /* Write enable latch */ | |
49 | #define SR_BP0 4 /* Block protect 0 */ | |
50 | #define SR_BP1 8 /* Block protect 1 */ | |
51 | #define SR_BP2 0x10 /* Block protect 2 */ | |
52 | #define SR_SRWD 0x80 /* SR write protect */ | |
53 | ||
54 | /* Define max times to check status register before we give up. */ | |
55 | #define MAX_READY_WAIT_COUNT 100000 | |
56 | ||
57 | ||
58 | #ifdef CONFIG_MTD_PARTITIONS | |
59 | #define mtd_has_partitions() (1) | |
60 | #else | |
61 | #define mtd_has_partitions() (0) | |
62 | #endif | |
63 | ||
64 | /****************************************************************************/ | |
65 | ||
66 | struct m25p { | |
67 | struct spi_device *spi; | |
68 | struct semaphore lock; | |
69 | struct mtd_info mtd; | |
70 | unsigned partitioned; | |
71 | u8 command[4]; | |
72 | }; | |
73 | ||
74 | static inline struct m25p *mtd_to_m25p(struct mtd_info *mtd) | |
75 | { | |
76 | return container_of(mtd, struct m25p, mtd); | |
77 | } | |
78 | ||
79 | /****************************************************************************/ | |
80 | ||
81 | /* | |
82 | * Internal helper functions | |
83 | */ | |
84 | ||
85 | /* | |
86 | * Read the status register, returning its value in the location | |
87 | * Return the status register value. | |
88 | * Returns negative if error occurred. | |
89 | */ | |
90 | static int read_sr(struct m25p *flash) | |
91 | { | |
92 | ssize_t retval; | |
93 | u8 code = OPCODE_RDSR; | |
94 | u8 val; | |
95 | ||
96 | retval = spi_write_then_read(flash->spi, &code, 1, &val, 1); | |
97 | ||
98 | if (retval < 0) { | |
99 | dev_err(&flash->spi->dev, "error %d reading SR\n", | |
100 | (int) retval); | |
101 | return retval; | |
102 | } | |
103 | ||
104 | return val; | |
105 | } | |
106 | ||
107 | ||
108 | /* | |
109 | * Set write enable latch with Write Enable command. | |
110 | * Returns negative if error occurred. | |
111 | */ | |
112 | static inline int write_enable(struct m25p *flash) | |
113 | { | |
114 | u8 code = OPCODE_WREN; | |
115 | ||
116 | return spi_write_then_read(flash->spi, &code, 1, NULL, 0); | |
117 | } | |
118 | ||
119 | ||
120 | /* | |
121 | * Service routine to read status register until ready, or timeout occurs. | |
122 | * Returns non-zero if error. | |
123 | */ | |
124 | static int wait_till_ready(struct m25p *flash) | |
125 | { | |
126 | int count; | |
127 | int sr; | |
128 | ||
129 | /* one chip guarantees max 5 msec wait here after page writes, | |
130 | * but potentially three seconds (!) after page erase. | |
131 | */ | |
132 | for (count = 0; count < MAX_READY_WAIT_COUNT; count++) { | |
133 | if ((sr = read_sr(flash)) < 0) | |
134 | break; | |
135 | else if (!(sr & SR_WIP)) | |
136 | return 0; | |
137 | ||
138 | /* REVISIT sometimes sleeping would be best */ | |
139 | } | |
140 | ||
141 | return 1; | |
142 | } | |
143 | ||
144 | ||
145 | /* | |
146 | * Erase one sector of flash memory at offset ``offset'' which is any | |
147 | * address within the sector which should be erased. | |
148 | * | |
149 | * Returns 0 if successful, non-zero otherwise. | |
150 | */ | |
151 | static int erase_sector(struct m25p *flash, u32 offset) | |
152 | { | |
153 | DEBUG(MTD_DEBUG_LEVEL3, "%s: %s at 0x%08x\n", flash->spi->dev.bus_id, | |
154 | __FUNCTION__, offset); | |
155 | ||
156 | /* Wait until finished previous write command. */ | |
157 | if (wait_till_ready(flash)) | |
158 | return 1; | |
159 | ||
160 | /* Send write enable, then erase commands. */ | |
161 | write_enable(flash); | |
162 | ||
163 | /* Set up command buffer. */ | |
164 | flash->command[0] = OPCODE_SE; | |
165 | flash->command[1] = offset >> 16; | |
166 | flash->command[2] = offset >> 8; | |
167 | flash->command[3] = offset; | |
168 | ||
169 | spi_write(flash->spi, flash->command, sizeof(flash->command)); | |
170 | ||
171 | return 0; | |
172 | } | |
173 | ||
174 | /****************************************************************************/ | |
175 | ||
176 | /* | |
177 | * MTD implementation | |
178 | */ | |
179 | ||
180 | /* | |
181 | * Erase an address range on the flash chip. The address range may extend | |
182 | * one or more erase sectors. Return an error is there is a problem erasing. | |
183 | */ | |
184 | static int m25p80_erase(struct mtd_info *mtd, struct erase_info *instr) | |
185 | { | |
186 | struct m25p *flash = mtd_to_m25p(mtd); | |
187 | u32 addr,len; | |
188 | ||
37466ea8 | 189 | DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %d\n", |
2f9f7628 ML |
190 | flash->spi->dev.bus_id, __FUNCTION__, "at", |
191 | (u32)instr->addr, instr->len); | |
192 | ||
193 | /* sanity checks */ | |
194 | if (instr->addr + instr->len > flash->mtd.size) | |
195 | return -EINVAL; | |
196 | if ((instr->addr % mtd->erasesize) != 0 | |
197 | || (instr->len % mtd->erasesize) != 0) { | |
198 | return -EINVAL; | |
199 | } | |
200 | ||
201 | addr = instr->addr; | |
202 | len = instr->len; | |
203 | ||
204 | down(&flash->lock); | |
205 | ||
206 | /* now erase those sectors */ | |
207 | while (len) { | |
208 | if (erase_sector(flash, addr)) { | |
209 | instr->state = MTD_ERASE_FAILED; | |
210 | up(&flash->lock); | |
211 | return -EIO; | |
212 | } | |
213 | ||
214 | addr += mtd->erasesize; | |
215 | len -= mtd->erasesize; | |
216 | } | |
217 | ||
218 | up(&flash->lock); | |
219 | ||
220 | instr->state = MTD_ERASE_DONE; | |
221 | mtd_erase_callback(instr); | |
222 | ||
223 | return 0; | |
224 | } | |
225 | ||
226 | /* | |
227 | * Read an address range from the flash chip. The address range | |
228 | * may be any size provided it is within the physical boundaries. | |
229 | */ | |
230 | static int m25p80_read(struct mtd_info *mtd, loff_t from, size_t len, | |
231 | size_t *retlen, u_char *buf) | |
232 | { | |
233 | struct m25p *flash = mtd_to_m25p(mtd); | |
234 | struct spi_transfer t[2]; | |
235 | struct spi_message m; | |
236 | ||
237 | DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %zd\n", | |
238 | flash->spi->dev.bus_id, __FUNCTION__, "from", | |
239 | (u32)from, len); | |
240 | ||
241 | /* sanity checks */ | |
242 | if (!len) | |
243 | return 0; | |
244 | ||
245 | if (from + len > flash->mtd.size) | |
246 | return -EINVAL; | |
247 | ||
8275c642 VW |
248 | spi_message_init(&m); |
249 | memset(t, 0, (sizeof t)); | |
250 | ||
251 | t[0].tx_buf = flash->command; | |
252 | t[0].len = sizeof(flash->command); | |
253 | spi_message_add_tail(&t[0], &m); | |
254 | ||
255 | t[1].rx_buf = buf; | |
256 | t[1].len = len; | |
257 | spi_message_add_tail(&t[1], &m); | |
258 | ||
259 | /* Byte count starts at zero. */ | |
260 | if (retlen) | |
261 | *retlen = 0; | |
262 | ||
2f9f7628 ML |
263 | down(&flash->lock); |
264 | ||
265 | /* Wait till previous write/erase is done. */ | |
266 | if (wait_till_ready(flash)) { | |
267 | /* REVISIT status return?? */ | |
268 | up(&flash->lock); | |
269 | return 1; | |
270 | } | |
271 | ||
2f9f7628 ML |
272 | /* NOTE: OPCODE_FAST_READ (if available) is faster... */ |
273 | ||
274 | /* Set up the write data buffer. */ | |
275 | flash->command[0] = OPCODE_READ; | |
276 | flash->command[1] = from >> 16; | |
277 | flash->command[2] = from >> 8; | |
278 | flash->command[3] = from; | |
279 | ||
2f9f7628 ML |
280 | spi_sync(flash->spi, &m); |
281 | ||
282 | *retlen = m.actual_length - sizeof(flash->command); | |
283 | ||
284 | up(&flash->lock); | |
285 | ||
286 | return 0; | |
287 | } | |
288 | ||
289 | /* | |
290 | * Write an address range to the flash chip. Data must be written in | |
291 | * FLASH_PAGESIZE chunks. The address range may be any size provided | |
292 | * it is within the physical boundaries. | |
293 | */ | |
294 | static int m25p80_write(struct mtd_info *mtd, loff_t to, size_t len, | |
295 | size_t *retlen, const u_char *buf) | |
296 | { | |
297 | struct m25p *flash = mtd_to_m25p(mtd); | |
298 | u32 page_offset, page_size; | |
299 | struct spi_transfer t[2]; | |
300 | struct spi_message m; | |
301 | ||
302 | DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %zd\n", | |
303 | flash->spi->dev.bus_id, __FUNCTION__, "to", | |
304 | (u32)to, len); | |
305 | ||
306 | if (retlen) | |
307 | *retlen = 0; | |
308 | ||
309 | /* sanity checks */ | |
310 | if (!len) | |
311 | return(0); | |
312 | ||
313 | if (to + len > flash->mtd.size) | |
314 | return -EINVAL; | |
315 | ||
8275c642 VW |
316 | spi_message_init(&m); |
317 | memset(t, 0, (sizeof t)); | |
318 | ||
319 | t[0].tx_buf = flash->command; | |
320 | t[0].len = sizeof(flash->command); | |
321 | spi_message_add_tail(&t[0], &m); | |
322 | ||
323 | t[1].tx_buf = buf; | |
324 | spi_message_add_tail(&t[1], &m); | |
325 | ||
2f9f7628 ML |
326 | down(&flash->lock); |
327 | ||
328 | /* Wait until finished previous write command. */ | |
329 | if (wait_till_ready(flash)) | |
330 | return 1; | |
331 | ||
332 | write_enable(flash); | |
333 | ||
2f9f7628 ML |
334 | /* Set up the opcode in the write buffer. */ |
335 | flash->command[0] = OPCODE_PP; | |
336 | flash->command[1] = to >> 16; | |
337 | flash->command[2] = to >> 8; | |
338 | flash->command[3] = to; | |
339 | ||
2f9f7628 ML |
340 | /* what page do we start with? */ |
341 | page_offset = to % FLASH_PAGESIZE; | |
342 | ||
343 | /* do all the bytes fit onto one page? */ | |
344 | if (page_offset + len <= FLASH_PAGESIZE) { | |
2f9f7628 ML |
345 | t[1].len = len; |
346 | ||
347 | spi_sync(flash->spi, &m); | |
348 | ||
349 | *retlen = m.actual_length - sizeof(flash->command); | |
350 | } else { | |
351 | u32 i; | |
352 | ||
353 | /* the size of data remaining on the first page */ | |
354 | page_size = FLASH_PAGESIZE - page_offset; | |
355 | ||
2f9f7628 ML |
356 | t[1].len = page_size; |
357 | spi_sync(flash->spi, &m); | |
358 | ||
359 | *retlen = m.actual_length - sizeof(flash->command); | |
360 | ||
361 | /* write everything in PAGESIZE chunks */ | |
362 | for (i = page_size; i < len; i += page_size) { | |
363 | page_size = len - i; | |
364 | if (page_size > FLASH_PAGESIZE) | |
365 | page_size = FLASH_PAGESIZE; | |
366 | ||
367 | /* write the next page to flash */ | |
368 | flash->command[1] = (to + i) >> 16; | |
369 | flash->command[2] = (to + i) >> 8; | |
370 | flash->command[3] = (to + i); | |
371 | ||
372 | t[1].tx_buf = buf + i; | |
373 | t[1].len = page_size; | |
374 | ||
375 | wait_till_ready(flash); | |
376 | ||
377 | write_enable(flash); | |
378 | ||
379 | spi_sync(flash->spi, &m); | |
380 | ||
7111763d DB |
381 | if (retlen) |
382 | *retlen += m.actual_length | |
383 | - sizeof(flash->command); | |
2f9f7628 ML |
384 | } |
385 | } | |
386 | ||
387 | up(&flash->lock); | |
388 | ||
389 | return 0; | |
390 | } | |
391 | ||
392 | ||
393 | /****************************************************************************/ | |
394 | ||
395 | /* | |
396 | * SPI device driver setup and teardown | |
397 | */ | |
398 | ||
399 | struct flash_info { | |
400 | char *name; | |
401 | u8 id; | |
402 | u16 jedec_id; | |
403 | unsigned sector_size; | |
404 | unsigned n_sectors; | |
405 | }; | |
406 | ||
407 | static struct flash_info __devinitdata m25p_data [] = { | |
408 | /* REVISIT: fill in JEDEC ids, for parts that have them */ | |
409 | { "m25p05", 0x05, 0x0000, 32 * 1024, 2 }, | |
410 | { "m25p10", 0x10, 0x0000, 32 * 1024, 4 }, | |
411 | { "m25p20", 0x11, 0x0000, 64 * 1024, 4 }, | |
412 | { "m25p40", 0x12, 0x0000, 64 * 1024, 8 }, | |
413 | { "m25p80", 0x13, 0x0000, 64 * 1024, 16 }, | |
414 | { "m25p16", 0x14, 0x0000, 64 * 1024, 32 }, | |
415 | { "m25p32", 0x15, 0x0000, 64 * 1024, 64 }, | |
416 | { "m25p64", 0x16, 0x2017, 64 * 1024, 128 }, | |
417 | }; | |
418 | ||
419 | /* | |
420 | * board specific setup should have ensured the SPI clock used here | |
421 | * matches what the READ command supports, at least until this driver | |
422 | * understands FAST_READ (for clocks over 25 MHz). | |
423 | */ | |
424 | static int __devinit m25p_probe(struct spi_device *spi) | |
425 | { | |
426 | struct flash_platform_data *data; | |
427 | struct m25p *flash; | |
428 | struct flash_info *info; | |
429 | unsigned i; | |
430 | ||
431 | /* Platform data helps sort out which chip type we have, as | |
432 | * well as how this board partitions it. | |
433 | */ | |
434 | data = spi->dev.platform_data; | |
435 | if (!data || !data->type) { | |
436 | /* FIXME some chips can identify themselves with RES | |
437 | * or JEDEC get-id commands. Try them ... | |
438 | */ | |
439 | DEBUG(MTD_DEBUG_LEVEL1, "%s: no chip id\n", | |
440 | flash->spi->dev.bus_id); | |
441 | return -ENODEV; | |
442 | } | |
443 | ||
444 | for (i = 0, info = m25p_data; i < ARRAY_SIZE(m25p_data); i++, info++) { | |
445 | if (strcmp(data->type, info->name) == 0) | |
446 | break; | |
447 | } | |
448 | if (i == ARRAY_SIZE(m25p_data)) { | |
449 | DEBUG(MTD_DEBUG_LEVEL1, "%s: unrecognized id %s\n", | |
450 | flash->spi->dev.bus_id, data->type); | |
451 | return -ENODEV; | |
452 | } | |
453 | ||
454 | flash = kzalloc(sizeof *flash, SLAB_KERNEL); | |
455 | if (!flash) | |
456 | return -ENOMEM; | |
457 | ||
458 | flash->spi = spi; | |
459 | init_MUTEX(&flash->lock); | |
460 | dev_set_drvdata(&spi->dev, flash); | |
461 | ||
462 | if (data->name) | |
463 | flash->mtd.name = data->name; | |
464 | else | |
465 | flash->mtd.name = spi->dev.bus_id; | |
466 | ||
467 | flash->mtd.type = MTD_NORFLASH; | |
468 | flash->mtd.flags = MTD_CAP_NORFLASH; | |
469 | flash->mtd.size = info->sector_size * info->n_sectors; | |
470 | flash->mtd.erasesize = info->sector_size; | |
471 | flash->mtd.erase = m25p80_erase; | |
472 | flash->mtd.read = m25p80_read; | |
473 | flash->mtd.write = m25p80_write; | |
474 | ||
475 | dev_info(&spi->dev, "%s (%d Kbytes)\n", info->name, | |
476 | flash->mtd.size / 1024); | |
477 | ||
478 | DEBUG(MTD_DEBUG_LEVEL2, | |
479 | "mtd .name = %s, .size = 0x%.8x (%uM) " | |
480 | ".erasesize = 0x%.8x (%uK) .numeraseregions = %d\n", | |
481 | flash->mtd.name, | |
482 | flash->mtd.size, flash->mtd.size / (1024*1024), | |
483 | flash->mtd.erasesize, flash->mtd.erasesize / 1024, | |
484 | flash->mtd.numeraseregions); | |
485 | ||
486 | if (flash->mtd.numeraseregions) | |
487 | for (i = 0; i < flash->mtd.numeraseregions; i++) | |
488 | DEBUG(MTD_DEBUG_LEVEL2, | |
489 | "mtd.eraseregions[%d] = { .offset = 0x%.8x, " | |
490 | ".erasesize = 0x%.8x (%uK), " | |
491 | ".numblocks = %d }\n", | |
492 | i, flash->mtd.eraseregions[i].offset, | |
493 | flash->mtd.eraseregions[i].erasesize, | |
494 | flash->mtd.eraseregions[i].erasesize / 1024, | |
495 | flash->mtd.eraseregions[i].numblocks); | |
496 | ||
497 | ||
498 | /* partitions should match sector boundaries; and it may be good to | |
499 | * use readonly partitions for writeprotected sectors (BP2..BP0). | |
500 | */ | |
501 | if (mtd_has_partitions()) { | |
502 | struct mtd_partition *parts = NULL; | |
503 | int nr_parts = 0; | |
504 | ||
505 | #ifdef CONFIG_MTD_CMDLINE_PARTS | |
506 | static const char *part_probes[] = { "cmdlinepart", NULL, }; | |
507 | ||
508 | nr_parts = parse_mtd_partitions(&flash->mtd, | |
509 | part_probes, &parts, 0); | |
510 | #endif | |
511 | ||
512 | if (nr_parts <= 0 && data && data->parts) { | |
513 | parts = data->parts; | |
514 | nr_parts = data->nr_parts; | |
515 | } | |
516 | ||
517 | if (nr_parts > 0) { | |
518 | for (i = 0; i < data->nr_parts; i++) { | |
519 | DEBUG(MTD_DEBUG_LEVEL2, "partitions[%d] = " | |
520 | "{.name = %s, .offset = 0x%.8x, " | |
521 | ".size = 0x%.8x (%uK) }\n", | |
522 | i, data->parts[i].name, | |
523 | data->parts[i].offset, | |
524 | data->parts[i].size, | |
525 | data->parts[i].size / 1024); | |
526 | } | |
527 | flash->partitioned = 1; | |
528 | return add_mtd_partitions(&flash->mtd, parts, nr_parts); | |
529 | } | |
530 | } else if (data->nr_parts) | |
531 | dev_warn(&spi->dev, "ignoring %d default partitions on %s\n", | |
532 | data->nr_parts, data->name); | |
533 | ||
534 | return add_mtd_device(&flash->mtd) == 1 ? -ENODEV : 0; | |
535 | } | |
536 | ||
537 | ||
538 | static int __devexit m25p_remove(struct spi_device *spi) | |
539 | { | |
540 | struct m25p *flash = dev_get_drvdata(&spi->dev); | |
541 | int status; | |
542 | ||
543 | /* Clean up MTD stuff. */ | |
544 | if (mtd_has_partitions() && flash->partitioned) | |
545 | status = del_mtd_partitions(&flash->mtd); | |
546 | else | |
547 | status = del_mtd_device(&flash->mtd); | |
548 | if (status == 0) | |
549 | kfree(flash); | |
550 | return 0; | |
551 | } | |
552 | ||
553 | ||
554 | static struct spi_driver m25p80_driver = { | |
555 | .driver = { | |
556 | .name = "m25p80", | |
557 | .bus = &spi_bus_type, | |
558 | .owner = THIS_MODULE, | |
559 | }, | |
560 | .probe = m25p_probe, | |
561 | .remove = __devexit_p(m25p_remove), | |
562 | }; | |
563 | ||
564 | ||
565 | static int m25p80_init(void) | |
566 | { | |
567 | return spi_register_driver(&m25p80_driver); | |
568 | } | |
569 | ||
570 | ||
571 | static void m25p80_exit(void) | |
572 | { | |
573 | spi_unregister_driver(&m25p80_driver); | |
574 | } | |
575 | ||
576 | ||
577 | module_init(m25p80_init); | |
578 | module_exit(m25p80_exit); | |
579 | ||
580 | MODULE_LICENSE("GPL"); | |
581 | MODULE_AUTHOR("Mike Lavender"); | |
582 | MODULE_DESCRIPTION("MTD SPI driver for ST M25Pxx flash chips"); |