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cbec19ae NP |
1 | /* |
2 | * $Id: $ | |
3 | * | |
4 | * Map driver for the Mainstone developer platform. | |
5 | * | |
6 | * Author: Nicolas Pitre | |
7 | * Copyright: (C) 2001 MontaVista Software Inc. | |
69f34c98 | 8 | * |
cbec19ae NP |
9 | * This program is free software; you can redistribute it and/or modify |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
14 | #include <linux/module.h> | |
15 | #include <linux/types.h> | |
16 | #include <linux/kernel.h> | |
17 | #include <linux/init.h> | |
4e57b681 | 18 | |
cbec19ae NP |
19 | #include <linux/mtd/mtd.h> |
20 | #include <linux/mtd/map.h> | |
21 | #include <linux/mtd/partitions.h> | |
4e57b681 | 22 | |
cbec19ae NP |
23 | #include <asm/io.h> |
24 | #include <asm/hardware.h> | |
25 | #include <asm/arch/pxa-regs.h> | |
26 | #include <asm/arch/mainstone.h> | |
90833fda | 27 | #include <asm/cacheflush.h> |
cbec19ae NP |
28 | |
29 | ||
30 | #define ROM_ADDR 0x00000000 | |
31 | #define FLASH_ADDR 0x04000000 | |
32 | ||
33 | #define WINDOW_SIZE 0x04000000 | |
34 | ||
35 | static void mainstone_map_inval_cache(struct map_info *map, unsigned long from, | |
36 | ssize_t len) | |
37 | { | |
90833fda | 38 | flush_ioremap_region(map->phys, map->cached, from, len); |
cbec19ae NP |
39 | } |
40 | ||
41 | static struct map_info mainstone_maps[2] = { { | |
42 | .size = WINDOW_SIZE, | |
43 | .phys = PXA_CS0_PHYS, | |
44 | .inval_cache = mainstone_map_inval_cache, | |
45 | }, { | |
46 | .size = WINDOW_SIZE, | |
47 | .phys = PXA_CS1_PHYS, | |
48 | .inval_cache = mainstone_map_inval_cache, | |
49 | } }; | |
50 | ||
51 | static struct mtd_partition mainstone_partitions[] = { | |
52 | { | |
53 | .name = "Bootloader", | |
54 | .size = 0x00040000, | |
55 | .offset = 0, | |
56 | .mask_flags = MTD_WRITEABLE /* force read-only */ | |
57 | },{ | |
58 | .name = "Kernel", | |
59 | .size = 0x00400000, | |
60 | .offset = 0x00040000, | |
61 | },{ | |
62 | .name = "Filesystem", | |
63 | .size = MTDPART_SIZ_FULL, | |
64 | .offset = 0x00440000 | |
65 | } | |
66 | }; | |
67 | ||
68 | static struct mtd_info *mymtds[2]; | |
69 | static struct mtd_partition *parsed_parts[2]; | |
70 | static int nr_parsed_parts[2]; | |
71 | ||
72 | static const char *probes[] = { "RedBoot", "cmdlinepart", NULL }; | |
73 | ||
74 | static int __init init_mainstone(void) | |
75 | { | |
76 | int SW7 = 0; /* FIXME: get from SCR (Mst doc section 3.2.1.1) */ | |
77 | int ret = 0, i; | |
78 | ||
79 | mainstone_maps[0].bankwidth = (BOOT_DEF & 1) ? 2 : 4; | |
80 | mainstone_maps[1].bankwidth = 4; | |
81 | ||
82 | /* Compensate for SW7 which swaps the flash banks */ | |
83 | mainstone_maps[SW7].name = "processor flash"; | |
84 | mainstone_maps[SW7 ^ 1].name = "main board flash"; | |
85 | ||
86 | printk(KERN_NOTICE "Mainstone configured to boot from %s\n", | |
87 | mainstone_maps[0].name); | |
88 | ||
89 | for (i = 0; i < 2; i++) { | |
90 | mainstone_maps[i].virt = ioremap(mainstone_maps[i].phys, | |
91 | WINDOW_SIZE); | |
92 | if (!mainstone_maps[i].virt) { | |
69f34c98 | 93 | printk(KERN_WARNING "Failed to ioremap %s\n", |
cbec19ae NP |
94 | mainstone_maps[i].name); |
95 | if (!ret) | |
96 | ret = -ENOMEM; | |
97 | continue; | |
98 | } | |
69f34c98 | 99 | mainstone_maps[i].cached = |
cbec19ae NP |
100 | ioremap_cached(mainstone_maps[i].phys, WINDOW_SIZE); |
101 | if (!mainstone_maps[i].cached) | |
102 | printk(KERN_WARNING "Failed to ioremap cached %s\n", | |
103 | mainstone_maps[i].name); | |
104 | simple_map_init(&mainstone_maps[i]); | |
105 | ||
69f34c98 | 106 | printk(KERN_NOTICE |
cbec19ae NP |
107 | "Probing %s at physical address 0x%08lx" |
108 | " (%d-bit bankwidth)\n", | |
69f34c98 | 109 | mainstone_maps[i].name, mainstone_maps[i].phys, |
cbec19ae NP |
110 | mainstone_maps[i].bankwidth * 8); |
111 | ||
112 | mymtds[i] = do_map_probe("cfi_probe", &mainstone_maps[i]); | |
69f34c98 | 113 | |
cbec19ae NP |
114 | if (!mymtds[i]) { |
115 | iounmap((void *)mainstone_maps[i].virt); | |
116 | if (mainstone_maps[i].cached) | |
117 | iounmap(mainstone_maps[i].cached); | |
118 | if (!ret) | |
119 | ret = -EIO; | |
120 | continue; | |
121 | } | |
122 | mymtds[i]->owner = THIS_MODULE; | |
123 | ||
124 | ret = parse_mtd_partitions(mymtds[i], probes, | |
125 | &parsed_parts[i], 0); | |
126 | ||
127 | if (ret > 0) | |
128 | nr_parsed_parts[i] = ret; | |
129 | } | |
130 | ||
131 | if (!mymtds[0] && !mymtds[1]) | |
132 | return ret; | |
69f34c98 | 133 | |
cbec19ae NP |
134 | for (i = 0; i < 2; i++) { |
135 | if (!mymtds[i]) { | |
69f34c98 | 136 | printk(KERN_WARNING "%s is absent. Skipping\n", |
cbec19ae NP |
137 | mainstone_maps[i].name); |
138 | } else if (nr_parsed_parts[i]) { | |
69f34c98 | 139 | add_mtd_partitions(mymtds[i], parsed_parts[i], |
cbec19ae NP |
140 | nr_parsed_parts[i]); |
141 | } else if (!i) { | |
142 | printk("Using static partitions on %s\n", | |
143 | mainstone_maps[i].name); | |
69f34c98 | 144 | add_mtd_partitions(mymtds[i], mainstone_partitions, |
cbec19ae NP |
145 | ARRAY_SIZE(mainstone_partitions)); |
146 | } else { | |
69f34c98 | 147 | printk("Registering %s as whole device\n", |
cbec19ae NP |
148 | mainstone_maps[i].name); |
149 | add_mtd_device(mymtds[i]); | |
150 | } | |
151 | } | |
152 | return 0; | |
153 | } | |
154 | ||
155 | static void __exit cleanup_mainstone(void) | |
156 | { | |
157 | int i; | |
158 | for (i = 0; i < 2; i++) { | |
159 | if (!mymtds[i]) | |
160 | continue; | |
161 | ||
162 | if (nr_parsed_parts[i] || !i) | |
163 | del_mtd_partitions(mymtds[i]); | |
164 | else | |
165 | del_mtd_device(mymtds[i]); | |
166 | ||
167 | map_destroy(mymtds[i]); | |
168 | iounmap((void *)mainstone_maps[i].virt); | |
169 | if (mainstone_maps[i].cached) | |
170 | iounmap(mainstone_maps[i].cached); | |
171 | kfree(parsed_parts[i]); | |
172 | } | |
173 | } | |
174 | ||
175 | module_init(init_mainstone); | |
176 | module_exit(cleanup_mainstone); | |
177 | ||
178 | MODULE_LICENSE("GPL"); | |
179 | MODULE_AUTHOR("Nicolas Pitre <nico@cam.org>"); | |
180 | MODULE_DESCRIPTION("MTD map driver for Intel Mainstone"); |