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3d12c0c7 JM |
1 | /* |
2 | * drivers/mtd/nand/ams-delta.c | |
3 | * | |
4 | * Copyright (C) 2006 Jonathan McDowell <noodles@earth.li> | |
5 | * | |
6 | * Derived from drivers/mtd/toto.c | |
7e95d1f1 | 7 | * Converted to platform driver by Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> |
eaca491f | 8 | * Partially stolen from drivers/mtd/nand/plat_nand.c |
3d12c0c7 JM |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | * | |
14 | * Overview: | |
15 | * This is a device driver for the NAND flash device found on the | |
16 | * Amstrad E3 (Delta). | |
17 | */ | |
18 | ||
19 | #include <linux/slab.h> | |
20 | #include <linux/init.h> | |
21 | #include <linux/module.h> | |
22 | #include <linux/delay.h> | |
23 | #include <linux/mtd/mtd.h> | |
24 | #include <linux/mtd/nand.h> | |
25 | #include <linux/mtd/partitions.h> | |
26 | #include <asm/io.h> | |
a09e64fb | 27 | #include <mach/hardware.h> |
3d12c0c7 | 28 | #include <asm/sizes.h> |
a09e64fb | 29 | #include <mach/gpio.h> |
ce491cf8 | 30 | #include <plat/board-ams-delta.h> |
3d12c0c7 JM |
31 | |
32 | /* | |
33 | * MTD structure for E3 (Delta) | |
34 | */ | |
35 | static struct mtd_info *ams_delta_mtd = NULL; | |
36 | ||
37 | #define NAND_MASK (AMS_DELTA_LATCH2_NAND_NRE | AMS_DELTA_LATCH2_NAND_NWE | AMS_DELTA_LATCH2_NAND_CLE | AMS_DELTA_LATCH2_NAND_ALE | AMS_DELTA_LATCH2_NAND_NCE | AMS_DELTA_LATCH2_NAND_NWP) | |
38 | ||
3d12c0c7 JM |
39 | /* |
40 | * Define partitions for flash devices | |
41 | */ | |
42 | ||
43 | static struct mtd_partition partition_info[] = { | |
44 | { .name = "Kernel", | |
45 | .offset = 0, | |
46 | .size = 3 * SZ_1M + SZ_512K }, | |
47 | { .name = "u-boot", | |
48 | .offset = 3 * SZ_1M + SZ_512K, | |
49 | .size = SZ_256K }, | |
50 | { .name = "u-boot params", | |
51 | .offset = 3 * SZ_1M + SZ_512K + SZ_256K, | |
52 | .size = SZ_256K }, | |
53 | { .name = "Amstrad LDR", | |
54 | .offset = 4 * SZ_1M, | |
55 | .size = SZ_256K }, | |
56 | { .name = "File system", | |
57 | .offset = 4 * SZ_1M + 1 * SZ_256K, | |
58 | .size = 27 * SZ_1M }, | |
59 | { .name = "PBL reserved", | |
60 | .offset = 32 * SZ_1M - 3 * SZ_256K, | |
61 | .size = 3 * SZ_256K }, | |
62 | }; | |
63 | ||
3d12c0c7 JM |
64 | static void ams_delta_write_byte(struct mtd_info *mtd, u_char byte) |
65 | { | |
66 | struct nand_chip *this = mtd->priv; | |
eaca491f | 67 | void __iomem *io_base = this->priv; |
3d12c0c7 | 68 | |
eaca491f JK |
69 | writew(0, io_base + OMAP_MPUIO_IO_CNTL); |
70 | writew(byte, this->IO_ADDR_W); | |
3d12c0c7 JM |
71 | ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NWE, 0); |
72 | ndelay(40); | |
73 | ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NWE, | |
74 | AMS_DELTA_LATCH2_NAND_NWE); | |
75 | } | |
76 | ||
77 | static u_char ams_delta_read_byte(struct mtd_info *mtd) | |
78 | { | |
79 | u_char res; | |
80 | struct nand_chip *this = mtd->priv; | |
eaca491f | 81 | void __iomem *io_base = this->priv; |
3d12c0c7 JM |
82 | |
83 | ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NRE, 0); | |
84 | ndelay(40); | |
eaca491f JK |
85 | writew(~0, io_base + OMAP_MPUIO_IO_CNTL); |
86 | res = readw(this->IO_ADDR_R); | |
3d12c0c7 JM |
87 | ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NRE, |
88 | AMS_DELTA_LATCH2_NAND_NRE); | |
89 | ||
90 | return res; | |
91 | } | |
92 | ||
93 | static void ams_delta_write_buf(struct mtd_info *mtd, const u_char *buf, | |
94 | int len) | |
95 | { | |
96 | int i; | |
97 | ||
98 | for (i=0; i<len; i++) | |
99 | ams_delta_write_byte(mtd, buf[i]); | |
100 | } | |
101 | ||
102 | static void ams_delta_read_buf(struct mtd_info *mtd, u_char *buf, int len) | |
103 | { | |
104 | int i; | |
105 | ||
106 | for (i=0; i<len; i++) | |
107 | buf[i] = ams_delta_read_byte(mtd); | |
108 | } | |
109 | ||
110 | static int ams_delta_verify_buf(struct mtd_info *mtd, const u_char *buf, | |
111 | int len) | |
112 | { | |
113 | int i; | |
114 | ||
115 | for (i=0; i<len; i++) | |
116 | if (buf[i] != ams_delta_read_byte(mtd)) | |
117 | return -EFAULT; | |
118 | ||
119 | return 0; | |
120 | } | |
121 | ||
7abd3ef9 TG |
122 | /* |
123 | * Command control function | |
124 | * | |
125 | * ctrl: | |
126 | * NAND_NCE: bit 0 -> bit 2 | |
127 | * NAND_CLE: bit 1 -> bit 7 | |
128 | * NAND_ALE: bit 2 -> bit 6 | |
129 | */ | |
130 | static void ams_delta_hwcontrol(struct mtd_info *mtd, int cmd, | |
131 | unsigned int ctrl) | |
132 | { | |
133 | ||
134 | if (ctrl & NAND_CTRL_CHANGE) { | |
135 | unsigned long bits; | |
136 | ||
fb8d81e4 JM |
137 | bits = (~ctrl & NAND_NCE) ? AMS_DELTA_LATCH2_NAND_NCE : 0; |
138 | bits |= (ctrl & NAND_CLE) ? AMS_DELTA_LATCH2_NAND_CLE : 0; | |
139 | bits |= (ctrl & NAND_ALE) ? AMS_DELTA_LATCH2_NAND_ALE : 0; | |
7abd3ef9 | 140 | |
fb8d81e4 JM |
141 | ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_CLE | |
142 | AMS_DELTA_LATCH2_NAND_ALE | | |
143 | AMS_DELTA_LATCH2_NAND_NCE, bits); | |
7abd3ef9 TG |
144 | } |
145 | ||
146 | if (cmd != NAND_CMD_NONE) | |
147 | ams_delta_write_byte(mtd, cmd); | |
148 | } | |
149 | ||
3d12c0c7 JM |
150 | static int ams_delta_nand_ready(struct mtd_info *mtd) |
151 | { | |
93a22f8b | 152 | return gpio_get_value(AMS_DELTA_GPIO_PIN_NAND_RB); |
3d12c0c7 JM |
153 | } |
154 | ||
155 | /* | |
156 | * Main initialization routine | |
157 | */ | |
7e95d1f1 | 158 | static int __devinit ams_delta_init(struct platform_device *pdev) |
3d12c0c7 JM |
159 | { |
160 | struct nand_chip *this; | |
eaca491f JK |
161 | struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
162 | void __iomem *io_base; | |
3d12c0c7 JM |
163 | int err = 0; |
164 | ||
eaca491f JK |
165 | if (!res) |
166 | return -ENXIO; | |
167 | ||
3d12c0c7 JM |
168 | /* Allocate memory for MTD device structure and private data */ |
169 | ams_delta_mtd = kmalloc(sizeof(struct mtd_info) + | |
170 | sizeof(struct nand_chip), GFP_KERNEL); | |
171 | if (!ams_delta_mtd) { | |
172 | printk (KERN_WARNING "Unable to allocate E3 NAND MTD device structure.\n"); | |
173 | err = -ENOMEM; | |
174 | goto out; | |
175 | } | |
176 | ||
177 | ams_delta_mtd->owner = THIS_MODULE; | |
178 | ||
179 | /* Get pointer to private data */ | |
180 | this = (struct nand_chip *) (&ams_delta_mtd[1]); | |
181 | ||
182 | /* Initialize structures */ | |
183 | memset(ams_delta_mtd, 0, sizeof(struct mtd_info)); | |
184 | memset(this, 0, sizeof(struct nand_chip)); | |
185 | ||
186 | /* Link the private data with the MTD structure */ | |
187 | ams_delta_mtd->priv = this; | |
188 | ||
eaca491f JK |
189 | if (!request_mem_region(res->start, resource_size(res), |
190 | dev_name(&pdev->dev))) { | |
191 | dev_err(&pdev->dev, "request_mem_region failed\n"); | |
192 | err = -EBUSY; | |
193 | goto out_free; | |
194 | } | |
195 | ||
196 | io_base = ioremap(res->start, resource_size(res)); | |
197 | if (io_base == NULL) { | |
198 | dev_err(&pdev->dev, "ioremap failed\n"); | |
199 | err = -EIO; | |
200 | goto out_release_io; | |
201 | } | |
202 | ||
203 | this->priv = io_base; | |
204 | ||
3d12c0c7 | 205 | /* Set address of NAND IO lines */ |
eaca491f JK |
206 | this->IO_ADDR_R = io_base + OMAP_MPUIO_INPUT_LATCH; |
207 | this->IO_ADDR_W = io_base + OMAP_MPUIO_OUTPUT; | |
3d12c0c7 | 208 | this->read_byte = ams_delta_read_byte; |
3d12c0c7 JM |
209 | this->write_buf = ams_delta_write_buf; |
210 | this->read_buf = ams_delta_read_buf; | |
211 | this->verify_buf = ams_delta_verify_buf; | |
7abd3ef9 | 212 | this->cmd_ctrl = ams_delta_hwcontrol; |
93a22f8b | 213 | if (gpio_request(AMS_DELTA_GPIO_PIN_NAND_RB, "nand_rdy") == 0) { |
3d12c0c7 JM |
214 | this->dev_ready = ams_delta_nand_ready; |
215 | } else { | |
216 | this->dev_ready = NULL; | |
217 | printk(KERN_NOTICE "Couldn't request gpio for Delta NAND ready.\n"); | |
218 | } | |
219 | /* 25 us command delay time */ | |
220 | this->chip_delay = 30; | |
6dfc6d25 | 221 | this->ecc.mode = NAND_ECC_SOFT; |
3d12c0c7 | 222 | |
eaca491f JK |
223 | platform_set_drvdata(pdev, io_base); |
224 | ||
3d12c0c7 JM |
225 | /* Set chip enabled, but */ |
226 | ams_delta_latch2_write(NAND_MASK, AMS_DELTA_LATCH2_NAND_NRE | | |
227 | AMS_DELTA_LATCH2_NAND_NWE | | |
228 | AMS_DELTA_LATCH2_NAND_NCE | | |
229 | AMS_DELTA_LATCH2_NAND_NWP); | |
230 | ||
25985edc | 231 | /* Scan to find existence of the device */ |
3d12c0c7 JM |
232 | if (nand_scan(ams_delta_mtd, 1)) { |
233 | err = -ENXIO; | |
234 | goto out_mtd; | |
235 | } | |
236 | ||
237 | /* Register the partitions */ | |
238 | add_mtd_partitions(ams_delta_mtd, partition_info, | |
239 | ARRAY_SIZE(partition_info)); | |
240 | ||
241 | goto out; | |
242 | ||
243 | out_mtd: | |
eaca491f JK |
244 | platform_set_drvdata(pdev, NULL); |
245 | iounmap(io_base); | |
246 | out_release_io: | |
247 | release_mem_region(res->start, resource_size(res)); | |
248 | out_free: | |
3d12c0c7 JM |
249 | kfree(ams_delta_mtd); |
250 | out: | |
251 | return err; | |
252 | } | |
253 | ||
3d12c0c7 JM |
254 | /* |
255 | * Clean up routine | |
256 | */ | |
7e95d1f1 | 257 | static int __devexit ams_delta_cleanup(struct platform_device *pdev) |
3d12c0c7 | 258 | { |
eaca491f JK |
259 | void __iomem *io_base = platform_get_drvdata(pdev); |
260 | struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
261 | ||
3d12c0c7 JM |
262 | /* Release resources, unregister device */ |
263 | nand_release(ams_delta_mtd); | |
264 | ||
eaca491f JK |
265 | iounmap(io_base); |
266 | release_mem_region(res->start, resource_size(res)); | |
267 | ||
3d12c0c7 JM |
268 | /* Free the MTD device structure */ |
269 | kfree(ams_delta_mtd); | |
7e95d1f1 JK |
270 | |
271 | return 0; | |
272 | } | |
273 | ||
274 | static struct platform_driver ams_delta_nand_driver = { | |
275 | .probe = ams_delta_init, | |
276 | .remove = __devexit_p(ams_delta_cleanup), | |
277 | .driver = { | |
278 | .name = "ams-delta-nand", | |
279 | .owner = THIS_MODULE, | |
280 | }, | |
281 | }; | |
282 | ||
283 | static int __init ams_delta_nand_init(void) | |
284 | { | |
285 | return platform_driver_register(&ams_delta_nand_driver); | |
286 | } | |
287 | module_init(ams_delta_nand_init); | |
288 | ||
289 | static void __exit ams_delta_nand_exit(void) | |
290 | { | |
291 | platform_driver_unregister(&ams_delta_nand_driver); | |
3d12c0c7 | 292 | } |
7e95d1f1 | 293 | module_exit(ams_delta_nand_exit); |
3d12c0c7 JM |
294 | |
295 | MODULE_LICENSE("GPL"); | |
296 | MODULE_AUTHOR("Jonathan McDowell <noodles@earth.li>"); | |
297 | MODULE_DESCRIPTION("Glue layer for NAND flash on Amstrad E3 (Delta)"); |