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1da177e4 LT |
1 | /* |
2 | * drivers/mtd/nand/edb7312.c | |
3 | * | |
151e7659 | 4 | * Copyright (C) 2002 Marius Gröger (mag@sysgo.de) |
1da177e4 LT |
5 | * |
6 | * Derived from drivers/mtd/nand/autcpu12.c | |
7 | * Copyright (c) 2001 Thomas Gleixner (gleixner@autronix.de) | |
8 | * | |
61b03bd7 | 9 | * $Id: edb7312.c,v 1.12 2005/11/07 11:14:30 gleixner Exp $ |
1da177e4 LT |
10 | * |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License version 2 as | |
13 | * published by the Free Software Foundation. | |
14 | * | |
15 | * Overview: | |
16 | * This is a device driver for the NAND flash device found on the | |
17 | * CLEP7312 board which utilizes the Toshiba TC58V64AFT part. This is | |
18 | * a 64Mibit (8MiB x 8 bits) NAND flash device. | |
19 | */ | |
20 | ||
21 | #include <linux/slab.h> | |
22 | #include <linux/module.h> | |
23 | #include <linux/init.h> | |
24 | #include <linux/mtd/mtd.h> | |
25 | #include <linux/mtd/nand.h> | |
26 | #include <linux/mtd/partitions.h> | |
27 | #include <asm/io.h> | |
e0c7d767 | 28 | #include <asm/arch/hardware.h> /* for CLPS7111_VIRT_BASE */ |
1da177e4 LT |
29 | #include <asm/sizes.h> |
30 | #include <asm/hardware/clps7111.h> | |
31 | ||
32 | /* | |
33 | * MTD structure for EDB7312 board | |
34 | */ | |
35 | static struct mtd_info *ep7312_mtd = NULL; | |
36 | ||
37 | /* | |
38 | * Values specific to the EDB7312 board (used with EP7312 processor) | |
39 | */ | |
40 | #define EP7312_FIO_PBASE 0x10000000 /* Phys address of flash */ | |
41 | #define EP7312_PXDR 0x0001 /* | |
42 | * IO offset to Port B data register | |
43 | * where the CLE, ALE and NCE pins | |
44 | * are wired to. | |
45 | */ | |
46 | #define EP7312_PXDDR 0x0041 /* | |
47 | * IO offset to Port B data direction | |
48 | * register so we can control the IO | |
49 | * lines. | |
50 | */ | |
51 | ||
52 | /* | |
53 | * Module stuff | |
54 | */ | |
55 | ||
56 | static unsigned long ep7312_fio_pbase = EP7312_FIO_PBASE; | |
e0c7d767 DW |
57 | static void __iomem *ep7312_pxdr = (void __iomem *)EP7312_PXDR; |
58 | static void __iomem *ep7312_pxddr = (void __iomem *)EP7312_PXDDR; | |
1da177e4 LT |
59 | |
60 | #ifdef CONFIG_MTD_PARTITIONS | |
61 | /* | |
62 | * Define static partitions for flash device | |
63 | */ | |
64 | static struct mtd_partition partition_info[] = { | |
e0c7d767 DW |
65 | {.name = "EP7312 Nand Flash", |
66 | .offset = 0, | |
67 | .size = 8 * 1024 * 1024} | |
1da177e4 | 68 | }; |
e0c7d767 | 69 | |
1da177e4 LT |
70 | #define NUM_PARTITIONS 1 |
71 | ||
72 | #endif | |
73 | ||
61b03bd7 | 74 | /* |
1da177e4 | 75 | * hardware specific access to control-lines |
7abd3ef9 TG |
76 | * |
77 | * NAND_NCE: bit 0 -> bit 7 | |
78 | * NAND_CLE: bit 1 -> bit 4 | |
79 | * NAND_ALE: bit 2 -> bit 5 | |
1da177e4 | 80 | */ |
7abd3ef9 | 81 | static void ep7312_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) |
1da177e4 | 82 | { |
7abd3ef9 TG |
83 | struct nand_chip *chip = mtd->priv; |
84 | ||
85 | if (ctrl & NAND_CTRL_CHANGE) { | |
86 | unsigned char bits; | |
87 | ||
88 | bits = (ctrl & (NAND_CLE | NAND_ALE)) << 3; | |
89 | bits = (ctrl & NAND_NCE) << 7; | |
90 | ||
91 | clps_writeb((clps_readb(ep7312_pxdr) & 0xB0) | 0x10, | |
92 | ep7312_pxdr); | |
1da177e4 | 93 | } |
7abd3ef9 TG |
94 | if (cmd != NAND_CMD_NONE) |
95 | writeb(cmd, chip->IO_ADDR_W); | |
1da177e4 LT |
96 | } |
97 | ||
98 | /* | |
99 | * read device ready pin | |
100 | */ | |
101 | static int ep7312_device_ready(struct mtd_info *mtd) | |
102 | { | |
103 | return 1; | |
104 | } | |
e0c7d767 | 105 | |
1da177e4 LT |
106 | #ifdef CONFIG_MTD_PARTITIONS |
107 | const char *part_probes[] = { "cmdlinepart", NULL }; | |
108 | #endif | |
109 | ||
110 | /* | |
111 | * Main initialization routine | |
112 | */ | |
e0c7d767 | 113 | static int __init ep7312_init(void) |
1da177e4 LT |
114 | { |
115 | struct nand_chip *this; | |
116 | const char *part_type = 0; | |
117 | int mtd_parts_nb = 0; | |
118 | struct mtd_partition *mtd_parts = 0; | |
e0c7d767 | 119 | void __iomem *ep7312_fio_base; |
61b03bd7 | 120 | |
1da177e4 | 121 | /* Allocate memory for MTD device structure and private data */ |
e0c7d767 | 122 | ep7312_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL); |
1da177e4 LT |
123 | if (!ep7312_mtd) { |
124 | printk("Unable to allocate EDB7312 NAND MTD device structure.\n"); | |
125 | return -ENOMEM; | |
126 | } | |
61b03bd7 | 127 | |
1da177e4 LT |
128 | /* map physical adress */ |
129 | ep7312_fio_base = ioremap(ep7312_fio_pbase, SZ_1K); | |
e0c7d767 | 130 | if (!ep7312_fio_base) { |
1da177e4 LT |
131 | printk("ioremap EDB7312 NAND flash failed\n"); |
132 | kfree(ep7312_mtd); | |
133 | return -EIO; | |
134 | } | |
61b03bd7 | 135 | |
1da177e4 | 136 | /* Get pointer to private data */ |
e0c7d767 | 137 | this = (struct nand_chip *)(&ep7312_mtd[1]); |
61b03bd7 | 138 | |
1da177e4 | 139 | /* Initialize structures */ |
e0c7d767 DW |
140 | memset(ep7312_mtd, 0, sizeof(struct mtd_info)); |
141 | memset(this, 0, sizeof(struct nand_chip)); | |
61b03bd7 | 142 | |
1da177e4 LT |
143 | /* Link the private data with the MTD structure */ |
144 | ep7312_mtd->priv = this; | |
552d9205 | 145 | ep7312_mtd->owner = THIS_MODULE; |
61b03bd7 | 146 | |
1da177e4 LT |
147 | /* |
148 | * Set GPIO Port B control register so that the pins are configured | |
149 | * to be outputs for controlling the NAND flash. | |
150 | */ | |
151 | clps_writeb(0xf0, ep7312_pxddr); | |
61b03bd7 | 152 | |
1da177e4 LT |
153 | /* insert callbacks */ |
154 | this->IO_ADDR_R = ep7312_fio_base; | |
155 | this->IO_ADDR_W = ep7312_fio_base; | |
7abd3ef9 | 156 | this->cmd_ctrl = ep7312_hwcontrol; |
1da177e4 LT |
157 | this->dev_ready = ep7312_device_ready; |
158 | /* 15 us command delay time */ | |
159 | this->chip_delay = 15; | |
61b03bd7 | 160 | |
1da177e4 | 161 | /* Scan to find existence of the device */ |
e0c7d767 | 162 | if (nand_scan(ep7312_mtd, 1)) { |
1da177e4 | 163 | iounmap((void *)ep7312_fio_base); |
e0c7d767 | 164 | kfree(ep7312_mtd); |
1da177e4 LT |
165 | return -ENXIO; |
166 | } | |
1da177e4 LT |
167 | #ifdef CONFIG_MTD_PARTITIONS |
168 | ep7312_mtd->name = "edb7312-nand"; | |
e0c7d767 | 169 | mtd_parts_nb = parse_mtd_partitions(ep7312_mtd, part_probes, &mtd_parts, 0); |
1da177e4 LT |
170 | if (mtd_parts_nb > 0) |
171 | part_type = "command line"; | |
172 | else | |
173 | mtd_parts_nb = 0; | |
174 | #endif | |
175 | if (mtd_parts_nb == 0) { | |
176 | mtd_parts = partition_info; | |
177 | mtd_parts_nb = NUM_PARTITIONS; | |
178 | part_type = "static"; | |
179 | } | |
61b03bd7 | 180 | |
1da177e4 LT |
181 | /* Register the partitions */ |
182 | printk(KERN_NOTICE "Using %s partition definition\n", part_type); | |
183 | add_mtd_partitions(ep7312_mtd, mtd_parts, mtd_parts_nb); | |
61b03bd7 | 184 | |
1da177e4 LT |
185 | /* Return happy */ |
186 | return 0; | |
187 | } | |
e0c7d767 | 188 | |
1da177e4 LT |
189 | module_init(ep7312_init); |
190 | ||
191 | /* | |
192 | * Clean up routine | |
193 | */ | |
e0c7d767 | 194 | static void __exit ep7312_cleanup(void) |
1da177e4 | 195 | { |
e0c7d767 | 196 | struct nand_chip *this = (struct nand_chip *)&ep7312_mtd[1]; |
61b03bd7 | 197 | |
1da177e4 | 198 | /* Release resources, unregister device */ |
e0c7d767 | 199 | nand_release(ap7312_mtd); |
61b03bd7 | 200 | |
25f0c659 AL |
201 | /* Release io resource */ |
202 | iounmap((void *)this->IO_ADDR_R); | |
203 | ||
1da177e4 | 204 | /* Free the MTD device structure */ |
e0c7d767 | 205 | kfree(ep7312_mtd); |
1da177e4 | 206 | } |
e0c7d767 | 207 | |
1da177e4 LT |
208 | module_exit(ep7312_cleanup); |
209 | ||
210 | MODULE_LICENSE("GPL"); | |
211 | MODULE_AUTHOR("Marius Groeger <mag@sysgo.de>"); | |
212 | MODULE_DESCRIPTION("MTD map driver for Cogent EDB7312 board"); |